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1 © 2008, Renesas Technology America, Inc., All Rights Reserved Course Introduction Purpose This training course highlights M16C 16-bit and 32-bit devices recommended for new designs. Objectives Learn about the M16C roadmap and key devices in the product line Understand the advantages of the R32C MCUs Content 23 pages 1 question Learning Time 20 minutes

M16C Family Product Overview - Part 2 - 6-12-09 With Images · recommended for new designs. Objectives Learn about the M16C roadmap and key devices in the product line Understand

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1© 2008, Renesas Technology America, Inc., All Rights Reserved

Course Introduction

Purpose

� This training course highlights M16C 16-bit and 32-bit devices

recommended for new designs.

Objectives

� Learn about the M16C roadmap and key devices in the product line

� Understand the advantages of the R32C MCUs

Content

� 23 pages

� 1 question

Learning Time

� 20 minutes

2© 2008, Renesas Technology America, Inc., All Rights Reserved

� High Performance

CISC with FPU

32323232----BitBitBitBit

� Superscalar &

MMU

� Video and audio

processing

32323232----BitBitBitBit

� Application specific

integration

� Scalable solutions

for general purpose

16161616----BitBitBitBit

H8S(35 MHz)

H8SX(80 MHz)

Renesas MCU & MPU Portfolio

RX/600(200 MHz)

SH-4A(600 MHz)

RISC

CISC

� Lowest cost MCUs

8888----BitBitBitBit

R32C(80 MHz)

M16C(32 MHz)

R8C(20 MHz)

SH-2, SH-2A(200 MHz)

H8

(20 MHz)

RX/200(50 MHz)

R-Secure

(20 MHz)

3© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C Platform Compatibility

4© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C Product Updates

5© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C Product Update

6© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C/65M16C/65M16C/65M16C/65

PWM1 +

PWM2 +

PMC0 +

PMC1 +

M16C/64AM16C/64AM16C/64AM16C/64A

1

2

3

4

5

6

7

8

9

P94/DA1/TB4IN

P93/DA0/TB3IN

P92/TB2IN/SOUT3

P91/TB1IN/SIN3

P90/TB0IN/CLK3

BYTE

CNVSS

P87/XCIN

P86/XCOUT

100

99

98

97

96

M16C/62PM16C/62PM16C/62PM16C/62P

Pin Compatibility

M16C Pin compatibility

7© 2008, Renesas Technology America, Inc., All Rights Reserved

Operating frequency: 20MHz

1.8V Operation

RTC : Full Calendar

Key on wakeup : +4

M16C/63

Operating frequency: 32MHz(PLL)

On-chip Osc. : +40MHz

M16C/65

Operating frequency: 25MHz(PLL)

DMAC : + 2ch

RTC :1 week

UART/SIO : + 3ch

Multi-Master

I2C Bus : 1ch

EXT-INT : + 2ch

Data Flash : +4KB

+CEC H/W

Remote control circuit

POR

On-chip Osc. :+125kHz

PWM : 8bitx2ch

LVD : + 1Level

User Boot : 16KB

On-chip Debugger

M16C/64A

Operating frequency: 24MHz(PLL)

10bitA/D :+ 8ch

8bitD/A : 2ch

SIO :+ 2ch

Timer :+ 5ch

Three phase

inverter control

LVD :2Level

On-chip Osc. : 1ch

Data Flash : 4KB

M16C/62P

Operating frequency

: 16MHz

DMAC : 2ch

10bitA/D : 18ch

UART/SIO : 3ch

Timer : 6ch

EXT-INT : 6ch

WDT

CRC

M16C/30P

Upper C

ompatible

M16C/6x Compatibility

Pin Compatibility

*M16C/30B @ 32MHz

8© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C Applications

Utility MeteringGas, Water, Electricity, Heat Power Meter

AMR (Automated Meter Reading)

Health MonitoringFitness/ Glucose Measurement

Pain relief/Muscle Stimulation

SecurityFire + Burglar Detection Systems

Sensors, CCTV

ePOS/BarcodeCard Readers, Cash Registers, Bar Code

Readers, Money Handling, Vending

Industrial AutomationIndustrial Vehicle, Machine Control

Equipments,

Robotics,

White GoodsWasher, Dryer, Dishwasher, Oven,

Hob, Refrigerator, Freezer

AutomotiveEngine Control, Airbags, In-chassis

Networking

CIS, Car Audio

PC and Server Keyboard and Power Management

Authentication and Security

HVAC (Heating, Ventilation, AC)Heating, Ventilation, Air Conditioning, Boiler

Control

Building AutomationTemperature/Lighting Control,

House-Keeping Network, Elevators

9© 2008, Renesas Technology America, Inc., All Rights Reserved

100 128[pins]

12 x 12mm

0.5mm pitch

14 x 14mm

0.5mm pitch

14 x 20mm

0.65mm pitch

14 x 20mm

0.5mm pitch

PKG

80

80 pins

LQFP

100 pins

LQFP

100 pins

QFP

128 pins

LQFP

64 pins

LQFP

14 x 14mm

0.65mm pitch

80 pins

LQFP

10 x 10mm

0.5mm pitch

/63

/56/56

/5L /5L

/65

/63

/64A

/63

/56

/5L

/65

/64A

/63

/65 /65

/6C /6C

64

F:In planning

M16C/5x, /6x Series Package Options

10© 2008, Renesas Technology America, Inc., All Rights Reserved

SFR

Internal RAM

Reserved area

Internal ROM

(4KB Data area)

External area

Reserved area

External area

Reserved area

Internal ROM

(Program area)

4 Kbytes

4 Kbytes

8 Kbytes

8 Kbytes

8 Kbytes

32 Kbytes

64 Kbytes

64 Kbytes

64 Kbytes

M16C/62P

64 Kbytes

64 Kbytes

64 Kbytes

64 Kbytes

SFR

Internal RAM

Reserved area

External area

Reserved area

External area

Reserved area

Internal ROM

(Program1 area)

M16C/65

(e.g.) 256-KB version

M16C Next Generation Memory Map

Internal ROM

(4KBX2 Data area)

SFR

Internal ROM(16KB Program2 area)

Data Flash

Doubles

Boot Loader

Moves to

Special Region

Available Program Area is Same

272-KB

256KB 256KB

11© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C/56 & /5L block diagram

Peripherals 64pin 80pin

•Timers •Timer A 16 bit 5ch 5ch•Timer B 16 bit 3ch 3ch•Timer S 16 bit (Capture/Compare) 1ch 1ch•Timer RTC 1ch 1ch•Three phase motor control 1ch 1ch

•Serial I/O•USART, I2C, IEBus 4ch 5ch•Multi Master I2C 1ch 1ch

•DMA 4ch 4ch•Watchdog Timer (also with OCO) 1ch 1ch•A/D Converter (two circuit with 10 Bit) 16ch 27ch

max. conv. speed: 1.6us/25MHz

•I/O ports 57pins 73pins•LED port 20mA/port (total max.80mA)•CAN RCANII module on M16C/5L

Watchdog

Timer 15 bit

M16C

CPU Core

32 MHz@

2.7-5.5V

Data Flash

2x 4kB block

Timer A

(5ch, 16 bit)

Timer B

(3ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

On-chip clock

PLL

5ch USART, I2C,

IEBus

A/D

(10-bit, 27 ch)

73 I/O pins

Flash

up to 256kB

RAM

up to 20kB

DMA 4ch

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•Fast OCO with 40MHz

•Slow OCO with 125kHz•PLL frequency synthesizer•POR and LVD

Memory

•Flash 64kB-256kB

•RAM 8kB-20kB

•Data Flash 2x4kB

•User Boot area 16KB

Package

•64P6Q LQFP (10mm x 10mm) @ 0.5mm pitch

•80P6Q LQFP (12mm x 12mm) @ 0.5mm pitch

Multiplier

1ch Multi

Master I2C

(1ch, 16 bit)

Timer S

(1ch, 16 bit)

M16C/60 CPU Core (16-bit)•32 MHz, 2.7-5.5V

Improved

LVD/POR

Timer RTC

Improved On

chip debug

Program ROM

II 16kB

CRCCAN 2.0B

optional

12© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C/64A block diagram

Peripherals 100pin

•Timers •Timer A 16 bit 5ch•Timer B 16 bit 6ch•Timer RTC (1 week timer) 1ch•Three phase motor control 1ch

•Serial I/O•USART, I2C, IEBus 6ch•SIO 2ch•Multi Master I2C 1ch

•DMA 4ch•Watchdog Timer 15bit 1ch•A/D Converter 10bit 26ch

max. conversion speed: 1.72us

•D/A Converter 8bit 2ch•I/O ports 89pins•CEC and Remote Control Interface•Interrupts (7 priority levels)

•Interrupt Vectors 70 •External sources 13

•CRC (CRC-CCITT) 1ch

Watchdog

Timer 15 bit

M16C

CPU Core

25 MHz@

2.7-5.5V

Data Flash

2x 4kB block

Timer A

(5ch, 16 bit)

Timer B

(6ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

On-chip clock

PLL

6ch USART, I2C,

IEBus

2ch SIO

A/D

(10-bit, 26 ch)

89 I/O pins

Flash

up to 512kB

RAM

up to 31kB

DMA 4ch

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•Slow OCO with 125kHz•PLL frequency synthesizer•POR and LVD

Memory

•Flash 128kB, 256kB, 512kB

•RAM 12kB, 16kB, 31kB

•Data Flash 2x4kB

•User Boot area 16KB

16bit Multiplier

M16C/60 CPU Core (16-bit)•25 MHz, 2.7-5.5V

Mode•Single chip•memory expansion•microprocessor mode

Program ROM II

16kB

Package

•100P6Q LQFP (14mm x 14mm) @ 0.5mm pitch

•100P6S QFP (14mm x 20mm) @ 0.65mm pitch

D/A

(8 bit, 2 ch)

CRC

On chip debug

LVD/POR

1ch Multi

Master I2C

(1ch, 16 bit)Timer RTC

CECRemote Control

13© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C/65 block diagram

Peripherals 100pin

•Timers •Timer A 16 bit 5ch•Timer B 16 bit 6ch•Timer RTC (1 week timer) 1ch•Three phase motor control 1ch

•Serial I/O•USART, I2C, IEBus 6ch•SIO 2ch•Multi Master I2C 1ch

•DMA 4ch•Watchdog Timer 15bit 1ch•A/D Converter 10bit 26ch

max. conversion speed: 1.72us

•D/A Converter 8bit 2ch•I/O ports 89pins•CEC and Remote Control Interface•Interrupts (7 priority levels)

•Interrupt Vectors 70 •External sources 13

•CRC (CRC-CCITT) 1ch•On-chip debugger

Watchdog

Timer 15 bit

M16C

CPU Core

32 MHz@

2.7-5.5V

Data Flash

2x 4kB block

Timer A

(5ch, 16 bit)

Timer B

(6ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

On-chip clock

PLL

6ch USART, I2C,

IEBus

2ch SIO

A/D

(10-bit, 26 ch)

89 I/O pins

Flash

up to 768kB

RAM

up to 47kB

DMA 4ch

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•Fast OCO with 40MHz

•Slow OCO with 125kHz•PLL frequency synthesizer•POR and LVD

Memory

•Flash 128kB, 256kB, 384kB, 512kB, 640kB, 768kB

•RAM 12kB, 20kB, 31kB, 47kB

•Data Flash 2x4kB

•User Boot area 16KB

16bit Multiplier

1ch Multi

Master I2C

(1ch, 16 bit)

LVD/POR

Timer RTC

On chip debug

Program ROM II

16kB

Package

•80P6S QFP (14mm x 14mm) @ 0.65mm pitch

•100P6Q LQFP (14mm x 14mm) @ 0.5mm pitch

•100P6S QFP (14mm x 20mm) @ 0.65mm pitch

•128P6Q LQFP (14mm x 20mm) @ 0.5mm pitch

D/A

(8 bit, 2 ch)

CRC

M16C/60 CPU Core (16-bit)•32 MHz, 2.7-5.5V

Mode•Single chip•memory expansion•microprocessor mode

CECRemote Control

14© 2008, Renesas Technology America, Inc., All Rights Reserved

M16C/63 block diagram

Peripherals 100pin

•Timers •Timer A 16 bit 5ch•Timer B 16 bit 6ch•Calendar RTC 1ch•Three phase motor control 1ch

•Serial I/O•USART, I2C, IEBus 6ch•SIO 2ch•Multi Master I2C 1ch

•DMA 4ch•Watchdog Timer 15bit 1ch•A/D Converter 10bit 26ch

max. conversion speed: 1.72us

•D/A Converter 8bit 2ch•I/O ports 89pins•CEC and Remote Control Interface•Interrupts (7 priority levels)

•Interrupt Vectors 70 •External sources 13

•CRC (CRC-CCITT) 1ch•On-chip debugger

Watchdog

Timer 15 bit

M16C

CPU Core

20 MHz@

2.7-5.5V

[email protected]

Data Flash

2x 4kB block

Timer A

(5ch, 16 bit)

Timer B

(6ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

On-chip clock

PLL

6ch USART, I2C,

IEBus

2ch SIO

A/D

(10-bit, 26 ch)

89 I/O pins

Flash

up to 512kB

RAM

up to 31kB

DMA 4ch

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•Fast OCO with 40MHz

•Slow OCO with 125kHz•PLL frequency synthesizer•POR and LVD

Memory

•Flash 128kB, 256kB, 384kB, 512kB

•RAM 12kB, 20kB, 31kB

•Data Flash 2x4kB

•User Boot area 16KB

16bit Multiplier

1ch Multi

Master I2C

(1ch, 16 bit)

LVD/POR

Calendar RTC

On chip debug

Program ROM II

16kB

Package

•80P6Q LQFP (10mm x 10mm) @ 0.5mm pitch

•80P6S QFP (14mm x 14mm) @ 0.65mm pitch

•100P6Q LQFP (14mm x 14mm) @ 0.5mm pitch

•100P6S QFP (14mm x 20mm) @ 0.65mm pitch

D/A

(8 bit, 2 ch)

CRC

M16C/60 CPU Core (16-bit)•20 MHz, 2.7-5.5V• 5 MHz, 1.8V-5.5V

Mode•Single chip•memory expansion•microprocessor mode

CECRemote Control

15© 2008, Renesas Technology America, Inc., All Rights Reserved

R32C, the 32-bit M16C Product

16© 2008, Renesas Technology America, Inc., All Rights Reserved

R32C Family overview

17© 2008, Renesas Technology America, Inc., All Rights Reserved

100 176 [pins]

12 x 12mm

0.5mm pitch

14 x 14mm

0.5mm pitch

20 x 20mm

0.5mm pitch

PKG

80

80 pins

LQFP

100 pins

LQFP

144 pins

LQFP

64 pins

LQFP

10 x 10mm

0.5mm pitch

/111 /111

/116

/117

/118

/111

/116

/117

/118

24 x 24mm

0.5mm pitch

176 pins

LQFP

/116A

/117A

/118A

144

F:In planning

64

100 pins

FLGA

/111

/116A

/117A

/118A

100

R32C/11x Series Package Development Plan

FF

5.5 x 5.5mm

0.5mm pitch

18© 2008, Renesas Technology America, Inc., All Rights Reserved

R32C/111 block diagram

Peripherals 100pin 80pin 64pin

•Timers •Timer A 16 bit 5ch 5ch 5ch•Timer B 16 bit 6ch 6ch 5ch•Three phase motor control 1ch 1ch 1ch

•Serial I/O•USART , I2C, IEBus, IrDA 9ch 7ch 6ch

•DMA 4ch 4ch 4ch•DMA II � � �

•Watchdog Timer 1ch 1ch 1ch•A/D Converter (10 Bit) 26ch 26ch 20ch•D/A Converter (8 bit) 2ch 1ch 1ch•I/O ports 84pins 68pins 52pins•Interrupts (7 priority levels)

•Interrupt Vectors 261 261 261•External sources 11 11 11

•CRC (CRC-CCITT) 1ch 1ch 1ch•X-Y converter (16bit x 16bit) 1ch 1ch 1ch•Intelligent I/O 3ch 3ch 3ch

•Time measurement function 16ch 16ch 16ch•Waveform generating function 19ch 19ch 19ch•Communication function 1ch 1ch 1ch

•On-chip debugger

CRC unitWatchdog

Timer 15 bit

R32C/100

CPU Core

50 MHz @

3V-5V

Timer A

(5ch, 16 bit)

Timer B

(6ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

OCO

PLL

9ch USART, I2C,

IEBus

A/D

(10-bit, 26 ch)

84 I/O pins

Flash

up to 512kB

RAM

up to 63kB

DMA 4ch

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•OCO (~125kHz)•PLL frequency synthesizer

32bit MultiplierD/A

(8 bit, 2 ch)

DataFlash

2x 4kB block

DMA II

3ch Intelligent

I/OX-Y converter

Memory

•Flash 128kB-512kB

•RAM 32kB-63kB

•Data Flash 2x4kB

FPU

R32C/100 CPU Core (32-bit)•50 MHz, 3V to 5V

Mode•Single chip•memory expansion (100-pin)•microprocessor mode (100-pin)

32bit Barrel

Shifter

On-chip-

DebugLVD

Package•64P6Q LQFP (12mm x 12mm) @ 0.5mm pitch•80P6Q LQFP (14mm x 14mm) @ 0.5mm pitch•100P6Q LQFP (14mm x 14mm) @ 0.5mm pitch•100F0M FLGA (5.5mm x 5.5mm) @ 0.5mm pitch

19© 2008, Renesas Technology America, Inc., All Rights Reserved

Peripherals

•Timers •Timer A 16 bit 5ch•Timer B 16 bit 6ch•Three phase motor control 1ch

•Serial I/O•USART , I2C, IEBus, IrDA 9ch

•IIC MultiMaster I/F 1ch•DMA 4ch•DMA II �

•Watchdog Timer 1ch•A/D Converter (10 Bit) 34ch•D/A Converter (8 bit) 2ch•I/O ports 122pins•5V tolerant I/O ports•Interrupts (7 priority levels)

•Interrupt Vectors 61•External sources 10

•CRC (CRC-CCITT) 1ch•X-Y converter (16bit x 16bit) 1ch•Intelligent I/O 3ch

•Time measurement function 16ch•Waveform generating function 19ch•Communication function 1ch

•CAN 0ch (R32C/116); 1ch (R32C/117); 2ch (R32C/118)

Clock generation circuit

•Main clock with Xin/Xout•Sub clock with Xcin/Xcout•OCO (~125kHz)•PLL frequency synthesizer

Package

•100P6Q LQFP (14mm x 14mm) @ 0.5mm pitch

•144P6Q LQFP (20mm x 20mm) @ 0.5mm pitch

Memory

•Flash 384kB-1MB

•RAM 40kB-63kB

•Data Flash 2x4kB

R32C/100 CPU Core (32-bit)•50 MHz, 3V to 5V

Mode•Single chip•memory expansion•microprocessor mode

R32C/116-118 block diagram

CRC unitWatchdog

Timer 15 bit

R32C/100

CPU Core

50 MHz @

3V-5V

Timer A

(5ch, 16 bit)

Timer B

(6ch, 16 bit)

Three-phase

motor control

timer

Main clock

Sub clock

OCO

PLL

9ch USART, I2C,

IEBus

A/D

(10-bit, 26 ch)

122 I/O pins

Flash

up to 1MB

RAM

up to 63kB

DMA 4ch

32bit MultiplierD/A

(8 bit, 2 ch)

DataFlash

2x 4kB block

DMA II

3ch Intelligent

I/OX-Y converter FPU

CAN0ch, 1ch or 2ch

I2C

MultiMaster

1ch

5V tolerant

I/O ports

32bit Barrel

Shifter

On-chip-

DebugLVD

20© 2008, Renesas Technology America, Inc., All Rights Reserved

Advantage: R32C timer features

R32C has 11 independent 16-Bit timer

� Timer A group has 5 timers TA0..TA4

� Timer B group has 6 timers TB0..TB5

Timers can be cascaded to enable longer time periods

Timers can be used as free running or reload type

Timer clock source can be system clock /1, /2, /4, /6, ..., /30 or subclock/32

Every timer has its own interrupt vector and start/stop bit.

NOYESPWM 8/16 Bit

YESNOPulse Period Measurement

YESNOPulse Width Measurement

NOYESOne Shot Out

YESYESEvent Counter

YESYESTimer

Timer B GroupTimer A GroupMode

21© 2008, Renesas Technology America, Inc., All Rights Reserved

Advantage: R32C intelligent I/0 features

Major Feature is a “Classic“ IC/OC-Unit

Additional Feature is “Phase Shift Waveform Output“ usable for Automotive

Lighting Control

R32C I/O is organized in groups

� Each group has 1 x 16-Bit free running base timer

� Each group has 8 channels IC/OC with 8 x 16-Bit Register for time measurement

/ waveform generation

� 1 Channel IC/OC Function share 1 pin

� Each Channel can be individually configured as IC or OC

22© 2008, Renesas Technology America, Inc., All Rights Reserved

Advantage: R32C UART Module Features

R32C has 9 independent UART modules

� All of them LIN V2.0 capable

Every UART has its own interrupt vector set

� Receive Interrupt

� Transmit Interrupt

8-Bit baudrate divider 0..255

Buffer register for continuous transmit and receive

23© 2008, Renesas Technology America, Inc., All Rights Reserved

CNVIF: Convert integer to float

ROUND: Convert float to signed integer

ADDF: Add floating Point

SUBF: Subtract floating point

MULF: Multiply floating point

DIVF: Divide floating point

CMPF: Compare floating Point

R32C/100 FPU Supported Instructions

R32C/100 supports built in floating point unit

(FPU) with single precision

R32C’s FPU reduces floating math

from >50 instructions to 1!

Advantage: FPU features

PROPERTIES

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