Maintenance Manual-Alarm and Performance Event

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1 Generation of Alarm and Performance Event 1-1............................................

1.1 Overview of SDH Alarm and Performance Event 1-1...................................

1.2 Generation and Detection of Alarm and Performance Event inSignal Flow of Higher Order Part 1-4.................................................................

1.2.1 Downlink Signal Flow 1-5.....................................................................

1.2.2 Uplink Signal Flow 1-8.........................................................................

1.3 Generation of Alarm and Performance in Signal Flow of LowerOrder Part 1-10.....................................................................................................

1.3.1 Downlink Signal Flow 1-11.....................................................................

1.3.2 Uplink Signal Flow 1-13.........................................................................

1.3.3 Difference between 34M/140M Electrical Interface AlarmSignal and 2M Electrical Interface Alarm Signal 1-14.....................................

1.4 SDH Alarm Suppression 1-15........................................................................

1.5 Generation and Detection of SDH Performance Event 1-17..........................

1.5.1 Bit Error 1-17..........................................................................................

1.5.2 Pointer Justification 1-20........................................................................

1.6 Application of Locating a Fault According to Signal Flow 1-23.......................

1.6.1 Bit Error 1-23..........................................................................................

1.6.2 Alarm 1-24..............................................................................................

1.6.3 Summary 1-26........................................................................................

2 Alarm Handling 2-1.............................................................................................

APS_FAIL 2-2.....................................................................................................APS_INDI 2-3.....................................................................................................

APS_PARA_ERR 2-4.........................................................................................

A_LOC 2-5..........................................................................................................

A_LO_J1 2-6......................................................................................................

AU_AIS 2-7.........................................................................................................

AU_LOP 2-8.......................................................................................................

B1B_EXC 2-9.....................................................................................................

B1_EXC 2-10........................................................................................................

B1_SD 2-11..........................................................................................................

B2_EXC 2-12........................................................................................................

B2_SD 2-13..........................................................................................................

B3_EXC 2-14........................................................................................................

B3_SD 2-15..........................................................................................................

BD_STATUS 2-16................................................................................................

BIP_EXC 2-17......................................................................................................

BIP_SD 2-18.........................................................................................................

BUF_ERR 2-19.....................................................................................................

BUS_LOC 2-20.....................................................................................................


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CC_LOC 2-21.......................................................................................................

CFG_OVFLOW 2-22............................................................................................

COMMUN_FAIL 2-23...........................................................................................

CONF_DATA_LOS 2-24......................................................................................

COOL_CUR_OVER 2-25.....................................................................................

DBMS_ERROR 2-26............................................................................................

DBMS_PROTECT_MODE 2-27...........................................................................

D_LO_J1 2-28......................................................................................................

DOWN_E1_AIS 2-29............................................................................................

E1_LOS 2-30........................................................................................................

ETH_LOS 2-31.....................................................................................................

EXER_FAIL 2-32..................................................................................................

EXT_SYNC_LOS 2-33.........................................................................................

FAN_FAIL 2-34.....................................................................................................

FI_FAIL 2-35.........................................................................................................

FPGA_ABN 2-36..................................................................................................

HARD_BAD 2-37..................................................................................................

HCS 2-38..............................................................................................................

HPAD_CROSSTR 2-39........................................................................................

HP_CROSSTR 2-40.............................................................................................

HP_LOM 2-41.......................................................................................................

HP_RDI 2-42........................................................................................................HP_REI 2-43........................................................................................................

HP_R_FIFO 2-44..................................................................................................

HP_SLM 2-45.......................................................................................................

HP_T_FIFO 2-46..................................................................................................

HP_TIM 2-47........................................................................................................

HP_UATEVENT 2-48...........................................................................................

HP_UNEQ 2-49....................................................................................................

IN_PWR_ABN 2-50..............................................................................................

IN_PWR_FAIL 2-51..............................................................................................J0_MM 2-52..........................................................................................................

K1_K2_M 2-53......................................................................................................

K2_M 2-54............................................................................................................

LCD 2-55..............................................................................................................

LOCK_CUR_FAIL 2-56........................................................................................

LOOP_ALM 2-57..................................................................................................

LP_AIS 2-58.........................................................................................................

LP_CROSSTR 2-59.............................................................................................

LP_RDI 2-60.........................................................................................................

LP_REI 2-61.........................................................................................................


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LP_RFI 2-62.........................................................................................................

LP_R_FIFO 2-63..................................................................................................

LP_SIZE_ERR 2-64.............................................................................................

LP_SLM 2-65........................................................................................................

LP_T_FIFO 2-66...................................................................................................

LP_TIM 2-67.........................................................................................................

LP_UATEVENT 2-68............................................................................................

LP_UNEQ 2-69.....................................................................................................

LSR_WILL_DIE 2-70............................................................................................

LTI 2-71................................................................................................................

MAIL_ERR 2-72...................................................................................................

MEM_ERR 2-73...................................................................................................

MSAD_CROSSTR 2-74.......................................................................................

MS_AIS 2-75........................................................................................................

MS_CROSSTR 2-76............................................................................................

MSP_INFO_LOSS 2-77.......................................................................................

MS_RDI 2-78........................................................................................................

MS_REI 2-79........................................................................................................

M_S_SW 2-80......................................................................................................

MS_UATEVENT 2-81...........................................................................................

NE_SF_LOST 2-82..............................................................................................

NESTATE_INSTALL 2-83....................................................................................NO_BD_SOFT 2-84.............................................................................................

OCD 2-85.............................................................................................................

OTH_BD_STATUS 2-86.......................................................................................

OUT_PWR_ABN 2-87..........................................................................................

OUT_PWR_UNDULATE 2-88..............................................................................

POWER_FAIL 2-89..............................................................................................

PS 2-90.................................................................................................................

PWR_MAJ_ALM 2-91..........................................................................................

PWR_MIN_ALM 2-92...........................................................................................P_LOS 2-93..........................................................................................................

RAM_ERR 2-94....................................................................................................

RAM_LOC 2-95....................................................................................................

RELAY_ALARM 2-96...........................................................................................

RR_LOC 2-97.......................................................................................................

RS_CROSSTR 2-98.............................................................................................

RS_UATEVENT 2-99...........................................................................................

R_APS 2-100..........................................................................................................

R_FIFO_E 2-101....................................................................................................

R_LOF 2-102..........................................................................................................


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R_LOS 2-103..........................................................................................................

R_OOF 2-104.........................................................................................................

S1_SYN_CHANGE 2-105......................................................................................

SECU_ALM 2-106..................................................................................................

SL4_ALM 2-107......................................................................................................

STM_ERR 2-108....................................................................................................

SUBCARD_ABN 2-109..........................................................................................

SYN_BAD 2-110.....................................................................................................

SYNC_C_LOS 2-111..............................................................................................

TAIP_LOC 2-112....................................................................................................

T_ALOS 2-113........................................................................................................

T_DLOS 2-114.......................................................................................................

TEMP_ALARM 2-115.............................................................................................

TEMP_OVER 2-116...............................................................................................

TEM_HA 2-117.......................................................................................................

TF 2-118.................................................................................................................

T_FIFO_E 2-119.....................................................................................................

T_LOC 2-120..........................................................................................................

T_LOS 2-121..........................................................................................................

T_LOTC 2-122........................................................................................................

T_LOXC 2-123.......................................................................................................

TR_LOC 2-124.......................................................................................................T_TDM 2-125.........................................................................................................

TU_AIS 2-126.........................................................................................................

TU_LOP 2-127.......................................................................................................

UHCS 2-128...........................................................................................................

UP_E1_AIS 2-129..................................................................................................

VC_AIS 2-130.........................................................................................................

VC_RDI 2-131........................................................................................................

VER_MISMATCH 2-132.........................................................................................

VP_AIS 2-133.........................................................................................................VP_RDI 2-134........................................................................................................

WORK_CUR_OVER 2-135....................................................................................

W_R_FAILURE 2-136............................................................................................

WRG_BD_TYPE 2-137..........................................................................................

3 Performance Event Handling 3-1.......................................................................

3.1 Performance Events of SDH Service 3-1.....................................................

3.2 ATM Service Performance Event 3-6...........................................................

3.3 Performance Events of Ethernet Service 3-7...............................................AUPJCHIGH 3-9.................................................................................................


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AUPJCLOW 3-10.................................................................................................

TUNPJC 3-11.......................................................................................................

TUPPJC 3-12.......................................................................................................

HPBBE 3-13.........................................................................................................

HPCSES 3-14.......................................................................................................

HPES 3-15............................................................................................................

HPFEBBE 3-16.....................................................................................................

HPFEES 3-17.......................................................................................................

HPFESES 3-18.....................................................................................................

HPSES 3-19.........................................................................................................

HPUAS 3-20.........................................................................................................

LPBBE 3-21..........................................................................................................

LPCSES 3-22.......................................................................................................

LPES 3-23............................................................................................................

LPFEBBE 3-24.....................................................................................................

LPFECSES 3-25...................................................................................................

LPFEES 3-26........................................................................................................

LPFESES 3-27.....................................................................................................

LPSES 3-28..........................................................................................................

LPUAS 3-29..........................................................................................................

MSBBE 3-30.........................................................................................................

MSCSES 3-31......................................................................................................MSES 3-32...........................................................................................................

MSFEBBE 3-33....................................................................................................

MSFECSES 3-34..................................................................................................

MSFEES 3-35.......................................................................................................

MSFESES 3-36....................................................................................................

MSSES 3-37.........................................................................................................

MSUAS 3-38.........................................................................................................

RSBBE 3-39.........................................................................................................

RSCSES 3-40.......................................................................................................

RSES 3-41............................................................................................................

RSOFS 3-42.........................................................................................................

RSOOF 3-43.........................................................................................................

RSSES 3-44.........................................................................................................

RSUAS 3-45.........................................................................................................


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HUAWEI

OptiX 2500+(Metro3000)

Mutil-service Optical Transmission System

Maintenance Manual Alarm and Performance Event

V100R006


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OptiX 2500+(Metro3000) Mutil-service Optical Transmission System

Maintenance Manual

Volume Alarm and Performance Event

Manual Version T2-040382-20040528-C-1.61

Product Version V100R006

BOM 31033382

Huawei Technologies Co., Ltd. provides customers with comprehensive technical support

and service. Please feel free to contact our local office, customer care center or company

headquarters.

Huawei Technologies Co., Ltd.

Address: Administration Building, Huawei Technologies Co., Ltd.,

Bantian, Longgang District, Shenzhen, P. R. China

Postal Code: 518129

Website: http://www.huawei.com

Email: [email protected]


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Copyright 2004 Huawei Technologies Co., Ltd.

All Rights Reserved

No part of this manual may be reproduced or transmitted in any form or by any

means without prior written consent of Huawei Technologies Co., Ltd.

Trademarks

, HUAWEI, C&C08, EAST8000, HONET, , ViewPoint, INtess, ETS, DMC,

TELLIN, InfoLink, Netkey, Quidway, SYNLOCK, Radium, M900/M1800,

TELESIGHT, Quidview, Musa, Airbridge, Tellwin, Inmedia, VRP, DOPRA, iTELLIN,

HUAWEI OptiX, C&C08iNET, NETENGINE, OptiX, iSite, U-SYS, iMUSE, OpenEye,

Lansway, SmartAX, infoX, TopEng are trademarks of Huawei Technologies Co.,

Ltd.

All other trademarks mentioned in this manual are the property of their respective

holders.

Notice

The information in this manual is subject to change without notice. Every effort has

been made in the preparation of this manual to ensure accuracy of the contents, but

all statements, information, and recommendations in this manual do not constitute

the warranty of any kind, express or implied.


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OptiX 2500+(Metro3000) MM-APE

1 About This Manual

Related Manuals

The manual package for an optical network product is shipped with the product. Thetable below lists the manual for the products.

Manuals shipped with the product

Manual Volume Usage

OptiX 2500+(Metro3000) Multi-Service OpticalTransmission System Technical Manual

Introduces the functionality, structure,performance, specifications, and theory ofthe product.

OptiX 2500+(Metro3000) Multi-Service OpticalTransmission System Hardware DescriptionManual

Introduces the hardware of the product,including cabinet, subrack, power, fan,board, and a variety of interfaces.

OptiX 2500+(Metro3000) Multi-Service OpticalTransmission System Installation Manual

Guides the on-site installation of the productand provides the information of the structuralparts.

RoutineMaintenance

TroubleshootingOptiX 2500+(Metro3000) Multi-Service OpticalTransmission System Maintenance Manual

Alarm andPerformance Event

Guides the analysis and troubleshooting ofcommon faults.


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About This Manual OptiX 2500+(Metro3000) MM-APE

Organization

The manual has the following organization:

Chapter Description

Chapter 1 Principle forGeneration

Introduces in detail the generation of alarms andperformance events and their relationships. It is a base touse alarms and performance events to solve problems.

Chapter 2 AlarmHandling

Provides a list of alarms with name, generation cause, andtroubleshooting. It provides a way of diagnostic analysisfor the user.

Chapter 3 Performance

Event Handling

Introduces the meaning and troubleshooting of

performance events in the transmission hierarchy in anorder of functions.

Intended Audience

This manual is for:

Maintenance engineer


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About This Manual OptiX 2500+(Metro3000) MM-APE

Conventions

The following conventions are used throughout this publication.

Symbol Description

Means reader be careful. In this situation, you might do something thatcould result in equipment damage or loss of data.

Means reader be careful. The equipment is static-sensitive.

Means reader be careful. In this situation, the high voltage could result inharm to yourself or others.

Means reader be careful. In this situation, the strong laser beam couldresult in harm to yourself or others.

Means reader take note. Notes contain helpful suggestions or usefulbackground information.

Release Upgrade Description

Release Release upgrade description

T2-040382-20040105-C-1.60 This manual is the first release.

T2-040382-20040528-C-1.61 Appendix the alarm of EGT2 and EFT.


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i

Contents

1 Generation of Alarm and Performance Event

1.1 Overview of SDH Alarm and Performance Event 1-1

1.2 Generation and Detection of Alarm and Performance

Event in Signal Flow of Higher Order Part 1-4

1.2.1 Downlink Signal Flow 1-5

1.2.2 Uplink Signal Flow 1-8

1.3 Generation of Alarm and Performance in Signal Flow of

Lower Order Part 1-10

1.3.1 Downlink Signal Flow 1-11

1.3.2 Uplink Signal Flow 1-13

1.3.3 Difference between 34M/140M Electrical Interface

Alarm Signal and 2M Electrical Interface Alarm Signal 1-14

1.4 SDH Alarm Suppression 1-15

1.5 Generation and Detection of SDH Performance Event 1-17

1.5.1 Bit Error 1-17

1.5.2 Pointer Justification 1-201.6 Application of Locating a Fault According to Signal Flow 1-23

1.6.1 Bit Error 1-23

1.6.2 Alarm 1-24

1.6.3 Summary 1-26

2 Alarm Handling

APS_FAIL 2-2

APS_INDI 2-3

APS_PARA_ERR 2-4

A_LOC 2-5

A_LO_J1 2-6

AU_AIS 2-7

AU_LOP 2-8

B1B_EXC 2-9


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ii

Contents

B1_EXC 2-10

B1_SD 2-11

B2_EXC 2-12

B2_SD 2-13

B3_EXC 2-14

B3_SD 2-15

BD_STATUS 2-16

BIP_EXC 2-17

BIP_SD 2-18

BUF_ERR 2-19

BUS_LOC 2-20

CC_LOC 2-21

CFG_OVFLOW 2-22

COMMUN_FAIL 2-23

CONF_DATA_LOS 2-24

COOL_CUR_OVER 2-25

DBMS_ERROR 2-26

DBMS_PROTECT_MODE 2-27

D_LO_J1 2-28

DOWN_E1_AIS 2-29

E1_LOS 2-30

ETH_LOS 2-31

EXER_FAIL 2-32

EXT_SYNC_LOS 2-33

FAN_FAIL 2-34

FI_FAIL 2-35

FPGA_ABN 2-36

HARD_BAD 2-37

HCS 2-38

HPAD_CROSSTR 2-39

HP_CROSSTR 2-40

HP_LOM 2-41

HP_RDI 2-42


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iii

Contents

HP_REI 2-43

HP_R_FIFO 2-44

HP_SLM 2-45

HP_T_FIFO 2-46

HP_TIM 2-47

HP_UATEVENT 2-48

HP_UNEQ 2-49

IN_PWR_ABN 2-50

IN_PWR_FAIL 2-51

J0_MM 2-52

K1_K2_M 2-53

K2_M 2-54

LCD 2-55

LOCK_CUR_FAIL 2-56

LOOP_ALM 2-57

LP_AIS 2-58

LP_CROSSTR 2-59

LP_RDI 2-60

LP_REI 2-61

LP_RFI 2-62

LP_R_FIFO 2-63

LP_SIZE_ERR 2-64

LP_SLM 2-65

LP_T_FIFO 2-66

LP_TIM 2-67

LP_UATEVENT 2-68

LP_UNEQ 2-69

LSR_WILL_DIE 2-70

LTI 2-71

MAIL_ERR 2-72

MEM_ERR 2-73

MSAD_CROSSTR 2-74

MS_AIS 2-75


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iv

Contents

MS_CROSSTR 2-76

MSP_INFO_LOSS 2-77

MS_RDI 2-78

MS_REI 2-79

M_S_SW 2-80

MS_UATEVENT 2-81

NE_SF_LOST 2-82

NESTATE_INSTALL 2-83

NO_BD_SOFT 2-84

OCD 2-85

OTH_BD_STATUS 2-86

OUT_PWR_ABN 2-87

OUT_PWR_UNDULATE 2-88

POWER_FAIL 2-89

PS 2-90

PWR_MAJ_ALM 2-91

PWR_MIN_ALM 2-92

P_LOS 2-93

RAM_ERR 2-94

RAM_LOC 2-95

RELAY_ALARM 2-96

RR_LOC 2-97

RS_CROSSTR 2-98

RS_UATEVENT 2-99

R_APS 2-100

R_FIFO_E 2-101

R_LOF 2-102

R_LOS 2-103

R_OOF 2-104

S1_SYN_CHANGE 2-105

SECU_ALM 2-106

SL4_ALM 2-107

STM_ERR 2-108


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v

Contents

SUBCARD_ABN 2-109

SYN_BAD 2-110

SYNC_C_LOS 2-111

TAIP_LOC 2-112

T_ALOS 2-113

T_DLOS 2-114

TEMP_ALARM 2-115

TEMP_OVER 2-116

TEM_HA 2-117

TF 2-118

T_FIFO_E 2-119

T_LOC 2-120

T_LOS 2-121

T_LOTC 2-122

T_LOXC 2-123

TR_LOC 2-124

T_TDM 2-125

TU_AIS 2-126

TU_LOP 2-127

UHCS 2-128

UP_E1_AIS 2-129

VC_AIS 2-130

VC_RDI 2-131

VER_MISMATCH 2-132

VP_AIS 2-133

VP_RDI 2-134

WORK_CUR_OVER 2-135

W_R_FAILURE 2-136

WRG_BD_TYPE 2-137


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vi

Contents

3 Performance Event Handling

3.1 Performance Events of SDH Service 3-1

3.2 ATM Service Performance Event 3-6

3.3 Performance Events of Ethernet Service 3-7

AUPJCHIGH 3-9

AUPJCLOW 3-10

TUNPJC 3-11

TUPPJC 3-12

HPBBE 3-13

HPCSES 3-14

HPES 3-15

HPFEBBE 3-16

HPFEES 3-17

HPFESES 3-18

HPSES 3-19

HPUAS 3-20LPBBE 3-21

LPCSES 3-22

LPES 3-23

LPFEBBE 3-24

LPFECSES 3-25

LPFEES 3-26

LPFESES 3-27

LPSES 3-28

LPUAS 3-29

MSBBE 3-30

MSCSES 3-31

MSES 3-32

MSFEBBE 3-33

MSFECSES 3-34

MSFEES 3-35


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vii

Contents

MSFESES 3-36

MSSES 3-37

MSUAS 3-38

RSBBE 3-39

RSCSES 3-40

RSES 3-41

RSOFS 3-42

RSOOF 3-43

RSSES 3-44

RSUAS 3-45


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1-1

1 Generation of Alarm and

Performance Event

This chapter introduces:

Generation of SDH service alarm and performance event

Application of SDH service alarm and performance event in fault locating

1.1 Overview of SDH Alarm and

Performance Event

There are abundant overhead bytes in SDH frame structure, including regeneratorsection overhead, multiplex section overhead, and path overhead. These overheadbytes carry alarm and performance event information, thus enabling SDH system astrong ability of on-line alarm and error monitoring. An understanding of thegeneration and monitoring modes of the alarm information allows you to locate thefailure rapidly. The SDH alarm signal flow is shown in Figure 1-1.


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Generation of Alarm and Performance Event OptiX 2500+(Metro3000) MM-APE

1-2

T1512780-93/d02

SPI RST (Note 1) MST MSA HPOM HUG HPC HPT HPA LPOM LUG LPC LPT LPA

PhysicalSection

Regenerator

Section Multiplex Section Higher Order Path Lower Order Path

UnusedLPC output/LP-UNEQ

LOF

RS-BIPError (B1)

Regenerated signal

passed through

HP-UNEQ

HP-TIM

HP-SLM

HP-BIP Error (B3)

HP-FEBE

HP-FERF

HP-FERF

HP-FEBE

LOS

MS-AIS

MS-Exc. Error (B2)

MS-BIP Error (B2)

MS-FERF

MS-FERF

AU-AIS

AU-LOP

HP-LOM/TU-LOP

LP-UNEQ

LP-TIM

LP-SLM

LP-BIP Error (B3/V5)

LP-FEBELP-FERF

LP-FERF

LP-FEBE

AU-AIS

TU-AIS

TU-AIS

HO Path signal passed through

HOVC with POH and unspecified payload

HO unequipped signal

LO Path signal passed through

LOVC with POH and unspecified payload

LO unequipped signal

UnusedHPC output/HQ-UNEQ

1

1

1

1

1

1

1

1

1

DetectionGenerationInsertion of all-ones (AIS) signalAlarm Indication SignalFar End Block ErrorFar End Receive FailureLoss Of Frame

Loss Of MultiframeLoss Of PointerLoss Of Signal

Signal Label MismatchTrace Identifier MismatchUnequipped signal per Recommendation G.709

1AISFEBEFERFLOF

LOMLOPLOS

SLMTIMUNEQ

Figure 1-1 SDH alarm signal flow


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1-3

1. Terminology agreement

In order to describe the positions where common alarms and performance eventsare generated and the generation modes, it is better to describe these commonalarms and performance events in detail along the signal flow. Signal flow, here, willbe classified into downlink and uplink signal flows according to the signal flowdirections.

The so-called downlink signal flow refers to the signal direction from the SDHinterface, to the cross-connect board, and then to the PDH interface.

On the contrary, the uplink signal flow refers to the signal direction from the PDHinterface, to cross-connect board, and then to the SDH interface.

The cross-connect board does not process any overhead byte in the signal flow. Inorder to describe signal flow in hierarchy, signal flow is divided into lower order part

(between the cross-connect board and the PDH interface) and higher order part(between the SDH interface and the cross-connect board), with the cross-connectboard as the boundary.

2. Two common alarms

AIS alarm (i.e. all "1"s alarm) inserts the all "1"s signal to the lower level circuits,indicating that the signal is unavailable. Common AIS signals include MS-AIS,AU-AIS, TU-AIS and E1-AIS.

RDI (remote defect indication) alarm: Indicates the alarm transferred back to thehome station from the opposite station after the opposite station has tested alarms ofLOS (loss of signal), AIS and TIM (trace identifier mismatch). Common RDI alarms

include MS-RDI, HP-RDI and LP-RDI.

Note:Note that the station does not necessarily have problem when an alarm is detectedon it.The alarm detected may be caused by the opposite station or due to othercauses.For example, R-LOS alarm is caused by broken fiber, and HP-LOM (higherorder path loss of multiframe) alarm at the home station is caused by the failedcross-connect board at the opposite station.


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1-4

1.2 Generation and Detection of

Alarm and Performance Event in

Signal Flow of Higher Order Part

The fault locating principle is "line first, then tributary; high level first, then low level".Since the alarm and performance data generated in the higher order part will causethe report of the lower order alarm and performance data. We shall first focus on thealarm, performance information generated between the SDH interface and thecross-connect board during maintenance. The signal flow chart of this route isillustrated in Figure 1-2.

"1"LOSSTM-Nopticalinterface

B1BI Err.

K2

AIS

MS-AIS

k2MS-RDI

B2

M1

Frame synchronizerand RS overheadprocessor

MS overheadprocessor

C2

AU-AIS

AU-LOP

J1HP-UNEQ

HP-TIM

B3B3 Err.

G1

G1

HP-REIHP-RDI

MS-REI

H4

C2HP-LOM

HP-SLM

B2-Err.

Downlink signal flow

Pointer processor and HPoverhead processor

AIS

A1, A2LOF

Signal transfer point Alarm termination point

(Report to SCC unit)(Insert down all "1"s signal)

H1,H2

H1,H2

"1"

"1"

Alarm report or return

(RST) (MST) (MSA, HPT)

Cross-connect unit

Figure 1-2 Flowchart of alarm signals generated between the SDH interface and the cross-connect board

Note:According to the processing positions of various overhead bytes in the STM-1 framestructure, we divide the overhead bytes into four modules: regenerator sectionoverhead, multiplex section overhead, and higher order path overhead and pointer.Ifthe first two modules have problems, generally all the higher order paths will beaffected, while the problem occurs in the overhead bytes of the last module willonlyaffect a certain higher order paths. Therefore, we can usually deduce the influencingfactor of the problem, and how to select the paths during the test.


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1-5

We'll describe the signal flow and processing of each overhead byte module bymodule in the following.

1.2.1 Downlink Signal Flow

1. Frame synchronizer and regenerator section overhead processor

Regenerator section overheads related to alarms and performances that will bemainly processed in this section are: framing byte (A1, A2), regenerator section tracebyte (J0), error monitor byte (B1).

The alarm signal flow is as follows:

(1) When the STM-N optical signal from the optical line enters the optical

receiving module, first, it is recovered into electrical signal after

optical/electrical conversion (O/E conversion) and then sent into frame

synchronizer and scrambler for processing. In this process, the O/E module

monitors this signal. If it is found that there is no light in the input signal,

optical power excessively low or high and rate of the input signal mismatch,

R-LOS (loss of signal) alarm will be reported.

Prompt:No light usually occurs in the case that the fiber is broken, the optical transmittingmodule at the opposite station fails or the optical receiving module at the homestation fails. The cause of excessively low optical power may be too much fiberattenuation or poor contact of the optical joint, etc. Over high optical power refers tothe received optical power overload. If this happens, check whether the opticalattenuator is damaged, or the transmission distance of the optical board is suitable,etc.The code type mismatch usually occurs when the signal rate between upstreamstation and downstream station is inconsistent, or failed STG board at upstreamstation will cause data transmission disorder, etc. At this moment it is necessary tocheck whether the optical board at upstream station is matched or the STG boardand cross-connect board are in normal operation, etc.

R-LOS alarm has no relation with overhead bytes, and it is only related to the qualityof input signal.

After R-LOS alarm occurs, only when optical receiving module at the home stationhas continuously tested two correct patterns of code type, and meanwhile it has nottested any new R-LOS alarm, can SDH equipment quit from R-LOS status and enternormal status.

In case R-LOS alarm occurs, the system will insert all "1"s signal to the lower levelcircuits.


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(2) After frame synchronizer has received STM-N signal sent from the

optical/electrical conversion module, it captures A1, A2 framing bytes in the

signal. Meanwhile it extracts line reference synchronous timing source from

the signal and sends it to the STG board for clock locking.

Normally, the A1 value is F6H, and the A2 value is 28H. If incorrect A1 and A2 valuesare detected in five successive frames, R-OOF (out of frame) alarm will be reported.If R-OOF alarm lasts for more than 3 ms, it will report loss of frame alarm R-LOF andinsert all "1"s signal. In case of R-LOF alarm, if the frame alignment state lasts formore than 1 ms, that means the equipment has resumed to normal.

J0 byte is used to confirm that both ends of the regenerator section are in continuousconnecting state. It requires that J0 bytes at receive end and transmit end be fullymatched. If they are not matched, the equipment will report J0-MM trace identifiermismatch alarm.

Scrambler is mainly engaged in unscrambling the bytes in the STM-N signals exceptfor the A1, A2 and J0 bytes.

(3) The regenerator section overhead processor extracts and processes other

regenerator section overhead bytes in the STM-N signal. Among all the

bytes, B1 byte is of utmost importance.

If the B1 byte recovered from STM-N signal is not in compliance with BIP-8computing result of the preceding STM-N frame, it will report B1 error. If the numberof B1 bit errors exceeds the threshold 10

-3, the B1-OVER alarm will be reported.

When ten serious errored seconds (SES, i.e. the errored blocks reach to 30% in onesecond) in regenerator section appear consecutively, it is considered that

RSUATEVENT (regenerator section unavailable time event) occurs.

At the same time, in this section these bytes, such as F1, D1~D3 and E1, whichhave nothing to do with alarm will be sent to the SCC board and OHP board.

2. Multiplex section overhead processor

Multiplex overhead bytes that are related to alarm and performance and will beprocessed in this part include: automatic protection switching channels (K1, K2),BIP-N24 (B2), multiplex section remote error indication (M1). The signal flow is asfollows:

(1) Multiplex section overhead processor extracts multiplex section overhead

bytes in STM-N signal for processing and completes SF and SD detection.It sends D4~D12, S1 and E2 to the SCC unit and overhead unit, meanwhile

realizes the shared multiplex section protection (MSP) function by the

cooperation of the SCC unit, cross-connect board and K1, K2 bytes.

If the b6-b8 of K2 byte is detected as 111, the MS-AIS alarm will be reported and all1s signal will be inserted.If the b6-b8 of K2 byte is detected as 110, the MS-RDIalarm will be reported.


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(2) If the B2 byte recovered from the STM-N signal does not consist with the

computing result of BIP-24 in the lastly received STM-N frame (All bits

expect for the regenerator section overhead), then the processor reports the

B2 bit error.

Whether to report MS-REI is determined by M1 bytes. MS-REI transfers the numberof error interleaved block detected by B2 byte.

If B2 bit error exceeds the threshold 10-6, B2-SD alarm will be generated. If the B2 bit

error exceeds the threshold 10-3, B2-OVER alarm will be reported. In multiplex

section protection mode, the B2-SD and B2-OVER alarms will give rise to themultiplex section protection switching.

When B2 byte detects SES consecutively for 10 seconds (errored block reaches30% in one second), it is considered as an MSUATEVENT (multiplex sectionunavailable time event).

3. Pointer processor and higher order path overhead processor.

This part processes higher order pointer justification and higher order path overhead.Bytes related to pointer justification are H1, H2 and H3, and those related to alarmand error are path trace byte (J1), signal label byte (C2), path BIP-8 (B3), path statusbyte (G1), position indicator byte (H4).

Their alarm flows are as follows:

(1) The pointer processor interprets and justifies the pointer on the basis of H1,

H2 bytes of each AU-4, completes frequency and phase calibration and

tolerates phase jitter and wander in the network. At the same time, it locateseach VC-4 and sends it to corresponding higher order path overhead

processor. If H1 and H2 bytes of AU pointer are detected to be all "1"s,

AU-AIS (administrative unit-alarm indication signal) alarm will be reported

and all "1"s signal will be inserted. If the indicator values of H1 and H2 are

illegal (not in the normal range of 0~782) and receives illegal pointers

consecutively in eight frames, then it will report AU-LOP (administrative

unit-loss of pointer) alarm and insert all "1"s signal.

In case AU pointer positive justification occurs, the number of the PJCHIGH of theMSA increases by 1. In case AU pointer negative justification occurs, the number of

the PJCLOW of MSA increases by 1.

(2) Higher order path overhead processor processes higher order path

overhead (HPOH) bytes received in N VC-4s. The processing mode for

each byte is as follows.

If J1 byte value detected is not the same as the preset, HP-TIM alarm will bereported and all "1"s signal will be inserted.

If C2 byte is detected as 00, Higher Order Path- Unequipped (HP-UNEQ) alarm will


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be reported and all "1"s signal will be inserted. When C2 byte detected is differentfrom the preset, Higher Order path - Signal Label Mismatch (HP-SLM ) alarm will bereported and all "1"s signal will be inserted.

Note:Some of the line boards of the OptiX 2500+ detect HP_TIM and HP_SLM, but theydo not insert AIS.

If B3 byte recovered from HPOH is not in compliance with BIP-8 computing result ofVC-4 signal of the preceding frame, B3 bit error will be reported.

In OptiX STM-N (N


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overhead bytes (including J1, C2, B3, G1, F2, F3 and N1) can be

completed.

If AU-AIS, AU-LOP, HP-UNEQ or HP-LOM (HP-TIM and HP-SLM optional) alarmsare detected in downlink signal flow, set the b5 of G1 byte to 1 and HP-RDI alarmwill be returned to the remote. If B3 bit errors are tested in the downlink signal, setthe b1-b4 of G1 byte to a corresponding bit error value (ranging 1~8) according tothe error value tested, and HP-REI alarm will be returned to the remote end.

H4 byte will not be processed in the uplink direction.

(3) Pointer processor generates N AU-4 pointers, adapts VC-4 into AU-4,

among which AU-4 pointer is represented by H1 and H2 bytes, then N

AU-4s are multiplexed into STM-N signal by multiplexing processor and

sent to multiplex section overhead processor.

2. Multiplex section overhead processor

Multiplex section overhead processor sets MSOH bytes (including K1, K2, D4-D12,S1, M1, E2 and B2) for the received STM-N signal.

If R-LOS, R-LOF or MS-AIS alarms are detected in the downlink signal flow, theb6-b8 of K2 byte will be set to 110 and MS-RDI will be returned to the remote.

If B2 bit errors are tested in the downlink signal flow, MS-REI alarm will be returnedto the remote via the M1 byte..

3. Frame synchronizer and regenerator section overhead processor

(1) Regenerator section overhead processor sets overhead bytes in

regenerator section (including A1, A2, J0, E1, F1, D1-D3 and B1), and send

a complete STM-N electrical signal to frame synchronizer and scrambler.

(2) Frame synchronizer and scrambler scrambles STM-N electrical signals

(except for A1, A2, J0), then STM-N electrical signal is converted into

STM-N optical signal by the E/O module and sent out of the optical

interface.


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1.3 Generation of Alarm and

Performance in Signal Flow of

Lower Order Part

PDH services include 1.5Mbit/s, 2Mbit/s, 34Mbit/s and 140Mbit/ services. PDHservices at different rates use different path overhead bytes. Thus the alarm signalgeneration modes differ slightly.

The following will describe the processing of the signal flow between PDH interfaceand the cross-connect board, and the generation of alarms by taking 2Mbit/s service

as an example. The alarm signal flow is as shown in Figure 1-3.

HPA , LPT

Signal flow

Signal transfer point Alarm termination point

(Report to the SCC unit)

(Insert down all "1"s signal)

V5

V5LP-UNEQ

J2

V1, V2

V1, V2

H4

LP-TIM

TU-LOP

TU-AIS

HP-LOM

LP-RDIV5

BIP-2

LP-REI

T-ALOS

All "1''s

LPA PPI

V5

V5

LP-TFIFO

LP-RFIFO

Alarm report or return

E1-AIS

E1-AIS

E1 interface

LP-SLM

Cross-connect

board

All "1''s

Figure 1-3 Flow chart of the generation of alarm signals between the 2M PDH interface and the cross-connect unit

In view of different characteristics of processing the overhead bytes in each part, thelower order part is divided into several functional modules in the above diagram.They are higher order path adapter (HPA), lower order path terminal (LPT), lowerorder path adapter (LPA) and asynchronous physical interface in sequence. In the


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following, we will take these functional modules as index to introduce alarm signalflow.

1.3.1 Downlink Signal Flow

1. Higher order path adaptation (HPA) and lower order path terminal (LPT)

This part is the core of lower order part, because most of the lower order overheadbytes are processed here, including lower order path pointer indicator bytes (V1, V2,V3), V5 byte, and path trace byte (J2).

(1) VC-4 signal from the cross-connect unit is sent to HPA.

(2) HPA demaps the VC-4 into VC-12. Pointers of all VC-12s are decoded, so

as to provide, between the VC-4 and the VC-12, the frame offset

information in byte.

When node clock at TU-12 assembler is different from local reference clock, thisprocess needs continuous pointer justification. Positive TU pointer justification(LPPPJE) and negative TU pointer justification (LPNPJE) will be tested in downlinksignal flow. The TU pointer justification count threshold-crossing (The threshold isadjustable) is expressed in a group of alarms HPADCROSSTR. HPADCROSSTRincludes:

HPADPJCHIGHCX15 (TU pointer positive justification count threshold-crossing for15 minutes);

HPADPJCHIGHCX24 (TU pointer positive justification count threshold-crossing for24 hours);

HPADPJCLOWCX15 (TU pointer negative justification count threshold-crossing for15 minutes);

and HPADPJCLOWCX24 (TU pointer negative justification count threshold-crossingfor 24 hours).

If incorrect H4 multiframe byte sequence is detected in the downlink, then theHP-LOM alarm is reported.

If V1 and V2 are detected to be all 1s, TU-AIS alarm will be reported. If the valuesof V1 and V2 are tested illegal, TU-LOP alarm will be reported. If either of these twoalarms occur, all "1"s signal will be inserted down to the next function block.

In addition, if TU-AIS alarm is received, AIS signal will be inserted in the downwarddata, and LP-RDI will be returned. To return LP-RDI is to set the b8 of V5 byte to "1".

(3) The VC-12 signal flow is sent to the LPT unit for the V5 byte processing.

Composition of timeslot structure of V5 byte is as shown in Figure 1-4.


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b1 b2 b3 b4 b5 b6 b7 b8

BIP-2 error check

V5 byte

Inconsistent:LPBBE 1:LP-REI Unused

Signal label

000:LP-UNEQ 1:LP-RDI

Figure 1-4 The structure of V5 byte

Detect the b5-b7 of V5 byte in the downlink signal flow, and report them as signallabels. If they are 000, it means that lower order paths are not equipped (LP-UNEQ),insert AIS signal into the lower level circuit. If signal labels mismatch, LP-SLM will bereported and AIS signal will be inserted to the lower level circuit.

Path RDI information in the b8 of V5 byte will be terminated, and REI will bereported.

Detect error monitoring bits of the b1 and b2 of V5 byte and calculate BIP-2 forVC-12. BIP-2 value calculated for the current frame will be compared with the b1and b2 of V5 byte recovered from the next frame. LPBBE will be reported if they areinconsistent. Meanwhile the b3 of V5 byte is recovered, and if it is "1", it means thatthe remote has BIP-2 bit error and will report it as LPFEBBE. The b4 of V5 byte isnot used.

When BIP-2 finds ten consecutive SESs (errored block reaches 30% in one second)appears continuously during the test, it is considered as an LVCUATEVENT (lowerorder virtual container unavailable time event).

(4) At the same time, the lower order path trace identifier J2 will be recovered

and it tests whether the value of J2 byte received is equal to the expectedvalue. If they are not equal, lower order path trace identifier mismatch alarm

(LP-TIM) will be reported.

2. Lower order path adaptation (LPA) and asynchronous physical interface

(PPI)

(1) C-12 data processed in the above way are sent to LPA. Subscriber data

stream and the related clock reference signals are recovered from the

container simultaneously, and sent to PPI as data and timing reference.

(2) The data and clock, after being processed by LPA, are sent to PPI, forming

a 2048kbit/s signal.


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1.3.2 Uplink Signal Flow

1. Lower order path adaptation (LPA) and Plesiochronous physical

interface (PPI)

(1) When E1 electrical signal enters PPI and after clock extraction and dada

regeneration, it is sent to mapping and de-mapping processor, meanwhile

jitter suppression will be performed.

PPI checks and terminates the T-ALOS alarm. When it tests T-ALOS alarm, it willinsert all "1"s signals in the upper level circuit.

(2) LPA completes the data adaptation

If it receives E1-AIS, it will report E1-AIS alarm. T-ALOS alarm can cause E1-AISalarm, but in case T-ALOS alarm occurs, E1-AIS alarm will be suppressed.

If the deviation of uplink data rate is too great, it will result in FIFO overflow at thetransmit end of lower order path, thus LP-TFIFO will be reported.

2. Higher order path adaptation (HPA) and lower order path terminal (LPT)

(1) LPT allows the POH to be inserted in the C-12 to constitute the VC-12.

LPT inserts "signal label" in the b5-b7 of V5 byte, calculate BIP-2 for the previousmultiframe data and set the result to the b1 and b2 of V5 byte in the frame. If it istested in downlink signal flow that the downlink data has "path terminal error", the b3of V5 byte will be set to "1" in the next frame and return LP-PEI.

(2) HPA adapts VC-12 into TU-12, then maps it into higher order VC-4, and

sends it to the cross-connect unit. The frame offset in byte between the

VC-12 and the VC-4 is expressed in a TU-12 pointer. Each frame defines

one of V1, V2, V3, and V4 bytes, and every four frames compose a

multiframe, and, the H4 byte that is used to determine the value of V byte is

also generated here.


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1.3.3 Difference between 34M/140M Electrical

Interface Alarm Signal and 2M Electrical

Interface Alarm Signal

For 34Mbit/s and 140Mbit/s PDH services, the flow of signal processing is the sameas that of 2Mbit/s PDH service But there is still much difference. For example:

1. Same type of alarms with different names

(1) For 2M electrical interface board (such as PD1), the external signal loss

alarm of its PDH interface is T-ALOS alarm. For 34M electrical interface unit

(such as PL3), the external signal loss of its PDH interface is indicated by

P-LOS. For 140M electrical interface unit (such as PL4), this alarm isindicated by EXT-LOS.

(2) In 2M electrical interface board (such as PD1), when signals in downlink

signal flow are detected as all "1"s, it will report TU-AIS alarm. In 34M

electrical interface (such as PL3), it will report E3-AIS alarm. In 140M

electrical interface unit (such as PL4), C4-RLAISD is used to indicate that

the payloads tested in downlink direction are all "1"s, but C4-TLAISD is

used to indicate that the payloads tested in uplink direction are all "1"s.

EXT-LOS alarm will cause C4-TLAISD alarm.

2. Path overhead bytes used for alarm and performance monitoring are

different

The path overhead bytes used in 34M interface unit and 140M interface unit are B3,J1, C2 and G1 bytes. Among them, B3 byte is used for error monitoring with theeven BIP-8 code. Its function is the same as that of the b1-b2 of V5 byte. Thefunction of J1 byte is the same as that of J2 byte. C2 byte is the signal label byte andits function is the same as the b5-b7 of V5 byte. G1 byte is used for generating alarmreply. Its bit structure diagram is shown in Figure 1-5.

b1 b4b2 b3 b5 b6 b7 b8

LP-REI LP-RDI Reserved Spare

Figure 1-5 G1 bit structure

Here, the coding meaning of b1 to b4 of G1 byte is: 0000-1000 indicates that thereare 0 to 8 errors respectively, and 1001-1111 indicates that is no errors.


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1.4 SDH Alarm Suppression

Through the above analysis of various common alarms in the alarm signal flow, wefind that the alarms are associated with each other. Some alarms trigger otheralarms. In particular, higher order alarms often generate lower order alarms.

Here is a simple example. If R-LOS is generated on the optical board due to opticalpath fault, AIS is inserted into the downstream circuit, i.e., the overhead bytes are all"1"s. It triggers a series of alarms, such as R-LOF, R-OOF, and MS-AIS etc. Thegeneration of these alarms is natural, but it is not practical for the maintenancepersonnel. As the upstream node fails, it is not necessary to talk about thedownstream nodes.

In addition, the downstream alarms triggered increase the amount of data reported

and the workload of the NMS and the SCC if they are all reported simultaneouslynetworkwide. They also increase the complexity of the problem for the user.

To avoid it, alarm suppression comes into picture to suppress the alarms that are notnecessary to report.

The following explains how the suppression of the main alarms is done, as shown inFigure 1-6.

R-LOS R-LOF

B2-EXC MS-AIS

AU-LOP AU-AIS HP-UNEQ HP-TIM HP-SLM

TU-AIS

Figure 1-6 Suppression tree of main alarms

The higher level alarm on the tail side of the arrow will suppress the lower levelalarms on the head side of the arrow. In this way, we can locate the higher levelalarm when a fault occurs.


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Prompt:Note that performance event data at different levels cannot be suppressed, thoughalarms at different levels may be suppressed. For example, when B1 bit error occurs,the system will not act to generate B2 bit error. B2 bit error is generated based onthe computing of data within its working scope.


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1.5 Generation and Detection of

SDH Performance Event

The performance of an SDH network includes bit error performance, jitterperformance, wander performance, and availability indices. They are important forthe transmission QoS of the SDH network.

1.5.1 Bit Error

1. Generation mechanism

The SDH system adopts bit interleaved parity (BIP) to detect bit error, i.e., BIP isdone on the BIP matrix of the regenerator section, multiplex section, higher orderpath, and lower order path with the B1, B2, B3 and V5 bytes.

The B1 byte is allocated for the regenerator section error monitoring function. Thisfunction shall be a Bit Interleaved Parity 8 (BIP-8) code using even parity. Theworking mechanism for the B1 byte is as follows:

At the transmit end the BIP-8 is computed over all bits of the previous STM-N frameafter scrambling and the result is placed in the B1 byte of the current frame beforescrambling. At the receive end the BIP-8 is computed over all bits of the currentSTM-(N-1) frame before descrambling and the result is compared with the value ofB1 byte of the next STM-N frame after descrambling. If the two values are different,conduct exclusive-OR operation on them. The number of "1"s in the result is thenumber of errored blocks in the STM-N frame during transmission.

The B2 byte is allocated for multiplex section error monitoring function and itsmechanism is similar to that of B1 byte. This function shall be a Bit Interleaved Parity

N 24 code (BIP-N 24) using even parity. The B1 byte monitors the errorsoccurring in the whole STM-N frame during transmission. One STM-N frame hasone B1 byte. The B2 byte monitors the errors occurring in every STM-1 frame of theSTM-N frame. There are N 3 B2 bytes in an STM-N frame, namely, three B2 bytesfor one STM-1 frame. The mechanism for the B2 byte monitoring is that at thetransmit end the BIP-24 is computed over all bits of the previous STM-1 frameexcept for the RSOH and the result is placed in B2 bytes of the current frame beforescrambling. At the receive end the BIP-24 is computed over all bits of the currentframe STM-1 after descrambling except for the RSOH and conducts exclusive-ORoperation between the parity result and B2 bytes in the next frame afterdescrambling. The number of "1"s in the result of the exclusive-OR operation is thenumber of errored blocks occurring in this STM-1 frame within the STM-N frameduring transmission. This method can at most monitor 24 errored blocks.

The B3 byte is allocated for monitoring the bit error performance of VC-4 within theSTM-N frame during transmission, i.e., monitoring the error performance of140Mbit/s signal within the STM-N frame. Its monitoring mechanism is similar to that


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of the B1 and B2 bytes except that it is used to process BIP-8 parity for the VC-4signal.

The V5 byte provides the functions of error monitor, signal label and path status ofthe VC-12 path. Bits 1- 2 convey the BIP-2. If the receive end monitors erroredblocks through BIP-2 and will display the errored blocks as performance events. Bit3 of the V5 byte returns lower order path remote error indication (LP-REI) to thetransmit end and LP-REI will be displayed as performance event in the transmit end.2. Error detection and report

Figure 1-7 shows the error detection relation and location.

V5

B1

B2

B3

RSTMST RST MST HPTHPTLPT LPT

Figure 1-7 Error detection relation and location

In Figure 1-7 RST is regenerator section terminal, MST is multiplex section terminal,

HPT is higher order path terminal, and LPT is lower order terminal. The B1, B2, B3and V5 bytes are allocated to monitor them respectively. Figure 1-7 shows thaterrors occurring in lower order path will not be detected in higher order path,multiplex section and regenerator section. If errors occur in regenerator section, theywill occur to multiplex section, higher order path and lower order path as well.Generally higher order bit errors will trigger lower order errors. If there is B1error, B2 ,B3 and V5 errors will usually be generated. If V5 bit error occurs, B3,B2 and B1 bit errors do not necessarily occur.When it detects errors, the SDH system reports error performance or alarm andnotifies the remote end through overhead bytes about error detection

3. Terms

Errored block (EB) is a block in which one or more bits are in error.

Background block error (BBE) is an errored block not occurring as part of an SES.

Far-end background block error (FEBBE) is a BBE event detected at the far-end.

Errored second (ES) is a one second period with one or more errored blocks or atleast one defect.


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Far-end errored second (FEES) is an ES event detected at the far-end.

Severely errored second (SES) is a one-second period which contains 30% errored

blocks or at least one serious disturbance period (SDP). Here, the SDP is a period ofat least four consecutive blocks or 1ms (taking the longer one) where the error ratios

of all the consecutive blocks are 10-2

or loss of signal occurs.

Far-end severely errored second (FESES) is a SES event detected at the far-end.

Consecutive severely errored seconds (CSES) are that the SES eventsconsecutively occur, but last for no more than 10 seconds.

Far-end consecutive severely errored seconds (ECSES) is a CSES event detectedat the far-end.

Unavailable second (UAS) is a period of unavailable time begins at the onset of tenconsecutive SES events. These ten seconds are considered to be part of

unavailable time.

4. Relationship with alarms

The SDH system reports error performance or alarm event to the home station andreturns error detection information to the remote stationvia overhead bytes. Basedon these performance and alarm events from the home station and remote station,we can locate faulty section of the path or locate the direction where errors occur.Table 1-1 lists the performance and alarm events related with errors.

Table 1-1 Monitor positions and functions of alarm and performance events for bit error threshold crossing

Item Performance event Alarm eventPerformance eventsboth detected andreported by the homestation

Performance eventsdetected by theremote station, whilereported by the homestation

Alarm events reportedby the home stationwhen it detects errorthreshold-crossing

Alarm events reportedby the home stationwhen the remotestation detects errorthreshold-crossing

Regenerator section

RSBBE - B1_OVER -

Multiplexsection MSBBE MSFEBBE B2_OVER MS_REIHigherorder path HPBBE HPFEBBE HPCROSSTR HP_REI

Lowerorder path LPBBE LPFEBBE LPCROSSTR LP_REI

(1) If the B1 byte recovered from STM-N signal is not consistent with BIP-8

computing result of the previous STM-N frame, B1 bit error will be reported.

(2) If the B2 byte recovered from the STM-N signal does not consist with the

result of BIP-24 computing over all bits expect for the regenerator section


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overhead in the previous STM-N frame, B2 bit error will be reported.

(3) If the B3 byte recovered from HPOH is not in compliance with BIP-8

computing result of VC-4 signal of the previous frame, B3 bit error will be

reported.

(4) If B1, B2 and B3 bit errors exceed 10-6 , such alarms as B1_SD, B2_SD,

B3_SD will occur. If B1, B2 and B3 bit errors exceed 10-3, such alarms as

B1_OVER, B2_OVER and B3_OVER will occur.

When B1 detects ten SES events in regenerator section appear consecutively , it isconsidered as an RSUATEVENT (regenerator section unavailable time event).

When B2 detects the SES consecutively for 10 seconds, it is considered as aMSUATEVENT (multiplex section unavailable time event) .

When B3 tests the SES consecutively for 10 seconds, it is considered thatHVCUATEVENT (higher order virtual container unavailable time event) happen.

1.5.2 Pointer Justification

Pointer justification is a phenomenon especially for the SDH network. The occurringof pointer justification indicates that there exists the NE out of synchronization in theSDH network

Payload pointer in the SDH can be classified into administrative unit pointer(AU_PTR) and tributary unit pointer (TU_PTR), and so pointer justification falls intoadministrative unit pointer justification and tributary unit pointer justification.

1. Generation mechanism of AU pointer justification

In the AU-4 frame as shown in Figure 1-8, several bytes in specific locations (the firstnine bytes in the four row) are used to record the location of the starting point of datainformation (to represent the data information phase). These bytes are calledpointer.Here, H1 and H2 are pointers, and three H3s are negative pointer justificationopportunities.

AU-4 PTR

9 row

Y Byte: 1001SS11 (S Unspecified )

1* Byte:11111111

10 270 column

1 9

H1 Y Y H2 1* 1* H3H3H3VC-4

Figure 1-8AU pointer location and content

When the network is synchronous, the pointer is used to make phase alignment


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among synchronous signals. If the SDH NEs work in the same clock, the signalssent from various NEs to a certain NE have the same clock frequency, it isunnecessary to make rate adjustment. In the transient point of view, it may be either

a little faster or slower, and so the phase alignment is needed.

When the network is out of synchronization, different NEs will work with phasedifference, and the pointer is used for frequency justification. The pointer justificationcan also be used to tolerate the frequency jitter and wander of the network.

If the frame rate of the VC is different from that of the AUG, information will be stuffedin the H3 bytes of AU pointer area or idle bytes stuffed with pseudo-randominformation will be inserted to decrease or increase the frame rate of the VC.Meanwhile the pointer value will be incremented or decremented to raise or drop theframe rate of the VC. Thus, the pointer positive justification and negative justificationare generated as shown in Table 1-2.

Table 1-2 Pointer justification state

Byte numbering and content of the fourth row in the STM-1 frameStatename 7 8 9 10 11 12 Rate relationPointerzerojustification

H3 H3 H3 Information Information Information Informationrate =container rate

Pointerpositivejustification

H3 H3 H3 Stuffing Stuffing Stuffing Informationrate container rate

All the NEs in the SDH network are normally well synchronized, the pointerjustification seldom occurs. Actual monitoring on the pointer justification performanceof the network proves that AU pointer justification seldom occur and TU pointerjustification is also few.

It is difficult to guarantee all the NEs are well synchronized in all the time during thelong-term network running. If one or several NEs is out of synchronization, and evenif this situation lasts for a very short time, a great amount of pointer justifications willoccur. Pointer positive or negative justification consecutively appear to adjust phaseforward or backward to realize frequency justification.

2. Generation mechanism of TU pointer justification

The causes of TU pointer justification are as follows:

(1) Transformed from the AU pointer justification

TU pointer justification cannot appear when E1 signal is adapted into VC-12, theninto STM-1. If there is frequency offset between E1 signal of the switch and SDHclock, adapt it to realize synchronization. So the TU pointer justification detected on


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the tributary board are generally transformed from the AU pointer justification. TheTU pointer justification happens during the demultiplexing.

(2) The system clock is not consistent with the receiving clock, and TU pointerjustification will be generated during the demultiplexing.

(3) When the service passes through the upstream NE which has pointer

justification, TU pointer justification will appear at the home station during

the demultiplexing.

3. Detection and reporting of the pointer justification

There are two modes of detection and reporting of AU pointer justification: remotedetection and home detection.

[Remote detection]

In this mode the AU pointer justification generated at the home station is transferredto the remote station via H1 and H2 bytes. The remote station realizes the reportingof the AU pointer justification by interpretation of H1 and H2 bytes. So in this mode, ifthe remote station reports AU pointer justification event, it indicates that home stationhas pointer justification. Here, the remote station refers to the downstream stationalong the clock tracing direction.

[Home detection]

In this mode the AU pointer justification generated at home station is detected andreported at the home station. So, if the home station reports AU pointer justificationevent, it indicates that the home station has pointer justification.

In SDH system the AU pointer justification events of a majority of optical boards aredetected and reported by interpreting H1 and H2 bytes. That is, remote detectionmode is generally adopted.

The TU pointer justification reported on the tributary board is a interpretation oftransforming AU pointer justification into TU pointer justification. Since thetransformation of AU pointer justification into TU pointer justification may happen atthe upstream station, it does not necessarily indicate that the home station haspointer justification if the tributary board reports pointer justification events.

Generally, AU pointer justification is generated at the upstream station, whiledetected and reported at the downstream station. TU pointer justification isgenerated at the station where AU pointer justification is transformed into the TUpointer, and detected and reported at the tributary board of the station where theservice is terminated.


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1.6 Application of Locating a Fault

According to Signal Flow

Through the above study we are clear about the alarm signal flow, and we lay atheoretical foundation for practical application. It is our ultimate goal to guide practicewith theory in promptly locating and removing the faults according to the signal flowprinciples. The following describes two typical cases and we hope they help in ourtroubleshooting.

1.6.1 Bit Error

(1) Networking diagram

Figure 1-9 shows a certain networking diagram.

A B C

W EW W

Figure 1-9 Networking diagram in analysis of error problem

It is a chain network formed by three OptiX 2500+ NEs at the rate of 2.5Gbit/s.Station A is a gateway station. There is 2Mbit/s service among the stations indistributed service mode.

(2) Fault phenomena

Query the tested performance data from the NMS. It is found at station A that theservices between Stations A and B, between Stations A and C have a large amountof LPBBE in the tributary, and a great deal of HPBBE, MSBBE in the westbound line.Check Station B, and find a great number of HPFEBBE, MSFEBBE in theeastbound line, and the service between Stations A and C has a majority ofLPFEBBE in the tributary, but the services between Stations B and C is normal.Check Station C, and find that the service between Stations C and A has a numberof LPFEBBE only in the tributary.

(3) Fault analysis

According to the principle of " station first, board second", locate the faulty NE first.

There are bit errors between Stations A and B, between Stations A and C, and no biterror between Stations B and C. According to this we can judge that the fault liesbetween Stations A and B. Because all services with errors pass this section of route.But is the problem in Station A or B, or in the optical path? We have to analyzeperformance data.

First, we analyze the performance data in the line according to the principle of"higher level first, lower level second, and line first, tributary second".


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From the signal flow knowledge mentioned above, we may know that there are threetypes of bit error monitoring overhead bytes B1, B2, B3 in the line. B1 byte monitorsthe route between regenerator sections of two stations; B2 byte monitors the route

between the multiplex sections of the two stations; B3 byte monitors only the routebetween higher order paths of the two stations. Obviously, the route monitored by B3byte covers that monitored by B2 and B1 bytes, and the route monitored by B2 bytecovers that monitored by B1 byte.

As seen from the on-site data, there are only B2 and B3 bit errors. This means thatthe route between the regenerator sections of the two stations is sound, thusexcluding the possibility of the optical path fault. If there are B2 bit error, there maybe a failure on the route between the multiplex sections of the two stations. In termsof the contents of bit error data, Station A has BBE, and Station B has FEBBE. Itshows that the bit errors in the signal are tested at Station A, but it does not meanthat the problem must be in Station A as the bit errors are all tested in downlinksignal flow. Therefore, the bit errors tested in Station A may come either from the

receive end of the home station or from the transmit end of remote station B.

Now, we may troubleshoot station one by one. First self-loop the westbound opticalline of Station A and find that the errors of this station disappear, then the problem isnot in this station. Replace the westbound optical board S16 of Station B, and findthat the bit errors of the whole network disappear, then the problem is solved.

Tips:In the analysis of the above problem, according to the coverage relation of routestested by B1, B2 and B3 bytes, we take such an assumption as B1 bit error wouldcause B2 and B3 bit errors, and B2 bit error would cause B3 bit error.

But, in fact, this regularity is not absolute. Though the routes tested by B1, B2 andB3 bytes have coverage relation, the contents tested by the three bytes respectivelydon't have coverage relation. B1 byte detects all bytes of STM-N frame, but B2 byteonly detects all bytes except regenerator section overhead and B3 byte only detectsall bits of VC-3 and VC-4 of each path.Hence, if the overhead bytes get bit errors,the inclusion relation among the three will be broken off.For example, if errors testedin regenerator section overhead byte B1 cannot be tested by B2 and B3 bytes.

However, in actual maintenance it is seldom to find that the errors only occur in theoverhead byte. We can make use of the route coverage relation of B1, B2 and B3bytes to locate the failure as a rule of thumb.

1.6.2 Alarm

The thought of troubleshooting according to the alarm is similar to that oftroubleshooting according to the performance parameters. The only difference is thatbit error problem is simple in variety, while alarm problem is rather complicated.Many kinds of alarms are often mixed together which brings difficulty introubleshooting. If we consider alarms comprehensively according to their


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generation mechanism in signal flow, common problems can be solved. Thefollowing describes a simple example.

(1) Networking diagramFigure 1-10 shows the networking diagram.

A

B

CE

F

D

W E

W

E

E

W

WE

Figure 1-10 Networking diagram in analysis of alarm problem

Six OptiX 2500+ NEs of A, B, C, D, E and F form a multiplex section ring of 2.5Gbit/s.It is a centralized service. Each station has service with Station A.

(2) Fault phenomena

After the equipment operates for a period of time, it is often found that abnormalswitching occurs in the whole network, resulting in the interruption of all services.Specific phenomena are as follow:

Query the switching status of each station and find that Stations A and B are

eastbound and westbound switching respectively, and, Stations C, D and E are inpass-through status, but Station A is always in idle status.

When the switching occurs, the eastbound and westbound optical boards of StationA have momentary T-LOS (transmitting loss of signal) alarms. The eastbound opticalboard of Station F and the westbound optical board of Station B have HP-LOMalarms respectively. Each station has PS alarm except Station A. Services of allstations have TU-AIS alarms.

(3) Fault analysis

According to the principle of "station first, board second", first locate the problem in asingle station. The T-LOS alarm usually indicates that the cross-connect boardsends no signal or the signal without frame structure to the line board. This alarm is

the one tested in the uplink signal flow. The HP-LOM alarm is the one tested in thedownlink signal flow. It shows that H4 byte is illegal in the route from the oppositestation generation point to the termination point of the home station. These twoalarms are both probably related with Station A. Hence, we can locate the problem inStation A.

Through the analysis of these two alarms, we know that why H4 becomes illegal isthe poor coordination of the cross-connect board and line board, or the line boardfailure or the cross-connect board failure. Usually, T-LOS alarm is related to the


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signal sent to line unit by the cross-connect unit. Meanwhile, considering that theeastbound and westbound optical boards of Station A report T-LOS alarms at thesame time, and the cross-connect board is more likely faulty compared with the line

board. Then try replacing the cross-connect board.

After replacing the cross-connect board, observe it for some time and find that faultphenomena do not reappear. The problem has been removed.

1.6.3 Summary

Taking the advantage of generation locations of various alarms in the alarm signalflow, you can narrow down the problem area step by step, thus achieving rapid faultlocating. Therefore, it is essential for professional maintenance personnel to graspthe corresponding principles of the alarm and performance signal flow.


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2 Alarm Handling

In the maintenance of OptiX 2500+ equipment many alarms need to be dealt with,and an effective analysis of alarms is the key to solve the problem. To find out thesource of the problem, find the causes of the alarms first. Then use effectivemethods to remove them.

The following describes the causes and Handling of the alarms generated in theOptiX transmission equipment as a reference for maintenance.

Note:1. Alarm level is the default one.

2. In terms of alarm generation and treatment, the alarms are classified intoequipment alarm, Communication alarm, QoS alarm, processing alarm, environmentalarm and security alarm.


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Alarm Handling OptiX 2500+(Metro3000) MM-APE

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APS_FAIL

Item Description

Alarm name APS_FAIL

Full name APS protection switching

Documents

Maintenance Manual-Alarm and Performance Event