Department of Electrical Engineering

Electronic Systems

Mapping applications to predictable MPSoCs

Sander Stuijk, Marc Geilen, Twan Basten

HiPEAC 2013 tutorial

Berlin, Germany

2 Embedded streaming systems

Application trends

Uncertainty

Concurrency

Dynamism

3 Model-based design

Design flow

+

....

Modeling

Analysis

Implementation

Run-time management

App 1 App 2

+ =

Gantt chart

4 WLAN application

New OFDM symbol every 4.0 μs

Sync, Header, Payload scenario process one symbol

CRC processes no symbol

Ports may have rates

Rate one omitted for clarity

Initial tokens return to original distribution after one iteration

5 WLAN application

Each scenario may be modeled with a different scenario graph

Persistent token names provide relation between initial tokens in different

scenario graphs

6

shift

src

sync

Src

0 μS 4 μS 8 μS 12 μS

Shift

Sync

Hdem

Hdec

Pars

pars

WLAN application

7

shift

src

sync

Src

0 μS 4 μS 8 μS 12 μS

Shift

Sync

Hdem

Hdec

Pars

pars

sync

WLAN application

8 WLAN application

shift

src

sync

Src

header

0 μS 4 μS 8 μS 12 μS

Shift

Sync

Hdem

Hdec

Pars

pars

9

src

shift

pars

src

shift

pars

Sync Header

4000 ns

5940 ns

0 ns

Analyzing SADF graphs

Gantt chart for one scenario sequence

Execution is a sequence of vector shapes

Token time stamps (vector shapes) provide constraints for next iteration

shift

src

sync

Src

header

0 μS 4 μS 8 μS 12 μS

Shift

Sync

Hdem

Hdec

Pars

pars

delay

10

src

shift

pay-

load

pars

src

shift

pay-

load

pars

src

shift

pay-

load

pars

src

shift

pay-

load

pars

Sync Header Payload CRC

5940 ns

0 ns

4000 ns, 1

0 ns, 0

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

Analyzing SADF graphs

Max-plus automaton

11 Analyzing SADF graphs

Throughput: MCM/MCR

Latency: longest-path

src

shift

pay-

load

pars

src

shift

pay-

load

pars

src

shift

pay-

load

pars

src

shift

pay-

load

pars

Sync Header Payload CRC

5940 ns

0 ns

4000 ns, 1

0 ns, 0

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

4000 ns, 1

12 Analyzing buffer/throughput trade-off

Model buffer size constraints with back-edge with initial tokens

buffer size of 1 token/edge

enlarge buffer size to 2 tokens

throughput

analysis

throughput

analysis

<4.0 μs/symbol

4 μs/symbol

13

pars

Predictable scenario-aware design-flow

Design flow

+

....

?

Tile 1

EVP

interconnect

NI

IMEM

DMEM

Tile 2

SWC

NI

IMEM

DMEM

Tile 2

ARM

NI

IMEM

DMEM

14

Predictable scenario-aware design-flow

Compute buffer constraints

+

....

thro

ug

hp

ut

distribution size

scenario sync

thro

ug

hp

ut

distribution size

scenario header

thro

ug

hp

ut

distribution size

combined

pars

15

pars

Tile 1

EVP

interconnect

NI

IMEM

DMEM

Tile 2

SWC

NI

IMEM

DMEM

Tile 2

ARM

NI

IMEM

DMEM

Predictable scenario-aware design-flow

pars

resource

sharing

Compute buffer constraints

Unified resource binding

Static-order scheduling

+

....

16

Tile 1

EVP

interconnect

NI

IMEM

DMEM

Tile 2

SWC

NI

IMEM

DMEM

Tile 2

ARM

NI

IMEM

DMEM

Predictable scenario-aware design-flow

communication delay

pars

resource

sharing

Compute buffer constraints

Unified resource binding

Static-order scheduling

+

....

pars

D

D

parspars

17

src

shift

payload

pars

evp

swc

arm

ofdm symbolevp active

swc activearm active

0 μs 4 μs 8 μs 12 μs 16 μs 20 μs

sync header payload

crc

WLAN application

Initial tokens of resources capture resource availability

Timing requirements seems to be met...

18 Model-based design

Design flow

+

....

Modeling

Analysis

Implementation

Run-time management

App 1 App 2

+ =

Gantt chart

19 Run-time reconfiguration

DVFS changes actor

execution times

DVFS settings modeled with

system scenarios

pars

Tile 1

EVP

interconnect

NI

IMEM

DMEM

Tile 2

SWC

NI

IMEM

DMEM

Tile 2

ARM

NI

IMEM

DMEM

20 WLAN application

Latency between reception of OFDM symbol and processing increases

Processing cannot keep up with frequent reconfiguration

src

shift

payload

pars

evp

swc

arm

ofdm symbolevp active

swc activearm active

0 μs 4 μs 8 μs 12 μs 16 μs 20 μs 24 μs 28 μs 32 μs 36 μs

sync-c1 header-c1 payload-c1 sync-c2 header-c2 payload-c2 sync-c1 header-c1 payload-c1

crc-c1Reconf

c1 → c2 crc-c2Reconf

c2 → c1

21 Summary

Strategy for designing predictable systems running dynamic applications

Scenarios capture dynamic (application and system) behavior

Resource and energy efficient implementations

Predictable implementations

SADF Model-of-Computation

Provides many analysis techniques

Provides implementation trajectory

Analysis and implementation techniques implemented in SDF3 tool kit

www.es.ele.tue.nl/sdf3