As semiconductor fabrication

technology progresses, one of

the growing problems is

lithography. Semiconductors are

created using optical techniques

to expose photoresists. However,

the wavelength of the light used

to expose the photoresists is

now much larger than the size

of the features being

created. If this problem

isn’t solved, then progress

to ever smaller nodes will

be stalled.

Needless to say,

work is underway to

solve the problem

and – in some

cases – this work

has been going

on for some time.

The industry is

keen to use current technology for as long

as possible. Today, most lithography

systems are based on 193nm laser light.

But the time is rapidly approaching when

the systems will no longer be of use – even

with such tricks as immersion, which takes

advantage of higher indices of refraction.

Two schools of thought dominate the

research. One is to use extreme ultraviolet

(euv) light. Instead of the current 193nm

wavelength, euv uses a light source with a

wavelength of 13.5nm. At first sight, this

would appear to solve the problem. But it

hasn’t been as easy to develop the process

as was originally believed. Now,

companies like Intel

and IBM, who had been

looking to use euv in the

near future, are putting

developments on hold.

But optical lithography also needs

masks and, as feature size decreases,

mask costs increase dramatically. The

other approach being pursued is to do

away with masks altogether. Instead of

exposing photoresists to light, maskless

lithography uses an electron beam to

‘write’ the circuitry directly onto a wafer

coated with an appropriate resist. It’s a

development of a process currently used to

create low volume asics under the guise of

direct writing.

Belgian research institution IMEC has

been working on euv for some time but,

interestingly, is now looking at maskless

lithography as one of its future options.

Kurt Ronse, director of IMEC’s

lithography department, noted the

techniques are very different. “With euv,

everything has to happen in a vacuum. It’s

broadly similar to existing lithography,

but it has to use mirrors instead of lenses

because there are no lenses which are

transparent to euv.”

EUV also uses masks, but these are also

reflective. “It’s a logical step beyond

193nm,” Ronse claimed. But it is a big

step. “We have tried 157nm,” he

admitted, “but it wasn’t successful.”

Meanwhile, a European programme

called Rimana (Radical Innovation

Maskless Nanolithography) has just

concluded initial research into maskless

nanolithography technology. Dr Hans

Loeschner, project administrator and chief

technology officer of Vienna based IMS

Nanofabrication (www.ims.co.at) noted:

“The objective was to show proof of

concept for maskless lithography.”

Rimana was working on projection

maskless lithography, or PML2, regarded

as a potentially cost effective solution for

32nm devices and beyond, offering

resolutions of less than 10nm.

The approach is based on a system

which creates thousands of electron

beamlets and focuses these on the wafer.

According to Dr Loeschner: “The approach

19w w w . n e w e l e c t r o n i c s . c o . u k 2 7 J a n u a r y 2 0 0 9

MasklessmomentumMaskless lithography is being considered as a viable alternative to

extreme ultraviolet. By Graham Pitcher.

S P E C I A L R E P O R T

Fabrication Technology

Mirrors have to be

with euv lithography

because lens are not

transparent to the

13.5nm wavelength

light.

fab.qxp:Tech Temp 21/1/09 17:16 Page 19

wasn’t proved when Rimana started. It

was a good idea, but could it work? We

think we have shown the main questions

have been answered.”

Dr Loeschner believes maskless

lithography is, in principle, simple. “It’s a

combination of known things,” he

claimed. “You start with an electron

source in a vacuum and extract an

electron beam.” Once that’s done, a set of

condenser optics shapes the electrons

into a 20mm beam. These then

pass through an aperture

plate. “This is a silicon plate

about 20µm thick,” Dr Loeschner

explained. “It has many 4µm holes, which

allows the creation of beamlets.”

The beamlets then pass through a

blanking plate and pass to a deflection

grating. This device, powered by cmos

electronics, starts organising the beams

into a form that allows a chip to be created.

“At the right moment,” Dr Loeschner

explained, “a small voltage is applied to

form an electronic filter with sufficient

ability to deflect the beamlet. In this way,

some of the beams are filtered out.”

Unlike the direct writing approach, the

wafer moves across the scanning field at a

rate of around 50mm/s. The beamlets

created by the equipment allow the chip

to be exposed. “Thousands of beams are

working in parallel to create the chip,”

said Dr Loeschner. Currently, the process

is such that a throughput of five wafers an

hour can be achieved.

Wafers need to be coated with a

suitable resist. Each beamlet then exposes

a spot on the resist several times until the

correct dose has been applied. A further

benefit is that the control electronics can

also provide features equivalent to the

optical proximity correction used in

current lithographic systems.

But production ready equipment is

some way off. “A prototype tool needs to be

built, then a full production prototype,” Dr

Loeschner explained. The tool is targeted

at the 22nm half pitch node, which is

expected to come into use in 2016. That

means the production prototype would

need to be ready by 2014 at the latest.

A production tool is likely to generate

millions of beams, speeding throughput.

By running machines in parallel,

throughputs rivalling those of current

lithographic systems may be possible.

“IMS is a small company and we knew

from the beginning that we wouldn’t be

able to take the idea to production. But

we’ve been talking to equipment

companies and there has been strong

interest.”

Ronse believes it won’t be easy to take

maskless lithography to production.

“Several groups have been trying to build

a prototype and it doesn’t seem to be easy

to do. All the beams need to be

calibrated,” he noted, “and there are

carbon contamination problems. But the

system will still need to match the optical

throughput of more than 100 wafers/hr.”

Ronse also sees maskless lithography

as a back up, should euv development

efforts fail. “IMEC is seeing progress in

maskless lithography from quarter to

quarter and member companies are

recommending that we now focus on this

technology.”

For the moment, IMEC will continue to

watch developments. “There are no

prototype tools available,” Ronse noted,

“and that’s typically where IMEC gets

involved. “We have to see which tool ships

first and its specifications. That can take a

while and it may be the end of this year

before we can make a decision.”

However, euv work is continuing.

“We’re finding more promising resists,”

Ronse claimed, “and feeding back

information to resist manufacturers.

We’re also monitoring the alpha tool to

see whether it’s stable and which

components are failing.”

But one reason why scepticism exists

around euv is the optical performance.

“The optics on the alpha tool have

limitations which makes it difficult to go

beyond 32nm,” Ronse admitted.

“However, tools coming next year should

have less flare in the optics and that will

enable us to address 22nm,” he

concluded.

20 w w w . n e w e l e c t r o n i c s . c o . u k 2 7 J a n u a r y 2 0 0 9

S P E C I A L R E P O R T

Fabrication Technology

Figure 2: The principles of projection maskless lithography

electron source

condenser optics

programmableaperture platesystem

aperture plate

blanking plate

deflecting electrodes

first lens

stopping plate atbeam crossover

second lens

substrate/stage

“We’re finding more promising resists

and feeding back information to resist

manufacturers.” Kurt Ronse, IMEC

fab.qxp:Tech Temp 21/1/09 17:16 Page 20