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© 2008 Sanmina-SCI Corporation. Sanmina-SCI is a trademark of Sanmina-SCI Corporation. All trademarks and registered trademarks are the property of their respective owners.

Matched Terminated Stub VIA Technologyfor Higher Bandwidth Transmission in Line Cards and Back Planes.

George DudnikovSenior Vice President & CTO george.dudnikov@sanmina-sci.com

Dr. Vladimir DuvanenkoManager Signal Integrityvladimir.duvanenko@sanmina-sci.com

Matched Terminated Stub VIA Technologyfor Higher Bandwidth Transmission

in Line Cards and Back Planes.

• In line cards and backplanes the inherent impedance mismatch of a via stub is a significant impediment to obtaining higher transmission bandwidth.

• This obstacle has been circumvented by using back drilling production methods resulting in higher product cost for backplanes.

• In line cards, the tighter dimensions on vias and pads make back drilling difficult if not impossible. Buried and blind vias can reduce stubs but are even more costly

• At data transmission rates > 10 Gbps, backdrilling alone may not be adequate enough to reduce jitter and BER

• An optimized via technology is presented as an additional SI improvement to backdrilling

• A matched terminated stub (MTS) via technology is presented as an alterative approach to the high cost of stub back drilling that can be applied to lines cards and backplanes

Abstract

PCB Signal Integrity Drivers

Increasing Frequency/Distance

Rel

ativ

e Le

vel

Signal strength decreases (is attenuated) withincreasing frequency/distance due to skin depth (trace), And loss tangent (dielectric) losses

Noise increases with increasingfrequency/distance due to crosstalkand impedance mismatch reflections (via stubs)

Larger trace widths andlower dielectric lossespush this curve up

Increased trace-to-traceseparation distance, better impedance controlpush this curve down

Sign

al >

> N

oise

(Exc

elle

nt)

Sign

al >

Noi

se(M

argi

nal)

Sign

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Noi

se(N

on-fu

nctio

nal)

Bandwidth 2.5 Gbps X 5 Gbps 10 Gbps X 20 Gbps X 40 GbpsProduction Demonstrated Development

3.125 Gb/s(per diff pair)

10-12

10-14

10-16

10-18

2X Data Rate Increases

10-13

10-15

10-17

103 BERReductions

BER

MarketDrivers

1: Active compensation (waveshaping, driver pre/de-emphasis, receiver equalization)2: Connector and attachment technology (press-fit, pressure-fit, SMT, BGA)3: Backplane/PCB material (dielectric) and interconnect geometry (via/trace size/shape)

TechnologyDomains

Difficult

MoreDifficult

Squeeze Out One More Rate Increase

10-20

10-19

10-21

Performance Trends/Expectations

MostDifficult

10 Gig(per 4 lanes)

6.25 Gb/s(per diff pair)

20 Gig(per 4 lanes)

12.5 Gb/s(per diff pair)

40 Gig(per 4 lanes)

25 Gb/s(per diff pair)

80 Gig(per 4 lanes)

50 Gb/s(per diff pair)

160 Gig(per 4 lanes)

Brand New Design

Sources of Passive InterconnectLosses and Distortions

TraceDielectricVia FieldConnector

X

Conduction Losses 1

Dielectric Losses

Impedance Mismatches 2

Material 4Primary Source of Grief

Undesired Effect

1 5 10 20Data Rate (Gb/s)

PCB/Backplane

XX

XX

X

X

X

Geometry Geometry Geometry

X

Note how geometry (size/shape) in the connector/via field regions dominates the majority of undesired sources of interconnect distortion at higher data rates.

3 Includes via thru/stub ratio effect

1 Includes skin depth, surface roughness and non-uniform current crowding effects2 Includes distributed/lumped element mismatches and memory effects

4 Technology does not exist to tweak at the molecular level. Can only change molecules (materials).

Connectors migrating away from Press-Fit

Via-Fields migrating away

from PTH

Crosstalk

Systemic/Random Variations 3

Loss

esD

isto

rtio

ns

Bad Agents: Long Via Stubs

Note only connector/via field regions [geometry sizes/shapes] were changed to reduce distortions.

A

B

C

D

E

FG

G H

Nulls are difficult to control

(5 mil wide, 20” long traces in FR4)Unterminated

Stub

Degrading Stub Reflections

Normal Signal Flow

Distorted Signal

Via “Stub” Versus “Thru” Performance(Bare Backplane)

Note: Distortions due to long stub lengths dominate over distortionsdue to long line lengths (skin depth/dielectric losses)

Via Stub Loss Versus Dielectric Loss

Note: Improving dielectric material can actually increase distortion!

Locations of Via Stub Structures

Lower Loss

HigherDistortion

Df .021Df .008

Backdrilling eliminates detrimental plated-through-hole (PTH) via stub effects that distort signals passing

through them

6.25 Gb/s Data Rate

Without Backdrilling With Backdrilling

Unusable Eye Diagram Usable Eye Diagram

Improving Signal Integrity Performanceusing Backdrilling

Approximate Stub Loss Effects

Stub Length(mils)

Signal Loss(Percent)

1 0.25%

2 0.5%

5 1.25%

10 2.5%

20 5%

40 10%

60 15%

100 25%

150 37.5%

200 50%

250 62.5% 0 50 100 200

0

10

20

30

40

50

150Stub Length (mils)

App

roxi

mat

e Si

gnal

Los

s (%

)

60

250

10% Trace Impedance Mismatch ≈ 20 mil Stub = 5% Loss

** Applicable for Dk > 3.5, DF > 0.005, 20 – 35 mil connector drill diameters, data rates < 8 Gb/s. (This is a rule of thumb, not a design guide.)

High Speed Interconnect World Shift

Diff Pair Diff Pair Diff Pair

wh

Old Metric: GB/s/diff pair ⇒ New Metric: GB/s/in2

Applicable to PCBs, Back/Midplanes and Connectors

• Approach A (Traditional/Long Term)• Develop technology to increase GB/s/diff pair• Better Dielectrics

• Lower loss tangents• More uniform (solve glass weave issues)

• Smoother traces (surface roughness)• More complex active comp• Volume 25 GB/s/diff pair circa 2013

• Approach B (Near Term Focus)• Develop technology to increase routing density• Focus on GB/s/in2 not GB/s/diff pair

• 25 GB/s/diff pair not as important• Smaller trace widths (8-10 mils ⇒ 3 - 4 mils)• Thinner dielectric thicknesses (8-10 mils ⇒ 3 - 4 mils)• Higher aspect-ratio vias (25:1 and up)• Smaller connector pin pitches (1.8/1.5 mm)

• Press fit and BGA• Smaller press-fit vias (9-10 mil finished hole size)

Examples: Tyco Multi-Gig, TinmanFCI Airmax, ZiplineMolex Impact

SSCI is developing new processes toincrease via/trace routing density

(Examples: MTS-Via, SVP, 85 Ω Diff Pairs)Smaller diameter holes are harder to backdrilldue to drill breakage and registration

Before Optimization After Optimization

Unusable Eye Diagram Usable Eye Diagram

Non-uniform S-parameters Flat S-parameters

Opti-vias™are a family of engineered via structures whose S-parameters have been optimized for high

speed performance

Proprietary algorithms adjust pad and antipadgeometries , sizes, and locations to “tune” the residual portion of the barrel by optimizing the

inherent L and C components of the via structure.

12.5 Gb/s Data Rate

At higher frequencies ( >10 Gbps ), backdrilled viasmay still have distortion effects which will increase BER

StandardVia

Opti-Via™

Backdrill Limitations

• Too Many Backdrill Depths increases cost• Two sided Backdrill increases cost ( up to 12 depths from each side)• New High Speed Connectors will require smaller diameter holes• BGA Vias require backdrilling 6-10 mil diameter holes on potentially tens of thousands of I/O•Special drilling machines required for small diameter backdrilling tolerance• Drill breakage and yield issues • Capacity issues• Can get costly

8 mil BGA Via

An Alternative Approach: MTS-Via™

Matched Terminated Stub Technology

Concept: Terminate stub reflections to ground using a resistor equal to the Zo of the via

210a 210b 215c

110a

110b

110c

110d

110e

110f

215a 215b 215d

330a 330b 330c 330d 330e 330f

300 305 310 315 320 325

Single Ended Diff Pair

51 ohm resistors connects via stubs to groundControl case: same board, no resistorsMeasured using Anritsu PPG, Tektronix CSA 8000B32 bit increasing psuedo-random patternSemi-rigid coax cables connected directly with via

MTSvia Assembly

Concept Validation in Lab Testing

0.3 V

-0.3 V0 ps 320 Time (ps)

VOLTAGE

0 ps 320 Time (ps)

• 6.25 GB/s from Anritsu MD17636 PPG• 22 Layer Motherboard• Control: Unterminated• Control Jitter: 160 ps (1.00 UI) - Eye Completely Closed• MTSvia Jitter: 52 ps (0.325 UI) 3 to 1 improvement

Control MTSvia using 51 Ohms

Measurement Results

The MTSvia resistor absorbs the reflected signal resulting in a reduction in signal strengthThe MTSvia reduces the signal distortion due to elimination of ISI and crosstalkEye opens up

1.5 V

-0.5 V0 ps 640 Time (ps)

VOLTAGE

0 ps 640 Time (ps)

•3.125 GB/s from CJPAT PWL voltage source•Using 1us of simulated data•Control Eye: 134.5 ps width, 713 mV height•MTSvia Eye: 208.8 ps width, 404 mV height

Control MTSvia using 50 Ohms

Simulation Tools used to optimize MTSvia ™resistor values , S parameters, and design rules

Ansoft 3D Model

0.2 V

-0.2 V0 ps 320 Time (ps)

VOLTAGE

0 ps 320 Time (ps)

• 6.25 GB/s from CJPAT PWL voltage source• Using 500ns of simulated data• Control Jitter: 64 ps (0.40 UI)• MTS-Via Eye: 6 ps (0.04 UI)• Jitter Reduction: 0.40/0.04 = 10X

Control MTS-Via (25 Ohms)0.40 UI 0.04 UI

BER is more sensitive to width of eye closure than height of eye closure.

MTS-Via sacrifices some eye height in order to get a much larger increase (10x) in eye width.

Jitter/BER is nonlinear.A10X decrease in jitter can often decrease BER by

many orders of magnitude.

Stub creates “pedestal/staircase”distortion during a

transition that decreased width of

eye.

MTS-Via removes pedestal/staircase”distortion, thereby increasing width of

eye.

ABR™ Annular Buried Resistor for MTSviaapplications

Frequency independent terminatorEliminates need for discrete surface resistors

Saves spaceNo routing required

Low Cost Polymer Thick FilmHigh Speed Laser Trimming Available

Via to Plane

Via to SignalVia to Via

Buried Resistor Advantages

MTSvia™ using Annular Buried Resistor

MTS Via = Matched Terminated Stub ViaTerminated Via Stub Eliminates Stub Reflections, Reduces Jitter

UnterminatedStub

Degrading Stub Reflections

Normal Signal Flow

Distorted Signal

TerminatedStub

Stub Terminating Resistor(in anti-pad region)

Stub Reflections Eliminated

Undistorted Signal

WithoutStub

TerminationLargeJitter

WithStub

TerminationSmallJitter

It is easier to compensate for a reduction in amplitude than correct for distortion

MTSvia resistor value is adjusted to balance Signal Strength vs Signal Distortion

Stub

MTS-via™ application for internal signal routingeliminates need for 2 sided backdrill or subcomposites

MTS-VIA SignalRReference/Ground

Stub

EM w

ave

Useful portion

Use

less

po

rtio

n

Residual Stub

Summary•Via stubs degrade the signal integrity ( SI) performance of PCB interconnects because they attenuate and distort signals that propagate through them.

•This degradation is frequency/data rate dependent, with larger amounts of degradation occurring at higher operating frequencies/data rates

•Backdrilling of via stubs is a cost effective way of minimizing stub effects but is limited in capability for higher density designs and higher frequencies ( > 10 Gbps)

•Via structures whose stub sections have been terminated into a resistance do not have back-reflections and therefore do not introduce as much signal distortion.

•MTSvia is an alternative technology utilizing an impedance matched stub with an adjustable signal / distortion ratio to cost effectively optimize signal integrity for higher density designs and higher data rates.

Buried Capacitance®, MTS-via™, Opti-via™, ABR™ are trademarks of HSCI and Sanmina-SCI and are technologies covered by multiple US and foreign patents. Licensing is available.