Upload
cdiyyala
View
178
Download
40
Embed Size (px)
DESCRIPTION
VLSI training,maven silicon,test,
Citation preview
Maven Entrance Test - METPlease enter your name and registration ID, then start answering for the questions and finally press submit button at the end to submit your answers. ******************************************************************************************** Required
Name *
Registration ID *
1) The BCD number for decimal 16 is ________.
A] 00010110
B] 00010000
C] 00010010
D] 11100000
2) The Boolean expression C + CD is equal to ________.
A] C
B] D
C] C + D
D] 1
3) How many exclusive-NOR gates would be required for an 8-bit comparator circuit?
A] 4
B] 6
C] 8
D] 10
4) convert the following hexadecimal number to decimal. 1CF16
A] 463
B] 4033
C] 479
D] 4049
5) A classification of ICs with complexities of 100 to 10,000 equivalent gates per chip is known as ________.
A] SSI
B] MSI
C] LSI
D] VLSI
6) The output of an OR gate is LOW when ________.
A] All inputs are LOW.
B] Any input is LOW.
C] Any input is HIGH.
D] All inputs are HIGH.
7) A "floating" TTL input may be defined as:
A] Unused input that is tied to Vcc through a 1 k Ω resistor.
B] Unused input that is tied to used inputs.
C] Unused input that is tied to the ground.
D] Unused input that is not connected.
8) The contents of the accumulator after this operation MOV A,#2BH ORL A,00H will be:
A] 1B H
B] 2B H
C] 3B H
D] 4B H
9) When SHIFT/(LOAD)' signal is LOW,
A] the data are shifted one bit per clock pulse.
B] the data are loaded one bit per clock pulse.
C] the data are transferred per clock pulse.
D] None of the above
10) Which statement best describes the given figure, and what is the function of the terminal labeled EN?
A] Quad two-input multiplexer. EN is the enable input, which requires an active LOW for the device to work.
B] Quad two-bit multiplier, EN is the active HIGH trigger.
C] Dual quad-input multiplexer, which requires an active LOW on the EN terminal for the device to work.
D] Quad two-input AND gate, which requires an active LOW on the EN input to enable all the gates.
11) Digital systems are called ________.
A] Binary systems
B] Logic systems
C] Numbering systems
D] ADC systems
12) What is the frequency of a clock waveform if the period of that waveform is 1.25 s?
A] 8 kHz
B] 0.8 kHz
C] 0.8 MHz
D] 8 MHz
13) Assign the proper even parity bit to the code 1100001.
A] 11100001
B] 1100001
C] 01100001
D] 01110101
14) The Pentium can address ________.
A] 1 MB
B] 1 GB
C] 2 GB
D] 4 GB
15) What type of logic circuit is shown below and what logic function is being performed?
A] It is an NMOS AND gate.
B] It is a CMOS AND gate.
C] It is a CMOS NOR gate.
D] It is a PMOS NAND gate.
16) A D flip-flop utilizing a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?
A] CLK = NGT, D = 0
B] CLK = PGT, D = 0
C] CLOCK NGT, D = 1
D] CLOCK PGT, D = 1
17) An RC circuit used in a 74122 retriggerable one-shot has an REXT of 100 kΩ and a CEXT of 0.005 µF. The pulse width is ________.
A] 70 µs
B] 16 µs
C] 160 µs
D] 32 µs
18) The device that places its input data onto one of several outputs is a ________.
A] De-multiplexer
B] Multiplexer
C] Comparator
D] Counter
19) What logic function is the sum output of a half-adder?
A] AND
B] exclusive-OR
C] Exclusive-NOR
D] NAND
20) During a memory read operation, the CPU fetches ________.
A] A program instruction
B] An address
C] Data
D] all of the above