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Measurement and data extraction. How to measure the splice and diode interconnections. Accuracy and issues of these measurements. Data extraction issues. Data analysis tools. Z.Charifoulline, TE/MPE-CP 10/7/2011 1 CSCM Workshop CSCM Workshop

Measurement and data extraction

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CSCM Workshop. Measurement and data extraction. How to measure the splice and diode interconnections. Accuracy and issues of these measurements. Data extraction issues. Data analysis tools. . Z.Charifoulline , TE/MPE-CP. How to measure the splice and diode interconnections. . - PowerPoint PPT Presentation

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Page 1: Measurement and data extraction

CSCM Workshop 1

Measurement and data extraction. How to measure the splice and diode interconnections. Accuracy and issues of these measurements. Data extraction issues. Data analysis tools.

Z.Charifoulline, TE/MPE-CP

10/7/2011

CSCM Workshop

Page 2: Measurement and data extraction

CSCM Workshop 2

tplateau

dI/dt

Iplateau

I

t

FPA if V>Vthr

dV/dt to open

the diodes

Fast ramp downif V>Vthr

t1 t2

500 A

4-6 kA

60 s

PC in voltage mode PC in current mode

500 A/s

H. T

hies

en –

16

Augu

st 2

011

– TE

-TM

Trip by nQPS mBS

CSCM current cycles

1 kA

How to measure the splice and diode interconnections.

“safe” measurements

“unsafe” measurements

10/7/2011

Page 3: Measurement and data extraction

CSCM Workshop 3

How to measure the splice and diode interconnections. 0.5 – 1kA tests (“safe”):It is safe since any errors in protection thresholds will cause a trip but not yet a burning of any splices or diodes- 60s@1kA ramps to verify new QPS hardware and software- RRR measurements (board A)- Rdiode measurements at low current (board B – board A)- define, load and verify voltage thresholds of mBS boards

4 – 6kA tests (“unsafe”):It is not safe since a single error in protection thresholds may cost as a burning of defective splice or diode!- 10s@4kA->60s@4kA->10s@5kA->60s@5kA->10s@6kA->60s@6kA (see A.W. talk)- redefine voltage thresholds after every ramp -> reload and verify if needed!- Rdiode measurements and case analysis for high values before next ramp- correctly detect runaway event if so for detailed off-line analysis later on

On this step the tests still can be performed by use of conventional splice protection boards (nQPS BS ) and can be analyzed by existed software (SM), but we need to check new hardware and software.

To be able to detect correctly the thermal runaways (or CSCM evnts) we need much faster DAQ .And we need parallel Board A&B measurements to distinguish runaways from high diode lead resistances.So this is why the nQPS mBS board was born! (Jiens child)

10/7/2011

Page 4: Measurement and data extraction

CSCM Workshop 4

nQPS BS Board A: EE012<->EE013 (Bus bar)nQPS BS Board B: EE014<->EE015 (Bus bar + 2 DLs)

How to measure the splice and diode interconnections.

“nQPS BS” boards will be replaced by “nQPS mBS” boards. But it will be no any additional patches => so voltage taps will be still the same. (see A.W, J.S. talks)

10/7/2011

Page 5: Measurement and data extraction

CSCM Workshop 5

Current lead protection (nominal)

Board A Board B MeaningLD1:U_RES EE11 - EE21 EE12 - EE22 Copper part of C.L.LD1:U_HTS EE21 - EE31 EE22 - EE32 HTS part of C.L.

U_BB_1 EE41 - EExx EE42 - EExx From bottom of HTS Copper

HTS

TT 893(TT 811)

EE11, EE12

EE21, EE22

EE31, EE32

EE41, EE42

He Liquid level

PT 100

PT 100

U_RES

U_HTS

1st Magnet:EE012, EE013 (Board A)EE014, EE015 (Board B)

1st Bus Bar segment

We are not going to measure the current leads?The first bus bar segments will be protected and measured exactly the same way as others. (as it is now in the tunnel at cold)Only the difference, that they had never beenmeasured at warm (biddle testing, RRR?)and there is no diode from one side.

nQPS 1st crate: BS or mBS

How to measure the current lead interconnections?

10/7/2011

Page 6: Measurement and data extraction

CSCM Workshop 6

QP3-simulation:RB Bus Bar, RRRBUS=200, RRRSC=120Temperature = 20KLength = 30 and 40mSingle Side Defect = 2, 10, 20, 30, 40, 50mmCurrent = 1kA and 6kA

Bus Bar Segment Resistance (plus diode leads Board B)

Bus Bar Splice Defect

How to measure the splice and diode interconnections.

1 kA

6 kA

10/7/2011

∆t

Page 7: Measurement and data extraction

CSCM Workshop 7

How to measure the splice and diode interconnections.

1 kA

~60-100s, 5Hz => 300-500 points

- U01kA values will be calculated and stored for boards A and B- to be used to define 4kA thresholds: Uthr = 4*U01kA + Usafe

- (UB – UA) will be the diode leads voltages (analysis will be added)- bus bar resistances will be calculated (=>RRR, +length or 300K tests)

U01kA

Simulation:RB, Sector12Real Bus Bar lengthsT=20±2K, RRR=200±50±50uV noisemBS: 5Hz@305nV

Simulation:RB, Sector12Real Bus Bar lengthsT=20±2K, RRR=200±50±50uV noisemBS: 5Hz@305nV

It would be the nice bus bar length pattern if RRR and THe are constant!Dipole: 15m <-> 55m, but mainly ~30m and ~40mQuads: 100m <-> 250m, but in some cases ~450m!

10/7/2011

Page 8: Measurement and data extraction

8

There are important voltage drops to worry about...

10/7/2011 CSCM Workshop

magnet

[BA23.L1<->BB22.L1]

A23L1

magnet

B22L1

splice

bridge11kΩ

Cabl

e 2

Cabl

e 1

2.2Ω

bridge22kΩ

Cabl

e 4

Cabl

e 3

5.1Ω

248uV

367mV 352mV

14.7A24mΩ

25mΩ

16uA33uA

82uV

73uV

17uΩ

403uV

Correction can be 70% of signal! Length cable 2= 29m

Length cable 3= 66m

Timber

Calculated

M.K. TE/MPE, 13-01-2011

1kA

5-40uΩ

~1V

30 … 100m <-> 10 … 40mV

~50uA250u

V

~3-5%

So CSCM will be at least one more RRR-measurements within 5%but without complicated corrections and for whole sector.

How to measure the splice and diode interconnections.

Page 9: Measurement and data extraction

CSCM Workshop 9

How to measure the splice and diode interconnections.

6 kASimulation:RB, Sector12Real Bus Bar lengthsT=20±2K, RRR=200±50±50uV noisemBS: 5Hz@305nV~30mm defect!

- U06kA values and thresholds calculated from previous 10s@6kA ramp!- (UB – UA) will be the diode leads voltages (analysis will be added)

Board A

10/7/2011

∆t

Page 10: Measurement and data extraction

CSCM Workshop 10

How to measure the splice and diode interconnections.

6 kASimulation:RB, Sector12Real Bus Bar lengthsT=20±2K, RRR=200±50±50uV noisemBS: 5Hz@305nV~30mm defect!20µΩ white noise added!(diode leads simulation)

Board B

- U06kA values and thresholds calculated from previous 10s@6kA ramp!- (UB – UA) will be the diode leads voltages (analysis will be added)

It is extremely important to collect and analyze the test data from every ramp > 4kAfor both Boards A & B and to define and load correct thresholds for every channel!Thresholds calculation might be not so trivial, especially for dU/dt of board B.10/7/2011

Page 11: Measurement and data extraction

CSCM Workshop 1110/7/2011

Data extraction issues and analysis tools.

-threshold calculations, U and dU/dt?- saving to proper files for loading- check after loading for data consistency

Calculated thresholds

Page 12: Measurement and data extraction

CSCM Workshop 12

2048 total

30 bus bars > 1.2nΩ10σ for MB3σ for MQ

MB 301 ± 85pΩMQ 306 ± 313pΩ

nQPS BS (A&B)U_MAG: LSB=1.9µV, Range=±15.9V PtP≈500µV(noise)U_RES: LSB=1.5nV, Range=±12.8mV PtP≈50µV-100µV (noise)5Hz, 50points moving average (10s)2048 channels (x2)

Logging DB

U_RES(t), U_MAG(t)I_MEAS(t)

Mag

net

Mag

net

Bus B

ar

1 2 3

4

Data extraction issues and analysis tools.

nQPS BS: Cold Splice Protection and Measurement

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Page 13: Measurement and data extraction

CSCM Workshop 13

nQPS mBS (A&B)U_MAG: LSB=1.9µV, Range=±15.9V PtP≈500µV(noise)U_RES: LSB=305nV, Range=±2.5V PtP≈50µV-100µV (noise)16.5Hz, no filtering2048 channels (x2)

Logging DB

U_RES(t)I_MEAS(t)

Mag

net

Mag

net

Bus B

ar

1 2 3

4

nQPS mBS: CSCM

Main changes:- 16.5Hz DAQ, no filtering;- 5Hz data available in logging DB;- 16.5Hz@3000 internal buffers (for boards A&B!) ; (see J.S. talk)

Data extraction issues and analysis tools.

A&B Buffers extractionsneed to be added to the existing data flow.

10/7/2011

5Hz from TIMBER or Front End

T=20KRBB_dipole = 0.36µΩ/m => 10-20mV@1kARBB_quad = 0.57µΩ/m => 50-250mV@1kARdiode lead = 5-20µΩ => 30-120mV@6kA

Page 14: Measurement and data extraction

CSCM Workshop 14

Data extraction issues and analysis tools.

By courtesy of A.Gorzawski

Test 3min Buffers extraction2x15min

[email protected], ~180s

By Test OperatorSpecial Macro or LabView

It will give absolute time referencefor all curves within ±200ms andguarantee correct analysis of runaways

By Test OperatorSpecial Macro or LabViewApplication will toggle ST_BOARD_A to avoid board mixture

Finally Test Data stored in Logging DB and ready for analysis.But the timescales need to be correctly reconstructed (5Hz -> 16.5Hz)

10/7/2011

Page 15: Measurement and data extraction

CSCM Workshop 15

Data extraction issues and analysis tools.

By courtesy of A.Gorzawski

10/7/2011

Data stored in Logging DB and ready for analysis.But the timescales still need to be correctly reconstructed (5Hz -> 16.5Hz)

DS buffers reading application -adapted already for mBS buffers. Data can be saved and analyzed in EXCEL.

Arkadiusz

QPS DB (develop.)-BS signals-DS signals-Bus Bar Lengths-Splice cold resistances- and many more …

Page 16: Measurement and data extraction

CSCM Workshop 1610/7/2011

Data extraction issues and analysis tools.

Summary:- mBS DAQ is sensitive and fast enough to make measurements at mV ranges;- bus bar RRR can be re-measured within 3-5% (will depend on THe stabilization);- mSB buffers triggering and extraction procedures established and checked;- all data will be saved to logging DB with absolute time stamps (<1s) and A/B signatures, which allow correct off-line expert’s analysis;-Special Java Application developing to read the data from logging DB, to reconstruct the timescales, to save data to csv-files or to QPS DB for online analysis of the whole considered sector.-Splice Monitor application (or new) will be upgraded for new requirements:

- board A/B analysis, thresholds estimations and preparing for loading;- diode leads resistance evaluation from two boards data;- and needs to be very reliable and be checked before going to high currents;

Page 17: Measurement and data extraction

CSCM Workshop 1710/7/2011

Thanks!

Page 18: Measurement and data extraction

CSCM Workshop 18

RB, 30m, 6kA

How to measure the splice and diode interconnections.

40mm, 15K, 20K, 25K

15K, 20K, 25K 30mm

He-Bath temperature variation effect

10/7/2011

Page 19: Measurement and data extraction

CSCM Workshop 19

Diode lead ‘resistances’ for 6 kA quenches

Conclusion:Large spread among the 12 leads.‘Steps’ occurring in first 15 s.

5 mW: maximum measured at reception in SM18 13 mW: specification during reception in SM18

10/7/2011

Page 20: Measurement and data extraction

CSCM Workshop 20

Diode lead ‘resistances’ for B15R5 AnodeConclusion:Inductive signal is small.Results indicate the presence of one or more irregular contacts.The three 6 kA curves differ a factor 2.

10/7/2011

Page 21: Measurement and data extraction

CSCM Workshop 21

Resistance of the heat sink at 10 K with RRR=100 0.001 mW

Resistance of the lower diode bus at 10 K with RRR=100 (upper heat sink) 0.17 mW

Resistance of the lower diode bus at 10 K with RRR=100 (lower heat sink) 0.28 mW

Resistance of the upper diode bus at 10 K with RRR=100 0.23 mW

Power in a diode at 2 kA About 2.4 kW

Power in a diode at 6 kA About 6.6 kW

Energy needed to warm up the helium inside the diode from 1.9 to 2.17 K 1.4 kJ

Energy needed to warm up the helium inside the diode from 2.17 to 4.3 K 5.1 kJ

Energy needed to evaporate the helium inside the diode 14 kJ

Energy needed to warm up both heat sinks from 1.9 to 4.3 K 4 J (see next plot)

Temperature rise of the diode lead (RRR=100, adiab.) for 6 kA, t=50 s decay 1.9 K to 31.3 K

Resistance rise of the diode lead (RRR=100, adiab.) for 6 kA, t=50 s decay 0.59 to 0.86 mW

Resistance of the lower diode lead at 110 K 4.6 to 7.7 mW

Temperature rise of the heat sink (adiab.) for 6 kA, t=50 s decay 1.9 K to 110 K

Some numbers

10/7/2011