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MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

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Page 1: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

MEMORIA (RAM)

Miguel A. Guillermo Castillo

Prof.Ruddy

Page 2: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

IMPORTANT TERMS

Parity checking

Error correcting code (ECC)

Single and double sided memory

Single, double, triple channel memories

Page 3: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

PARITY CHECKING

Parity checking is rudimentary error checking

scheme that offers no error correction. Parity

checking works more on a byte or 8 bit

Page 4: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

ERROR CORRECTING CODE (ECC)

The next step in the evolution of memory error

detection is know as error correction code. If the

memory (RAM) supports ECC, check bits are

generated and stored with the data.

Page 5: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SINGLE AND DOUBLE SIDED MEMORY

Commonly speaking, the term single sided memory

and double sided memory refers to how some

memory modules have chips on one side while

others chips have on both sides. Double sided

memory is essentially treated by the system as two

separate memory modules

Page 6: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SINGLE, DOUBLE, TRIPLE CHANNEL MEMORIES

Standard memory controller manage access to

memory in chunks of the same size as the system

bus’s data width. This is considered communicating

over a single channel. Most modern processors have

64-bit system data bus.

Page 7: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

TYPES OF MEMORIES

DRAM

SRAM

ROM

Page 8: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

DRAM

DRAM is Dynamic Radom Access Memory. When

you expand the memory in a computer, you are

adding DRAM chips. Dynamic RAM chips are

cheaper to manufacture than most others types

because they are less complex.

Page 9: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

ASYNCHRONOUS DRAM

Asynchronous DRAM(ADRAM) is characterized by

its independence from the CPU’s external clock.

ADRAM chips have codes on them that end in a

numerical value that is related to (often 1/10 of the

actual value of) the access time of the memory

Page 10: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SYNCHRONOUS DRAM

SDRAM shares a common clock signal with the

computer’s system bus clock, which provides the

common signal that all local-bus components use for

each step that they perform.

Page 11: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SDR SDRAM

With SDR SDRAM, every time the system clock

ticks, 1 bit of data can be transmitted per data pin,

limiting the bit rate per pin of SDRAM to the

corresponding numerical value of the clock’s

frequency.

Page 12: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SDR DDR

DDR stand for Double Data Rate SDRAM, earns its

name by doubling the transfer rate of ordinary SDRAM;

it does so by double –pumping the data, which means

transferring a bit per pin on both the rising and falling

edges of the clock signals. The data rate is1600MBos.

Volt. 2.5

182 pin

Page 13: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SDR DDR2

Think of the 2 in DDR2 as yet another multiplier of 2 in

the SDRAM technology, using a lower peak voltage to keep

power consumption down(1.8 vs. 2.5 of DDR). DDR2 using

a 100MHz actual clock, transfers data in four operation

per clycle(effective 400 MHz FSB) so data transfer rate is

3200MBps.

240 pin

Volt 1.8

Page 14: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SDR DDR3

Next generation of memory devices was designed

to roughly double the performance of DDR2

products. The most commonly found range of actual

clock speeds for DDR3 tends to be from 133MHz at

the low end to less than 300MHz.

240 pins

Volt 1.5

Page 15: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SRAM

Static random access memory (SRAM)doesn’t

require a refresh signal like DRAM does. The chips

are more complex and are more expensive.

Page 16: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

ROM

ROM stands for read-only memory. It is called ROM

because the original form of this memory could not

be written. Some form of ROM is normally used to

the computer’s BIOS because this information

normally does not change very often

Page 17: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

MEMORY PACKAGING

DIMM

RIM

SODIMM

MicroDIMM

Page 18: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

DIMM

DIIM stands for dual inline memory module. One

type of memory package is known as a DIMM. DIMM

are 64—bit memory modules that are used as a

package for the sSDRAM family: SDR, DDR, DRR2,

and DRR3.

Page 19: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

RIMM

Assumed to stand for Rambus inline memory

module but not really an acronym, RIMM is a

trademark of Rambus Inc.

184 pins

Page 20: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

SODIMM

Notebook computers and other computers that

require much smaller components don't use

standard RAM packages, such as the DIMM.

144 pins

Page 21: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

MICRODIMM

A newer, smaller, and rarer RAM form factor is the

microDIMM is an extremely small RAM form factor.

In fact, it is over 50 percent smaller than a

SODIMM..

Tiene 172 pins

Page 22: MEMORIA (RAM) Miguel A. Guillermo Castillo Prof.Ruddy

REFERENCIA

Sybex CompTIA A+ 220-801, Cap:1, Pag. 35-51

Imagajenes de https://www.google.com.pr/search?

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