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EC2308 – MICROPROCESSOR AND MICROCONTROLLER LAB Ex. No: 1 16 BIT ARITHMETIC OPERATIONS a) ADDITION ALGORITHM: I. Initialize the SI register to input data memory location II. Initialize the DI register to output data memory location III. Initialize the CL register to zero for carry IV. Get the 1 st data into accumulator. V. Add the accumulator with 2 nd data VI. Check the carry flag, if not skip next line VII. Increment carry(CL Reg) VIII. Move the result from accumulator to memory. IX. Also store carry register X. Halt Program: Address Label Mnemonics Machine Code Comments STORE: MOV SI, 2000H MOV DI, 3000H MOV CL, 00H MOV AX, [SI] ADD AX, [SI+2] JNC STORE INC CL MOV [DI], AX MOV [DI+2], CL INT 3 OUTPUT VERIFIACTION: INPUT DATA 1 DATA 2 DATA 2 2000H 34 2001H 12 2002H 78 2003H 56

Micro Processor Lab Manual

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EC2308 MICROPROCESSOR AND MICROCONTROLLER LABEx. No: 1

16 BIT ARITHMETIC OPERATIONSa) ADDITION

ALGORITHM:

I. Initialize the SI register to input data memory location

II. Initialize the DI register to output data memory location

III. Initialize the CL register to zero for carry

IV. Get the 1st data into accumulator.V. Add the accumulator with 2nd data

VI. Check the carry flag, if not skip next lineVII. Increment carry(CL Reg)

VIII. Move the result from accumulator to memory.

IX. Also store carry register

X. Halt Program:

AddressLabelMnemonicsMachine CodeComments

STORE:MOV SI, 2000H

MOV DI, 3000H

MOV CL, 00H

MOV AX, [SI]

ADD AX, [SI+2]

JNC STORE

INC CLMOV [DI], AX

MOV [DI+2], CL

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H34

2001H12

2002H78

2003H56

OUTPUT

3000HAC

3001H68

3002H00

b) SUBTRACTION

ALGORITHM:

I. Initialize the SI register to input data memory location

II. Initialize the DI register to output data memory location

III. Initialize the CL register to zero for borrowIV. Get the 1st data into accumulator.

V. Subtract the accumulator with 2nd data

VI. Check the carry flag, if not set skip next line

VII. Increment carry(CL Reg)

VIII. 2s Compliment Accumalator

IX. Move the result from accumulator to memory.

X. Also store carry register

XI. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

STORE:MOV SI, 2000H

MOV DI, 3000H

MOV CL, 00H

MOV AX, [SI]

SUB AX, [SI+2]

JNC STORE

INC CL

NEG AX

MOV [DI], AX

MOV [DI+2], CL

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H88

2001H44

2002H33

2003H22

OUTPUT

3000H55

3001H22

3002H00

C) MULTIPLICATION

ALGORITHM:

I. GET MULTIPLIER INTO ACCUMULATOR FROM MEMORY

II. GET MULTIPLICAND INTO BX REGISTER

III. MULTIPLY AX AND BX

IV. STORE LOWER ORDER WORD FORM ACCUMULATOR INTO MEMORY

V. STORE HIGHER ORDER WORD FROM DX INTO MEMORYVI. HALT

Program:

AddressLabelMnemonicsMachine CodeComments

MOV AX, [2000H]

MOV BX, [2002H]

MUL BX

MOV [3000], AX

MOV [3002], DX

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H0A

2001H00

2002H0A

2003H00

OUTPUT

3000H64

3001H00

3002H00

3003H00

D)DIVISION

I. GET DIVIDEND INTO ACCUMULATOR FROM MEMORY

II. GET DIVISOR INTO BX REGISTER

III. DIVIDE AX BY BX

IV. STORE QUOTIENT FORM ACCUMULATOR INTO MEMORY

V. STORE REMAINDER FROM DX INTO MEMORY

VI. HALT

Program:

AddressLabelMnemonicsMachine CodeComments

MOV AX, [2000H]

MOV BX, [2002H]

DIV BX

MOV [3000], AX

MOV [3002], DX

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H68

2001H00

2002H0A

2003H00

OUTPUT

3000H0A

3001H00

3002H04

3003H00

Ex.No: 2

Searching & Sorting

a) Largest/Smallest No. in an array

Algorithm:

i. Load starting address of array in to SI reg.

ii. Load length of array in CL reg.

iii. Get the 1st element into Accumulator

iv. Update SI and CL registers

v. Compare Accumulator with next element

vi. Check carry flag, if not set skip next line

vii. Swap accumulator with SI reg.

viii. Decrement counter

ix. If not zero, goto step iv.

x. Else, store result.

xi. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

NEXT:

SKIP:MOV SI, 2000H

MOV DI, 3000H

MOV CL, [SI]

INC SI

MOV AL, [SI]

DEC CL

INC SI

CMP AL, [SI]

JNB SKIP/ JB SKIPMOV AL, [SI]

DEC CL

JNZ NEXTMOV [DI], AL

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H(COUNT)05

2001HAA

2002HBB

2003HCC

2004H55

2005H77

OUTPUT

3000HLARGEST : CC

SMALLEST: 55

b) To Search for a BYTE in an array.Algorithm:

i. Load starting address of array in to SI reg. and initialize DI reg for result.

ii. Load the byte to be searched in DL reg. & initialize BH reg for position as 01

iii. Get the 1st element into Accumulator

iv. AGAIN : Compare Accumulator with DL reg

v. Check zero flag, if set goto AVAIL

vi. Update SI and Increment BL

vii. Get next element into Accumulator and compare with EOA

viii. If not zero, goto AGAIN.

ix. Initialize CX reg to zero

x. Store result for Not Available and goto END

xi. AVAIL: Get word for available in to BL reg.

xii. Store position, address and status of serach.

xiii. END: Halt

Program:

AddressLabelMnemonicsMachine CodeComments

AGAIN:

NOTAVL

AVAIL:

END:MOV SI, 2000H

MOV DI, 3000H

MOV DL, [DI]

MOV BH, 01

MOV AL, [SI]

CMP AL, DL

JZ AVAIL

INC SI

INC BL

MOV AL, [SI]

CMP AL, E0JNZ AGAINMOV CX, 0000H

MOV [DI+1], CX

MOV [DI+3], CX

JMP ENDMOV BL, FF

MOV [DI+1], BX

MOV [DI+3], SI

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

3000H(BYTE)05

2000HAA

2001HBB

2002HCC

2003H55

2004H77

2018H05

2032HEO

OUTPUT

3000H05

3001HFF

3002H19

3003H18

3004H20

c) Ascending/Descending orderAlgorithm:

i. Load SI reg with pointer to array

ii. Load array length to CL & CH for two counters (CL for repetitions & CH for comparisons)

iii. REPEAT : Get an element into accumulator

iv. NEXT: Compare with next element

v. Check carry flag, if set goto SKIP

vi. Swap elements of array

vii. SKIP: Decrement CH and if not zero go to NEXT

viii. Decrement CL , if not zero go to REPEAT

ix. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

REPEAT:

NEXT:

SKIP:MOV SI, 1500H

MOV CL, [SI]

DEC CL

MOV SI, 1500H

MOV CH, [SI]

DEC CH

INC SI

MOV AL, [SI]

INC SI

CMP AL, [SI]

JC SKIP/JNC SKIPXCHG AL, [SI]

XCHG AL, [SI - 1]

DEC CH

JNZ NEXT

DEC CL

JNZ REPEAT

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

1500(COUNT)07

1501AA

1502BB

1503CC

150455

150577

150611

150799

OUTPUT

150111

150255

150377

150499

1505AA

1506BB

1507CC

EX.NO: 3

STRING MANUPULATION

a) Block Transfer

Algorithm:

i. Initialize DS & ES registers

ii. Load source and destination locations to index regs.

iii. Load block size in counter reg.

iv. Clear Direction flag for Auto- incrementing mode

v. Copy contents from source to destination address until counter becomes zero.

vi. Halt.

Program:

AddressLabelMnemonicsMachine CodeComments

TRANSFER:MOV AX, 0000H

MOV DS, AX

MOV ES, AX

MOV SI, 2001H

MOV DI, 3000H

MOV CX ,[2000H]

CLD

MOVSB

LOOP TRANSFERINT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H (Block Size)05

2001H12

2002H34

2003H56

2004H78

2005H9A

OUTPUT

3000H12

3001H34

3002H56

3003H78

3004H9A

b) Table searchAlgorithm:

i. Initialize BX reg with table size

ii. Get address of table and symbol in DI & SI reg.

iii. Clear direction flag.

iv. Load counter with 08(length)

v. Compare bytes if successful goto FOUNDvi. Point to the next symbol

vii. Decrement BX, if not zero repeat the stepsviii. Show not found

ix. FOUND: Show found status.

x. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

LOOP1NOTFOUND:

FOUND:

END:

MOV BX, Table Size

LES DI, [3000H]MOV DX, DI

LDS SI, [2000H]CLD

MOV CX , 08

REPE CMPSB

JE FOUND

ADD DX, 0020H

MOV DI, DX

MOV SI, [SI+8]DEC BX

JNE LOOP1

MOV AL, 00H

MOV [3000H], AL

JMP ENDMOV AH, FFHMOV [3000H], AHINT 3

OUTPUT VERIFIACTION:

INPUT

3000H00

3001H30

3002H00

300300

2000H00

2001H12

2002H00

2003H00

Note: The table has to be loaded from memory location 3000H & the search string in 1200H. Table size can be any 16 bit number c) Code ConversionAlgorithm

i. Initialize BX reg with address of translation tableii. Load source and destination address in SI & DI reg.

iii. Clear direction flagiv. Load counter with length

v. Get first element into AL , check whether the input is valid

vi. If invalid go to end

vii. Else translate code from table

viii. Store code

ix. Loop until counter becomes zero

x. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

CONVERT:INVALID:MOV BX, 1200H

MOV SI, 2000HMOV DI, 3000HCLD

MOV CX , LengthLODSBCMP AL, 09H

JA INVALID

XLAT

STOSBLOOP CONVERT

INT 3

MOV AL, 00MOV [DI], AL

INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H

(DECIMAL DIGIT)03

200105

OUTPUT

3000H4F

3001H6D

CONVERSION TABLE: LOAD FROM Memory Address: 1200HBCD digit0123456789

7 segment code3F065B4F666D7D077F6F

d) Find & ReplaceAlgorithm:

i. Initialize DS & ES registers

ii. Load destination index regs. With address of string

iii. Load counter reg.

iv. Load AL with the string to be found

v. Clear Direction flag for Auto- incrementing mode

vi. Scan for the string

vii. If found replace with the other string in AHviii. Continue until counter cleared

ix. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

LOOP1:

DONE:MOV AX, 0000H

MOV DS, AX

MOV ES, AX

MOV AL, [2001H]MOV DI, 3000H

MOV CX ,[2000H]

CLD

REPNZ SCASB

JNZ DONEMOV AH, [2002H]MOV [DI 1], AH

JMP LOOP1INT 3

OUTPUT VERIFIACTION:

INPUTDATA 1DATA 2DATA 2

2000H

(COUNT)05

2001HCC

2002HAA

3000H11

3001HCC

3002H22

3003HCC

3004H33

OUTPUT

3000H11

3001HAA

3002H22

3003HAA

3004H33

Ex.No: 4

ADC & DAC

a) DAC Interfacing

Square wave:

i. Initialize 8255 by sending Control Word to Control Reg.ii. Get High into accumulator; send to DAC through output portiii. Call delay sub routineiv. Get Low into accumulator; send to DAC through output port

v. Continue cycle

Program:

AddressLabelMnemonicsMachine CodeComments

START:

DELAY:

CONT:MOV DX,FF56HMOV AL,80H OUT DX,ALMOV DX,FF52H MOV AL,FFHOUT DX,ALCALL DELAYMOV AL,00HOUT DX,ALCALL DELAYJMP STARTMOV CX,07FFH NOPNOPDEC CXJNZ CONTRET8255 Control Reg addressControl word to put ports as output ports

Send to control regPort B addressHigh into acc.Send to DAC through output port

Call delay routine

Low value into acc.

Send to DAC through output port

Call delay routine

Continue cycle

Delay count

Wait state

Decrement count

If not zero continue

Else return to main program

OUTPUT VERIFICATION: (Plot the Wave form in Graph.)Count valueAmplitude (V)Time period (ms)

07HH2 V0.4 ms

Stair case wave:

Program:

AddressLabelMnemonicsMachine CodeComments

START:

DELAY:

CONT:

MOV DX, FF56H

MOV AL,80H

OUT DX,AL

MOV DX, FF52H

MOV AL, 00H

OUT DX, AL

CALL DELAY

ADD AL, 55H

OUT DX, AL

CALL DELAY

ADD AL, 55H

OUT DX, AL

CALL DELAY

ADD AL, 55H

OUT DX, AL

CALL DELAY

CALL DELAY

SUB AL, 55H

OUT DX, AL

CALL DELAY

SUB AL, 55H

OUT DX, AL

CALL DELAY

SUB AL, 55H

OUT DX, AL

CALL DELAY

JMP STARTMOV CX, 0AFFH

NOP

NOP

DEC CX

JNZ CONTRET

b) ADC Algorithm:

i. Initialize 8255 by sending control word to control reg.ii. Initialize measurement and get input to ADCiii. Close measurement.iv. Call delay.v. Read the digital outputvi. HaltProcedure: i. Connect ADC interfacing Kit with VIK-86 Kit through bus

ii. Connect power supply to ADC kit

iii. Load program

iv. Set input voltage by Adjusting POT resister in ADC Kit and measure using Multimeter.

v. Execute program and read the digital output from the VIK 86 kit.

Program:

AddressLabelMnemonicsMachine CodeComments

DELAY:CONT:

MOV DX, FF56H

MOV AL, 90H

OUT DX, AL

MOV DX, FF54H

MOV AL, FFH

OUT DX, AL

MOV AL, 00

OUT DX, AL

MOV AL, FFH

OUT DX, AL

CALL DELAY

CALL DELAY

MOV DX, FF50H

IN AL, DX

INT 3

MOV CX, 0FFFH

NOP

NOP

DEC CX

JNZ CONT

RET8255 Control reg addressControl Word for initializing ports as I/P ports

Send to control reg

Port C address

Disable signal for ADC

Send to ADC port

SOC signal for ADC

Send to ADC port

Close measurement signal

Send to ADC

Call delay routine

Port A address

Read Port A which has Output of ADC

Break point

Delay count

Wait state

Decrement count

If not zero continueElse return to main program

OUTPUT VERIFICATION:

Analog Input (V)Digital Output

5 VFFH

2.5 V7AH

Ex. No: 5

PARALLEL COMMUNICATIONTransmitter:Algorithm:

i. Initialize the 8255 with output ports by sending control word

ii. Send the clear signal to receiver

iii. Get the Byte to be transmitted into Accumulator

iv. Send it to output port

v. Send the Enable signal and close communication

vi. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

MOV DX, FF26H

MOV AL,82H

OUT DX,AL

MOV DX, FF24H

MOV AL,00H

OUT DX,AL

MOV DX, FF20H

MOV AL,55H(Byte)OUT DX,AL

MOV DX, FF24H

MOV AL, FFH

OUT DX,AL

INT 3

8255 Control RegControl Word for Initializing ports as O/P

Load control wordPort C for Clear signal

Clear signalSend clear signalPort A Output port for transmitting Byte

55H byte to be transmitted

Transmit bytePort C for Enable signal

Enable signal

Send Enable signal

Break point

Receiver:Algorithm:

i. Initialize 8255 with input ports by setting control reg.

ii. Read & Check for Clear signal from Transmitteriii. Check and wait for Enable signal

iv. Read input port

v. Show the data

vi. Halt

Program:

AddressLabelMnemonicsMachine CodeComments

CHECK:

MOV DX,FF26H

MOV AL,99H

OUT DX,AL

MOV DX,FF24HIN AL,DX

JZ CHECK

MOV DX,FF20H

IN AL,DXINT 3H

Control Reg. of 8255Control word for initializing ports as I/P

Port C for Enable signal

Read Port C

Go back and wait for Enable

Port A input data

Read data form transmitter

Break Point

Procedure:

i. Connect two VIK 86 kits using data cableii. Load Transmitter program in One kit and Receiver in the other kit

iii. Execute Receiver and then Transmitter and again Reciver.

iv. AL in Receiver will show the Byte Transmitted

Ex.No: 6

INTERFACING 8279, 8259 & 82538279:

Keyboard Interfacing:

Algorithm:

i. Initialize 8279 with control word to define in 8 bit 8 character display

ii. Initialize clock pre scalar for frequency division

iii. Load display write inhibit wordiv. Read FIFO RAM status if empty wait

v. Else read Data code from input port and suppress unwanted bits(b7&b6)

vi. Break point

AddressLabelMnemonicsMachine CodeComments

Wait:MOV AL,12hMOV DX,FF52hOUT DX,ALMOV AL,3EhOUT DX,ALMOV AL,A0h

OUT DX,ALIN AL,DXAND AL,07hJZ WaitMOV DX,FF50hIN AL,DXAND AL,3FhINT 3Control word to define 8279 in 8 bit 8 character display

8279 control portfor frequency division

display/write inhibitread status of 8279FIFO empty?

If Yes loop back to wait

Data register

Read Code from data port

Suppress bits 7&6

Break point

Scan codes for Keyboard:

Row/Column1234

124232221

21c1b1a19

314131210

40c0b0a09

Display interfacing:Algorithm:

i. Initialize 8279 with control word to define in 8 bit 8 character display

ii. Initialize clock pre scalar for frequency division

iii. Load display write inhibit word and count for clearing displayiv. Clear all display and load BX reg with address of tablev. Get the input code from table and send to display through output port vi. Break point

Program:

AddressLabelMnemonicsMachine CodeComments

Clear:

Back:

MOV AL,12h

MOV DX,FF52h

OUT DX,AL

MOV AL,3Eh

OUT DX,AL

MOV AL,A0h

OUT DX,AL

MOV AH,08h

MOV DX,0FF50h

MOV AL,00h

OUT DX,AL

DEC AH

JNZ ClearMOV DX,FF50hMOV CL,06MOV BX,2000h

MOV AL,[BX]

OUT DX, ALINC BX

DEC CLJNZ BackControl word to define 8279 in 8 bit 8 character display

8279 control port

Load to control regfor frequency division

send to control regdisplay/write inhibit

send to control regCount of 8 for clearing dis.

data register address

data =0decrement loop count

Clear up to AH= 00Data regCount for digits Input display code address in BXRead the input codeSend to output port for displayUpdate BX & CL regLoop back

Note: Input data from 2000HDIGIT0123456789ABCDEF

7 SEGMENT CODEFC60BAF266D6DE70FE767ECE9CEA9E1E

8259:

a) Return Interrupt number

Algorithm:

i. Load Initialization Control Word 1 (ICW1) into control regii. Load Initialization Control Word 2 (ICW2) into data reg.iii. Load Initialization Control Word 4 (ICW4) into data reg.iv. Load Operation Control Word (OCW) into control reg.v. Point to control regvi. Set interrupt enable flagvii. Wait for interrupt to happenviii. ISR: Read interrupt number and break point Program:AddressLabelMnemonicsMachine CodeComments

2000H

WAIT:

MOV DX, FF50hMOV AL, 1FhOUT DX,AL

MOV DX, FF52h MOV AL, 10hOUT DX,AL

MOV DX, FF52hMOV AL, 03hOUT DX,AL

MOV DX, FF52h MOV AL, 80hOUT DX,AL

MOV DX, FF50hSTI

JMP WAIT

(ISR to be loaded in vector location of interrupt)IN AL,DX

INT 3ICW1

ICW2

ICW4

OCW1

Enable interrupt

Wait for interrupt

Read data reg.Break point

Interrupt Vector table:Interrupt NoVector locationSegment Address (CS)Effective Address (IP)

IRQ00040H0000H2000H

IRQ10044H0000H2000H

IRQ20048H0000H2000H

IRQ3004CH0000H2000H

IRQ40050H0000H2000H

IRQ50054H0000H2000H

IRQ60058H0000H2000H

IRQ7005CH0000H2000H

OUTPUT: AL will contain the Interrupt value (The respective bit will be set with respect to interrupt No.)IRQ0IRQ1IRQ2IRQ3IRQ4IRQ5IRQ6IRQ7

0102040810204080

b) Program to do addition, subtraction and multiplicationAddressLabelMnemonicsMachine CodeComments

IRQ0:

IRQ1:

IRQ2:MOV AX. Data1

MOV BX, data2

ADD AX, BX

IRET

MOV AX. Data1

MOV BX, data2

SUB AX, BX

IRET

MOV AX. Data1

MOV BX, data2

MUL BX

IRET

Interrupt vector table:

Interrupt NoVector locationSegment Address (CS)Effective Address (IP)

IRQ00040H0000H2000H

IRQ10044H0000H3000H

IRQ20048H0000H4000H

8253:

Algorithm:

i. Load division factor as count in CX reg.ii. Select the counter reg by sending appropriate data to control reg.

iii. Get lower order count in to AL and send to selected counter reg

iv. Get higher order count in to AL and send to selected counter reg.v. Wait and terminate.

Program:AddressLabelMnemonicsMachine CodeComments

MOV AX,0050HMOV CX,AXMOV AL,36HMOV DX, FF56HOUT DX,ALMOV AL,CLMOV DX, FF50HOUT DX,ALMOV AL,CHOUT DX,AL

NOP

INT 3HDivision FactorCounter0 Is SelectedControl RegCount LsbCounter 0 RegCount Msb

Ex.No: 7

SERIAL COMMUNICATIONTransmitter:

Algorithm:

i. Load division factor in AX and Byte to be transmitted in BLii. Call the sub routine BAUDINIT.

iii. TXLOOP: Get the Byte to be transmited into AL

iv. Call the Subroutine TXBYTE

v. Jump to TXLOOP

vi. Breakpoint.

TXBYTE: i. Call delay routine

ii. Save the byte to another Reg from AL

iii. Load status reg address

iv. Read status word of 8251 and check ready bit(B0)

v. If zero continue checking

vi. Load mode reg address and get the Byte into AL

vii. Transmit the Byte

viii. Return to main programBAUDINIT:

i. Save division factor as count in CX reg.

ii. Select the counter reg by sending appropriate data to control reg.

iii. Get lower order count in to AL and send to selected counter reg

iv. Get higher order count in to AL and send to selected counter reg.

v. Wait and get status reg Address of 8251vi. Send 3 Dummy mode Words to 8251

vii. Get Reset word and send to 8251viii. Get mode word and Send mode word

ix. Wait and send Enable Transmitter signal

x. Wait and Return to Main program

DELAY:

i. Push BX in to stack

ii. Load Count in to Stack

iii. Wait and Decrement countiv. If count not zero then continue

v. Else Pop Bx form stack and return to main ProgramMode word Register: FF50HStatus word Register: FF52H

Timer Address(Counter0): FF00H

Program:AddressLabelMnemonicsMachine CodeComments

TXLOOP:

TXBYTE:

LOOOP:

BAUDINIT:

DELAY:

D1:

MOV AX,0050H MOV BL,42H

CALL BAUDINIT MOV AL,BL CALL TXBYTE JMP TXLOOP

INT 3

CALL DELAY

MOV BL,AL MOV DX,FF52H IN AL,DX AND AL,01H JZ LOOOP

MOV AL,BL MOV DX,FF50H

OUT DX,AL

RET

MOV CX,AX MOV AL,36H MOV DX,FF06HOUT DX,AL

MOV AL,CL MOV DX,FF00H

OUT DX,AL

MOV AL,CH OUT DX,AL

NOP

NOP

MOV DX,FF52H

MOV AL,00H OUT DX,AL

OUT DX,AL

OUT DX,AL

MOV AL,40H

OUT DX,AL

CALL DELAY

MOV AL,4EH OUT DX,AL

NOP

NOP

MOV AL,27H

OUT DX,AL

NOP

NOP

RETPUSH BX

MOV BX,04FFH

NOP

NOP

DEC BX

JNZ D1

POP BX

RET Division Factor For Baud Count

Byte To Be Tx In BL Reg 'B'

AX Contain Timer Count

BL - Contain The Byte To Be Tx.

Save the byte

Status Reg

Get the status wordcheck the ready bit

If not ready go back to check

Restore the byte to al

MODE REGTX THE BYTE

RETURN

Save The Count In CX

Counter0 is selected

(TIMADR+6H) Control RegCount LSB

COUNTER 0 REG

Count MSBWaitStatus RegisterDummy Mode WordReset Word(01 00 11 10) ONE STOPBIT,NO PARITY,8BITS CHAR TXC/16 BAUD

ENABLE TX

Delay Routine

Receiver:

Algorithm:

i. Load division factor in AX

ii. Call the sub routine BAUDINIT.

iii. Call the Subroutine RXBYTE

iv. Breakpoint.

RXBYTE:i. Load Status Reg.Address of 8251

ii. CHECK: Read status word

iii. If receiver buffer empty then go back to CHECK

iv. Get Mode Register Address and Read the Bytev. Return to main program

Program:

AddressLabelMnemonicsMachine CodeComments

RXBYTE:CHECK :

BAUDINIT:

DELAY:

D1:

MOV AX,0050H CALL BAUDINIT CALL RXBYTE

INT 3MOV DX,FF52H IN AL,DX AND AL,02H JZ CHECK

MOV DX,FF50H

IN DX,AL

RET

MOV CX,AX MOV AL,036H MOV DX,FF06HOUT DX,AL

MOV AL,CL MOV DX,FF00H

OUT DX,AL

MOV AL,CH OUT DX,AL

NOP

NOP

MOV DX,FF52H

MOV AL,00H OUT DX,AL

OUT DX,AL

OUT DX,AL

MOV AL,40H

OUT DX,AL

CALL DELAY

MOV AL,4EH OUT DX,AL

NOP

NOP

MOV AL,27H

OUT DX,AL

NOP

NOP

RETPUSH BX

MOV BX,04FFH

NOP

NOP

DEC BX

JNZ D1

POP BX

RET Division Factor For Baud Count

AX Contain Timer Count

Status Reg

Get the status wordcheck the Receiver Buffer bit

If not ready go back to check

MODE REGRead the BYTE

RETURN

Save The Count In CX

Counter0 is selected

(TIMADR+6H) Control RegCount LSB

COUNTER 0 REG

Count MSBWaitStatus RegisterDummy Mode WordReset Word

(01 00 11 10) ONE STOPBIT,NO PARITY,8BITS CHAR TXC/16 BAUD

ENABLE TX

Delay Routine

Procedure:

i. Connect two VIK 86 kits using Serial cable

ii. Load Transmitter program in One kit and Receiver in the other kit

iii. Execute Receiver and then Transmitter and again Receiver.

iv. AL in Receiver will show the Byte Transmitted

Ex.No: 08

STEPPER MOTOR & DC MOTOR CONTROLStepper Motor

Algorithm:

Load control port address of 8255

Get Control word to initialize 8255 ports as Output ports

Send to control reg

Load 8255 Port C Address

STEP: Get initial phase position, Send to port C; Call delay routine

Get 2nd phase position, Send to port C; Call delay routine

Get 3rd phase position, Send to port C; Call delay routine

Get Final phase position, Send to port C; Call delay routine

Go back to STEP

Program:

AddressLabelMnemonicsMachine CodeComments

STEP:DELAY:DEL0:DEL1:

MOV DX, FF26H

MOV AL,80H

OUT DX,AL

MOV DX, FF20H

MOV AL,PH1OUT DX,AL

CALL DELAY

MOV AL,PH2

OUT DX,AL

CALL DELAY

MOV AL,PH3

OUT DX,AL

CALL DELAY

MOV AL,PH4OUT DX,AL

CALL DELAY

JMP STEP

MOV BX,0010H

MOV AX,00FFH

NOP

NOP NOP

NOP

DEC AX

JNZ DEL1

DEC BX

JNZ DEL0

RET

8255 Control Reg AddressControl word for output ports

Send to control reg

Port C Address

Initial Phase position

2nd phase position

3rd phase Position

4th Phase position

Go back to continue stepCount 1

Count 2

Loop until AX & BX= 0

Return to program

Procedure:i) Connect Stepper motor interface with VIK-86 through data bus and connect motor with interface.ii) Give power supply to interface kit

iii) Load program and execute to run motor

iv) Change delay Count to control Speed

v) Change phase sequence to change direction of rotation.

Phase sequence:Direction of rotationPH1PH2PH3PH4

Clock WiseA0HE0HC0H80H

Anti Clock Wise80HC0HE0HA0H

DC Motor:Algorithm:

i. Load control Reg address of 8255ii. Get control word so as to program 8255 ports as O/P port & send to control reg

iii. Send the start pulse to ZCD

iv. Call delay high routine

v. Send stop pulse to ZCD

vi. Call delaylow

vii. Continue cycleProgram:

AddressLabelMnemonicsMachine CodeComments

CONT:DELAYHIGH:

LOOP1: DELAYLOW:

LOOP2:

MOV DX , FF26H

MOV AL ,80H

OUT DX ,AL

MOV AL ,01H

MOV DX , FF20H

OUT DX ,AL

CALL DELAYHIGH

MOV AL,00H

OUT DX,AL

CALL DELAYLOW

JMP CONTMOV AH,01H NOP

NOP

NOP

DEC AH

JNZ LOOP1

RET

MOV AL,01H NOP

NOP

DEC AL

JNZ LOOP2

RET8255 Control Reg Address

Control word for output ports

Send to control reg

Start Pulse

Port C Address

Stop Pulse

Continue CycleMotor Speed Count ( 01 TO FF )

Procedure:

i) Connect DC motor interface with VIK-86 through data bus and connect DC motor with interface.

ii) Give power supply to interface kit

iii) Load program and execute to run motor

iv) Change delay Count to control Speed

Ex.no: 10

PROGRAMMING 8051 INTERRUPTS & TIMERa) Timer

Aim: To program 8051 internal Timer0 to generate square waves of duty cycle 50% and 66% and output that using IO pin P1. 2.

Algorithm:

i. Initialize TMOD SFR for Timer0 on Mode 1 timer. ( 16 bit).

ii. Load Count values to TL0 & TH0.

iii. Toggle IO pin. (P1.2)

iv. Call delay

v. Continue cycle

Delay: start Timer

Moniter timer0 flag(TF0) until it rolls over.

Stop timer

Clear flag and return.Program: 50% DUTY CYCLE ( Ton = Toff=D)AddressLabelMnemonicsMachine CodeComments

HERE:DELAY:CHECK:

MOV P1, #00

MOV TMOD, #10 MOV TL1, #F2H

MOV TH1, #FFH

CPL P1.2ACALL DALAY

SJMP HERE

SETB TR1JNB TF1 , CHECK

CLR TR1CLR TF1RET

Make P1 output port

Timer1 mode 1 (16 bit counter)Low byte

High byte

Toggle P1.2 pin

Call delay routine

Continue cycle by loading TH & TL

Start timer 0

Check TF1 flag until it sets

Stop Timer & clear the flag

Return to program.

SFR ADDRESSES : TMOD 89; TL1- 8B; TH1- 8D; TR1-8E; TF1 - 8F. TL0- 8A; TH0- 8C; TR0- 8C; TF0 - 8D.

Program: 66% DUTY CYCLE ( Ton = 2D &Toff = D)AddressLabelMnemonicsMachine CodeComments

HERE:DELAY:CHECK:

MOV P1, #00

MOV TMOD, #10 MOV TL1, #F2H

MOV TH1, #FFH

SETB P1.2

ACALL DALAY

ACALL DALAY

CLR P1.2 (Any pin in P1)ACALL DALAY

SJMP HERE

SETB TR1JNB TF1 , CHECK

CLR TR1CLR TF1RET

Make P1 output port

Timer1 mode 1 (16 bit counter)

Low byte

High byte

High P1.2 pin

Call delay routine

Low P1.2 pin

Call delay routine

Continue cycle by loading TH & TL

Start timer 0

Check TF1 flag until it sets

Stop Timer &

clear the flag

Return to program.

CALCULATIONS:

XTAL = 10 MHz

Timer frequency, f = 10 /12 = 0.833 MHz

Time period , T = 1/0.833 = 1.2 s.Delay, D = Count T

Count = FFFF FFF2 = 0Dh(13) + 1( for Roll over)

Now, D = 14 1.2 s = 16.8 s for 1 delay.

For 50 % duty cycle: T = Ton + T off = 2D = 33.6 s & Frequency of square wave, f = 1/T = 297.6 kHz

For 66 % duty cycle: T = Ton + T off = 3D = 54.9 s & Frequency of square wave, f = 1/T = 182.1 kHz

b) Interrupt ProgrammingAim: To toggle P1.5 every second.AddressLabelMnemonicsMachine CodeComments

001B:HERE:

TIMER1 ISR

MOV TMOD, #10 MOV IE, #88

MOV R0, #13MOV TL1, #00H

MOV TH1, #00H

SETB TR1

SJMP HERE

DJNZ R0, BACK

CPL P1.5MOV R0, #13MOV TL1, #00H

MOV TH1, #00H

RETI

Timer1 mode 1Enable Timer1 Interrupt

Count for 1 second delay

Count value

Count value

Start timer1

Check R0

Toggle IO pin

Reload register value

Reload count values

Return from interrupt

EX.NO: 11

COMMUNICATIONS BETWEEN 8051 KITS

Aim:

To establish communication between two 8051 Kits.

Serial Communication:

Transmitter:

AddressLabelMnemonicsMachine CodeComments

CHECK:

MOV IE, #00

MOV TMOD, #20 MOV TH1, #F5H

MOV SCON, #40SETB TR1

MOV SBUF, # DATA

JNB TI , CHECK

CLR T1

LCALL 00BB

Disable interruptsTimer1 in mode2

Count for 2400 baud rate

Setting serial mode1

Start timer1

Byte to be transmitted serially

Check for all the bits to be transmitted

Clear transmit interrupt flag

Break point.

Receiver:

AddressLabelMnemonicsMachine CodeComments

CHECK:

MOV IE, #00

MOV TMOD, #20 MOV TH1, #F5H

MOV SCON, #50

SETB TR1

CLR RIJNB RI , CHECK

MOV A, SBUFLCALL 00BBDisable interrupts

Timer1 in mode2

Count for 2400 baud rate

Setting serial mode1 with receiver enabledStart timer1Clear RI for receptionCheck for all bits of character

Move into acculator.

Break point.

Parallel Communication:Transmitter:AddressLabelMnemonicsMachine CodeComments

MOV A, #80

MOV DPTR, #4003 MOVX @DPTR, A

MOV DPTR, #4000 MOV A, #DATA

MOVX @DPTR, A

NOPNOPLCALL 00BB

Receiver:

AddressLabelMnemonicsMachine CodeComments

MOV A, #90

MOV DPTR, #4003 MOVX @DPTR, A

MOV DPTR, #4000 MOVX A, @DPTR

LCALL 00BB

Ex.No: 09

8051 BASIC PROGRAMMING

Aim:

To program 8051 using its Arithmetic and Logical and Bit Manipulation instructions.

a) Arithmetic operations

AddressLabelMnemonicsMachine CodeComments

MOV DPTR, #8500

MOVX A, @DPTR MOV B, A

MOV R0, A

INC DPTR

MOVX A, @DPTR

MOV R1, A

ADD A, B

INC DPTR

MOVX @DPTR, A

MOV R2, A

MOV A, R1SUBB A, B

INC DPTR

MOVX @DPTR, A

MOV R3, A

MOV B, R2

MUL AB

INC DPTR

MOVX @DPTR, A

MOV A, R2MOV B, R3

DIV AB

INC DPTR

MOVX @DPTR, A

LCALL 00BB

Input: M8500 - a

M8501 - bOutput: M8502 : sum (a+b)

M8503: difference (a-b)

M8504: Product ((a+b)(a-b))

M8505: Quotient ((a+b)/(a-b))

b) 32 bit subtraction

AddressLabelMnemonicsMachine CodeComments

CLR C

MOV A, 43

SUBB A, 53

MOV 63, A

MOV A, 42

SUBB A, 52

MOV 62, A

MOV A, 41

SUBB A, 51

MOV 61, A

MOV A, 40

SUBB A, 50

MOV 60, A

LCALL 00BB

Input: I40 to 43 data 1

I50 to 53 data 2

Output: I60 to 63 - difference

C) Fibonacci series

AddressLabelMnemonicsMachine CodeComments

BEGIN:

RPT:

EXIT:MOV R0, 60MOV R1, #01

MOV R2, #01

MOV A, #00

MOV DPTR, # 9000

CJNE R0, #00, BEGIN

LJMP EXIT

MOVX @DPTR, A

INC DPTR

MOV R2, A

ADD A, R1

MOV 01, 02

MOVX @DPTR, A

INC DPTR

DJNZ R0, RPT

LCALL 00BB

INPUT: I60 COUNTOUTPUT: M9000 00

M9001 01

M9002 01

M9003 02 & so on