MICROELECTRONICS ELCT 703 LECTURE 4 OP-AMP DESIGN...MICROELECTRONICS ELCT 703 (W19) LECTURE 4 OP-AMP DESIGN Dr. Eman Azab Assistant Professor Office: C3.315 E-mail: [email protected]

MICROELECTRONICS ELCT 703 (W19)

LECTURE 4 OP-AMP DESIGN

Dr. Eman Azab

Assistant Professor

Office: C3.315

E-mail:

[email protected]. EMAN AZAB

ELECTRONICS DEPT., FACULTY OF IET

THE GERMAN UNIVERSITY IN CAIRO

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OP-AMPS: INTRODUCTIONCircuit Modeling

DR. EMAN AZAB



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IDEAL OP-AMP Operational amplifiers are voltageamplifiers with very high gain

Differential Input/Single output circuitis the most famous op-amp structure

Ideal op-amp have the followingSpecs:

Infinite Differential voltage gain

Zero Common-mode voltage gain

Infinite Input Resistance

Zero Input Currents

Zero Output Resistance

Infinite Bandwidth (Gain is constant all over thefrequency Spectrum)

DR. EMAN AZAB



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𝑉𝑜𝑢𝑡 = 𝐴𝑉𝑑 𝑉1 − 𝑉2 + 𝐴𝑉𝑐𝑚𝑉1 + 𝑉2

2

𝐴𝑉𝑑 = ∞ 𝐴𝑉𝑐𝑚 = 0

𝑅𝑖𝑛 = ∞ 𝑅𝑜𝑢𝑡 = 0

𝐴𝑉𝑑 𝑠 = 𝐶𝑜𝑛𝑠𝑡.

𝑖𝑖𝑛+ = 0 𝑖𝑖𝑛− = 0

IDEAL OP-AMP Ideal Op-amp can be modeled usingthe following circuit:

DR. EMAN AZAB



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Figure from Sedra/Smith Copyright © 2010 by Oxford University Press, Inc.

𝑉𝑜𝑢𝑡 = 𝐴𝑉𝑑 𝑉1 − 𝑉2 + 𝐴𝑉𝑐𝑚𝑉1 + 𝑉2

2

𝐴𝑉𝑑 = ∞ 𝐴𝑉𝑐𝑚 = 0

𝑅𝑖𝑛 = ∞ 𝑅𝑜𝑢𝑡 = 0

𝐴𝑉𝑑 𝑠 = 𝐶𝑜𝑛𝑠𝑡.

𝑖𝑖𝑛+ = 0 𝑖𝑖𝑛− = 0

EX.: TWO STAGE CMOS OP-AMP

DR. EMAN AZAB



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EX.: BJT 741 OP-AMP

DR. EMAN AZAB



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CMOS TWO-STAGE OP-AMP

Circuit Realizations of

Op-amp

DR. EMAN AZAB



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CALCULATING THE VOLTAGE GAIN The two stages are realized using MOS transistors asfollows:

First stage amplifier is a differential amplifier: Q1-Q2 with active loadsQ3-Q4 and biasing current source Q5- Q8

Second stage amplifier is a Common Source amplifier Q6 with activeload Q7

DR. EMAN AZAB



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CALCULATING THE VOLTAGE GAIN The two stage CMOS op-amp can be modeled as follows:

Gm1 & Gm2 is the trans-conductance gains of the 1st and 2nd stage

respectively

R1 & R2 is the output resistances of the 1st and 2nd stage respectively

C1 & C2 is the parasitic capacitances of the 1st and 2nd stage respectively

Cc is used as a compensation capacitance to control the bandwidth

DR. EMAN AZAB



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CALCULATING THE VOLTAGE GAIN The model parameters are derived at the mid-band (Allcapacitors are open circuit)

DR. EMAN AZAB



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𝑉𝑜1 = −𝑔𝑚1,2𝑅1 𝑉1 − 𝑉2

𝑅1 = 𝑟𝑑𝑠2 ∕∕ 𝑟𝑑𝑠4

𝑉𝑜𝑢𝑡 = −𝑔𝑚6𝑅2𝑉𝑜1

𝑅2 = 𝑟𝑑𝑠6 ∕∕ 𝑟𝑑𝑠7

𝐺𝑚1 = 𝑔𝑚1,2

𝐺𝑚2 = 𝑔𝑚6

𝐴𝑉𝑑 = 𝑔𝑚1,2𝑔𝑚6𝑅1𝑅2

CALCULATING THE VOLTAGE GAIN Op-amp High frequency gain is given by:

The transfer function is characterized by two poles and onezero

DR. EMAN AZAB



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𝐴𝑉𝑑 𝑠 =𝐺𝑚1𝐺𝑚2𝑅1𝑅2 1 −

𝐶𝑐𝐺𝑚2

𝑠

1 + 𝑠 𝐶𝐶 + 𝐶2 𝑅2 + 𝐶𝐶 + 𝐶1 𝑅1 + 𝐺𝑚𝑅1𝑅2𝐶𝐶 + 𝑠2𝑅1𝑅2 𝐶𝐶𝐶1 + 𝐶𝐶𝐶2 + 𝐶1𝐶2

CALCULATING THE VOLTAGE GAIN Op-amp High frequency gain is given by:

CC controls the bandwidth of the op-amp!

DR. EMAN AZAB



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𝐴𝑉𝑑 𝑠 =𝐴𝑉𝑜 1 −

𝑠𝜔𝑧

1 +𝑠𝜔𝑝1

1 +𝑠𝜔𝑝2

𝐴𝑉𝑜 = 𝐺𝑚1𝐺𝑚2𝑅1𝑅2

𝜔𝑧 =𝐺𝑚2

𝐶𝑐𝜔𝑝1 ≅

1

𝐺𝑚2𝑅1𝑅2𝐶𝑐

𝜔𝑝2 ≅𝐺𝑚2𝐶𝑐

𝐶1𝐶2 + 𝐶𝐶 𝐶1 + 𝐶2≈

𝐺𝑚2

𝐶1 + 𝐶2

NON-IDEAL OP-AMP

Deviation of the real op-amp from Ideal behavior:

Rin: finite input Resistance

Rout: finite output Resistance

AVd(S): finite frequency dependent voltage gain

IBIAS, IOS, VOS : represent offset currents and voltage respectively

Due to mismatch of transistors and transistors biasing

DR. EMAN AZAB



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Figure from Gray/Meyer Copyright © by John Wiley & Sons, Inc.

𝐼𝐵𝐼𝐴𝑆 =𝐼𝐵1 + 𝐼𝐵2

2

𝐼𝑂𝑆 = 𝐼𝐵1 − 𝐼𝐵2

𝑉𝑂𝑆 = 𝑉𝑜𝑢𝑡 @𝑉𝑖𝑑 = 0

NON-IDEAL OP-AMP

Deviation of the real op-amp fromIdeal behavior:

Finite Common mode rejection ratio (CMRR)

Finite Power Supply Rejection Ratio (PSRR+

and PSRR-)

A+ and A- is the small signal gain between vout and vddand vss respectively

DR. EMAN AZAB



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𝐶𝑀𝑅𝑅 =𝐴𝑑𝑚𝐴𝑐𝑚

𝑃𝑆𝑅𝑅+ =𝐴𝑑𝑚𝐴+

𝑃𝑆𝑅𝑅− =𝐴𝑑𝑚𝐴−

NON-IDEAL OP-AMP Modeling of the Deviation of the real op-amp from Idealbehavior:

DR. EMAN AZAB



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MICROELECTRONICS ELCT 703 LECTURE 4 OP-AMP DESIGN...MICROELECTRONICS ELCT 703 (W19) LECTURE 4 OP-AMP DESIGN Dr. Eman Azab Assistant Professor Office: C3.315 E-mail: [email protected]