MOBY DICTOOLBOX

MOBY-DIC WORKSHOP

Noordwijkerhout, 23-08-2012

DESCRIPTION

C / C++ compiler

Object oriented programming

HTML Documentation

Multi Parametric Toolbox (MPT)

MATLAB R2008a or newer

Requirements:

Hybrid Toolbox

Main features:

Graphical User Interface

MATLAB / SIMULINK

GPL v2 license (open source)

http://ncas.dibe.unige.it/software/MOBY-DIC_Toolbox/

Yalmip

MATLAB R2011a and Xilinx System Generator (only for HDL simulation)

CONTROL/CIRCUIT CO-DESIGN

PLANT

EMBEDDEDCONTROLLER

FastSmall

Low-powerLow-cost

GOAL OF THE TOOLBOX (1)

Control/circuit co-design

CONTROL SPECS.

CIRCUIT SPECS.

LINEAR SYSTEM CONSTRAINTS

DIGITAL CIRCUIT

FPGA/ASIC IMPLEMENTATION

CLOSED-LOOP SIMULATION

CONTROL DESIGN

@linearSystem objectLINEAR SYSTEM CONSTRAINTS

@constraints object

CONTROL SPECS. GENERATE MPC

PWAG

generateMPC function

Calls Hybrid Toolbox or Multi Parametric Toolbox to compute explicit MPC control law

@pwag object

Piecewise Affine function defined over generic polytopic partition

CIRCUIT DESIGN

synthesize method

Generates VHDL files for the circuit implementation of exact MPC controller. More solutions are available, the choice is performed based on circuit specifications

CIRCUIT SPECS. synthesize

VHDL files

getCircuitPerformances

PWAG

Latency, multipliers,

memory occup.

getCircuitPerformances

Gets information about circuit performances in advance.

CONTROL APPROXIMATIONpwasApproximation

Approximates the PWAG controller with a Piece-Wise Affine function defined over a simplicial partition, by imposing constraints.

LINEAR SYSTEM CONSTRAINTS

APPROXIMATE

PWAS / PWAR

PWAG

pwarApproximation

Approximates the PWAG controller with a Piece-Wise Affine function defined over a rectangular partition, by imposing constraints.

APPROXIMATION BENEFITS

Regularity of the partition

Fast circuit computation

Stability can be proven (a posteriori)

PWAG/PWAS/PWAR STABILITY TEST

CIRCUIT DESIGN

synthesize method

Generates VHDL files for the circuit implementation of approximate MPC controller.

CIRCUIT SPECS. synthesize

VHDL files

getCircuitPerformances

PWAS/PWAR

Latency, multipliers,

memory occup.

getCircuitPerformances

Gets information about circuit performances in advance, also before generating the approximate control function itself.

CLOSED-LOOP SIMULATION

generateSimulinkModel

Generates a Simulink model of the closed-loop system, in which the control is computed by simulating the VHDL files (delays and fixed point representation effects are taken into account)

Requires Xilinx System Generator

VHDL files

PLANT PWAG / PWAS / PWAR

GENERATE SIMULINK

MODEL

VIRTUAL SENSOR DESIGN

PLANTInputs u

Unmeasurable output z

Measurable outputs y

VIRTUAL SENSOR

Estimated unmeasurable output z

FastSmall

Low-powerLow-cost

VIRTUAL SENSOR THEORY

GOAL OF THE TOOLBOX (2)

Virtual sensors design

SENSOR SPECS.

CIRCUIT SPECS.

DATASET

DIGITAL CIRCUIT

FPGA/ASIC IMPLEMENTATION VALIDATION

VIRTUAL SENSOR DESIGN

identify

Identify a PWAS virtual sensor starting from measures of u, y and z

TRAINING DATASET

SENSOR SPECS. IDENTIFY

VIRTUAL SENSOR

The estimation of z is performed by computing the value of a PWAS function of u, y and the estimated z at previous time instants

VIRTUAL SENSOR VALIDATION

validate

Validates the virtual sensor on a test set to see if the estimation is accurate

TEST DATASET VALIDATE

VIRTUAL SENSOR

VIRTUAL SENSOR CIRCUIT

VIRTUAL SENSOR

CIRCUIT SPECS.

VHDL files

synthesize

synthesize method

Generates VHDL files for the circuit implementation of PWAS virtual sensor.

More solutions are available, the choice is performed based on circuit specifications