Model Relationships CMOS Process Flowclass.ece.iastate.edu/ee330/lectures/EE 330 Lect 16 Fall...GS for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u

EE 330Lecture 16

Model RelationshipsCMOS Process Flow

Quiz 13 Determine the current ID for the following circuit. Assume the MOS transistor can be modeled by the basic square-law model with parameters VT=0.8V, µCOX=100µA/V2 and COX=4fF/µ2 and the device has dimensions W=10µ and L=2µ.

Bφ

And the number is ….

6

31

2

45

7

8

9

And the number is ….

6

31

2

4

5

7

8

9


Bφ

Solution:

1. Guess the device is operating in the Saturation Region

2. Analyze the circuit with the device in this region3. Verify region of operation

4. Repeat steps 1-3 if guess was not correct


Solution: 2. Analyze the circuit with the device in this region

( )⎪⎪⎪

⎩

⎪⎪⎪

⎨

⎧

−≥≥−

−<≥⎟⎠⎞

⎜⎝⎛ −−

≤

=

TGSDSTGS2

TGSOX

TGSDSGSDSDS

TGSOX

TGS

D

VVVVVVV2LWµC

VVVVVV2

VVVLWµC

VV0

I T


Solution: 2. Analyze the circuit with the device in this region

( )

( )24 1010 1 5 0 82 2

123

2D OX GS T

WI µC V V2L

. .

Aµ

−

= −

= −•

=3. Verify region of operation

GS DS GS T? ?V V V V VT≥ > −

1.5V > 0.8V 3V> 1.5V- 0.8V

ID

Verifies!

n-Channel MOSFET Operation and Model

VBS

VGS

VDS

Increase VDS even moreID=?IG=0IB=0

Inversion layer disappears near drain

IDIG

IB

(VBS small)

Termed “saturation”region of operationSaturation first occurs when VDS=VGS-VT

Review from Last Time

Graphical Interpretation of MOS Model

Saturation

Triode

2OXD DS

µC WI = V2L

( )

GS T

DSD OX GS T DS GS DS GS T

2

OX GS T GS T DS GS T

0 V VVWI µC V V V V V V V V

L 2WµC V V V V V V V2L

T

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− ≥ ≥ −⎪⎩

Cutoff

VGS1

VGS3

VGS2

VGS4

Review from Last Time

Model Status

Square-Law Model

( )

GS T


2




T

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− ≥ ≥ −⎪⎩

VGS1

VGS3

VGS2

VGS4

Switch-Level Models

Switch-level model including gate capacitance and drain resistance

Switch closed for VGS=“1”

CGS and RSW dependent upon device sizes and process

For minimum-sized devices in a 0.5u process

1.5fFCGS ≅⎭⎬⎫

−−

≅channelp6KΩchanneln2KΩ

Rsw

Considerable emphasis will be placed upon device sizing to manage CGS and RSW

Drain

Gate

Source

Extended Square-Law Model

( ) ( )1

GS T


2

OX GS T DS GS T DS GS T


L 2WµC V V V V V V V V2L

T

λ

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− • + ≥ ≥ −⎪⎩

( )φφγ −−+= BST0T VVV

Model Parameters : µ,COX,VT0,φ,γ,λ

Design Parameters : W,L but only one degree of freedom W/L

0I0I

B

G

==

Short-Channel Model

( ) ( )

( ) ( )

1

1

GS T

2 2 2D OX GS T DS GS DS GS

1

22 OX GS T GS T DS GS

0 V VWI µC V V V V V V VL

WµC V V V V V VL

T T

T

V

V

α α

αα

θ θθ

θ θ

⎧⎪ ≤⎪⎪= − ≥ < −⎨⎪⎪

− ≥ ≥ −⎪⎩

α is the velocity saturation index, 2 ≥ α ≥ 1

Channel length modulation (λ) and bulk effects can be added to the velocitySaturation as well

BSIM model

BSIM Binning Model - multiple BSIM models !

Model RelationshipsDetermine RSW and CGS for an n-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u

(Assume µCOX=100µAV-2, COX=2.5fFu-2,VT0=1V, VDD=3.5V, VSS=0)

( )

GS T


2




T

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− ≥ ≥ −⎪⎩

When SW is on, operation is “deep” triode

Model Relationships

(Assume µCOX=100µAV-2, COX=2.5fFu-2,VT0=1V, VDD=3.5V, VSS=0)

( )DSD OX GS T DS OX GS T DS

VW WI µC V V V µC V V VL 2 L⎛ ⎞= − − ≅ −⎜ ⎟⎝ ⎠

( ) ( )

1 414 3 5 11

KE

= = = Ω⎛ ⎞− − −⎜ ⎟⎝ ⎠

GS DD

GS

DSSQ

D V =VOX GS T

V =3.5V

V 1R = WI µC V V ( ) .L

CGS= COXWL = (2.5fFµ-2)(1µ2) = 2.5fF

Determine RSW and CGS for an n-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u

Model Relationships

( COX=2.5fFu-2,VT0=1V, VDD=3.5V, VSS=0)

( )

GS T


2




T

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− ≥ ≥ −⎪⎩


Determine RSW and CGS for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u

Observe µn\ µp≈3

Model Relationships


( )

GS T


2




T

⎧⎪ ≤⎪⎪ ⎛ ⎞= − − ≥ < −⎨ ⎜ ⎟

⎝ ⎠⎪⎪

− ≥ ≥ −⎪⎩




Model Relationships

( )⎛ ⎞= − − ≅ −⎜ ⎟⎝ ⎠

DSD p OX GS T DS p OX GS T DS

VW WI µ C V V V µ C V V VL 2 L

( ) ( )

1 121 14 3 5 13 1

KE

= = = Ω⎛ ⎞ ⎛ ⎞− − −⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

GS DD

GS

DSSQ

D V =Vp OX GS T

V =3.5V

V 1R = WI µ C V V ( ) .L

CGS= COXWL = (2.5fFµ-2)(1µ2) = 2.5fF




Observe the resistance of the p-channel device is approximately 3 times larger than that of the n-channel device for same bias and dimensions !

Modeling of the MOSFETGoal: Obtain a mathematical relationship between the port variables of a device. ( )

( )( ) ⎪

⎭

⎪⎬

⎫

===

BSDSGS3B

BSDSGS2G

BSDSGS1D

V,,VVfIV,,VVfIV,,VVfI

Small-Signal Model

Goal with small signal model is to predict performance of circuit or device in the vicinity of an operating point

Operating point is often termed Q-point

Small-Signal Modely

x

Q-point

XQ

YQ

Technology Files• Design Rules

• Process Flow (Fabrication Technology) (will discussion next )

• Model Parameters (will discuss in substantially more detail after device operation and more advanced models are introduced)

This table discusses a p-well process flow, an n-well process flow is actually used in the following set of slides with straightforward modifications of this process flow.

Bulk CMOS Process Description

• n-well process• Single Metal Only Depicted• Double Poly

Components Shown

• n-channel MOSFET• p-channel MOSFET• Poly Resistor• Doubly Poly Capacitor

A A’

B’B

C

C’

D

D’

Consider Basic Components Only

Well Contacts and Guard Rings Will be Discussed Later

A A’

B’B

A A’

B’B

A A’

B’B

n-channel MOSFET

S

D

G

S

D

BG

A A’

B’B

S

D

BG

W L

A A’

B’B

n-channel MOSFET

Capacitor

p-channel MOSFET

Resistor

A A’

B’B

N-well Mask

A A’

B’B

N-well Mask

Detailed Description of First Photolithographic Steps Only

• Top View• Cross-Section View

~

Blank Wafer

p-doped Substrate

ExposeDevelop

Photoresistn-well MaskImplant

~

A A’

B’B

A-A’ Section

B-B’ Section

PhotoresistN-well MaskExposureDevelop

A-A’ Section

B-B’ Section

Implant

N-well Mask

A-A’ Section

B-B’ Sectionn-well

A A’

B’B

Active Mask

A A’

B’B

Active Mask

Active Mask

A-A’ Section

B-B’ Section

Field Oxide Field Oxide Field Oxide

Field Oxide

A A’

B’B

Poly1 Mask

A A’

B’B

Poly1 Mask

A A’

B’B

n-channel MOSFET

Capacitor

P-channel MOSFET

Resistor

Poly 1 Mask

A-A’ Section

B-B’ Section

Gate Oxide Gate Oxide

A A’

B’B

Poly 2 Mask

A A’

B’B

Poly 2 Mask

Poly 2 Mask

A-A’ Section

B-B’ Section

A A’

B’B

P-Select

A A’

B’B

P-Select

P-Select Mask – n-diffusion

A-A’ Section

B-B’ Section

n-diffusion

P-Select Mask – p-diffusion

A-A’ Section

B-B’ Section

p-diffusion

A A’

B’B

Contact Mask

A A’

B’B

Contact Mask

Contact Mask

A-A’ Section

B-B’ Section

A A’

B’B

Metal 1 Mask

A A’

B’B

Metal 1 Mask

Metal Mask

A-A’ Section

B-B’ Section

A A’

B’B

A A’

B’B

n-channel MOSFET

Capacitor

P-channel MOSFET

Resistor

A A’

B’B

C

C’

D

D’

That’s all folks!

Documents

Model Relationships CMOS Process Flowclass.ece.iastate.edu/ee330/lectures/EE 330 Lect 16 Fall...GS for an p-channel MOSFET from square-law model In the 0.5u CMOS process if L=1u, W=1u