III. METHOD

A. Surface analysis using automatically varying grid

The junction shapes considered here are Sine, Tan, Randomand Square as shown in Fig. 2.

Modeling of Imperfections in SemiconductorJunctions

Remya Ramesh , Alex Pappachen James

A new scheme for discretization of semiconductor equationson triangular grids was proposed [2] which is similar to box discretization method [3].It was developed forcurvilinear grids and is essentially a modi�cation of the vector resolution (VR) scheme [4] based on divergencetheorem. In this scheme, the surface area is divided intotriangles.This was done by creating rectangular grid first andthen inserting additional grid points at the centre of eachrectangle.Each triangle is divided into three areas by joiningthe midpoints of the triangle edges with the centroid. Gridhas been purposely designed to have large number of obtusetriangles;about 50%.At each grid point semiconductorequations are formulated.The resulting non linear equationsare solved using Newtons/Gummels iter- ative method [5].The new scheme is consistent for acute and obtuse trianglesbut it is numericallyless efficient for certaingrids.

Abstract—Imperfections in Semiconductors occur inseveral forms, some of which are, due to: process conditions,type of device design and the nature of defects in the basematerial.Modeling defects has been a highly investigated topicin Semi- conductor device research, however, the nature ofthe defects varies with the aforementioned chemical/physicalissues. The proposed model is a BJT-based memory device thatin the nano- scale regime, that takes into structuralimperfections between thesemiconductor junctions.

II. RELATED WORKS

I. INTRODUCTION

Fig.1 Proposed PN junction diode with grid linesof variable spacing

The junction shape is divided into equal sections of requirednumber along its x axis. The slope of the signal is calculatedas given in Step 1. According to the sampling frequency ofthe junction shape, the number of slope sections vary. Plottedgrids[6] of customized spacing (Custom Grid) for the firstslope section as given by step 2. Fig. 3 shows a single sectionof pn junction diode with Custom grids,which can vary itsinter grid spacing as per the slope.

To evaluate the surface imperfections in MOSFET, we needto analyze the surface. Here surface imperfections are analyzedusing grid. Grids are horizontal and vertical lines intersectingeach other. According to the imperfections a surface is an-alyzed by sampling into various sections of uniform widthand length using grids. Grid spacing was varied according tothe steepness of the surface (wherever the slope is high, gridswill be closer and when low, grids are separated more). Asan example, the sinusoidal surface is considered as a heterojunction and from grid analysis the nature of defect at eachpoint on the surface can be predicted, the electric potential aswell as electric field at imperfections can be modeled.

When two dissimilar metals are combined together andallowed to react together to reach a chemical/thermal equi-librium,the Fermi level in each material aligns and theyform a hetero junction [1]. To maintain equilibrium theyform some depletion as well as accumulation regions, whichresults in band bending near the interface. There are threerelevant material properties for classifying a given junctionand understanding the charge dynamics at a hetero junction-band gap, electron affinity and work function. Hetero junctionshave unequal band gaps while compared to homo junctions.The Built in Potential gives the degree to which band bend-ing occurs in semiconductor hetero junctions. The proposedstructure of a PN junction diode is given in Fig.1.

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Index terms - Barrier potential,Fixed grid,Friedman’s test Varying grid

Step 1 Slope calculation of the junction1: Requirements Input:x and y co-ordinates of the junction

shape.2: ∆x and ∆y are calculated from the

equations,∆y(i)=∆y(i)-∆y(i−1) and ∆x(i)=∆x(i)-∆x(i−1),where i is a point at a single (x,y) co-ordinate;ivaries from 1 to length of x.

The grid points for the entire signal is generated; whereverthe horizontal and vertical grid lines intersect. At a particulardistance, above and below the junction, an imperfect junctionwas created using random junction shapes as given in Step3. Custom Grids are plotted for different slope sections asillustrated in Fig.4.

Custom grids are plotted for the random junction shapesgenerated above and below the junction. The generated junc-tion shapes which represent the junction, p and n depletion

Step 2 Generation of Custom grida) Grid line creation in Horizontal direction.

1: Requirements: Co-ordinates of a single slope section(x(i), y(i)), (x(i+1), y(i+1)) and the number of grids.

2: The y co-ordinate values are divided evenly with respectto the number of grids.

3: At each dividing point horizontal lines are plotted with xco-ordinates as the limit.

4: Repeated the same for each slope section and the gridsare generated.

5: The y co-ordinate values of the slope with respect to thecustomized grid are saved.

b) Grid line creation in Vertical direction

1: Requirements: Co-ordinates of a single slope section(x(i), y(i)), (x(i+1), y(i+1)) and the number of grids.

2: The x co-ordinate values are divided evenly with respectto the number of grids.

3: At each dividing point vertical lines are plotted with yco-ordinates as the limit.

4: Repeated the same for each slope section and the gridsare generated.

5: The x co-ordinate values of the slope with respect to thecustomized grid are saved.

Fig. 4. Vary grids drawn on a pn diode junction for entire slope sectionwhich varies according to the variation in junction geometry.

edges are vectorized. The distance from junction to the pdepletion edge of the pn junction diode is p depletion width,denoted as ‘xp’. Similarly the distance from junction to thethe n depletion edge of the diode is n depletion width denotedas ‘xn’. Fixed grids are plotted for junction,upper and lowerrandom signals. Here the ’x’ limits of generated randomsignal are observed. Similarly the ’y minimum’ value oflower random signal and ’y maximum’ value of upper randomsignals are also observed. Grids are drawn with fixed spacingas per Step 4. It is given in Fig. 5. Fixed grids with minimum

Fig. 3. Grids with unequal spacing drawn on a pn diode junction forasingle slope section which varies according to the variation injunctiongeometry.

Fig. 2. (a) Tan signal (b) Random signal (c) Sine signal (d) Squaresignal which represents various geometries of Imfectionsseen at semiconductor junctions

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spacing are plotted for junction, upper and lower randomjunction shape as given in Step 5. The generated grids areshown in Fig. 6.

Step 3 Generation of Random junction shapes above andbelow the junction

1: Requirements:Amplitudes, new customized co-ordinatesof the junction shape and randomly generated values.

2: An amplitude (distance) and the random values are addedto the new customized junction shape x co-ordinates.

3: To plot the random junction shapes above (for p region)the junction the amplitude value will be positive.

4: To plot the random junction shapes below (for n region)the junction the amplitude value will be negative.

5: The random junction shapes are repeated with respect tothe number of amplitude values given.

Step 4 Generation of Fixed grida) Grid line creation in Horizontal direction

1: Requirements:Minimum and maximum co-ordinate valuesof the junction shapes, number of grids.

2: Each x and y co-ordinate values are divided into equalspacing with respect to the number of grids.

3: Horizontal lines are plotted with respect to the equal spacedivision in y co-ordinates with minimum and maximumco-ordinates of the x values as limits.

4: The divided y co-ordinates of the junction shapes aresaved.

b) Grid line creation in Vertical direction

1: Requirements: Minimum and Maximum co-ordinate val-ues of the junction shapes, number of grids.

2: Each x and y co-ordinate values are divided into equalspacing with respect to the number of grids.

3: Vertical lines are plotted with respect to the equal spacedivision in x co-ordinates with minimum and maximumco-ordinates of the y values as limits.

4: The divided x co-ordinates of the junction shapes aresaved.

The ‘p’ depletion width and ‘n’ depletion width arecalculated. Total Depletion Width is the sum of p depletionwidth and n depletion width. Calculation of Total depletionwidth and its Barrier Potential is mentioned in Step 6.Depletion Width as well as Barrier Potential is also calculatedfor fixed grid and fixed grid with minimum spacing asgiven in Step 5. Mean and Standard Deviation of the BarrierPotential are calculated for the respective Depletion Width asgiven in Step 7 and Step 8.

IV. RESULTS

Using varying grid technique, barrier potential versusdepletion width is plotted as shown in Fig. 7. Varying gridtechnique gives a built in potential of 0.7601 volts at total

Step 5 Generation of Fixed grid with minimum spacinga) Grid line creation in Horizontal direction

1: Requirements: Minimum and maximum co-ordinate val-ues of the signals, minimum slope value.

2: The minimum slope value is calculated from the slopevalues calculated from the Step 1, minimum value of the∆y has been calculated from the saved data and given asinput.

3: Number of grids has been calculated form the minimumslope value given.

4: Each y co-ordinate values are divided with respect to thenumber of grid calculated from the step 3.

5: Horizontal lines are plotted with respect to the spacedivision from the step 4 in y co-ordinates with minimumand maximum co-ordinates of the x values as limits.

6: The divided y co-ordinates of the junction shapes aresaved.

b) Grid line creation in Vertical direction

1: Requirements: Minimum and Maximum co-ordinate val-ues of the junction shapes, minimum slope value.

2: The minimum slope value is calculated from the slopevalues calculated from Step 1, minimum value of ∆x hasbeen calculated from the saved data and given as input.

3: Number of grids has been calculated form the minimumslope value given.

4: Each x co-ordinate values are divided with respect to thenumber of grid calculated from the step 3.

5: Vertical lines are plotted with respect to the space divisionfrom the step 4 in x co-ordinates with minimum andmaximum co-ordinates of the y values as limits.

6: The divided x co-ordinates of the junction shapes aresaved.

Fig. 5. Grids with fixed spacing drawn on a pn diode junction.

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depletion width of 31.62µm.

Friedman’s test is a non parametric test used for statistical

Fig. 6. Grids with minimum spacing drawn on a pn diode junction.

Step 6 Calculation of Barrier Potential1: Requirements:With the help of the co-ordinate values

vectorization of the junction shape is done.2: Depletion Width is calculated by subtracting the upper-

most random junction shape with every other randomjunction shapes.

3: Barrier Potential in p region of a p-n junction diode isgiven by the formula [7], [8], [9],

Vbi(p) =qNAW

2

2εSi(1)

4: Barrier Potential in n region of a p-n junction diode isgiven by the formula,

Vbi(n) =qNDW

2

2εSi(2)

where,q=Charge of carrier=1.602 × 10−19 Coulombs,NA = P type doping concentrationND = N type doping concentrationHere NA = ND = 1016cm−3

εSi = Relative permittivity of Siliconε0 = Vacuum permittivity

εSi = εr × ε0 (3)

= 11.9 × 8.854 × 10−12 Farad/metre= 11.9 × 8.854 × 10−14 Farad/centimetre= 1.053626 × 10−12 Farad/centimetreW = Total Depletion Width

W = p depletionwidth+ ndepletionwidth (4)

Step 7 Calculation of Arithmetic Mean1: Find the Arithmetic Mean of the Barrier Potential value

calculated from Step 6 for a selected section of x value.2: 1 repeated for each values got from Step 2, Step 4 and

Step 5.

Step 8 Calculation of Standard Deviation1: Repeated Step 7 for ‘m’ iterations.2: Calculated Standard Deviation of the values from the

step1.

Fig. 7. Graph showing the relationship between Depletion Width andBarrier Potential of a pn junction diode without any external bias.

Null hypothesis(H0). Alternative hypothesis(Ha) is oppositeof what is stated in Null hypothesis. Hypothesis testingprocedure using sample data determine whether H0 can berejected or not. Alternative hypothesis is true when H0 isrejected.The data is set out in a table comprising n rows by kcolumns. The data is then ranked across the rows and themean rank for each column is compared. Table. I shows thestatistical analysis using Friedman’s test for barrier potentialvalues against depletion width for varying grid and fixed gridas well as fixed grid with minimum spacing.

Null hypothesisH0: Vary grid technique is not precise than fixed gridtechnique for modeling imperfect semiconductor junctions.Ha: Vary grid technique is precise than Fixed grid techniquesfor modeling imperfect semiconductor junctions.

Decision RuleReject H0 if critical value, ρ < 0.05.

ijk = µ+ αi + βj + εijkwhere µ is an overall location parameter, αi represents thecolumn effect, βj represents the row effect and εijk

analysis for comparison of two groups; in our case acomparison of varying grid with fixed grid and fixed gridwith minimum spacing. It shows the variance in the columnsof the group considered. To draw conclusion about apopulation parameter or a population probability distribution,we use Null hypothesis. First a tentative assumption ismade about the parameter/distribution which represents the

Calculation Methodx

representsthe error. p returns the ρ value for the Null hypothesis that

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i

Iterations Probability(ρ)values ofVary grid Vs Fixed grid

Probability(ρ)values ofVary grid Vs Fixed gridwith minimum spacing

FT1 FT2 FT3 FT1 FT2 FT35 0.1967 0.0709 0.0999 0.0629 0.0389 0.040110 0.0052 0.001 0.0016 0.002 0.0009 0.001120 0.0014 0.0011 0.0009 0.006 0.004 0.00450 0.0003 0.0003 0.0003 0.0002 0.0002 0.0002

FT1: Test between Vary grid potential and Fixed gridpotential.FT2: Test between Vary grid potential with StandardDeviation(+3σ) and Fixed grid potential.FT3: Test between Vary grid potential with StandardDeviation(−3σ) and Fixed grid potential.

Analytical ResultConsidering Vary grid Vs Fixed grid for probability

ρ <0.05, FT1,FT2 and FT3 are rejected for first 5 itera-tions since all ρ values were greater than 0.05.For the samecondition in next 10 iterations,20 iterations and 50 iterationsFT1,FT2 and FT3 passes the test since its ρ value was lesserthan 0.05.Considering Vary grid Vs Fixed grid with minimum spacingfor probability,ρ <0.05,FT1 alone is rejected since its valuewas greater than 0.05.For the same condition in next 10iterations,20 iterations and 50 iterations FT1,FT2 and FT3passes the test since its ρ value was lesser than 0.05.

V. CONCLUSION

REFERENCES

[3] C. S. Rafferty, M. R. Pinto, and R. W. Dutton, Iterative methods insemiconductor device simulation, IEEE Trans. Electron Devices, vol. ED-32, pp. 20182027, 1985.

[4] M. B. Patil, ’New approach to two-dimensional semiconductor devicesimulation on curvilinear grids’ Solid-State Electron., vol. 41, pp.789792,1997.

[5] S. Selberherr, ’Analysis and Simulation of Semiconductor Devices’, NewYork: Springer-Verlag, 1984.

[6] John Burkardt,http://people.sc.fsu.edu/jburkardt/m src/gridlines/gridlines.html.[7] S. M. Sze, ’Physics of Semiconductor device’, wiley-interscience.1970.[8] P. Degond, ’Mathematical modeling of microelectronics semiconductor

device’.[9] B. Van Zeghbroeck, ’Principles of Semiconductor Devices’, 2011

Application of the proposed technique in three dimensionalcan explore more details of the imperfections in MOSFETS.Customization of the grid on pn doping profile with

[2] Mahesh B. Patil, ’New Discretization Scheme for Two DimensionalSemiconductor Device Simulation on Triangular Grid’, IEEE transactionson Computer-Aided Design Of Integrated Circuits and Systems, Vol.17,No.11, pp.1160-1165, November 1998.

TABLE IStatistical analysis showing Friedman’s Test (FT) Values forvarying grid Vs �xed grid (with normal spacing and minimum spacing)Highlighted values shows that � <0.05.

α = 0.

[1] Pallab, Bhattacharya, ’Semiconductor Optoelectronic Devices’, 1997,Prentice Hall, ISBN 0134956567.

The accuracy is increased as and when the iterations aremore,thereby for 50 iterations the typical ρ value is 0.0003which is very close to zero.According to the decision rulein Friedman’s test if the ρ value is less than 0.05 the Nullhypothesis is rejected.Hence by statistical analysis the varygrid technique is precise in modeling imperfect semiconductorjunctions.

Imperfect PN junction in micro-scale was modeled usingfixed grids,varying grids,varying grids with minimumspacing and a comparison has been made.To test theaccuracy of the above mentioned grids a statistical analysisbased on Friedman’s Test was done.The analysis resultsshowsvarying grids have more accuracy since it gives aprobability(ρ) value less than 0.05.It is seen that when thenumber of iterations are increased the probability valuedecreases and reaches near 90 percentageaccuracy.Friedman’s test statistically proves that when thenumber of iterations are more,vary grid technique givesprecise prediction in modeling imperfect junctions.

Application of the proposed technique in three dimensional can explore more details of the imperfections in MOSFETS. Customization of the grid on pn doping profile with

Alex Pappachen James works on brain inspired circuits, algorithms and systems, in particular to applications involving low level vision processing, sensor data fusion and decisions in the domains of use in biomedical, nanosystems and sustainable engineering and has a PhD (2 years) from Griffith School of Engineering,Griffith University.He is currently a professional faculty member at School of Engineering,Nazarbayev University. He is a senior member of IEEE. He is actively engaged in research commercialisation and starting-up of companies. He has research and industry experience in the area of signal integrity, VLSI circuits and systems for image processing, memory based networks and pattern recognition algorithms.

Remya Ramesh, Currently working as Assistant Professor in the Department of Electronics and Communication Engineering,Adi Shankara Institute of Technology,Kalady and have seven years of experience in teaching engineering subjects. She received her Master of Technology in VLSI and Embedded systems from Rajagiri School of Engineering and Technology,Cochin.Her areas of interest includeVLSI device modeling,Control systems & Medical Image processing.

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