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MOHIT KUMAR RANA Project Intern (Vedang Radio Technology) Contact No.: 7404209879 E-Mail: [email protected] Objective To Create Value and Recognition on Work Place by Producing the Best Results for the Organization Through Synchronize and Hard work. Educational and professional synopsis Pursuing M.sc. electronic science 4 th semester from kurukshetra university with an aggregate of 59% marks in first year. 2010-13 B.sc.IT(Hons.) from kurukshetra university with 60% marks. 2009-10 12 th from UP Board with 62.8%. 2007-08 10 th from UP Board with 53%. Coreachievements Internship Project Intern at Vedang Radio Technology Bombay from January 2015-June 2015. Project Title Design and FPGA implementation of Inter Integrated circuit(I2C) Protocol. Also implemented additionally on Serial peripheral Interface(SPI) Universal Asynchronous receiver/transmitter(UART). Technical Skills Design and simulation tools Verilog , Matlab , LTspice Xilinx Spartan 3a kit ISE Design Suite. Software/Languages C/C++, Windows , MS office,HTML. Assembly language programming of 8051/8085/8086 microprocessors. Extra-curricular activities and achievements Organized various events like Annual function, Farewell, Prize Distribution. An active member of prefectural body of school Organized various seminars and trips. Participated and Won Third Prize in Quiz Competition Organised by Maharishi Markandeshwar University.

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MOHIT KUMAR RANA Project Intern (Vedang Radio Technology) Contact No.: 7404209879 E-Mail: [email protected]

Objective

To Create Value and Recognition on Work Place by Producing the Best Results for the

Organization Through Synchronize and Hard work.

Educational and professional synopsis

Pursuing M.sc. electronic science 4th semester from kurukshetra university

with an aggregate of 59% marks in first year.

2010-13 B.sc.IT(Hons.) from kurukshetra university with 60% marks.

2009-10 12th from UP Board with 62.8%.

2007-08 10th from UP Board with 53%.

Coreachievements

Internship Project Intern at Vedang Radio Technology Bombay from January 2015-June

2015.

Project Title Design and FPGA implementation of Inter Integrated circuit(I2C)

Protocol. Also implemented additionally on Serial peripheral Interface(SPI) Universal Asynchronous receiver/transmitter(UART).

Technical Skills

Design and simulation tools

Verilog , Matlab , LTspice Xilinx Spartan 3a kit ISE Design Suite.

Software/Languages

C/C++, Windows , MS office,HTML.

Assembly language programming of 8051/8085/8086 microprocessors.

Extra-curricular activities and achievements Organized various events like Annual function, Farewell, Prize Distribution. An active member of prefectural body of school Organized various seminars and trips. Participated and Won Third Prize in Quiz Competition Organised by

Maharishi Markandeshwar University.

Positivetraits Optimistic and ambitious

Hard working

An effective communicator with exceptional interpersonal skills

Possesses effective planning and organizational skills

Ability to successfully manage multiple priorities and assignments

Ability to work independently as well as in team environment.

Personal dossier

Date of Birth : 25-03-1994

Linguistic Abilities : English,Hindi.

Address : V.P.O Kundi Sarsawa Distt Saharanpur

Nationality : Indian