Motor Conditioning Analysis With Vibration Feature Extraction

Abhishek Chatterjee, Nilanjana Chaudhary, Subharthi Banerjee, Supratim Sen

The target of this project is to extend the health of the motor and its operational life.

Through the signal processing of vibration analysis, we get the frequency components amplitude which aware us about the motor health. For the case of fault it signature downed in the processed data.

So, it can save a lots of money and reputation of the manufacturer.

ABSTRACT

The conditioning motor has three modules: Vibration Analysis: In this module CPU samples the

accelerometer data from three channels as we mentioned three because it provides 3-D data. This sampled data get accumulated in buffer with the help of DMA(CORTEX M4)/ CPU cycles (CORTEX M3).After Buffer pool is created the data processing starts multiplying with Hamming Window. Processing happens in floating points may be with hardware FPU or virtual floating library.

Fault diagnostics happen simultaneously with the signal processing to display the faults involved in motor run time.

PROJECT DETAILS

There are two separate modules also work with the signal processing that involves extreme calculations for letting the fault diagnostics to work. Temperature sensing and Revolutions per second are those two modules. The continuous data acquisition works to keep the analysts aware of the critical limits. These limits work with the signal processing to tell us about the faults currently occurring there.

CMSIS(Arm cortex Microcontroller software Interface Standard)

CCS(Code Composer Studio)

Flash Programmer Utility

JTAG(Joint Test Action Group )

TOOLS USED:

PROCESSOR USED:

CORTEX M3 CORTEX M4

ARM Cortex M3: ARMv7-M architecture Instruction sets

◦ Thumb (entire)◦ Thumb-2 (entire)◦ 1-cycle 32-bit hardware multiply, 2-

12 cycle 32-bit hardware divide, saturated math support

3-stage pipeline with branch speculation 1 to 240 physical interrupts, plus NMI 12 cycle interrupt latency Integrated sleep modes 8 region memory protection unit (MPU)

(silicon option) 1.25 DMIPS/MHz 90 nm implementation

◦ 32 µW/MHz◦ 0.12 mm2

ARM CORTEX M4: Instruction sets

◦ Thumb (entire)◦ Thumb-2 (entire)◦ 1-cycle 32-bit hardware multiply, 2-12 cycle

32-bit hardware divide, saturated math support

◦ DSP extension: Single cycle 16/32-bit MAC, single cycle dual 16-bit MAC, 8/16-bit SIMD arithmetic.

◦ Floating-point extension (silicon option): Single-precision floating point unit, IEEE-754 compliant. This is called the FPv4-SP extension.

3-stage pipeline with branch speculation 1 to 240 physical interrupts, plus NMI 12 cycle interrupt latency Integrated sleep modes 8 region memory protection unit (MPU) (silicon

option) 1.25 DMIPS/MHz

BOARD USED:

LM3S1968 LM4F120H5QR

BOARDS SPECIFICATION

LM3S1968 LM4F120H5QR

LM3S1968 Thumb®-compatible Thumb-2-only instruction

set processor core for high code density – 50-MHz operation – Hardware-division and single-cycle-

multiplication Integrated Nested Vectored Interrupt

Controller (NVIC) providing deterministic interrupt

handling – 40 interrupts with eight priority levels – Memory protection unit (MPU), providing a

privileged mode for protected operating system

functionality – Unaligned data access, enabling data to be

efficiently packed into memory – Atomic bit manipulation (bit-banding),

delivering maximum memory utilization and streamlined

peripheral control

LM4F120H5QR 32-bit ARM Cortex-M4F architecture optimized for

small-footprint embedded applications ■ 80-MHz operation; 100 DMIPS performance ■ Outstanding processing performance combined

with fast interrupt handling ■ Thumb-2 mixed 16-/32-bit instruction set

delivers the high performance expected of a 32-bit ARM core in a compact memory size usually

associated with 8- and 16-bit devices, typically in the range of a few kilobytes of memory for

microcontroller-class applications – Single-cycle multiply instruction and hardware

divide – Atomic bit manipulation (bit-banding), delivering

maximum memory utilization and streamlined peripheral control – Unaligned data access, enabling data to be

efficiently packed into memory ■ IEEE754-compliant single-precision Floating-

Point Unit (FPU) ■ 16-bit SIMD vector processing unit

Temperature sensora)Contact typeb)Non-Contact type

Accelerometer(3-D)

Encoder

SENSOR USED:

BLOCK DIAGRAM(CORTEX M3):

BLOCK DIAGRAM(CORTEX M4):

FLOWCHART:

Data Acquiring :Temperature SensingADC Interrupt Handler(ADC0SS3IntHandler)Timer Interrupt Handler(measure temperature)Measuring Temperature(measure temperature)Accelerometer data handlingADC Interrupt handler(ADC1Int Handler)Timer Handler(Timer0A Int Handler)

FLOW ANALYSIS:

GPIO Interrupt Handler(Port D Handler) TIMER Interrupt Handler(Timer2AIntHandler)

PWM DATA HANDLING:

RESULTS

..continued

◦ ADC sample sequencers can not be timer triggered simultaneously. That’s why we implemented one conversion with timer trigger and another with processor trigger but period depends on timer.

◦ To display floating point in the OLED screen we can use sprint to convert the floats into char buffers. But that would result in fault ISR after some cycles. Even if we just keep the data as long the value don’t change accordingly in the screen. Solution can be there if we make our own float to char buffer procedure.

◦ Of we want to implement power save option and try to stop the trigger for ADC then again retrigger the ADC from another context when necessary that would sample the data continuously.

ERRATA

As we come to conclusion we can just say the whole process of vibration analysis is not time critical or hard real time system but it needs stability in continuous monitoring. The system needs to run continuously providing it consumes too less power and doesn’t add into the budget of the organisation.

After the design implementation we can be sure of here that this can cope up in the market with the high priced simulators to monitor the motors. The testing, calibration and real time monitoring without affecting work life will be employed later to test its feasibility in the production line.

 

CONCLUSION

◦ A practical approach to electromotor fault diagnosis of Imam Khomaynei silo by vibration condition monitoring , Hojat Ahmadi and Kaveh Mollazade

◦ Condition Based Maintenance (CBM) Through Vibration Spectrum Analysis for Improving the Reliability of B-1 Conveyor (DIVE542) Diagnosis of Fault through Vibration Spectrum Analysis Technique, K.RaviRaju, B.MadhavaVarma, N.Ravi Kumar, International Journal of Innovative Technology and Exploring Engineering (IJITEE) ISSN: 2278-3075, Volume-2, Issue-2, January 2013

◦ Vibration Feature Extraction Techniques for Fault Diagnosis of Rotating Machinery -A Literature Survey, Hongyu Yang, Joseph Mathew and Lin Ma

◦ Condition Monitoring of FD-FAN Using Vibration Analysis, N. Dileep, K. Anusha , C. Satyaprathik, B. Kartheek, K. Ravikumar

◦ Vibration Diagnostics, A LENA BILOŠOVÁ, JAN BILOŠ◦ Stellaris LM4F120H5QR Microcontroller Datsheet◦ Stellaris LM3S1968 Microcontroller Datasheet◦ Stellaris Peripheral Driver Library◦ ADC Oversampling Techniques for Stellaris Family Microcontrollers

 

BIBLIOGRAPHY

We would like to express my sincere thanks to Mr. Biswajit Saha, Principal Engineer, ICT&S-I, Section Head, CDAC-Kolkata for having the trust on us before rendering such a significant project to us and for always being there with his valuable suggestions whenever we approached him. He guided us in conceptualizing and executing the developmental task of this project. He encouraged, inspired us throughout in successfully doing this technical report. We will be ever grateful to him for being our mentor for this project.

Also like to express sincere thanks to Dr. Amit Chaudhuri, Joint Director, ICT & Services, CDAC-Kolkata&Mr. Alokesh Ghosh, Principal Engineer & Mr. Amritasu Das, Project Engineer for their support, patience and guidance whenever we approached them. It is to them that we owe our deepest gratitude.

ACKNOWLEDGEMENT

THANK YOU