1

M.Tech Programme

Department of Electronic Systems

Engineering (DESE)

Indian Institute of Science, Bangalore

2 Vision

• To go the extra mile beyond research

System Integration

Research

3 Vision Statement

• Achieve excellence in research and

education in electronics systems engineering,

with positive societal impact

From Theory to Implementation

4 Mission Statement

• To make outstanding research and design

contributions* recognized by peers and used

by the scientific community and society at

large

• To make students experience all the stages

and processes involved in conceptualising,

investigating, designing and implementing

electronics systems

* Products, Patents, Papers, IPs, Books, E-books, E-lectures … etc.

5 Areas

• Digital Systems, Instrumentation

• Power Electronics, Industrial drives

• Electromagnetic compatibility,

• Electro-mechanics, Control systems

• Communication Networks

• Embedded Systems, Computer Architecture

• Electronics Packaging, Industrial Design

• VLSI, Signal Processing

6 Objective of the Project work

• Design and Development of Electronic

Products

• Design methodology

• Implementation

• System Packaging

• Documentation

• Presentation

• Team work

7 IISc Administrative

• Courses as per M.Tech requirement

• Credits – 1, 2 or 3 Lectures per week

– 3 Lab hours per week

– Example: 2:1 = 2 lectures per week + 3 hours lab per week

8 GPA

• Grades and grade points – S, A, B, C, D, F

– 8, 7, 6, 5, 4, 0

– GPA, TGPA, CGPA

Credits

GPCreditsGPA

9 Term Course load

• First term: min 12 credits max 18 credits;

normally 15 or 16 is recommended

• Courses from other depts. allowed; relevant

to CEDT M.Tech. program

• Dropping of courses

– 1st term: 15th November

– 2nd term: 1st April

– Summer term: 15th June

10 Continuous Assessment

• Class Tests, mid-term exams, assignments and final

exam as determined by the instructor

• 1st Term – TGPA >= 3.5, other terms CGPA >= 4

• No ‘F’ grade in more than two courses during the

studentship. Course shall be repeated or a substitute

course taken as determined by the DCC

• F Grade in hard Core – repeat (only once) same

• Soft Core / elective – repeat any other soft core /

elective

• On repeated a course F grade – leave IISc !

11 Courses

• 12 <= credits per term <= 21 (18 – 1st Term)

• Attendance: 75% prescribed for each course-

labs, lectures; taken seriously!

12 M Tech Programme Structure

• M Tech: 64 credits in 23 months over 4

semesters + 2 summers

– Core 21 credits

• 12 during I, 9 during II

– Electives 18 credits

• 3/6 during I, 9/6 during II, and 3 during III term

– Project 25 credits

• 4 During I summer, 6 during III term and 15 during

IV term and II summer

13 Terms

• Aug – Dec 2013 (Courses)

• Dec Last 2 weeks (Vacation)

• Jan – Apr 2014 (Courses)

• May – Jun 2014 (Project)

• July 2014 (Vacation)

• Aug – Dec 2014 (Electives + Project +

Placement)

• Jan – Jun 2015 (Project)

14 Core courses (21 credits)

• E0 284 2:1 Digital VLSI Circuits (Aug)

• E2 243 3:0 Mathematics for Electrical Engineers (Jan)

• E3 231 2:1 Digital Systems Design with FPGAs (Jan)

• E3 235 2:1 Analog and Data Conversion Systems (Aug)

• E3 264 2:1 Industrial Design of Electronic Equipment (Aug)

• E3 265 2:1 Electromagnetic Compatibility (Jan)

• E6 202 2:1 Design of Power Converter Systems (Aug)

15 Electives

• E1 243 2:1 Digital Controller Design (Jan)

• E1 247 2:1 Incremental Motion Control

(Aug)

• E2 231 3:0 Data Communication Systems

• E3 225 3:0 Art of Compact Modeling (Aug)

• E3 238 2:1 Analog VLSI circuits (Aug)

• E3 257 2:1 Embedded systems I (Jan)

• E3 258 2:1 Embedded systems III (Jan)

16 Electives

• E3 268 3:0 Advanced CMOS and beyond CMOS (Jan)

• E6 202 2:1 Design of power converters (Aug)

• E6 212 2:1 Control of power converters and drives (Jan)

• E6 222 2:1 Design of photovoltaic systems (Jan)

• E9 251 3:0 Signal Processing for Data Recording

Channels (Jan)

• E9 252 3:0 Mathematical methods and techniques

in signal processing (Aug)

17 Project

• Duration: 14 months

• Industry sponsored, Typically 2 students per batch

• Emphasis on complete product

– Meeting target specifications

• Demo, Viva, Design Expo

• Minimum of C Grade required in project

– D Grade- opportunity would be given to improve the

project based on recommendation by DCC/SCC

18 M Tech to PhD

• Transfer of motivated M Tech/ME students

to PhD programme of IISc

• Continuation of M Tech/ME students to join

research programme after submission of

project report

19 Phases

• Study Phase

– Literature Survey, Product Survey

– Target specifications

– Algorithms, Design schemes, Components

• Design Phase

– Hardware Design, Software Design

– Industrial Design

• Engineering Phase

– Hardware / Software Implementation

– PCB / Mechanical fabrication, System Integration

20 Reports, Seminars

• Reports

– Study Phase Report

– Design Phase Report

– Engineering Phase Report

– Final Report

• Seminars

– Study Phase Seminar

– Design Phase Seminar

21 Reviews

• Specifications review

– Study Phase

– Scope

• Design review

– Design Phase

– Functionality

– Complexity

– Reliability

– Cost

22 Final Events

• Pre-demo

• Demo

• Viva

• Feedback

• Expo

23 Projects 2011-13

• Physical layer security

• Design of RFID mat for Endurance Test

• Inter-Inverter Communication

• Grid connected Bicycle Inverter

• Vector Control of Induction Motor with

reduced EMI

• Person Tracking for Surveillance

Applications

• Wearable Health Monitoring

24 Projects 2011-13

• GPS based turtle tracking

• Smart Furniture

• Power Game

• Hardware Accelerator for Linear Solvers

• Hardware Accelerator for Support Vector Machines

• Drug Delivery System

• Hexapod Robot For Multi-terrain Application

• Low Power Low Cost Compliance Monitoring for

Clubfoot Braces

25 Wearable MOT

26 IONS Robot

27 Placement

• Intel, Analog Devices, Texas Instruments

• nVIDIA, Rambus

• Qualcomm, Broadcom

• Cisco, Juniper Networks

• Cypress, Cosmic circuits

28

Thank You