MTP1 Presentation

8/3/2019 MTP1 Presentation

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CONTINUOUS TIMECONTINUOUS TIME

SIGMA-DELTA ADCSIGMA-DELTA ADC

(WITH 2-BIT QUANTIZER)(WITH 2-BIT QUANTIZER)


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Basics of Sigma Delta ModulatorsBasics of Sigma Delta Modulators


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Advantages and Issues in CTSDMAdvantages and Issues in CTSDM

ADVANTAGES

Implicit Anti-aliasing

No front-end S/H

Lack of KT/C Noise

Low Power Consumption

ISSUES

Finite Gain & GBW of Op-amp

Quantizer Non-linearity

RC-time constant variations

Excess Loop Delay

Clock Jitter


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Architecture of Cascaded 211Architecture of Cascaded 211

CTSDMCTSDM


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Noise Cancellation FilterNoise Cancellation Filter


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MATLAB Simulation ResultsMATLAB Simulation Results

(2bit Quantizer)(2bit Quantizer)


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MATLAB Simulation ResultsMATLAB Simulation Results

(1bit Quantizer)(1bit Quantizer)


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Design Parameters & Other CoefficientsDesign Parameters & Other Coefficients

(CTSDM with 2bit Quantizers)(CTSDM with 2bit Quantizers)

DesignParameters

FeedbackCoefficients

OtherParameters

fb = 24 KHz Ksig = 1/4 MSA = 0.89 V

OSR = 64 K1 = 1 SNR = 133 dB

fs = 3.072MHz K2 = 3/2

K3 = 1 For 1bitQuantizer

MSA = 0.48 VSNR = 100 dB

K51 = -1

K61 = 2

K71 = -4/3

K4 = 1K52 = 1/3

K62 = -1/2

K72 = 7/24

K82 = 1

K92 = -1/4


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Conclusion & Future TaskConclusion & Future Task

A Continuous Time Sigma-Delta ADC with 3 stageCascaded 211 Architecture and 2bit Quantizer at eachstage was simulated in MATLAB.

An improvement of 30 dB in SNR and 0.4 V in MSAwas observed over similar architecture with 1bitQuantizer at each stage.

CIRCUIT LEVEL implementation will bedone in this semester in 130nmtechnology, while targeting TAPE-OUT.


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ReferencesReferences

Understanding Delta-Sigma Data Converters Richard Schreier & Gabor C.

Temes.

Delta-Sigma Data Converters, Theory, Design and Simulation RichardSchreier, Gabor C. Temes & Steven R. Norsworthy.

Delta-Sigma Toolbox Richard Schreier.

A Cascaded Continuous Time Sigma-Delta Modulator with 80 dB DynamicRange Maurits Ortmanns, Markus Kuderer, Yiannos Manoli & FriedelGerfers.

A Case Study on a 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator Maurits Ortmanns, Friedel Gerfers, & Yiannos Manoli.

Optimal Parameters for Delta-Sigma Modulator Topologies AugustoMarques, Vincenzo Peluso, Michel S. Steyaert, & Willy M. Sansen.


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ReferencesReferences

Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta

Sigma Modulators Prabu Sankar and Shanthi Pavan.

Excess Loop Delay in Continuous-Time DeltaSigma Modulators James A.Cherry and W. Martin Snelgrove.

A Power Optimized Continuous-Time ADC for Audio Applications ShanthiPavan, Nagendra Krishnapura, Ramalingam Pandarinathan, and PrabuSankar

Theory, Practice, and Fundamental Performance Limits of High-Speed DataConversion Using Continuous-Time Delta-Sigma Modulators James A.Cherry

Compensation of the Influence of Finite GBW on CT-SDM MauritsOrtmanns, Friedel Gerjers, Eannos Manoli

A Clock Jitter Insensitive Multi-bit DAC Architecture for High-PerformanceLow-Power CTSDM Gerfers, M . Ortmanns, P Schmitz, Z Manoli & K. M.Soh


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Thank YouThank You

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