A 2.4 GHz GaAs-HBT Class-E MMIC Amplifier with 65% PAE C. Meliani1, M. Rudolph1, P. Kurpas1, L. Schmidt2, C.N. Rheinfelder2, and W. Heinrich1

1Ferdinand-Braun-Institut fr Hchstfrequenztechnik (FBH), 12489 Berlin / Germany 2Ubidyne, 89081 Ulm, Germany Email: meliani@fbh-berlin.de

Abstract A class-E amplifier in the 2 GHz band is presented. It is realized as a coplanar MMIC using a high-voltage GaAs-HBT process. At 37 dBm output power, a high PAE of 65% with 71% collector efficiency are achieved. The gain of the amplifier in the switch-mode region reaches 11 dB. These are very competitive values for PAE, collector efficiency, and output power and the highest ones using GaAs-HBT technology. The measured data is supported by in-depth circuit simulation results highlighting the special conditions and requirements of switch-mode operation.

Index Terms HBT, GaAs, class-E, power amplifier, PAE.

I. Introduction

In most power amplifier (PA) applications, it is required to obtain maximum efficiency without sacrificing output power and linearity. This is true for base stations in wireless commu-nications as well as for measurement systems and instrumenta-tion. Most promising in this regard are amplifier concepts based on switch-mode operation (such as class E) or harmonic tuning (like class F), which allow for maximizing efficiency without compromising power handling significantly. These concepts are receiving high attention presently, since they can be employed as building blocks in highly linear amplifier sys-tems, e.g. relying on the Kahn envelope-elimination-and-restoration (EER) architecture.

Most recently published work aims at improved PAs for third generation handsets, with target frequencies in the range of 0.7 to 2.4 GHz and power levels up to 0.5 W. Commonly, these circuits are fabricated in low-cost technologies [1], and yet not fully integrated. One reason for realizing the output network off-chip is the high loss inherent to the integrated inductors and transmission lines required. To overcome these losses problems and propose multi-band operation class-E, some new techniques have been proposed [2]. Infrastructure applications, on the other hand, demand for higher power lev-els that are so far only within reach if high-performance tech-nologies are employed. Recently, Class-E MMIC amplifiers were published achieving 38.7 dBm of output power with 50% PAE at 1.9 GHz. These PAs are realized in GaN-HEMT tech-nology [3,4].

In this work, we present design considerations and results of a fully integrated class-E amplifier operating at 2.4 GHz, which delivers 37 dBm of output power to a 50- load with 65% PAE, at a supply voltage of 12 V. The PA is realized in a GaAs-HBT process and compares well with recent results reported in the literature based on GaN HEMT technology.

The paper is organized as follows: Sec. II briefly describes GaAs technology and the models used, Sec. III is devoted to class-E circuit design, and Sec. IV then presents the measure-ment results.

II. HBT Technology and Modeling

The GaAs-HBT MMICs are realized using MOVPE epi-taxy and the 4-inch process line at the Ferdinand-Braun-Institut (for details see [5,6]). This process is optimized for power amplifiers in the 2 GHz band with a collector bias volt-age around 26 V. Its two main features are a 2.8 m thick col-lector layer that increases breakdown voltage to 70 V and thermal air bridges that serve as heat spreaders. The HBTs can be flip-chip soldered on a heat-sink. In the present work, how-ever, only results measured on-wafer are reported. For the fabrication of MMICs, MIM capacitances, NiCr resistances, and airbridges are available.

For circuit design, the HBTs are modeled using the FBH HBT model [7]. The model accounts for self-heating and for the bias-dependence of the cutoff frequencies. Fig. 1 compares values of ft for a 3x30 m2 device as a function of bias, ex-tracted from measurement (symbols) and from simulation (lines). It should be noted that the corresponding extrapolated values of fmax range from 40 100 GHz, which leads to the high gain of 14 dB at 2 GHz measured in power amplification mode [6]. The model parameters are first determined for basic cells of 3x30 m2, and finally scaled up for power cells up to 20x(2x100) m2. The modeling approach for these HBTs is described in [8]. Models for coplanar lines and passive ele-ments complement the design environment.

15

10

5

00 2 4 6 8 10 12 14

f t (G

Hz)

Vce (V)

Vce

Fig. 1. Transit frequency ft as a function of collector bias for 3x30m2 HBT, with VCE = 2, 4, 8, 16, 24 V; symbols: ft extracted from S-parameter measurement; lines: extracted from simulation.

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II. Circuit Design

A. Class-E operation

According to the principle of class-E operation, the transis-tor is considered simply as a switch, directing power from source to load or to the tank, which is realized partly by the output network (see Fig. 2). The basic idea is simply to mini-mize the overlap area of the time functions for current and voltage at the transistor's output that represent the power losses. This is achieved with the output network presented below in Fig. 2.

Fig. 2. Ideal class-E amplifier diagram.

Applying this simplified description based on an ideal switch, one can calculate the circuit elements according to the class-E equations (e.g. [9]). For output power, we assume a value of 8 W, which is given by the maximum power obtained during load-pull measurements of 20x(2x100) m2 HBTs. The table below provides the resulting element values in detail:

C1 Cres Lres Lchoke Vdd Pout Rl 0.8 pF 1 pF 6 nH 60 nH 20 V 8 W 25

At 2.4 GHz, these values reach the theoretical PAE maxi-mum for a resonator Q value of 5 and a load impedance of 25 . Under ideal conditions this is all one has to do. In real-ity, however, at GHz frequencies the transistors fall by far short off an ideal switch behavior and one has to take into account several other aspects that are absolutely not negligi-ble.

B. Class-E operation using GaAs-HBT at 2 GHz

The first assumption that is not completely fulfilled in real-ity is that the switch does not need any power to be controlled. This, of course, does not hold when using a transistor. Fur-thermore, our transistor shows an input impedance of a few Ohms at 2 GHz, which can be approximated by a parallel in-put capacitance. Actually, this non-ideal input characteristic has two consequences.

The first one directly affects PAE. In the case of the ideal switch, no input RF power is needed, thus the PAE is simply equal to the collector efficiency. In our case, PAE is smaller than collector efficiency. If the transistor is perfectly imped-ance-matched at the input, the HBT has a power gain of about 10 dB, which means that the input power is 10% of the output

power. This yields the following relation for the two efficien-cies:

Collector eff. = Pout / Pdc PAE = (Pout-Pin)/Pdc = 0.9 x (Pout/Pdc) = 0.9 Collector eff. (1)

This is the first unavoidable reason for a decrease in PAE, simply because transistor gain is not infinite.

The second effect of the low transistor input impedance is that one needs a matching circuit. This will certainly introduce losses. This is discussed in details in the implementation part in subsection III.C and depends, of course, on the quality fac-tor of the elements used, but one can already get an idea of the decrease in PAE to be expected: Assuming a worst case of 3 dB losses for the matching circuit, one loses 50% of the input power. For 10 dB transistor gain, this means the input power delivered from the source will be 20% of the output power. Using relation (1) : PAE = 0.8 x Collector eff. This means PAE is reduced from 0.9 to 0.8 collector efficiency due to the input matching losses.

The second unrealistic assumption in the case of the switch is that it has zero output capacitance. Note that our transistor has an effective output capacitance Cout of around 0.9 pF. in-deed, this is one of the two main limitations most class-E de-signers face when operating at GHz frequencies. As calculated above, the needed tank capacitor C1 is of around 0.8 pF, i.e., Cout is already slightly larger than C1. One can adjust the Q values for the resonator a little bit in order to reduce C1, but at the expense of increasing losses in the resonator and thus de-creasing PAE. So, this is really the physical limit of ideal class-E operation. For our transistor at these frequencies, one can still expect a true class-E operation, as the values of Cout is approximately equal to C1.

The third critical point in the ideal switch model is the as-sumption of a unilateral element. The transistor, of course, is not unilateral and has a non-negligible base-to-collector ca-pacitance Cgd that introduces a feedback from the output to the input. This influences the class-E behavior significantly and has to be carefully studied by means of large-signal simula-tions.

C. Layout implementation

One more aspect is encountered when implementing such a circuit into a MMIC layout: The calculations above consider the passive elements to be lossless. Therefore, when using realistic elements one has to account for loss-related effects both at input and output:

Input circuit: As described above the effects of the losses at the input are transmitted through the gain, and thus their effect at the output is divided by the gain. If one assumes 1 dB losses for a matching circuit this reduces PAE by 3%.

Output circuit: The losses at the output have direct influ-ence on the resulting power and thus PAE. A simple calcula-tion illustrates the situation: In our case, the ideal class-E load resistor is 25 . This means a series parasitic resistance of

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only 2.5 (which is a realistic value) will absorb already 10% of the output power, which means directly 10% less collector efficiency.

D. Optimization procedure

During the first simulations the transistor is driven by an ideal voltage source in order to isolate output and input effects on PAE. A power of e.g. 30 dBm is injected. The element values according to the ideal model in Fig. 2 are taken as start-ing point for the output resonator circuit. Then, the PAE is optimized considering ideal elements. C1 is not used, as it is completely absorbed in the output capacitance of the transis-tor. These simulations are performed using first the ideal class-E load resistor (25 according to II.A) and, in a second step, introducing an LC matching circuit to 50 .

When high PAE values are obtained, the ideal elements are replaced by realistic elements and the circuit is optimized again. Fig 3 presents the final circuit diagram, using an output resonator consisting of a coplanar line in series with a 5 pF capacitor. The choke at the collector is implemented as a line, too. The advantage of using transmission lines instead of on-chip lumped elements is that they exhibit lower losses. In or-der to further reduce the losses of these lines, coplanar lines with 125 m center conductor width and 70 m gap width are applied. The final length values for the resonator and the choke line are 7 mm and 8 mm, respectively. Thus, the losses of each line are reduced to about 2.5 .

Fig. 3. Circuit diagram of the class-E MMIC.

After designing the output resonator circuit, the input matching circuit was optimized using two LC cells (see Fig. 3). This has the advantage of being slightly less sensitive to technology variations than a one-stage LC matching circuit.

After all, circuit simulation predicted an output power of 38 dBm with a PAE of 67% at 20 V collector bias voltage and for 29 dBm input power at the source at 2.4 GHz. The meas-ured results are presented in the following section.

III. Experimental Results

A. Small-signal measurements

In a first step, small-signal measurements were performed in order to check the functionality of the amplifier and to characterize the input and output matching. Fig. 4 presents the S-parameter data. A gain of 14 dB is obtained around 2.4 GHz, with acceptable input and output match. S11 is 10 dB at the target frequency while S22 is somewhat shifted but still reaches -6 dB at 2.4 GHz. One has to bear in mind, however, that this data refers to the small-signal regime and cannot be directly used to characterize class-E operation, which is inher-ently non-linear.

-30

-20

-10

0

10

20

0 1 2 3 4 5Frequency [GHz]

S [dB

]

S21

S11

S22

Fig. 4: S-parameters of the class-E amplifier as a function of frequency.

B. Large-signal measurements

Large-signal measurements were performed at 2.4 GHz within an on-wafer load-pull set-up with 50 input and out-put impedance. A collector voltage of 20 V gave the best PAE and output power values. Input power was swept from 0 dBm to 30 dBm.

Fig. 5 presents the measured data for output power, gain, and PAE as well as collector efficiency. The curves differ from the classical class-A/B ones and, therefore, will be dis-cussed in detail in the following.

Starting with low input power levels in the range of up to 15 dBm, the behavior can be considered as a class A or AB -like mode, where PAE is increasing because of self-biasing but not reaching really high values because the transistor is still operated in class AB. A further reason for the relatively low PAE is that the input impedance matching is only partly functional at these power levels because it is designed for the large-signal case. At 15 dBm input power, for instance, the input matching circuit delivers only 7 dBm to the base of the transistor, so gain is low and input power is too small to in-duce any switching behavior.

At an input power of about 18 dBm, the behavior of the circuit suddenly changes. PAE increases very rapidly to 50% and then, after increasing input power by further 5 dBm, PAE

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grows to 65%. This maximum value is obtained at 25 dBm input power, the corresponding output power reaches 37 dBm with a large-signal gain of 11 dB. This is the class-E operating mode the circuit is designed for.

01020304050607080

0 5 10 15 20 25 30Input power [dBm]

PAE,

Co

llect

or ef

f. [%

]

0

5

10

15

20

25

3035

40

Pout [d

Bm], G

ain

[dB

]

Fig. 5. Measured PAE (red line), collector efficiency (blue line), output power (green line), and gain (black line) at 2.4 GHz for 20 V collector voltage.

The difference between PAE and collector efficiency amounts 6%. As already calculated in the sections before, one can find this number simply by deducting the input power from the collector efficiency relation and input matching losses. At 25 dBm input power, 37 dBm output power is measured with a collector efficiency of 71%. For a gain of approximately 10 dB, using relation (1), one can expect a PAE value of 0.9 x 71% = 64 %, which is in good agreement with the measured value of 65%.

III. Conclusions

Design and realization of a class-E amplifier at 2.4 GHz is presented providing detailed information on the design proce-dure and the limitations due to the transistor parasitics. This enables one to quantify the differences between theoretically expected output power and PAE and the values possible in practice. This provides an immediate overview of the potential of a given technology for switch-mode operation.

The design procedure was verified using a GaAs-HBT process with increased breakdown voltage. The resulting co-planar class-E MMIC achieves a PAE of 65% and a collector efficiency of 71% at 37 dBm output power. Gain in the switch-mode region is 11 dB. We find that the large-signal simulations correctly describe the switch-mode characteristics and yield good quantitative agreement with measurements.

The high PAE and collector efficiency values in the 5 W output power range prove usefulness of the GaAs-HBT tech-nology as well as the design approach. They are record values for GaAs-HBT microwave E-class amplifiers and very com-petitive to published GaN realizations.

References

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[2] Seung Hun Ji, Gyu Seok Hwang , Choon Sik Cho, Jae W. Lee and Jaeheung Kim, 836 MHz/1.95GHz Dual-Band Class-E Power Amplifier Using Composite Right/Left-Handed Trans-mission Lines, in Proc. Europ. Microwave Conf., Manchester, UK, 2006, 356 359.

[3] S. Gao, H. Xu, S. Heikman, U. Mishra, R.A. York, Microwave Class-E GaN Power Amplifiers, in Proc. Asia-Pacific Micro-wave Conf. (APMC), 2005.

[4] H. Xu, S. Gao, S. Heikman, S.I. Long, U.K. Mishra, R.A. York, A High-Efficiency Class-E GaN HEMT Power Amplifier at 1.9 GHz, IEEE Microwave Wireless Comp. Lett., Vol. 16, Jan. 2006, pp. 22 24.

[5] P. Kurpas, F. Brunner, W. Doser, A. Maadorf, R. Doerner, M. Rudolph, H. Blanck, W. Heinrich, J. Wrfl, Development and Characterization of GaInP/GaAs HBTs for High Voltage Opera-tion, in: International Conf. GaAs Manufacturing Technology (GaAs MANTECH), Las Vegas, USA, 21. 24. May 2001.

[6] P. Kurpas, A. Maadorf, M. Neuner, W. Doser, P. Heymann, B. Janke, F. Schnieder, T. Bergunde, T. Grahoff, H. Blanck, Ph. Auxemery, W. Heinrich, J. Wrfl, Flip-Chip Mounted 26 V GaInP/GaAs Power HBTs, in: IEEE IEDM Dig., 2004, pp. 561 564.

[7] M. Rudolph, Introduction to Modeling HBTs, Boston, London: Artech House 2006, Chapter 6.

[8] M. Rudolph, R. Doerner, Large-Signal Modeling of High-Voltage GaAs Power HBTs, in: IEEE MTT-S Intl. Microwave Symp. Dig., 2005, 457 460.

[9] N.O. Sokal, Class-E switching-mode high-efficiency tuned RF/microwave power amplifier: improved design equations, in: IEEE MTT-S Intl. Microwave Symp. Dig., 2000, 779 782.

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