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© 2013 Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
V1.05 2013-06-11
Multi-Core Operating System MICROSAR-OS
Features and Configuration
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 2
AUTOSAR Multi-Core Operating System
Core 1
Time Control
Core 2
Alarm ControlTimer
OS OS
Alarm on/off
Set Alarm Time
Get Time
Poll Keyboard
Ring Alarm
Keys
Buzzer on/off
Data
Task ActivationBuzzer
Display
Sample: Alarm Clock
State Control
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 3
AUTOSAR Multi-Core Operating System
More computing power
Similar die size
Same or lower CPU clock frequency
Parallel processing
Separation of Applications
Specialized cores (FPP, DSP)
Various operating systems on the same ECU, e.g. OSEK and Linux
Legal reasons, e.g. software originating from multiple suppliers
Functional Safety
avoidance of mutual interference running application software components on separated cores
Redundancy identical application running on 2 cores
Less power dissipation
Lower CPU clock frequency
Computing power on demand, i.e. sleep modes for unused cores
Reasons for Multi-Core Systems
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 4
AUTOSAR Multi-Core Operating System
AUTOSAR extends the OSEK/VDX standard of operating systems. AUTOSAR Add-ons are segmented into Scalability Classes (SC).
Specifications
OSEK OS
ScheduleTables
TimingProtection
MemoryProtection
AUTOSAR OSadditional Functionality
SC 1
SC 2
SC 3
SC 3
SC 4
Multi
Core
AUTOSAR 4
SC2
SC3
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 5
AUTOSAR Multi-Core Operating System
ExtendedTask
Control loop
CAN
Interrupt
Alarm
Data
BasicTask
ActuatorDriver(PWM)Wait EventSetEvent
0:07 56
SetEvent
TaskInterrupt
Resource Resource
Event
Resource
OSEK/VDX System Elements
Activate Task
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 6
AUTOSAR Multi-Core Operating System
Dispatcher SystemTimer 2
CPU (Core 2)Task Switching
Dispatcher SystemTimer 1
CPU (Core 1)Task Switching
InterruptController RAM (Stacks)
ROM (OS Code)
ROM (OS Code)RAM (Stacks)
Hardware View
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide:
> Shared peripherals (RAM, ROM, Display)
> Data transfer between cores
> OS services across core boundaries
7
AUTOSAR Multi-Core Operating System
Core 1
Time Control
Core 2
Alarm ControlTimer
OS OS
Alarm on/off
Set Alarm Time
Get Time
Poll Keyboard
Ring Alarm
Keys
Buzzer on/off
Data
Task ActivationBuzzer
Display
Sample: Alarm Clock
State Control
Spinlock
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 8
AUTOSAR Multi-Core Operating SystemAvoidance of Deadlocks
Core 1 Core 2
RAM
OS OS
IO
Synchronization
Data
Task Sensor (Priority 10)
Task CANRx(Priority 20)
Task Brake(Priority 50)
Task DataEvaluation
(Priority 30)Task RAM
Check(Priority 10)
Task VIP(Priority 99)
Configuration of Spinlock Hierarchy
Spinlock_1 (e.g. IO)
Spinlock_2 (e.g. RAM)
Spinlock_3 (...)
Task Status Spinlock
TaskData active Get Spinlock IO
TaskSensor active Get Spinlock RAM
TaskData waiting (*1) Get Spinlock RAM
TaskSensor Not permitted!
Get Spinlock IO
TaskSensor active Release Spinlock RAM
TaskData active Get Spinlock RAM
*1 = Task RAM is blocked, Task VIP can become active
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 9
Core 1
AUTOSAR Multi-Core Operating System
I/O Control
Core 2
HMI
OS OS
RAM
Alarm on/off
Set Alarm Time
Get Time
Display Time
Ring Alarm Buzzer on/off
Cache A Cache B
Global variable
- access coordination (Spinlocks)
- content synchronization Data
OS service
IOC Inter OS application Communication
Data Transfer
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 10
Task A-2
Inter-Core OS Services> Task Activation> Set / Get Event> Start / Cancel Alarms> Start / Stop ScheduleTables
Coordination of access to shared resources by> Resource (Intra-core)> Spinlocks (Inter-core)
Consistent Data exchange with OS control> Inter OS-Application Communication
Start-up synchronization of all cores
AUTOSAR Multi-Core Operating SystemOperating System Services
activate
SetEvent
Core A Core B
IOC Buffer
Task A-1
ISR A-1
Task B-1
Task B-2
ISR B-1
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 11
AUTOSAR Multi-Core Operating SystemStart-up Behavior
Core 0
StartUp Code{ StartCore(1)
StartOS()StartUp Code
StartCore(2)StartOS()
StartUp CodeStart OS()
StartUp Hook{ User Code() }
StartUp Hook{ User Code() }
StartUp Hook{ User Code() }
OS internalstart tasks and alarms
OS internalstart tasks and alarms
OS internalstart tasks and alarms
Core 1 Core 2
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 12
AUTOSAR Multi-Core Operating SystemPresentation of Configuration
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 13
AUTOSAR Multi-Core Operating System
Core 1
Time Control
Core 2
Alarm ControlTimer
OS OS
Alarm on/off
Set Alarm Time
Get Time
Poll Keyboard
Ring Alarm
Keys
Buzzer on/off
IOC
Task ActivationBuzzer
Display
Sample: Alarm Clock
State Control
Spinlock
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 14
AUTOSAR Multi-Core Operating System
OS> How many cores shall be used?
Application> Which core shall execute the OS-Application?
> Which OS elements (Task, ISR, Alarm, etc.) shall be assigned to the respective OS-Application?
Spinlocks> Name of the subsequent spinlock
IOC> Configuration of the communication parameters
> List of senders
Configuration
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 15
AUTOSAR Multi-Core Operating System
Design Hints
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 16
AUTOSAR Multi-Core Operating System
Com
plex Device D
rivers
RTE
Memory Drivers
I/O Drivers
I/O Hardware
Abstraction
Memory Hardware
Abstraction
Memory Services
OperatingSystem
Communication Drivers
Communication Hardware
Abstraction
Communication Services
Application 2
SWC b
IOC
Application 1
SWC a
Core 1
Com
plex Device D
riversCore Test
ECU State
Manager
Operating System
Application 4
SWC d
IOC
Application 3
SWC c
Core 2
AUTOSAR Architecture
Microcontroller Drivers
Onboard Device
Abstraction
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 17
AUTOSAR Multi-Core Operating System
Read Sensor Data
Core 1 Core 2
Data Processing
RAM
OS OS
Design
Execution Time
Shared resources
Synchronization points
Data transfer between cores
NameExecution Time
Exchange Data
Sync Requirements
_Func_A 5% 8 Byte none_Func_B 20% 256 Byte none_Func_C 13% 64 Byte _Func_B
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 18
AUTOSAR Multi-Core Operating System
Functional Safety
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide:
Add
ress
/
Dat
a-Bus
19
AUTOSAR Multi-Core Operating System
ROM Display RAM
Core 1
OS
Time Control
Get Time
Display Time
Ring Alarm
Core 2
OS
Time Control
Get Time
Display Time
Ring Alarm
Hardware Comparator
Lockstep
Lockstep
Lockstep
Lockstep
Safety - Redundancy
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 20
MICROSAR-OS
The webinar series about operating systems 2013-05-08 MICROSAR OS - a pre-emptive realtime multitasking operating system 2013-05-14 TimingAnalyzer – schedulability analysis of task runtime 2013-06-04 Memory and runtime protection of the MICROSAR OS operating system 2013-06-11 Introduction into the multi-core operating system from Vector
Registration to the upcoming Webinars and the list of recorded Webinars:http://www.vector.com/vi_webinars_en.html resp.http://www.vector.com/vi_operatingsystems_webinars_en.html
The overview of Vector’s training services:http://www.vector.com/vi_training_en.html
We stay online for some more minutes to answer your questions. Please ask your questions in the Q&A window.
Contact data for additional questions, product information or presentation : [email protected] +49 (0) 711 80670 385 [email protected]
Webinars
© 2013. Vector Informatik GmbH. All rights reserved. Any distribution or copying is subject to prior written approval by Vector.
Slide: 21
Thank you for your attention.
For detailed information about Vector
and our products please have a look at:
www.vector.com
Author:
Dr. Helmut Brock
Vector Informatik GmbH
Ingersheimer Str. 24
70499 Stuttgart
