Power Electronics

Workshop 2016

Power Electronics

Workshop 2016

Multi-Objective Optimization of Power Electronics Converter Systems Johann W. Kolar Swiss Federal Institute of Technology (ETH) Zurich Power Electronic Systems Laboratory www.pes.ee.ethz.ch

Power Electronics

Workshop 2016

Outline

► Introduction ► Multi-Objective Optimization Approach ► Optimization Application Examples ► Summary

D. Bortis R. Bosshard

R. Burkart Acknowledgement F. Krismer

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Introduction

Power Electronics Performance Trends Power Converter Design Challenge

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► Power Electronics Converters Performance Trends

─ Power Density [kW/dm3] ─ Power per Unit Weight [kW/kg] ─ Relative Costs [kW/$] ─ Relative Losses [%] ─ Failure Rate [h-1]

■ Performance Indices

[kgFe /kW] [kgCu /kW] [kgAl /kW] [cm2

Si /kW]

►

►

Environmental Impact…

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► Performance Improvements (1)

─ Telecom Power Supply Modules: Typ. Factor 2 over 10 Years

■ Power Density

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► Performance Improvements (2)

Inefficiency (Losses)…

■ Efficiency

─ PV Inverters: Typ. Loss Red. of Typ. Factor 2 over 5…10 Years

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► Multi-Objective Design Challenge (1)

■ Performances are Approaching Physical Limits (e.g. Efficiency) ■ Counteracting Effects of Key Design Parameters ■ Mutual Coupling of Performance Indices - Trade-Offs

Large Number of Degrees of Freedom / Multi-Dimensional Design Space Full Utilization of Design Space only Guaranteed by Multi-Objective Optimization

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Large Number of Degrees of Freedom / Multi-Dimensional Design Space Full Utilization of Design Space only Guaranteed by Multi-Objective Optimization

► Multi-Objective Design Challenge (2)

■ Performances are Approaching Physical Limits (e.g. Efficiency) ■ Counteracting Effects of Key Design Parameters ■ Mutual Coupling of Performance Indices - Trade-Offs

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■ Specific Performance Profiles / Trade-Offs Dependent on Application

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► Multi-Objective Design Challenge (3)

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► Visualization of Multiple Performances

H. Chernoff / Stanford: “The Use of Faces to Represent Points in K-Dimensional Space Graphically”

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■ Spider Charts, etc. ■ Chernoff-Faces ;-)

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Multi-Objective

Optimization

Abstraction of Converter Design Design Space / Performance Space Pareto Front Sensitivities / Trade-Offs

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Mapping of “Design Space” into System “Performance Space”

Performance Space

Design Space

► Abstraction of Power Converter Design

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► Mathematical Modeling of the Converter Design

Multi-Objective Optimization – Best Utilization of All Degrees of Freedom

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► Multi-Objective Optimization (1)

■ Ensures Optimal Mapping of the “Design Space” into the “Performance Space” ■ Identifies Absolute Performance Limits Pareto Front / Surface

Clarifies Sensitivity to Improvements of Technologies Trade-off Analysis

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► Multi-Objective Optimization (2)

■ Design Space Diversity ■ Equal Performance for Largely Different Sets of Design Parameters

E.g. Mutual Compensation of Volume and Loss Contributions (e.g. Cond. & Sw. Losses) Allows Optimization for Further Performance Index (e.g. Costs)

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► Converter Performance Evaluation Based on η-ρ-σ-Pareto Surface

■ Definition of a Power Electronics “Technology Node” (η*,ρ*,σ*,fP*) ■ Maximum σ [kW/$], Related Efficiency & Power Density

►

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Specifying Only a Single Performance Index is of No Value (!) Achievable Perform. Depends on Conv. Type / Specs (e.g. Volt. Range) / Side Cond. (e.g. Cooling)

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Multi-Objective

Optimization Application Examples

Comparative Converter Evaluation Impact of Technology Progress Design Space Diversity

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Comparative Converter Evaluation

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► Wide Input Voltage Range Isolated DC/DC Converter

─ Bidirectional Power Flow ─ Galvanic Isolation ─ Wide Voltage Range ─ High Partial Load Efficiency

■ Universal Isolated DC/DC Converter

►

Structure of “Smart Home“ DC Microgrid

►

Universal DC/DC Converter

─ Reduced System Complexity ─ Lower Overall Development Costs ─ Economies of Scale

■ Advantages

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► Comparative Evaluation of Converter Topologies

■ Conv. 3-Level Dual Active Bridge (3L-DAB)

■ Advanced 5-Level Dual Active Bridge (5L-DAB)

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► Optimization Results - Pareto Surfaces

■ 3-Level Dual Active Bridge ■ 5-Level Dual Active Bridge

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Impact of Technology Progress & Design Space Diversity

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■ Design / Build the 2kW 1-Φ Solar Inverter with the Highest Power Density in the World ■ Power Density > 3kW/dm3 (50W/in3) ■ Efficiency > 95% ■ Case Temp. < 60°C ■ EMI FCC Part 15 B

Push the Forefront of New Technologies in R&D of High Power Density Inverters

!

!

!

!

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Selected Converter Topology

ZVS of All Bridge Legs @ Turn-On/Turn-Off in Whole Operating Range (4D-TCM-Interleaving) Heatsinks Connected to DC Bus / Shield to Prevent Cap. Coupling to Grounded Enclosure

■ Interleaving of 2 Bridge Legs per Phase ■ Active DC-Side Buck-Type Power Pulsation Buffer ■ 2-Stage EMI AC Output Filter

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Little-Box 1.0 Prototype

– 8.2 kW/dm3 – 96,3% Efficiency @ 2kW – Tc=58°C @ 2kW

■ Performance

Analysis of Potential Performance Improvement for Ideal Switches

– 600V IFX Normally-Off GaN GIT – Antiparallel SiC Schottky Diodes – Multi-Airgap Ind. w. Multi-Layer Foil Wdg – Triangular Curr. Mode ZVS Operation – CeraLink Power Pulsation Buffer

■ Design Details

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Analysis of Improvement of Efficiency @ Given Power Density & Maximum Power Density The Ideal Switch is NOT Enough (!)

Little Box 1.0 @ Ideal Switches (TCM) ● Multi-Objective Optimization of Little-Box 1.0 (X6S Power Pulsation Buffer) ● Step-by-Step Idealization of the Power Transistors ● Ideal Switches: kC= 0 (Zero Cond. Losses); kS= 0 (Zero Sw. Losses)

Zero Output Cap. and Zero Gate Drive Losses

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Little Box 1.0 @ Ideal Switches (PWM)

■ L & fS are Independent Degrees of Freedom ■ Large Design Space Diversity (Mutual Compensation of HF and LF Loss Contributions)

ρ = 6kW/dm3

η ≈ 99.35% L = 50uH fS = 500kHz or 900kHz

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Summary

Future Developments/Design Process Future Research Topics Power Electronics 2.0 Appendix

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► Future Developments

More Application Specific Solutions Mature Technology – Cost Optimization @ Given Performance Level Design / Optimize / Verify (in Simulation) - Cheaper / Faster / Better

■ Megatrends – Renewable Energy / Energy Saving / E-Mobility / “SMART” XXX ■ Power Electronics will Massively Spread in Applications

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Multi-Domain Modeling /

Simulation/ Optimization

Hardware Prototyping

20%

80%

2015

2025

80%

20%

► Future Design Process

■ Main Challenges: Modeling (EMI, etc.) & Implementation in Industry

Reduces Time-to-Market - Cheaper / Faster / Better Allows to Understand Mutual Dependencies of Performances / Sensitivities (!) Simulate What Cannot Any More be Measured (High Integration Level)

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Power MOSFETs/IGBTs Microelectronics

Circuit Topologies Modulation Concepts

Control Concepts

Super-Junct. Techn. / WBG Digital Power

Modeling & Simulation

2025 2015

► ►

► ►

SCRs / Diodes Solid-State Devices

► Power Electronics Technology S-Curve

“Passives” + η-ρ-σ-Design

+ Adv. Packaging + Systems

Paradigm Shift

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■

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► Summary

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■ Advantages – Design / Optimize / Verify - All in Simulation – Provide a Fully Virtual Design for Fully Automated Manufacturing

– Reduce Design Period from Weeks to Hours (Factor >100) – Directly Build Systems from Optimiz. Results (3D Printing etc.) – Pre-Analyze Improvement by New Technologies (“Research Efficiency”) – Optimize over Extreme Span (Semicond. Doping to Conv. Mission Profile) – Free Adjustment of Optimization Criteria (Design on Demand) ■ Research Topics – Reduced Order Models / Model Accuracy – Opt. Combination of Analytical & FEM Models – Partitioning of Optimiz. (Local/Global Variables & Optimiz. etc.) – Selection of Abstraction Level / Timescale / – Translation of Geometries into Model Parameters (e.g. EMI) – Consideration of Geometric Limitations (Design for Manufact.) – New Models for Highly Integr. Converters (Strong EM & Therm. Coupl.) – Convergence of Simulations & Measurements (Autom. Param. Adj.) – Visualization of Optim. Results / Interfaces (Programming & Results) ■ Challenges – Introduction in Industry (and Academia ;-)) – Company-Wide Updates / Maintenance – Integration in “Virtual Prototyping” Environment

■ Limitations – Simulation Extends the Knowledge Space … But,… Cannot Create Fundamentally New Concepts (!)

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Future Paradigm

Shift

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■ Design Considering Converters as “Integrated Circuits” (PEBBs) ■ Extend Analysis to Converter Clusters / Power Supply Chains / etc.

─ “Converter” “Systems” (Microgrid) or “Hybrid Systems” (Automation / Aircraft) ─ “Time” “Integral over Time” ─ “Power” “Energy”

─ Power Conversion Energy Management / Distribution ─ Converter Analysis System Analysis (incl. Interactions Conv. / Conv. or Load or Mains) ─ Converter Stability System Stability (Autonom. Cntrl of Distributed Converters) ─ Cap. Filtering Energy Storage & Demand Side Management ─ Costs / Efficiency Life Cycle Costs / Mission Efficiency / Supply Chain Efficiency ─ etc.

► Power Electronics 2.0

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► New Power Electronics Systems Performance Figures/Trends

─ Power Density [kW/m2] ─ Environm. Impact [kWs/kW] ─ TCO [$/kW] ─ Mission Efficiency [%] ─ Failure Rate [h-1]

■ Complete Set of New Performance Indices

►

►

Supply Chain &

►

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Thank You !

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Appendix #1

Determination of the η- ρ- Pareto Front

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► Determination of the η-ρ- Pareto Front (1)

─ Core Geometry / Material ─ Single / Multiple Airgaps ─ Solid / Litz Wire, Foils ─ Winding Topology ─ Natural / Forced Conv. Cooling ─ Hard-/Soft-Switching ─ Si / SiC ─ etc. ─ etc. ─ etc.

─ Circuit Topology ─ Modulation Scheme ─ etc. ─ etc. ─ etc.

■ System-Level Degrees of Freedom

■ Comp.-Level Degrees of Freedom of the Design

■ Only η-ρ-Pareto Front Allows Comprehensive Comparison of Converter Concepts (!)

A – 1.1

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■ Specific Design Only fP as Variable Design Parameter

fP =100kHz

“Pareto Front”

A – 1.2

► Determination of the η-ρ- Pareto Front (1)

■ Only the Consideration of All Possible Designs / Degrees of Freedom Clarifies the Absolute η-ρ-Performance Limit

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Appendix #2

Performance & Life-Cycle-Costs of SiC vs. Si

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─ Single-Input/Single-MPP-Tracker Multi-String PV Converter ─ DC/DC Boost Converter for Wide MPP Voltage Range ─ Output EMI Filter ─ Typical Residential Application

Exploit Excellent Hard- AND Soft-Switching Capabilities of SiC Find Useful Switching Frequency and Current Ripple Ranges Find Appropriate Core Material

► Multi-Objective η-ρ-σ- Comparison of Si vs. SiC

■ Three-Phase PV Inverter System

A – 2.1

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A – 2.2

■ Si IGBT 2L-PWM Inverter

► Topologies - Converter Stages

■ SiC MOSFET Interleaved 2L-TCM Inverter

■ SiC MOSFET 2L-PWM Inverter

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► Optimization Results - Pareto Surfaces

─ No Pareto-Optimal Designs for fsw,min> 60 kHz ─ No METGLAS Amorphous Iron Designs

─ Pareto-Optimal Designs for Entire Considered fsw Range ─ No METGLAS Amorphous Iron Designs

─ Pareto-Optimal Designs for Entire Considered fsw Range ─ METGLAS Amorphous Iron and Ferrite Designs

A – 2.3

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A – 2.4

► Optimization Results – Investigations Along Pareto Surfaces

η ρ σ

• 2L-TCM

• 2L-PWM

• 3L-PWM

Semiconductor Losses Clearly Dominating (35…70%)

■ Comparison of the Inverter Concepts

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► Extension to Life-Cycle Cost (LCC) Analysis

Which is the Best Solution Weighting , , σ, e.g. in Form of Life-Cycle Costs (LCC)? How Much Better is the Best Design? Optimal Switching Frequency?

■ Performance Space Analysis

─ 3 Performance Measures: , , σ ─ Reveals Absolute Performance Limits / Trade-Offs Between Performances

■ LCC Analysis

─ Post-Processing of Pareto-Optimal Designs ─ Determination of Min.-LCC Design ─ Arbitrary Cost Function Possible

A – 2.5

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► Post-Processing

─ 22% Lower LCC than 3L-PWM ─ 5% Lower LCC than 2L-TCM ─ Simplest Design ─ Probably Highest Reliability ─ Lower Vol. (Housing) Not Yet Considered!

■ Best System - 2L-PWM SiC Converter @ 44kHz & 50% Ripple

■ LCC – Analysis

A – 2.6

Application of SiC Justified on “System Level”

►

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■ End