Multi-standard Receiver Baseband Chain Using Digitally Programmable Ota Based on Ccii and Current Division Networks

MULTI-STANDARD RECEIVER BASEBAND CHAIN

USING DIGITALLY PROGRAMMABLE OTA BASED

ON CCII AND CURRENT DIVISION NETWORKS¤

SOLIMAN A. MAHMOUD

Electrical and Computer Engineering Department,

Sharjah University, Sharjah University City Sharjah, Postcode 27272, UAE

Electrical Engineering Deptartment,

Fayoum University, Fayoum, Egypt

[email protected]

[email protected]

EMAN A. SOLIMAN

Electrical and Electronics Engineering Department,German University in Cairo,

Cairo, Postcode 11835, Egypt

[email protected]

Received 31 July 2012

Accepted 26 November 2012

Published 18 March 2013

In this paper, a digitally programmable OTA-based multi-standard receiver baseband chain is

presented. The multi-standard receiver baseband chain consists of two programmable gain

ampli¯ers (PGA1 and PGA2) and a fourth-order LPF. The receiver is suitable for Bluetooth/

UMTS/DVB-H/WLAN standards. Three di®erent programmable OTA architectures based onsecond generation current conveyors (CCIIs) and Current Division Networks (CDNs) are dis-

cussed. The programmable OTA with the lowest power consumption, moderate area and good

linearity — better than �50 dB HD3 — is selected to realize the multi-standard basebandreceiver chain. The power consumption of the receiver chain is 6mW. The DC gain varies over a

68 dB range with 1MHz to 13.6MHz programmable bandwidth. The receiver baseband chain is

realized using 90 nm CMOS technology model under �0.5V voltage supply.

Keywords: Baseband; bluetooth; current conveyor; current division network; digital program-

ming; DVB-H; programmable gain ampli¯er; UMTS; WLAN.

1. Introduction

Multi-standard communication systems have drawn the attention of researchers over

the past years.1�4 Di®erent wireless communication standards were de¯ned such as

*This paper was recommended by Regional Editor Piero Malcovati.

Journal of Circuits, Systems, and ComputersVol. 22, No. 4 (2013) 1350019 (20 pages)

#.c World Scienti¯c Publishing Company

DOI: 10.1142/S0218126613500199

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http://dx.doi.org/10.1142/S0218126613500199

Bluetooth (BT), Universal Mobile Telecommunication Systems (UMTS), Digital

Video Broadcasting-Handheld (DVB-H) and Wireless Local Area Network

(WLAN). These standards are protocols for data transfer through voice/data net-

works using single mobile device. Thus, the need of recon¯gurable hardware suitable

for operating for all these standards became a must.4

The architecture of a multi-standard receiver is shown in Fig. 1, the system

consists of RF section followed by an analog baseband section. This work focuses on

the implementation of the analog baseband section. This analog baseband chain

consists of two Programmable Gain Ampli¯ers (PGA1 and PGA2) and a fourth-

order LPF. The authors in Refs. 1�4 used open loop and closed loop Active-Gm-RC

circuits to realize the baseband chain. The programmability of the PGAs DC

gain was achieved using resistor/capacitor arrays, while the ¯lter's bandwidth

programmability was achieved using external hardware circuit to adjust the trans-

conductance gain of the Gm cells used. These programming schemes are complicated

as they are subjected to process variation problems. In addition; overhead hardware

was used to program the baseband section.

In this paper, a multi-standard analog receiver baseband chain based on pro-

grammable Operational Transconductor Ampli¯er (OTA) is proposed. The base-

band chain can be used for BT/UMTS/DVB-H/WLAN standards. The baseband

chain consists of two PGAs and a fourth-order LPF. Three proposed programmable

OTAs are given based on second generation current conveyors (CCIIs) and three-bit

MOS ladder CDN.

The paper is organized as follows: Sec. 2 presents three proposed programmable

OTAs using CCIIs and CDNs with detailed comparison between them, Secs. 3 and 4

contain the receiver baseband chain PGA and LPF architecture, respectively. The

complete receiver baseband chain simulation result is given in Sec. 5; a detailed

comparison between this work and previous work is given throughout the paper

sections.

Fig. 1. Complete multi-standard receiver architecture.

S. A. Mahmoud & E. A. Soliman

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http://www.worldscientific.com/action/showImage?doi=10.1142/S0218126613500199&iName=master.img-001.jpg&w=359&h=139

2. Programmable CCII Based OTAs

OTA is a versatile active circuit that can be used to realize di®erent high frequency

analog signal processing applications. The OTA converts the input voltage to a

linearly proportional output current with trans-conductance gain `Gm'. The input

and output impedance of the OTA ideally tends to in¯nity. The main concern while

designing an OTA is the linearity of the circuit.5�10 In this section three program-

mable OTAs are proposed using CCIIs and CDNs. The proposed OTAs are discussed

in detail below.

2.1. First OTA realization

The OTA in Fig. 2 consists of two CCIIs and two CDNs. The CCII is a voltage/

current mode active circuit with three terminals named Y, X and Z.11 The Y and Z

terminals are high impedance terminals; while the X terminal is a low impedance

terminal. The voltage applied at Y terminal is conveyed to the X terminal. Also, the

X terminal's input current is conveyed to the Z terminal. As for the CDN in Ref. 12;

the circuit is basically a digitally programmable resistor. The CDN input voltage is

converted to a linear current using a binary weighted MOS resistor using the fol-

lowing equation:

Vin

Iin¼ Req ffi

1

��ðVG � VT Þ; ð1Þ

where �, VG and VT are the trans-conductance parameter, gate voltage and threshold

voltage of the MOS transistor used in the CDN, respectively.

Fig. 2. First realization of programmable OTA.

Multi-Standard Receiver Baseband Chain Using Digitally Programmable OTA

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The parameter `�' is a digitally controlled programmable factor that ranges from

0 to 1. The previous equation is valid only if the potential of the CDN output node is

ground. In Fig. 2, the ¯rst CCII is used to realize high input impedance at the OTA

input terminal by bu®ering the input voltage. Then; the OTA's input voltage is

converted to a linear programmable current through the CDN. The equivalent re-

sistance of the CDN is equivalent to that of a MOS transistor operating in linear

region as given by Eq. (1).

However; in order for the CDN to work adequately another CCII is used to force

the potential of the CDN's output node to be ground. Also, the second CCII conveys

the CDN output current to a high output impedance terminal. The output current

of the proposed OTA in Fig. 2 is given by:

Iod ¼ Iodþ � Iod� ¼ 1

Req

Vin : ð2Þ

This proposed OTA trans-conductance gain is dependent on the MOS transistor's

process parameters, which will make the OTA highly sensitive to process and tem-

perature variations. In addition, if the MOS is driven out of the linear region, then

the OTA's linearity will be degraded signi¯cantly.

2.2. Second OTA realization

The second realization of the programmable OTA is shown in Fig. 3. The input

voltage is ¯rst bu®ered using a CCII. Then, the input voltage is converted to a linear

current using the passive resistance `R'. One terminal of `R' is connected to the input

voltage while the other terminal is connected to a CCII-based bu®er. This connection

is used to ¯x the potential at one terminal of the passive resistor `R' to ground. Thus,

Fig. 3. Second realization of programmable OTA.


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the current at the second CCII's X terminal is given by:

Ix ¼ Ixþ � Ix� ¼ 1

RVin : ð3Þ

The second CCII conveys the current Ìx' to the Z terminal. So far a linear OTA is

realized, in order to program the OTA's output current a CDN at the second CCII's

Z terminal is introduced. Here the CDN is not used as a programmable resistor, it is

used as a programmable current ampli¯er. The CDN's input current is scaled using

the factor `�' and `1� �' at the X terminal of the third CCII.12 The CDN here

consists of two parallel resistors that divide the current between them according to

their equivalent resistances ratios. In order for the input current to be divided with

the previously stated ratios the CDN's output nodes potentials must be ground.

Thus, a third CCII is used to satisfy the virtual ground condition and to convey the

scaled current to a high impedance terminal. The di®erential output current of the

second proposed OTA is given by:

Iod ¼ �

RVin : ð4Þ

This proposed OTA avoids the disadvantages of the ¯rst realization due to the fact

that the OTA's trans-conductance gain depends on a passive resistor instead of a

MOS resistor, thus its linearity is better. However, an additional CCII is used in this

design which will increase the OTAs' area and power consumption.

2.3. Third OTA realization

The advantage of the ¯rst realization is the low area and power consumption and

that of the second realization is the high linearity. A third proposed OTA that

combines the advantages of the two previous realizations is given in Fig. 4. A pro-

grammable OTA can be realized using a CCII while connecting a resistive load `R' at

its X terminal and a CDN in cascade. However, the CDN output nodes potential

must be ground to operate adequately. Thus, another CCII is used for that purpose

as shown in Fig. 4. The relation between the di®erential input voltage and output

current for this realization is the same as the previous one given by Eq. (4). The input

impedance of the circuit is in¯nity and its output impedance is high. The linearity of

this OTA should be the same as the second realization, yet the area and power

consumption of this OTA is the same as the ¯rst one.

2.4. Noise analysis for the proposed OTAs

The three proposed OTAs noise analysis is examined in this sub-section. The noise

analysis of the OTAs depends on the used circuits of the CCII and the CDN. The

circuit of the CCII used in Refs. 13 and 14 is simply a voltage bu®er and thus the

value of its output noise spectral density is the same as its input noise spectral


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density of the circuit. The CCII was realized using a di®erential ampli¯er with active

loads. Thus, the output noise spectral density of the CCII circuit can be given by:

�v 2on ¼ �v 2

in ¼X

4KT�1

gmi

þ M

WiLiCoxf

� �; ð5Þ

where K is Boltzmann constant, T absolute temperature in Kelvin, gmi is the ith

transistor trans-conductance gain, Wi is the ith transistor channel width, Li is the

ith transistor channel length, f is the operating frequency, M and � are process-

dependant constants.

The ¯rst term in Eq. (5) stands for the thermal noise while the second one is the

°icker noise. For simplicity, only the basic di®erential ampli¯er noise is considered.

Since the CDN operates as a programmable current ampli¯er and it consists of

linear MOS transistors, its equivalent input voltage noise spectral density is given by

the following:

�v 2in ¼ 4KTReq : ð6Þ

The CDN voltage noise spectral density is inversely proportional with `�' because as

the amount of current °owing through the network increases the `Req' of the CDN

will decrease. This will decrease the thermal noise as shown in Eq. (6). The voltage

current spectral density can be converted to a current source by scaling the voltage

source with `R�2eq '.

Fig. 4. Third realization of programmable OTA in Ref. 13.


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Consider the ¯rst proposed OTA, the input noise spectral density of the OTA

should be the summation of the input noise spectral density of two CCII and two

CDNs. However, since the CDN input node is connected to a CCII X terminal whose

equivalent resistance is low, then the CDN input resistance is zero and thus the

equivalent input voltage noise spectral density is shorted and it can be neglected.

Thus, the equivalent input noise spectral density of the ¯rst proposed OTA is

given by:

�v 2in ¼ 2

X4KT�

1

gmi

þ M

WiLiCoxf

� �: ð7Þ

As for the second proposed OTA, the noise of three CCIIs, two CDNs are included.

However, two passive resistors are used and consequently their thermal noise must be

added such that the second OTA input referred noise density is:

�v 2in ¼ 3

X4KT�

1

gmi

þ M

WiLiCoxf

� �þ 8KTRþ 8KT�

1ffiffiffiffiffiffiffiffiffiffiffiffiffiffi2��ID

p ; ð8Þ

where ÌD' is the DC current °owing in the CDNs.

Consider the third proposed OTA, the input referred noise density of the circuit

will be the summation of those two CCIIs, two CDNs and two passive resistors. The

equivalent input referred noise density will be given by:

�v 2in ¼ 2

X4KT�

1

gmi

þ M

WiLiCoxf

� �þ 8KT�

1ffiffiffiffiffiffiffiffiffiffiffiffiffiffi2��ID

p þ 8KTR : ð9Þ

Thus, the ¯rst proposed OTA will have almost constant input noise spectral density

and it is expected to have the lowest input noise spectral density among the three

OTAs. As for the second and third OTAs, their input voltage spectral density is

expected to be inversely proportional to `p�'.

2.5. CMOS circuit realization

The CCII circuit CMOS realization is shown in Fig. 5. The CCIIþ can be realized

using a voltage bu®er and a current bu®er.14 The circuit realization is based on the

use of a fully di®erential bu®er to convey the di®erential voltage of Y terminal to the

X terminal. The bu®er consists of two matched di®erential ampli¯ers (Das) formed

with transistors M1-M2 and M3-M4. The two DAs are biased using equal current

sources formed with M7 and M8. The drains of M2 and M3 are connected to constant

current sources M5-M6 instead of current mirrors as in Ref. 14. This will force the

currents of the DAs to have the same common and di®erential values and conse-

quently the gate voltages of the DAs are equal.

The current conveying action is obtained using two class AB push-pull output

stages formed from transistors M11-M12, M15-M16, M20-M21 and M22-M23. The

standby current of the output stage is controlled using the circuit formed from


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transistors M9, M10, M13, M14 and M17-M19. A passive compensation circuit can

be used if needed. A common mode feedback (CMFB) circuit is used to adjust the

voltage common mode value at the Z terminal.

A three-bit MOS ladder CDN is shown in Fig. 6.12 Each current division cell

(CDC) consists of four NMOS transistors, two acts as a switch and two acts as

resistors. The CDN is designed such that it has two branches of equal resistance at

any CDC input. Thus the CDC divides the input current into two equal halves one is

either directed to the ¯rst or the second output current branch depending on the

value of the digital control bit à' while the other half is directed to the next CDC.

Fig. 6. Three-bit CDN CMOS realization in Ref. 12.

Fig. 5. CCII CMOS realization in Ref. 14.


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The CDCs of the MOS ladder CDN must be all matched in order to have equal

resistance values at every branch. Also this CDN will not work properly unless the

output nodes voltage is ground.

2.6. Simulation results

The three proposed OTAs are simulated respectively. First, the CCII shown in Fig. 5

and the CDN shown in Fig. 6 are redesigned using 90 nm CMOS technology model

under supply voltage of �0.5V. The voltage and current conveying action of the

CCII is achieved over the range of �0.2V and �200�A, respectively. The standby

power consumption of the CCII is 0.3mW. The 3-dB bandwidth of the voltage

and current following transfer function is 340MHz and 540MHz, respectively. The

o®set voltage at X terminal is less than 10mV and its ¯nite output resistance is less

than 49�.

The OTAs DC analysis is performed while using `R' at 3 k� for the second and

third OTAs and under short circuit loading condition. The DC analysis for the three

OTAs is shown in Figs. 7�9, respectively. The standby DC power consumption of

the ¯rst and third one is 0.6mW while its value is 0.9mW for the second one.

The magnitude response of the OTAs' trans-conductance gains are shown in

Figs. 10�12 for the three OTAs in order. The 3-dB frequency is almost constant

versus `�' with values 39MHz and 40MHz for the second and third OTA, respec-

tively; while it is varying from 50 to 26MHz for the ¯rst OTA.

The temperature e®ect on the OTAs is examined as shown in Fig. 13 as the

temperature varies from 10�C to 40�C. The second and third OTA currents change

−0.2 −0.15 −0.1 −0.05 0 0.05 0.1 0.15 0.20

0.5

1

1.5

2

2.5

3x 10

−3

Vin [V]

Gm

[A

/V]

0.1250.250.3750.50.6250.750.875

Fig. 7. First programmable OTA's DC analysis simulation result.


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with the temperature and with `�' from 200 fA to 85 fA at values 0.125 and 0.875,

respectively. As for the ¯rst OTA, the temperature variation e®ect is constant with

respect to `�' and the maximum current change is 234 fA and it shows to be the most

sensitive one with respect to temperature variations.

Mismatching and process variation e®ects are studied for the three proposed

OTAs with 20% mismatching error. The output current variation at the maximum

−0.2 −0.15 −0.1 −0.05 0 0.05 0.1 0.15 0.20

0.5

1

1.5

2

2.5

3x 10

−4

Vin [V]

Gm

[A

/V]

0.1250.250.3750.50.6250.750.875

Fig. 8. Second programmable OTA's DC analysis simulation result.

−0.25 −0.2 −0.15 −0.1 −0.05 0 0.05 0.1 0.15 0.2 0.250

0.5

1

1.5

2

2.5

3

x 10−4

Vin [V]

Gm

[A

/V]

0.1250.250.3750.50.6250.750.875

Fig. 9. Third programmable OTA's DC analysis simulation result.


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trans-conductance gain is examined. The results are shown in Figs. 14�16. The ¯rst

and second OTA have the highest and lowest errors, respectively. This is attributed

to the fact that the voltage to current conversion of the ¯rst OTA depends on the

equivalent resistance of a MOS transistor while a passive resistor is used for the

second OTA; thus any variation in the MOS aspect ratio will a®ect the ¯rst OTA's

output current signi¯cantly.

100

101

102

103

104

105

106

107

108

109

−100

−95

−90

−85

−80

−75

−70

−65

−60

−55

−50

Frequency [Hz]

Gm

[dB

(A

/V)]

0.1250.250.3750.50.6250.750.825

Fig. 10. First programmable OTA's AC analysis magnitude response.

100

101

102

103

104

105

106

107

108

109

−140

−130

−120

−110

−100

−90

−80

−70

Frequency [Hz]

Gm

[dB

(A

/V)]

0.1250.250.3750.50.6250.750.825

Fig. 11. Second programmable OTA's AC analysis magnitude response.


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Table 1 contains the simulation results of the three proposed OTAs. The trans-

conductance gain, the third-order harmonic distortion at input voltage signal of

200mV amplitude with 1MHz frequency, input and output spectral noise density at

10MHz frequency are included in Table 1. A ¯gure of merit (FOM) for the proposed

OTAs is de¯ned as follows:

FOM ¼ f3-dB � jHD3jPower�Output noise

; ð10Þ

100

101

102

103

104

105

106

107

108

109

−140

−130

−120

−110

−100

−90

−80

−70

−60

Frequency [Hz]

Gm

[dB

(A

/V)]

0.1250.250.3750.50.6250.750.825

Fig. 12. Third programmable OTA's AC analysis magnitude response.

10 15 20 25 30 35 40−2.4

−2.2

−2

−1.8

−1.6

−1.4

−1.2

−1

−0.8x 10

−13

Temperature [C]

Iod

[A]

0.1250.250.3750.50.6250.750.875First

Fig. 13. Temperature e®ect on the programmable OTAs output current.


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where f3-dB is the 3-dB bandwidth in [MHz], HD3 is the third-order harmonic dis-

tortion in [dB], Power is the standby DC power consumption in [mW] and Out-

put noise is the output noise spectral density in [nV/pHz].

The third proposed OTA will have the highest average FOM among the three

OTAs for di®erent values of `�'. The third proposed OTA is used to realize a multi-

standard receiver baseband chain in the following section.

100

101

102

103

104

105

106

107

108

0

0.5

1

1.5

2

2.5

3

3.5x 10

−3

Frequency [Hz]

Iod

[A]

Fig. 14. Monte-Carlo simulation for the output current of the First OTA.

100

101

102

103

104

105

106

107

108

−1

−0.5

0

0.5

1

1.5

2

2.5

3x 10

−4

Frequency [Hz]

Iod

[A]

Fig. 15. Monte-Carlo simulation for the output current of the Second OTA.


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Table 1. Simulation results of the proposed OTAs.

Code word

Parameter `001' `010' `011' `100' `101' `110' `111'

Voltage conveying range [mV] �200Standby power

consumption [mW]

First 0.6

Second 0.9

Third 0.6

Trans-conductanceGain [�A/V]

First 0.39e3 0.78e3 1.2e3 1.6e3 1.9e3 2.3e3 2.6e3Second 40.6 80.7 119 160 196 235 272

Third 48.8 97 143 192 235 283 327

3-dB Bandwidth

[MHz]

First 56.9 53.7 39.8 43 30.6 29 26.3

Second 45.2 46.8 39.4 52.5 39.4 49 49.5

Third 50 50 39 50 39 50 50

HD3 [dB] First �50.5 �50.2 �48.6 �46.2 �48.8 �46.8 �47.7Second �54.7 �53.9 �52.8 �52.1 �51.1 �52 �52.4

Third �51.6 �51.7 �51.8 �51.6 �51 �50.9 �51.3

Input referred noise

spectral density [nV/pHz]

First 53 52 63.5 50.7 83 84 160

Second 872 420 395 183 243 153 140

Third 750 355 334 146 201 121 110

Output referred noisespectral density [nV/pHz]

First 425 441 560 494 628 612 656Second 417 408 513 375 526 446 472

Third 454 440 550 394 556 463 486

FOM [Joule�1:5] First 11.3 10.2 5.8 6.7 4 3.7 3.2

Second 6.6 6.9 4. 8.1 4.3 6.3 6.1

Third 9.5 9.8 6.1 10.9 6 9.2 8.8

100

101

102

103

104

105

106

107

108

−1

−0.5

0

0.5

1

1.5

2

2.5

3

3.5

4x 10

−4

Frequency [Hz]

Iod

[A]

Fig. 16. Monte-Carlo simulation for the output current of the Third OTA.


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3. OTA-Based Programmable Gain Ampli¯er

The proposed PGA is shown in Fig. 17. The circuit consists of two OTAs and two

grounded resistors. The PGA gain should vary from 0 to 35 dB.1 Thus, two ampli¯ers

are connected in cascade to obtain the required gain. The ¯rst and secondPGAhas the

same architecture. The transfer function of thePGA is given by the following equation:

Vout

Vin

¼ Gm1Gm2R21 : ð11Þ

The PGA given in Fig. 17 is simulated. The value of `R1' is set to be 12 times

greater than `R'. The value of `R' for the second and third OTA-based PGA is

selected to be 0.5 k�. The simulation is done while setting equal values to `�1' and

`�2' while varying them from 0.125 to 0.875. The OTA-based PGA simulation result

is shown in Fig. 18. The PGAs' DC gain, third-order harmonic distortions at input

Fig. 17. Programmable OTA-based PGA.

100

101

102

103

104

105

106

107

108

109

−140

−120

−100

−80

−60

−40

−20

0

20

40

Frequency [Hz]

Vou

t/V

in [

dB]

0.1250.250.3750.50.6250.750.875

Fig. 18. Programmable OTA-based PGA simulation results.


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voltage signal of 5mV amplitude and 1MHz frequency and input referred noise

density at 10MHz is given in Table 2. Comparison between the proposed PGA and

the work in Ref. 2 is given in Table 3.

4. OTA-Based Programmable Filter

The fourth-order LPF used in the multi-standard receiver baseband chain is a cas-

caded ¯lter of two second-order OTA-based Tow-Thomas ¯lter.15 The second-order

Tow-Thomas ¯lter is shown in Fig. 19. The ¯lters' transfer function, and the second-

order ¯lter's cuto® frequency, quality factor and DC gain are given by Eqs. (12)�(15), respectively.

Vout

Vin

¼Gm1Gm2

C1C2

S 2 þ S1

R1C1

þ Gm2Gm3

C1C2

0BB@

1CCA ; ð12Þ

!o ¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiGm2Gm3

C1C2

s; ð13Þ

Q ¼ R1

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiGm2Gm3C1

C2

s; ð14Þ

Vout

Vin

��S¼0

¼ Gm1

Gm3

: ð15Þ

Table 3. Comparison between this PGA and previous work.

� Parameter � This work � Work in Ref. 2

Technology 90 nm 0.35�m

Voltage supply 1V 1.2V� DC gain �3.5 dB to 34.5 dB 0 dB to 39 dB

No. of control bits 6 10

Power consumption 1.2mW 0.36mW to 13.5mWInput referred noise density 36 nV/

pHz to 221 nV/

pHz 12 nV/

pHz to 40 nV/

pHz

Table 2. Programmable OTA-based PGA simulation results.

Code word

Parameter `001' `010' `011' `100' `101' `110' `111'

DC gain [dB] �3.5 12.9 17.8 25.6 28.7 31.9 34.5

HD3 [dB] �67.9 �61.3 �41.7 �55.9 �33.3 �46.1 �41.4

Input referred noise

spectral density [nV/pHz]

221 79.1 72 40.6 47.3 36.9 36


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As shown from the equations, the ¯lter's cuto® frequency can be programmed by

varying `Gm2' without a®ecting the ¯lter's DC gain. However, the quality factor of the

¯lter will vary with the cuto® frequency as well. Two cascaded ¯lters from the OTA-

based ¯lter given in Fig. 19 is simulated using the third proposedOTA.Themagnitude

response of the ¯lter is shown in Fig. 20. The value for `R1' is set to be equal to `R' and

Fig. 19. Programmable OTA-based Tow-Thomas ¯lter.

100

101

102

103

104

105

106

107

108

109

−450

−350

−250

−150

−50

50

Frequency [Hz]

Vou

t/V

in [

dB]

BTUMTSDVB−HWLAN

Fig. 20. Fourth-order programmable OTA-based LPF simulation result.


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`C2' is double the value of `C1'. The value of R is set to 2 k�. To cover all the cuto®

frequencies of the required standards two sets of capacitors are used. The ¯rst one for

BT/UMTS and the second set for DVB-H/WLAN. The value of `C1' is set to 5 pF and

2 pF for the BT/UMTS and DVB-H/WLAN standards, respectively.

Switching between the standards for the same capacitor set is done by varying

`�2' while `�1 and �3' are set to 0.875. Thus, the theoretical DC gain of the ¯lter is

0 dB for di®erent standards. The quality factor of the ¯lter varies with the value of

`�2'. The ¯lter simulation results are summarized in Table 4. The DC gain, cuto®

frequency, the output referred noise, third harmonic distortion and third-order inter-

modulation distortion at input voltage of 200mVpp amplitude with frequencies

0.9MHz and 0.8MHz for the LPF are given. Summary of the proposed LPF specs is

given in Table 5.

5. Multi-Standard Receiver Baseband Section

The complete multi-standard receiver baseband chain is simulated. The simulation

result is shown in Fig. 21. The power consumption of the receiver baseband chain is

6mW. Summary of the baseband section speci¯cations is given in Table 6. The DC

gain, third-order harmonic distortion at input voltage of 50�V amplitude at

0.9MHz, and the input referred noise at the cuto® frequency of the complete base-

band section are given in Table 6. The cuto® frequency is varied from 1MHz to

13.6MHz. The receiver baseband chain input referred noise density is minimal at the

highest gain settings. On the other hand, the third-order harmonic distortion of

the system is less than �51 dB for the lowest gain settings and less than �29 dB for

the highest gain settings.

Table 5. Summary of the proposed fourth-order LPF simulation results.

Parameter Simulation results using 90 nm technology and 1V supply voltage

Cuto® frequency 1MHz to 13.6MHz

No. of control bits 3Power consumption 3.6mW

Input referred noise density 2.6�V/pHz to 200 nV/

pHz

Table 4. Programmable OTA-based fourth-order LPF simulation results.

Standard

Parameter � BT � UMTS � DVB-H � WLAN

� Cuto® Frequency [MHz] 1 2 7 13.6

� DC Gain [dB] �12 �4.2 �4.2 �3

HD3 [dB] �44.9 �44.9 �46.2 �42.7

IM3 [dB] �35.4 �38.6 �44.6 �37.3Output Referred Noise [nV/

pHz] 418 350 245 255


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6. Conclusion

A multi-standard analog baseband receiver chain based on digitally programmable

OTAs is presented. The baseband chain is implemented using two programmable

ampli¯ers and a programmable baseband ¯lter and realized in 90 nm technology. The

programmable OTA is based on CCIIs and CDNs. Three di®erent architectures of

programmable OTAs are proposed, analyzed and compared. A FOM is de¯ned and

the OTA with the highest value is selected to build the receiver baseband chain. The

best OTA has a programmable 3-dB bandwidth ranging from 39MHz to 50MHz,

HD3 of about �50 dB, and input referred noise spectral density less than 0.75�V/pHz. The proposed programmable ampli¯ers has a gain ranging from �3.5 dB to

34.5 dB, HD3 less than �33 dB and input referred noise spectral density less than

0.22�V/pHz. The proposed programmable ¯lter has a cuto® frequency ranging from

1MHz to 13.6MHz, HD3 less than �42 dB and output referred noise spectral density

Table 6. Programmable OTA-based multi-standard receiver baseband chain simulation results.

Standard

BT UMTS DVB-H WLAN

Parameter Max Min Max Min Max Min Max Min

DC Gain [dB] 55.1 �13.1 63.2 �4.7 63.2 �4.6 64.4 �3

HD3 [dB] �42.1 �51.2 �31.7 �51.2 �30.9 �53.8 �29.8 �57.3

Input ReferredNoise [�V/

pHz]

0.051 3.26 0.042 1 0.036 0.925 0.036 0.594

100

101

102

103

104

105

106

107

108

109

−700

−600

−500

−400

−300

−200

−100

0

100

Frequency [Hz]

Vou

t/V

in [

dB]

BT−MaxBT−MinUMTS−MaxUMTS−MinDVB−MaxDVB−MinWLAN−MaxWLAN−Min

Fig. 21. Magnitude response of the proposed programmable OTA-based multi-standard receiver base-

band chain.


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less than 0.42�V/pHz. The total power consumption of the receiver baseband

chain is 6mW with tunable cuto® frequency ranges from 1MHz to 13.6MHz and DC

gain range of 68 dB. The input referred noise density of the receiver ranges from

42 nV/pHz to 1�V/

pHz.

References

1. S. D'Amico, A. Baschirotto, M. De Matteis, N. Ghittori, A. Vigna and P. Malcovati,A CMOS 5 nV

pHz 74-dB-gain-range 82-dB-DR multistandard baseband chain for

bluetooth, UMTS and WLAN, IEEE J. Solid-State Circuits 43 (2008) 1534�1541.2. S. D'Amico, V. Giannini and A. Baschirotto, A 4th-order active Gm-RC recon¯gurable

(UMTS/WLAN) ¯lter, IEEE J. Solid-State Circuits 41 (2006) 1630�1637.3. S. M. Fahmy, E. A. Soliman and S. A. Mahmoud, Sixth order baseband variable LPF

using new tunable operational ampli¯er, Int. Conf. Microelectronics (2009), pp. 34�37.4. S. A. Mahmoud, A gain/¯ltering interleaved baseband chain architectures for multi-

standard recon¯gurable receivers, J. Circuits, Syst. Comput. 21 (2012), 1250008.5. M. O. Shaker, S. A. Mahmoud and A. M. Soliman, New CMOS fully-di®erential trans-

conductor and application to fully-di®erential Gm-C ¯lters, ETRI J. 28 (2006) 175�181.6. S. Mahmoud, Digitally controlled CMOS balanced output transconductor and applica-

tion to variable gain ampli¯er and Gm-C ¯lter on ¯eld programmable analog array,J. Circuits, Syst. Comput. 14 (2005) 667�684.

7. S. A. Mahmoud and A. M. Soliman, New CMOS programmable balanced output trans-conductor and application to a mixed mode universal ¯lter suitable for VLSI, AnalogIntegr. Circuits Signal Process. 19 (1999) 241�254.

8. S. A. Mahmoud and A. M. Soliman, CMOS balanced output transconductor and appli-cations for analog VLSI, Microelectron. J. 30 (1999) 29�39.

9. S. A. Mahmoud and A. M. Soliman, New CMOS fully di®erential di®erence transcon-ductors and application to fully di®erential ¯lters for VLSI, Microelectron. J. 30 (1999)169�192.

10. S. A. Mahmoud and A. M. Soliman, A CMOS programmable balanced output trans-conductor for analog signal processing, Int. J. Electron. 82 (1997) 605�620.

11. A. Sedra and K. Smith, A second-generation current conveyor and its applications, IEEETrans. Circuit Theor. 17 (1970) 132�134.

12. K. Bult and G. Geelen, An inherently linear and compact MOST-only current divisiontechnique, IEEE J. Solid-State Circuits 27 (1992) 1730�1735.

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14. S. Mahmoud, M. Hashiesh and A. Soliman, Low-voltage digitally controlled fully di®er-ential current conveyor, IEEE Trans. Circuits Syst. I 52 (2005) 2055�2064.

15. J. Tow, Active RC ¯lters — a state space realization, Proc. IEEE (Lett.) 56 (1968)1137�1139.


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Documents

Multi-standard Receiver Baseband Chain Using Digitally Programmable Ota Based on Ccii and Current Division Networks