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DEPARTAMENTO DE AUTOMÁTICA, INGENIERÍA ELECTRÓNICA E
INFORMATICA INDUSTRIAL
ESCUELA TÉCNICA SUPERIOR DE INGENIEROS INDUSTRIALES
CENTRO DE ELECTRÓNICA INDUSTRIAL
Multiphase Design and Control Techniques
Applied to a Forward Micro-Inverter
TESIS DOCTORAL
Autor: David Meneses Herrera Ingeniero Industrial por la Universidad Politécnica de Madrid
Director: Óscar García Suárez Doctor Ingeniero Industrial por la Universidad Politécnica de Madrid
2015
Tribunal
Tribunal nombrado por el Mgfco. y Excmo. Sr. Rector de la Universidad Politécnica de Madrid, el día de de 2013.
Presidente:
Vocales:
Secretaria:
Suplentes:
Realizado el acto de lectura y defensa de la Tesis el día de de 2013 en la Escuela Técnica Superior de Ingenieros Industriales de la Universidad Politécnica de Madrid.
Calificación:
EL PRESIDENTE LOS VOCALES
EL SECRETARIO
Acknowledgement
Resumen en Español
En la última década la potencia instalada de energía solar fotovoltaica ha crecido
una media de un 49% anual y se espera que alcance el 16%del consumo
energético mundial en el año 2050. La mayor parte de estas instalaciones se
corresponden con sistemas conectados a la red eléctrica y un amplio porcentaje
de ellas son instalaciones domésticas o en edificios. En el mercado ya existen
diferentes arquitecturas para este tipo de instalaciones, entre las que se
encuentras los módulos AC.
Un módulo AC consiste en un inversor, también conocido como micro-inversor,
que se monta en la parte trasera de un panel o módulo fotovoltaico. Esta
tecnología ofrece modularidad, redundancia y la extracción de la máxima
potencia de cada panel solar de la instalación. Además, la expansión de esta
tecnología posibilitará una reducción de costes asociados a las economías de
escala y a la posibilidad de que el propio usuario pueda componer su propio
sistema. Sin embargo, el micro-inversor debe ser capaz de proporcionar una
ganancia de tensión adecuada para conectar el panel solar directamente a la red,
mientras mantiene un rendimiento aceptable en un amplio rango de potencias.
Asimismo, los estándares de conexión a red deber ser satisfechos y el tamaño y el
tiempo de vida del micro-inversor son factores que han de tenerse siempre en
cuenta.
En esta tesis se propone un micro-inversor derivado de la topología “forward”
controlado en el límite entre los modos de conducción continuo y discontinuo
(BCM por sus siglas en inglés). El transformador de la topología propuesta
mantiene la misma estructura que en el convertidor “forward” clásico y la
utilización de interruptores bidireccionales en el secundario permite la conexión
directa del inversor a la red. Asimismo el método de control elegido permite
obtener factor de potencia cercano a la unidad con una implementación sencilla.
En la tesis se presenta el principio de funcionamiento y los principales aspectos
del diseño del micro-inversor propuesto. Con la idea de mantener una solución
sencilla y de bajo coste, se ha seleccionado un controlador analógico que está
originalmente pensado para controlar un corrector del factor de potencia en el
mismo modo de conducción que el micro-inversor “forward”. La tesis presenta
las principales modificaciones necesarias, con especial atención a la detección del
cruce por cero de la corriente (ZCD por sus siglas en inglés) y la compatibilidad
del controlador con la inclusión de un algoritmo de búsqueda del punto de
máxima potencia (MPPT por sus siglas en inglés). Los resultados experimentales
muestran las limitaciones de la implementación elegida e identifican al
transformador como el principal contribuyente a las pérdidas del micro-inversor.
El principal objetivo de esta tesis es contribuir a la aplicación de técnicas de
control y diseño de sistemas multifase en micro-inversores fotovoltaicos. En esta
tesis se van a considerar dos configuraciones multifase diferentes aplicadas al
micro-inversor “forward” propuesto. La primera consiste en una variación con
conexión paralelo-serie que permite la utilización de transformadores con una
relación de vueltas baja, y por tanto bien acoplados, para conseguir una ganancia
de tensión adecuada con un mejor rendimiento. Esta configuración emplea el
mismo control BCM cuando la potencia extraída del panel solar es máxima. Este
método de control implica que la frecuencia de conmutación se incrementa
considerablemente cuando la potencia decrece, lo que compromete el
rendimiento. Por lo tanto y con la intención de mantener unos bueno niveles de
rendimiento ponderado, el micro-inversor funciona en modo de conducción
discontinuo (DCM, por sus siglas en inglés) cuando la potencia extraía del panel
solar es menor que la máxima.
La segunda configuración multifase considerada en esta tesis es la aplicación de
la técnica de paralelo con entrelazado. Además se han considerado dos técnicas
diferentes para decidir el número de fases activas: dependiendo de la potencia
continua extraída del panel solar y dependiendo de la potencia instantánea
demandada por el micro-inversor. La aplicación de estas técnicas es interesante
en los sistemas fotovoltaicos conectados a la red eléctrica por la posibilidad que
brindan de obtener un rendimiento prácticamente plano en un amplio rango de
potencia. Las configuraciones con entrelazado se controlan en DCM para evitar la
necesidad de un control de corriente, lo que es importante cuando el número de
fases es alto.
Los núcleos adecuados para todas las configuraciones multifase consideradas se
seleccionan usando el producto de áreas. Una vez seleccionados los núcleos se ha
realizado un diseño detallado de cada uno de los transformadores. Con la
información obtenida de los diseños y los resultados de simulación, se puede
analizar el impacto que el número de transformadores utilizados tiene en el
tamaño y el rendimiento de las distintas configuraciones. Los resultados de este
análisis, presentado en esta tesis, se utilizan posteriormente para comparar las
distintas configuraciones.
Muchas otras topologías se han presentado en la literatura para abordar los
diferentes aspectos a considerar en los micro-inversores, que han sido
presentados anteriormente. La mayoría de estas topologías utilizan un
transformador de alta frecuencia para solventar el salto de tensión y evitar
problemas de seguridad y de puesta a tierra. En cualquier caso, es interesante
evaluar si topologías sin aislamiento galvánico son aptas para su utilización
como micro-inversores. En esta tesis se presenta una revisión de inversores con
capacidad de elevar tensión, que se comparan bajo las mismas especificaciones.
El objetivo es proporcionar la información necesaria para valorar si estas
topologías son aplicables en los módulos AC.
Las principales contribuciones de esta tesis son:
La aplicación del control BCM a un convertidor “forward” para obtener un
micro-inversor de una etapa sencillo y de bajo coste.
La modificación de dicho micro-inversor con conexión paralelo-series de
transformadores que permite reducir la corriente de los semiconductores y
una ganancia de tensión adecuada con transformadores altamente
acoplados.
La aplicación de técnicas de entrelazado y decisión de apagado de fases en
la puesta en paralelo del micro-inversor “forward”.
El análisis y la comparación del efecto en el tamaño y el rendimiento del
incremento del número de transformadores en las diferentes
configuraciones multifase.
La eliminación de las medidas y los lazos de control de corriente en las
topologías multifase con la utilización del modo de conducción discontinuo
y un algoritmo MPPT sin necesidad de medida de corriente.
La recopilación y comparación bajo las mismas especificaciones de
topologías inversoras con capacidad de elevar tensión, que pueden ser
adecuadas para la utilización como micro-inversores.
Esta tesis está estructurada en seis capítulos. El capítulo 1 presenta el marco en
que se desarrolla la tesis así como el alcance de la misma. En el capítulo 2 se
recopilan las topologías existentes de micro-invesores con aislamiento y aquellas
sin aislamiento cuya implementación en un módulo AC es factible. Asimismo se
presenta la comparación entre estas topologías bajo las mismas especificaciones.
El capítulo 3 se centra en el micro-inversor “forward” que se propone
originalmente en esta tesis. La aplicación de las técnicas multifase se aborda en
los capítulos 4 y 5, en los que se presentan los análisis en función del número de
transformadores. El capítulo está orientado a la propuesta paralelo-serie mientras
que la configuración con entrelazado se analiza en el capítulo 5. Por último, en el
capítulo 6 se presentan las contribuciones de esta tesis y los trabajos futuros.
Abstract
In the last decade the photovoltaic (PV) installed power increased with an
average growth of 49% per year and it is expected to cover the 16% of the global
electricity consumption by 2050. Most of the installed PV power corresponds to
grid-connected systems, with a significant percentage of residential installations.
In these PV systems, the inverter is essential since it is the responsible of
transferring into the grid the extracted power from the PV modules. Several
architectures have been proposed for grid-connected residential PV systems,
including the AC-module technology.
An AC-module consists of an inverter, also known as micro-inverter, which is
attached to a PV module. The AC-module technology offers modularity,
redundancy and individual MPPT of each module. In addition, the expansion of
this technology will enable the possibility of economies of scale of mass market
and “plug and play” for the user, thus reducing the overall cost of the
installation. However, the micro-inverter must be able to provide the required
voltage boost to interface a low voltage PV module to the grid while keeping an
acceptable efficiency in a wide power range. Furthermore, the quality standards
must be satisfied and size and lifetime of the solutions must be always
considered.
In this thesis a single-stage forward micro-inverter with boundary mode
operation is proposed to address the micro-inverter requirements. The
transformer in the proposed topology remains as in the classic forward converter
and bidirectional switches in the secondary side allows direct connection to the
grid. In addition the selected control strategy allows high power factor current
with a simple implementation. The operation of the topology is presented and
the main design issues are introduced. With the intention to propose a simple
and low-cost solution, an analog controller for a PFC operated in boundary mode
is utilized. The main necessary modifications are discussed, with the focus on the
zero current detection (ZCD) and the compatibility of the controller with a MPPT
algorithm. The experimental results show the limitations of the selected analog
controller implementation and the transformer is identified as a main losses
contributor.
The main objective of this thesis is to contribute in the application of control and
design multiphase techniques to the PV micro-inverters. Two different
multiphase configurations have been applied to the forward micro-inverter
proposed in this thesis. The first one consists of a parallel-series connected
variation which enables the use of low turns ratio, i.e. well coupled, transformers
to achieve a proper voltage boost with an improved performance. This
multiphase configuration implements BCM control at maximum load however.
With this control method the switching frequency increases significantly for light
load operation, thus jeopardizing the efficiency. Therefore, in order to keep
acceptable weighted efficiency levels, DCM operation is selected for low power
conditions.
The second multiphase variation considered in this thesis is the interleaved
configuration with two different phase shedding techniques: depending on the
DC power extracted from the PV panel, and depending on the demanded
instantaneous power. The application of interleaving techniques is interesting in
PV grid-connected inverters for the possibility of flat efficiency behavior in a
wide power range. The interleaved variations of the proposed forward micro-
inverter are operated in DCM to avoid the current loop, which is important when
the number of phases is large.
The adequate transformer cores for all the multiphase configurations are selected
according to the area product parameter and a detailed design of each required
transformer is developed. With this information and simulation results, the
impact in size and efficiency of the number of transformer used can be assessed.
The considered multiphase topologies are compared in this thesis according to
the results of the introduced analysis.
Several other topological solutions have been proposed to solve the mentioned
concerns in AC-module application. The most of these solutions use a high
frequency transformer to boost the voltage and avoid grounding and safety
issues. However, it is of interest to assess if the non-isolated topologies are
suitable for AC-module application. In this thesis a review of transformerless
step-up inverters is presented. The compiled topologies are compared using a set
benchmark to provide the necessary information to assess whether non-isolated
topologies are suitable for AC-module application.
The main contributions of this thesis are:
The application of the boundary mode control with constant off-time to a
forward converter, to obtain a simple and low-cost single-stage forward
micro-inverter.
A modification of the forward micro-inverter with primary-parallel
secondary-series connected transformers to reduce the current stress and
improve the voltage gain with highly coupled transformers.
The application of the interleaved configuration with different phase
shedding strategies to the proposed forward micro-inverter.
An analysis and comparison of the influence in size and efficiency of
increasing the number of transformers in the parallel-series and interleaved
multiphase configurations.
Elimination of the current loop and current measurements in the
multiphase topologies by adopting DCM operation and a current
sensorless MPPT.
A compilation and comparison with the same specifications of suitable
non-isolated step-up inverters.
This thesis is organized in six chapters. In Chapter 1 the background of single-
phase PV-connected systems is discussed and the scope of the thesis is defined.
Chapter 2 compiles the existing solutions for isolated micro-inverters and
transformerless step-up inverters suitable for AC-module application. In
addition, the most convenient non-isolated inverters are compared using a
defined benchmark. Chapter 3 focuses on the originally proposed single-stage
forward micro-inverter. The application of multiphase techniques is addressed in
Chapter 4 and Chapter 5, and the impact in different parameters of increasing the
number of phases is analyzed. In Chapter 4 an original primary-parallel
secondary-series variation of the forward micro-inverter is presented, while
Chapter 5 focuses on the application of the interleaved configuration. Finally,
Chapter 6 discusses the contributions of the thesis and the future work.
I
Table of Contents
List of Tables ................................................................................................................... V
List of Figures .............................................................................................................. VII
List of Acronyms ......................................................................................................... XV
1. Introduction ........................................................................................................... 3
1.1. Grid Connected PV Systems ....................................................................... 4
1.1.1 Central Inverters ................................................................................................... 4
1.1.2 String and Multi-string Inverters ....................................................................... 5
1.1.3 Module equalizers ................................................................................................ 5
1.1.4 Distributed MPPT ................................................................................................. 6
1.1.5 Cell integrated converters (AC-cells) ................................................................. 8
1.2. AC-module requirements ............................................................................. 9
1.2.1 PV module characteristics ................................................................................... 9
1.2.2 Grid requirements .............................................................................................. 11
1.2.3 Power Decoupling .............................................................................................. 12
1.2.4 Conversion efficiency ......................................................................................... 13
1.3. Thesis scope and organization .................................................................. 14
2. Step-up Inverters for AC-Module Application ............................................. 19
2.1. Isolated Micro-Inverters ............................................................................. 19
2.1.1 Two-Stage Topologies ........................................................................................ 20
2.1.2 Pseudo DC-Link Topologies ............................................................................. 22
2.1.3 Single-Stage Topologies ..................................................................................... 24
2.1.4 Flyback Inverter .................................................................................................. 26
2.2. Step-up Transformerless Inverters ........................................................... 29
2.2.1 Two-Stage Topologies ........................................................................................ 29
2.2.2 Pseudo DC-Link Topologies: ............................................................................ 32
2.2.3 Single-Stage Topologies ..................................................................................... 34
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
II
2.2.4 Comparison of topologies at AC-module operating conditions .................. 39
2.2.5 Discussion ............................................................................................................ 44
2.3. Conclusions ................................................................................................... 49
3. Proposed Single Stage Forward Micro-Inverter ........................................... 53
3.1. Introduction .................................................................................................. 53
3.2. Proposed Forward Micro-Inverter ............................................................ 53
3.2.1 Operation of the single-stage forward micro-inverter .................................. 56
3.2.2 Switching frequency range ................................................................................ 58
3.2.3 Inductance value ................................................................................................. 58
3.2.4 Power decoupling ............................................................................................... 59
3.2.5 MPPT capability .................................................................................................. 60
3.3. Implementation with analog PFC controller .......................................... 61
3.3.1 PFC analog controller operation and adaptation ........................................... 62
3.3.2 Experimental Results ......................................................................................... 65
3.4. Conclusions ................................................................................................... 68
4. Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter 73
4.1. Introduction and background ................................................................... 73
4.2. Proposed Topology ...................................................................................... 74
4.2.1 Operation principle ............................................................................................ 75
4.2.2 Transformers turns ratio .................................................................................... 77
4.2.3 Component stress ............................................................................................... 78
4.2.4 Input capacitor .................................................................................................... 79
4.3. Size and Efficiency Estimation.................................................................. 79
4.3.1 Transformer core selection ................................................................................ 81
4.3.2 Transformer comparison ................................................................................... 82
4.3.3 Volume, area and height of the selected transformers .................................. 85
4.3.4 Efficiency ............................................................................................................. 85
4.4. Experimental Results .................................................................................. 89
4.4.1 DC operation and Model Validation ............................................................... 90
4.4.2 AC operation ....................................................................................................... 93
III
4.5. Conclusions ................................................................................................. 102
5. Interleaved Multiphase Forward Micro-Inverter ....................................... 107
5.1. Interleaving technique background ....................................................... 107
5.2. Interleaved Forward Micro-Inverter ...................................................... 108
5.2.1 Critical Inductance for DCM Operation ........................................................ 110
5.3. Size and Efficiency Estimation and Comparison with the Parallel-
Series Forward Micro-inverter ............................................................................. 112
5.3.1 Transformer core selection and size of the transformer set. ....................... 112
5.3.2 Transformer Performance Comparison ......................................................... 114
5.3.3 Output Filter and Input Capacitor ................................................................. 116
5.3.4 Efficiency Comparison ..................................................................................... 117
5.4. Experimental Results ................................................................................ 118
5.5. Conclusions ................................................................................................. 125
6. Conclusions and Future Work ........................................................................ 129
6.1. Thesis summary and contributions ........................................................ 129
6.2. Future work ................................................................................................. 132
6.3. Publications ................................................................................................ 133
6.3.1 Publications related with the thesis scope .................................................... 133
6.3.2 Additional publications ................................................................................... 134
7. Bilbliography ..................................................................................................... 139
V
List of Tables
Table 1-I. Summary of the PV systems interconnection standards ....................................... 12
Table 2-I. Summary of the discussed two-stage topologies. .................................................. 32
Table 2-II. Summary of the discussed pseudo-DC link topologies. ...................................... 34
Table 2-III. Summary of the discussed single-stage topologies. ............................................ 39
Table 2-IV. General issues of the analyzed topologies, under the benchmark settings. .... 42
Table 2-V. Simulation results and design parameters under the benchmark settings. ...... 43
Table 4-I. Parameters used for the area product calculation .................................................. 82
Table 4-II. Main values of the transformers designs. .............................................................. 83
Table 4-III. Voltages applied in the static test of the parallel-series prototypes, according
to PV module NA-F121 at 50ºC. ................................................................................................. 94
Table 5-I. Parameters used for the area product calculation ................................................ 113
Table 5-II. Main values of the transformers design when the DC shedding strategy is
selected. ....................................................................................................................................... 114
Table 5-III. Main values of the transformers design when the AC shedding strategy is
selected. ....................................................................................................................................... 114
VII
List of Figures
Figure 1-1. Evolution of the PV installed power in the recent years [IEA’14] ....................... 3
Figure 1-2. Central inverter technology. ..................................................................................... 4
Figure 1-3. String inverter. ............................................................................................................ 5
Figure 1-4. Multi-string inverter technology. ............................................................................. 5
Figure 1-5. Module equalizer implementing the differential power processing
[Shenoy'13]. ..................................................................................................................................... 6
Figure 1-6. DMPPT with cascaded DC-DC converters. ............................................................ 7
Figure 1-7. DMPPT with paralleled DC-DC converters. .......................................................... 7
Figure 1-8. PV system composed of parallel connected AC-modules .................................... 8
Figure 1-9. Basic structure of the cascaded PV invertir using several PV modules. ............. 9
Figure 1-10. PV module characteristics [ecmweb]. .................................................................. 10
Figure 1-11. PV curves for different irradiance. ....................................................................... 10
Figure 1-12. Power and voltage at MPP (STC) of crystalline silicon commercial modules.
........................................................................................................................................................ 10
Figure 1-13. Power and voltage at MPP (STC) of thin-film commercial modules. ............. 10
Figure 1-14. Power decoupling in a single-phase inverter. .................................................... 13
Figure 2-1. Block diagram of a two-stage topology for an AC-module. .............................. 20
Figure 2-2. Isolated boost and full-bridge inverter two-stage topology [Attanasio’13]. .... 21
Figure 2-3. Half-bridge boost utilized in [Jiang’12] and [York’13]. ....................................... 21
Figure 2-4. Multilevel converter and resonant inverter proposed in [Chen’13] .................. 22
Figure 2-5. Block diagram of a Pseudo DC-link topology for an AC-module. .................... 22
Figure 2-6. Micro-inverter presented in [Rodriguez’06] composed of a two-stage solution
plus unfolding stage. ................................................................................................................... 23
Figure 2-7. Push-pull micro-inverter with power decoupling circuit to avoid electrolytic
capacitors [Shinjo’07]. .................................................................................................................. 24
Figure 2-8. Forward micro-inverter with series power decoupling capacitor and
improved voltage gain [Liao’13]. ............................................................................................... 24
Figure 2-9. Block diagram of a single-stage topology for an AC-module. ........................... 24
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
VIII
Figure 2-10. Concept of the inverter based on the differential connection of isolated
converters. ..................................................................................................................................... 25
Figure 2-11. Differential inverter, example with forward topology presented in
[Yundong’10] ................................................................................................................................ 25
Figure 2-12. Converter integration introduced in [Pan’12] .................................................... 26
Figure 2-13. Resonant inverter presented in [Huang’11]........................................................ 26
Figure 2-14. Flyback inverter with two secondary windings [Sukesh'14]. .......................... 27
Figure 2-15. Flyback inverter with power decoupling circuit presented in [Hirao’05]
[Shimizu’06] .................................................................................................................................. 28
Figure 2-16. Boost converter and full-bridge inverter. ............................................................ 30
Figure 2-17. Time-sharing boost converter with full-bridge inverter. [Ogura’04] .............. 30
Figure 2-18. Parallel resonant soft-switched boost converter and full-bridge inverter.
[Kim’10] ......................................................................................................................................... 30
Figure 2-19. Parallel-input series-output bipolar DC output converter and full-bridge
inverter. [DistPower’08] .............................................................................................................. 30
Figure 2-20. Boost converter and half-bridge inverter. [Rahman’97]. .................................. 31
Figure 2-21. Boost converter and Neutral Point Clamped inverter [Ma’09]. ....................... 31
Figure 2-22. Series-combined boost and buck-boost and half-bridge inverter[Durán-
Gómez’06]. .................................................................................................................................... 31
Figure 2-23. Center-tapped coupled inductor converter with bipolar output and half-
bridge inverter. [Araújo’08]. ....................................................................................................... 31
Figure 2-24. Single-inductor bipolar output buck-boost converter and half-bridge inverter
[Toko’10]. ...................................................................................................................................... 31
Figure 2-25. Boost + FB integrated and dual grounded [MShen’12]. .................................... 32
Figure 2-26. Buck-boost DCM converter and unfolding stage [Kang’02]. ........................... 33
Figure 2-27. Non-inverting buck-boost DCM converter and unfolding stage [Saha’96]. .. 33
Figure 2-28. Switched-inductor buck-boost DCM converter and unfolding stage [Abdel-
Rahim’11]. ..................................................................................................................................... 33
Figure 2-29. Boost-buck time-sharing converter and unfolding stage [Zhao’12]. ............... 33
Figure 2-30. Universal single-stage grid-connected inverter [Prasad’08]. ........................... 34
Figure 2-31. Integrated boost inverter [Junior’11]. .................................................................. 34
Figure 2-32. Differential boost inverter [Cáceres’99]. .............................................................. 35
Figure 2-33. Differential buck-boost inverter [Vázquez’99]. .................................................. 35
IX
Figure 2-34. Integrated buck-boost inverter [Junior’11]. ........................................................ 36
Figure 2-35. Buck-boost inverter with extended input voltage range [Funabiki’02]. ......... 36
Figure 2-36. Two-sourced antiparallel buck-boost inverter [Kasa’99]. ................................. 36
Figure 2-37. Single-stage full-bridge buck-boost inverter [Wang’04]. .................................. 36
Figure 2-38. Buck-boost based single-stage inverter [Jain’07]. .............................................. 37
Figure 2-39. Switched-inductor buck-boost based single-stage inverter [Abdel-Rahim’10].
........................................................................................................................................................ 37
Figure 2-40. Single-inductor buck-boost based inverter [Kusakawa’01]. ............................. 37
Figure 2-41. Doubly grounded single-inductor buck-boost based inverter [Patel’09]. ...... 37
Figure 2-42. Single inductor buck-boost based inverter with dual ground [SMAsolar’10].
........................................................................................................................................................ 37
Figure 2-43. Three-switch buck-boost inverter [Tan’06]. ........................................................ 38
Figure 2-44. Coupled inductor buck-boost inverter [BHu’08]. .............................................. 38
Figure 2-45. Impedance-admittance conversion theory based inverter [Yatsuki’01]. ........ 38
Figure 2-46. Single phase Z-source inverter. ............................................................................ 39
Figure 2-47. Semi quasi-Z-source inverter with continuous voltage gain [Cao’11]. ........... 39
Figure 2-48. Simulated waveforms of the DC-DC converter in the two-stage topology
presented in Figure 2-22. ............................................................................................................. 41
Figure 2-49. Simulated waveforms in a grid period and detail of maximum duty cycle of
the single-stage topology presented in Figure 2-36 ................................................................. 41
Figure 2-50. Semiconductor and inductor components ratings for the simulated
configurations; Red: two-stage (A solutions in Table 2-V), Blue: pseudo DC link (B
solutions in Table 2-V), Yellow: single-stage boost based, Green: single-stage buck-boost
based (C solutions in Table 2-V). ............................................................................................... 46
Figure 2-51. Estimated efficiency of representative topologies A.3, B.1 and C.7 of each
presented group ........................................................................................................................... 47
Figure 3-1. Buck converter connected to the grid. ................................................................... 54
Figure 3-2. Inductor current of a BCM buck converter ........................................................... 54
Figure 3-3. BCM forward micro-inverter with unfolding stage. ........................................... 55
Figure 3-4. Proposed single-stage forward BCM micro-inverter .......................................... 56
Figure 3-5. Equivalent circuits and driving signals for positive and negative grid cycles. 56
Figure 3-6. DC waveforms at positive (a) and negative (b) grid voltage. ............................ 57
Figure 3-7. Normalized Frequency variation ........................................................................... 58
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
X
Figure 3-8. Input current balance in the presented forward micro-inverter ........................ 59
Figure 3-9. Inductor current for two different power levels. ................................................. 60
Figure 3-10. Normalized switching frequency variation for different MPP. ....................... 61
Figure 3-11. Single-stage forward micro-inverter.................................................................... 61
Figure 3-12. Analog control implementation block diagram ................................................. 62
Figure 3-13. Block diagram of the PFC analog controller (UCC38050) ................................ 63
Figure 3-14. Zero current detection configuration and waveforms for positive and
negative grid voltage (a) and multiplier for correct ZCD (b). ............................................... 64
Figure 3-15. ZCD signal for different positive (a, b) and negative output voltages (c) ...... 65
Figure 3-16. ZCD threshold and ZCD voltage variation in time for boost PFC and forward
micro-inverter. .............................................................................................................................. 65
Figure 3-17. Waveforms of the forward micro-inverter operated in DC for positive (a) and
negative (b) output voltage. ....................................................................................................... 66
Figure 3-18. Primary side waveforms of the forward micro-inverter operated in DC for
positive output voltage. .............................................................................................................. 67
Figure 3-19. Output voltage and inductor current for half-load operation. ........................ 68
Figure 3-20. Output voltage and inductor current for nominal-load operation. ................ 68
Figure 4-1. Proposed forward micro-inverter topology with primary-parallel secondary-
series connected transformers. ................................................................................................... 75
Figure 4-2. Ton (left) and Toff (right) subcircuits of the proposed converter with four
transformers, when two phases are active ............................................................................... 76
Figure 4-3. Number of active phases during a line half-period for a four-transformer
parallel-series forward micro-inverter. ..................................................................................... 76
Figure 4-4. Main ideal waveforms of the proposed inverter with four transformers when
two (left) and four (right) phases are active. ............................................................................ 77
Figure 4-5. Primary switches RMS current (a) and secondary series diodes AVG current
(b) during a grid period. ............................................................................................................. 78
Figure 4-6. Simulation output for the 1-transformer forward micro-inverter. .................... 80
Figure 4-7. Simulation output for the 8-transformer forward micro-inverter. .................... 81
Figure 4-8. Estimated RM cores based on the area product and individual transformer
turns ratio for the different considered number of phases. ................................................... 82
Figure 4-9. Estimated resonant frequency of the analyzed designs. ..................................... 83
Figure 4-10. Secondary side leakage inductance (left) and equivalent series resistance
referred to secondary side (right) of the analyzed designs. ................................................... 84
XI
Figure 4-11. Total losses in the transformers for the analyzed configurations. ................... 84
Figure 4-12. Estimated volume (green), total area (blue) and maximum height (red) of the
selected transformers. .................................................................................................................. 85
Figure 4-13. Comparison of area, volume and maximum height (a) and total losses (b) of
the analyzed configurations with the selected cores and with the same core. .................... 86
Figure 4-14. Calculated efficiency for different configurations of the proposed topology
operated in BCM at the power levels according to CEC efficiency. ..................................... 87
Figure 4-15. Output inductor current waveform in DCM operation. ................................... 88
Figure 4-16. Normalized output current for different designs with constant off-time DCM
operation. ...................................................................................................................................... 89
Figure 4-17. Calculated efficiency for the analyzed configurations. ..................................... 89
Figure 4-18. 2-transformer (a) and 8-transformer (b) primary-parallel secondary–series
forward micro-inverters .............................................................................................................. 90
Figure 4-19. Calculated and measured efficiency of the 8-transformer forward micro-
inverter for 120W BCM (a) and the 2-transformer for 60W DCM (b) operation at different
DC points. ..................................................................................................................................... 91
Figure 4-20. Comparison of the simulated and measured duty cycle (a) and operating
frequency (b) for the 8-transformer micro-inverter at different DC points in BCM. .......... 92
Figure 4-21. Comparison of the simulated and measured duty cycle for the 2-transformer
micro-inverter at different DC points in DCM. ....................................................................... 92
Figure 4-22. Efficiency comparison of the 8-transformer micro-inverter operated in DCM
and BCM for 60W output power. .............................................................................................. 92
Figure 4-23. Waveforms of the 8-transformer micro-inverter for BCM (a) and DCM (b)
operation at the same half load DC point (4 active phases). .................................................. 93
Figure 4-24. Main waveforms of the single-transformer prototype in BCM at full load
close to the grid peak voltage, without (a) and with (b) RCD snubber. ............................... 93
Figure 4-25. Connection scheme utilized in the AC tests. ...................................................... 94
Figure 4-26. Enable signals of the 8-transformer prototype during a half-cycle (a) and
driving signals applied in the 2-transformer demonstrator (b). ............................................ 95
Figure 4-27. Waveforms of the 1-transformer parallel-series micro-inverter operated in
BCM at 120W (left) and DCM at 12W (right). .......................................................................... 95
Figure 4-28. Waveforms of the single transformer parallel-series micro-inverter operated
in BCM at 120W for different grid voltages. ............................................................................ 96
Figure 4-29. Waveforms of the 2-transformer parallel-series micro-inverter operated in
BCM at 120W. ............................................................................................................................... 96
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
XII
Figure 4-30. Waveforms of the 2-transformer parallel-series micro-inverter operated in
DCM at 60W. ................................................................................................................................ 97
Figure 4-31. Waveforms of the 8-transformer parallel-series micro-inverter operated in
BCM at 120W. ............................................................................................................................... 97
Figure 4-32. Waveforms of the 8-transformer parallel-series micro-inverter operated in
DCM at 36W (left) and detail of the operation in DCM at 60W. ........................................... 97
Figure 4-33. Measured efficiency for the built configurations and computed CEC
efficiency based on the measurements. ..................................................................................... 98
Figure 4-34. Measured power factor for the tested configurations ....................................... 99
Figure 4-35. Current THD measured for the three tested prototypes. ................................. 99
Figure 4-36. Thermal image of the 2-transformer prototype at nominal load. .................... 99
Figure 4-37. Thermal image of the 8-transformer prototype at nominal load. .................... 99
Figure 4-38. Thermal image of the single transformer prototype for half-load operation. 99
Figure 4-39. Power reference modification in the applied MPPT algorithm. .................... 101
Figure 4-40. Start-up and steady-state of the MPPT algorithm (right) for the 8-transformer
micro-inverter connected to the SAS configured with MPP of 60W (right). ..................... 102
Figure 4-41. Input voltage and current during start-up (left) and steady-state operation
(right) of the single-transformer prototype connected to the SAS configured with MPP of
120W. ........................................................................................................................................... 102
Figure 4-42. Set-up used for the static and MPPT test. ......................................................... 102
Figure 5-1. Interleaved multiphase forward micro-inverter ................................................ 109
Figure 5-2. Normalized output currents of the 2-phase inverter under DC (top) and AC
(bottom) control strategies for nominal (left) and half-load (right) conditions. ................ 109
Figure 5-3. Critical inductance for an 8-phase interleaved forward micro-inverter under
different phase shedding strategies. ........................................................................................ 111
Figure 5-4 Critical inductance as a function of the number of phases for DC and AC
control strategies. ....................................................................................................................... 111
Figure 5-5. Selected cores for the analyzed interleaved configurations ............................. 113
Figure 5-6. Area (a) and volume (b) of the interleaved and parallel-series configurations.
...................................................................................................................................................... 114
Figure 5-7. Leakage inductance and series resistance of the transformer designs for the
interleaved configurations. ....................................................................................................... 115
Figure 5-8. Total losses of the transformer set and the individual transformers when the
DC (a) or AC (b) shedding is applied. ..................................................................................... 116
XIII
Figure 5-9. Core (a) and winding losses (b) of the transformer set for the analyzed
configurations. ............................................................................................................................ 116
Figure 5-10. Output current ripple at nominal load for different number of interleaved
phases in the forward micro-inverter...................................................................................... 117
Figure 5-11. Calculated efficiency for the interleaved configurations (a) and CEC
computed efficiency (b) applying the considered phase shedding strategies. .................. 118
Figure 5-13. 8-phase prototype of the interleaved forward micro-inverter. ...................... 119
Figure 5-14. Pulses of the interleaved forward micro-inverter with 2 (a), 4(b), 6(c) and 8(d)
active phases. .............................................................................................................................. 120
Figure 5-15. AC and high-frequency 120W (8 phases) interleaved forward micro-inverter
waveforms .................................................................................................................................. 121
Figure 5-16. AC and high-frequency 60W (4 phases) interleaved forward micro-inverter
waveforms .................................................................................................................................. 121
Figure 5-17. Measured efficiency for different forward micro-inverter configurations. .. 122
Figure 5-18. Calculated efficiency for different forward micro-inverter configurations. 122
Figure 5-19. Measured power factor for the tested configurations ..................................... 123
Figure 5-20. Current THD measured for the three tested prototypes. ............................... 123
Figure 5-21. Power step from 60W to 120W. .......................................................................... 123
Figure 5-22. Interleaved forward micro-inverter operating at 90W (a) and power step
from 90W to 120W (b) ............................................................................................................... 124
Figure 5-23. Thermal behavior of the single-transformer forward micro-inverter at 60W
operation (a) and the interleaved multiphase at 120W (b) ................................................... 125
XV
List of Acronyms
AC Alternating Current
BCM Boundary Conduction Mode
BIPV Building-Integrated PV
CCM Continuous Conduction Mode
CrCM Critical Conduction Mode
CEC Californian Efficiency Commission
CSI Current Source Inverter
CV Constant Voltage
DAC Digital to Analog Converter
DC Direct Current
DCM Discontinuous Conduction Mode
DMPPT Distributed MPPT
EMI Electromagnetic Interference
EMC Electromagnetic Compatibility
FEA Finite Element Analysis
GaN Gallium Nitride
IC Integrated Circuit
MIC Module Integrated Converter
MPP Maximum Power Point
MPPT Maximum Power Point Tracking
OC Open Circuit
PF Power Factor
PFC Power Factor Correction
P&O Perturb and Observe
PV Photovoltaic
PWM Pulse Width Modulation
RMS Root Mean Square
SAS Solar Array Simulator
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
XVI
SMD Surface Mount Devices
SPICE Simulation Program with Integrated Circuit Emphasis
STC Standard Test Conditions
THD Total Harmonic Distortion
TTF Two Transistors Forward
VSI Voltage Source Inverter
ZCD Zero Current Detection
ZCS Zero Current Switching
ZVS Zero Voltage Switching
1
Chapter 1
Introduction
Chapter 1 Introduction
3
1. Introduction
Photovoltaic (PV) installed power worldwide rapidly increased in the last ten
years (Figure 1-1), with an average growth of 49% per year. Based on this
fascinating trend, PV sources are expected to provide 16% of the global electricity
consumption by 2050 from the 1% level provided nowadays [IEA’14].
Figure 1-1. Evolution of the PV installed power in the recent years [IEA’14]
The most of the installed PV power in the last decade was oriented to grid
connected systems and about half of it in the last years corresponds to distributed
grid connected PV systems. These systems are installed to provide power to a
grid connected customer or directly to the grid. Residential, commercial and
industrial installations belong to this group of grid-connected systems, with a
70% of the installations occurring on buildings [IEA-PVPS’15].
In PV grid connected systems, inverters are a key element in the PV system
architectures since they are responsible for injecting into the grid the extracted
energy from the PV modules. Therefore, the continuously growing demand of
PV systems and the recent improvements in the PV modules in terms of cost and
efficiency [Fraunhofer’15] have increased the focus in the PV inverter technology.
Several inverter architectures can be found for distributed grid connected PV
systems in respond to the different voltage and power levels. Some common
topics to all them, such as energy yield, cost, high power density and reliability
as well as smart grid functionalities, have been addressed in order to manage the
future demand of high penetration of PV systems [Xue’11] [IEA’14]. In the next
section the main PV systems architectures for residential application are
introduced and briefly discussed. Among these architectures, this thesis focuses
on micro-inverters which have been identified as en emerging technology.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
4
1.1. Grid Connected PV Systems
The inverters used in single-phase grid-connected PV systems for residential
application can be classified as:
Central inverters
String and multi-string inverters
Module equalizers
Distributed MPPT
Integrated solutions
1.1.1 Central Inverters
Traditionally the PV modules are connected in series, resulting in a string, to
boost the voltage. Then several strings are connected in parallel, through string
diodes, to increase the available power in the system (Figure 1-2). This solution is
widely implemented in large roof-top building integrated PV (BIPV)
applications, with installed power over 6 kW. With the adopted configuration of
PV modules, the string voltage is higher than the grid voltage and high-efficiency
transformerless topologies can be used [Kerekes’11].
Figure 1-2. Central inverter technology.
The main advantages of these inverters are low cost with high weighted
efficiency (reaching levels of 98%). However, the central inverter systems present
extra losses in the string diodes and are not able to extract the maximum power
available in the installation due to centralized maximum power point tracking
(MPPT). Furthermore, the system is affected by module mismatch due to
shadowing or module tolerances, which produces power losses.
PV
module
Grid
….
….
Chapter 1 Introduction
5
1.1.2 String and Multi-string Inverters
In order to overcome part of the presented disadvantages of the centralized
inverters, string inverter technology (Figure 1-3) was presented [SMA’04]. In this
case only one string of PV modules is connected to a DC-AC stage. Therefore,
diode losses are avoided and energy extraction can be slightly improved due to
individual string MPPT. The same topologies than in centralized inverter can be
used if the number of panels per string is high enough thus achieving high
efficiency conversion. It is common in small roof-top installations, up to 2 kW.
Figure 1-3. String inverter.
The multi-string technology, depicted in Figure 1-4, consists of several strings
interfaced to a common inverter through a dedicated DC-DC converter
[SMA’04]. This technology allows installations with different orientations and
angles in highly shadowed environments, while independent MPPT of each
string is achieved. Furthermore, the introduction of the intermediate DC-DC
converter increases the system modularity. This technology is suitable for
medium-large installations, up to 6 kW.
Figure 1-4. Multi-string inverter technology.
1.1.3 Module equalizers
Despite the energy extraction is improved in the string and multi-string inverter
technologies in respect to the centralized solution, the current mismatches among
the series connected PV modules does not allow the extraction of the overall
installed power. Several techniques have been proposed in order to equalize the
current among the cells thus, allowing maximum power point (MPP) operation
of every single cell. The MPPT function is still implemented by the string or
central inverter while the extra power provided by the non-degraded cells in the
PV
module
Grid
PV
module
Grid
……
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
6
array is processed either differentially [Shenoy'13] [Shimizu'03] or it is utilized to
equalize the cell voltage [Ben-Yaakov'12] [JZhao'13]. Figure 1-5 shows an
example of a PV system implementing a differential power processing.
Figure 1-5. Module equalizer implementing the differential power processing [Shenoy'13].
1.1.4 Distributed MPPT
The simplest manner of avoiding the panel mismatches is to skip the series
connection by utilizing a dedicated DC-DC or DC-AC converter per PV module.
Each of these converter is designed for a power lower than 400 W and it is known
as a module integrated converter (MIC). The introduction of a MIC provides
flexibility and modularity and is suitable for mass production, with the
consequent cost reduction [Liu’11] [Walker’04] [Kjaer’05]. Nevertheless, the
major advantage of these PV systems is the extraction of the maximum available
power of the installation by means of individual MPPT of each PV module
[O'Callaghan'12].
1.1.4.1 DC power optimizers
In these PV systems a dedicated DC-DC converter is connected to every single
PV module. The extracted power is then injected to the grid through a single
inverter in the same way than in a multi-string system. There are two main
configurations depending on the connection of the DC-DC converters:
Cascaded DC-DC converters [Walker’04]: the outputs of the dedicated
DC-DC converters are connected in series (Figure 1-6).Consequently, the
voltage boosting per converter is reduced and non-isolated topologies can
be used. Therefore, high converter efficiency can be achieved with low
cost and weight per converter. On the other side, the modularity of the
system is limited and the main concern is the voltage balance among the
series connected MICs [Femia’08].
PV
panel
Grid
Differential
Converter
Differential
Converter
Chapter 1 Introduction
7
Parallel connected DC-DC converters [Liu’11]: in this case the main
concern is the high voltage boosting necessary to interface the DC-AC
stage. Usually topologies with high-frequency transformers are
implemented thus reducing the converter efficiency and leading to
heavier and bigger solutions. The system is easily expandable and
redundancy increases the system reliability. Further increase in
modularity is possible by implementing a parallel connection of inverters
to the DC bus [LiZhang’11].
Figure 1-6. DMPPT with cascaded DC-DC converters.
Figure 1-7. DMPPT with paralleled DC-DC converters.
1.1.4.2 AC-Module (Micro-Inverters)
The AC-module consists of a DC-AC converter, also known as micro-inverter,
which is attached to the back side of a PV module. The PV system is then
composed of the parallel connection of several AC-modules to the grid (Figure
1-8).
The concept of an inverter to be integrated in a PV module was born in the late
90’s [Lohner’96] [Wills’97] [Oldenkamp’98] [Meinhard’99] based on the concepts
already introduced for the DC power optimizers: individual MPPT, modularity,
reliability (redundancy), size and cost reduction due to mass production and
standardization. An extra advantage of the AC-modules is the possibility of
“plug and play” for the final user, thus reducing the installation costs.
The micro-inverter is responsible not only of the MPPT and voltage boosting
functions but also of the grid connection performance. Therefore, more
complicated topologies which commonly include isolation, and more complex
control stages are required. Due to this fact, the cost of these solutions has been
traditionally high while the efficiency was low.
In the last years many researchers have proposed innovative solutions to
improve both issues [QLi’08] [Meneses’13]. Furthermore, the micro-inverter
…
PV
module
Grid
…PV
module
Grid
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
8
market is expanding for residential application and supported by R&D effort in
smart PV modules with additional functionalities for high penetration PV [IEA-
PVPS’15] [IEA'14]. This thesis focuses in this type of grid-connected PV systems.
Figure 1-8. PV system composed of parallel connected AC-modules
1.1.4.3 Cascaded PV modules
Multilevel inverters generate a stepped waveform from different capacitor
voltage sources by means of an array of power semiconductors. A cascaded
inverter (Figure 1-9) can be easily configured using multiple PV modules as
sources [Xiao’12] [Rodriguez’02]. Despite the flexibility of the resulted system is
limited, as in the cascaded DC-DC systems, the low switching frequency
operation brings high efficient solutions. In addition the multilevel structure
provides high quality current with small filters and a cost effective
implementation for medium power systems.
1.1.5 Cell integrated converters (AC-cells)
The AC-cell concept implies that an inverter is attached or integrated to one or
more PV cells, extracting the maximum power of every cell in a module. The
main obstacle is how to generate the grid voltage from the extremely low cell
voltage (≈1V). In the last years the cascaded multilevel configuration has been
utilized [Johnson’11]. The concept is similar to the one presented in Figure 1-9
but the PV modules are substituted by PV cells or a set of them.
The future goal of these solutions is the integration of the converters in the same
substrate than the PV cells. In this direction there are already some publications
such as [Imtiaz’13] where preliminary results of embedded MOSFET and
capacitor within a PV cell have been presented. However, further technology
improvements are necessary to achieve a PV module composed of AC-cells.
…
PV
module
Grid
Chapter 1 Introduction
9
Figure 1-9. Basic structure of the cascaded PV invertir using several PV modules.
1.2. AC-module requirements
In AC-module application, the micro-inverter has to interface a single PV module
directly to the grid, which implies certain requirement defined by the PV module
characteristics. In addition it is a grid connected systems and therefore the grid
connection requirements must be satisfied. In this section this requirements will
be discussed, together with the necessary power decoupling in single-phase PV
inverters and the weighted conversion efficiency.
1.2.1 PV module characteristics
Figure 1-10 shows the output current and power characteristics of a PV module
for a given irradiance and temperature conditions. It can be noted that the PV
power behavior is non linear and there is a unique point (Vmp, Imp) where the
maximum output power (Pmp) is obtained, know as maximum power point
(MPP).
The presented curves of a PV module are typically measured at an irradiance of
1000W/m2 and a temperature of 25ºC with an air mass of 1.5. The air mass
determines the radiation impact and the spectral combination of the light
arriving on the earth's surface. These measurement conditions are known as
standard test conditions (STC) and allow a proper comparison of the
performance of the different available commercial modules. However, irradiance
and temperature affect the PV module operation thus modifying its output
characteristics as depicted in Figure 1-11.
In PV grid-connected applications, the goal is to obtain the maximum power
from the PV modules over the time of operation. Therefore, the utilization of a
maximum power point tracking (MPPT) algorithm [Gomes’13] [Séra’09] is
LCL
filter Grid
…PV
module
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
10
necessary due to the non-linear behavior of the PV module, together with the
ambient conditions dependability.
Figure 1-10. PV module characteristics [ecmweb].
Figure 1-11. PV curves for different irradiance.
Nowadays crystalline silicon PV modules, both mono-crystalline and multi-
crystalline, are the most commonly used within all PV applications. However,
thin-film technology has grown in applications where its lower cost compensates
a lower efficiency, such as building integrated PV systems [Henze’08]. In Figure
1-12 a summary of power and voltage at MPP is presented for crystalline silicon
commercial modules of different solar panel manufacturers. The data have been
extracted from the Standard Test Conditions (STC) measurements available in
the modules datasheets. A similar summary for thin-film commercial modules is
depicted in Figure 1-13.
The power generation is lower than 300 W in crystalline silicon modules, with a
MPP voltage range from 25 V to 50 V. However, thin-film panels have a higher
MPP voltage, from 50 V to 100 V, with a lower power generation, up to 150 W.
Figure 1-12. Power and voltage at MPP (STC) of crystalline silicon commercial
modules.
Figure 1-13. Power and voltage at MPP (STC) of thin-film commercial modules.
20
25
30
35
40
45
50
55
60
100 150 200 250 300 350
V@
pm
ax (
V)
Pmax (W)
Isofotón
Kyocera
Sanyo
Schott
Sharp
SolarWorld
SunPower
Suntech
solarWatt
40
50
60
70
80
90
100
110
95 105 115 125 135
V@
pm
ax (
V)
Pmax (W)
Bosch
HelioSphera
Mitsubishi
Kaneka (hybrid)
CentennialSolar
Chapter 1 Introduction
11
1.2.2 Grid requirements
The previously presented architectures are used in grid-connected PV systems
and the grid connection standards must be satisfied. These standards deal with
different issues such as power quality, grid interface and islanding detection, as
well as grounding.
In Table 1-I a summary of the main standards regarding the grid connection
issues of PV systems is presented [IEC-61727] [IEEE-1547] [EN-6100-3-2] [VDE-
0126-1-1]. In terms of power quality, the IEC standard is widely applied limiting
not only the harmonic content but also the total harmonic distortion (THD) to a
maximum of 5%. Besides this, the DC injected current is limited to 1% or less of
the output rated current which implies low current values and an increase in the
control complexity. This requirement is a main concern in transformerless
topologies. Furthermore, the German code VDE0126-1 set a maximum DC
current of 1A with a maximum disconnection time in case that value is exceeded.
Because of safety reasons not only for humans but also to avoid the damage of
other electronic equipment, the grid-connected inverters must recognize
islanding operation in the case of voltage or frequency abnormal values. The
German code is the most restrictive in the disconnection time due to voltage
deviations, while IEEE standard defines the fastest disconnection time for
abnormal frequency operation. Several islanding detection methods have been
proposed in the literature, which can be organized into three groups: passive,
active and hybrid methods [Mahat’08].
In grids with a high penetration of renewable energies frequency is prompt to
oscillations due to a sudden disconnection of large power generation plants
under abnormal frequency conditions. Furthermore, the injection into the low
and medium voltage grid of currents with high power factor may increase the
grid voltage considerably, provoking abnormal voltage conditions. To minimize
these undesirable effects of the renewable energy sources in the grid integration,
the German code contemplates the implementation of grid support
characteristics such as real power curtailment and reactive power control
[SMA’12] [Teodorescu’11].
The absence of galvanic isolation causes leakage ground currents due to the the
solar panel parasitic capacitance between the cells and the grounded frame
[Calais’98], together with common mode voltage variations. The leakage currents
have an impact not only in the current harmonic content or efficiency but also in
potential EMC and safety problems [Araujo’10]. There is no international
agreement regarding the necessity of an isolation transformer or the leakage
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
12
current limitation. However, ground current monitoring and protections are
demanded for the most of the previously presented standards. Specifically, the
German code VDE 0126-1-1 defines both averaged and peak ground currents
limitation as well as disconnection times.
Table 1-I. Summary of the PV systems interconnection standards
1.2.3 Power Decoupling
In single-phase inverters the instantaneous demanded current by the inverter
consists of a DC value and a twice line frequency oscillation (Figure 1-14). As the
generated current in the PV module is pure DC, an internal storage device,
usually a capacitor, is used in order to maintain the power balance.
The value of this decoupling capacitor is determined by the amount of energy to
be stored in it, according to (1-1). A proper selection of its capacitance is
necessary, especially when the decoupling capacitor is positioned in parallel with
the PV module. A bad selected capacitance implies a high voltage ripple, which
Issue IEC 61727 IEEE1547-2008 EN61000-3-2 VDE
Nominal power 10kW 30kW 16A @ 230V -
Harmonic content
order (h) Limit order (h) Limit order (h) Limit (A) order (h) Limit (A/MVA)
3-9 4.0% 3-9 4.0% 3 2.3 3 3
11-15 2.0% 11-15 2.0% 5 1.14 5 1.5
17-21 1.5% 17-21 1.5% 7 0.77 7 1
23-33 0.6% 23-33 0.6% 9 0.4 9 0.7
> 35 0.3% 11 0.33 11 0.5
13 0.21 13 0.4
Even harmonics are limited to 25% of the odd harmonic limits shown
(15-39) 2.25/h 17 0.3
19 0.25
2 1.08 23 0.2
4 0.43 25 0.15
6 0.3 (25-40) 3.75/h
THD < 5%(8-40) 1.84/h even 1.5/h
>40 4.5/h
DC current injection
Less than 1% of rated output current
Less than 0.5% of rated output current
<0.22A <1A; max. trip time 0.2s
Voltage deviations
range (%) time (s) range (%) time (s)
-
range (%) time (s)
V<50 0.1 V<50 0.16 V<85 0.2
50≤V<88 2 50≤V<88 2 V≥110 0.2
110≤V<120 2 110≤V<120 1
V≥120 0.05 V≥120 0.16
Frequency deviations
range (Hz) time (s) range (%) time (s)-
range (%) time (s)
49<f<51 0.2 59.3<f<60.5 0.16 47.5<f<50.2 0.2
Leakage currents - - -
average current (mA)
time (s)
30 0.3
60 0.15
100 0.04
300 (peak) 0.3
Chapter 1 Introduction
13
has a significant impact in the utilization ratio of the maximum available power
of the PV module [Kjaer’05] as well as in the MPPT algorithm efficiency [Séra’09].
(1-1)
Figure 1-14. Power decoupling in a single-phase inverter.
Usually the selected decoupling capacitance has an important impact in the size
as well as in the lifetime of the solutions. Different decoupling circuits [HHu’10]
and three-port topologies [Harb’13] have been proposed to overcome these
issues. In this thesis the influence of the multiphase techniques in the decoupling
capacitor will be presented but the utilization of decoupling techniques is out of
the scope of this thesis.
1.2.4 Conversion efficiency
As discussed above the maximum power available in a PV module is dependent
on the irradiation as well as the ambient temperature. Therefore, the
geographical location influences the operation of the PV inverters as a
consequence of the solar cycles and climate conditions. It is not difficult to
foresee that a comparison of two PV inverters based on the peak efficiency or the
efficiency of a PV inverter at some specific operating point is not fare, due to the
large variety of possible operating conditions during the actual operation of the
inverter.
It is common to find in the available commercial solar inverters, for all of the
architectures presented above, a weighted efficiency value in addition to the
mentioned peak efficiency. The weighted efficiency is a useful comparative tool
for both designers and costumers, since the weights are obtained based on
irradiation and temperature data of different geographical regions. The most
common weights are obtained with the data available for the Northwest of USA
CCgrid
PV
uU
PCin
ˆ2
Time
0s 5ms 10ms 15ms 20ms
PV_Current Inverter_Current
0A
3.0A
6.0A
SEL>>
PV_Voltage
30V
40V
50V
Uccu
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
14
(CEC efficiency) and Europe (European efficiency) and are presented in (1-2) and
(1-3), respectively. In the depicted equations %X represents the measured
efficiency at x% of the rated power of the inverter under test [Sandia’04].
(1-2)
(1-3)
1.3. Thesis scope and organization
According to the presented background, the required voltage boost to interface a
low voltage PV module to the grid while keeping an acceptable efficiency in a
wide power range are the main concerns in micro-inverters. Furthermore, the
quality standards must be satisfied and size and lifetime of the solutions must be
always considered. The main objective of this thesis is to analyze the influence on
these parameters of applying multiphase techniques. Both a traditional
interleaved multiphase system and a proposed parallel-series configuration to
overcome the voltage boosting will be considered.
The thesis document is organized in six chapters. A part from the introductory
chapter where the background of single-phase PV grid connected systems and
the motivation of the thesis have been presented, the next five chapters are
organized as follows:
Chapter 2 presents a compilation of already existing isolated micro-inverter
solutions in the literature. In addition, the use of transformerless topologies
is common in other PV architectures and it is of interest to evaluate if step-
up non-isolated inverters proposed in the literature are suitable for AC-
module application. With this objective a benchmark is defined based on
the AC-module requirements presented in the introduction. Then, the most
interesting selected topologies are compared in terms of size, cost and
efficiency, according to the defined specifications.
In Chapter 3 a forward micro-inverter is proposed. The presented topology
is derived using the similarities of the micro-inverter and the PFC
application and uses BCM operation to inject unity power factor current
into the grid. The operation principle and main design issues are discussed.
Given the simplicity of the proposed topology and with the objective of
keeping a low-cost solution, the control implementation with a PFC BCM
controller is explored as a proof of concept. Experimental results to validate
the topology and the analog implementation are introduced.
%100%75%50%30%20%10 05,053,021,012,005,004,0 CEC
%100%50%30%20%10%5 2,048,01,013,006,003,0 EU
Chapter 1 Introduction
15
The proposed forward micro-inverter is a buck-derived topology and
therefore it requires a large turns ratio to overcome the required voltage
boost. In Chapter 4 the application of a primary-parallel secondary-series
topology is proposed to improve the voltage gain of the proposed solution.
An analysis of the influence in size and efficiency of the number of
transformers used in the proposed parallel-series is presented based on
simulation and detailed designs. In addition, DCM operation is introduced
to improve the efficiency at light load. Experimental results are provided to
verify the presented analysis and a simplified MPPT algorithm without
current sensing is presented.
The application of interleaved multiphase technique is assess in Chapter 5.
This technique has been already used mainly in flyback micro-inverters to
increase the efficiency at light load and consequently the weighted
efficiency. In this thesis two different phase shedding techniques are
presented and analyzed for the forward micro-inverter. A study based on
simulation and transformer detailed designs is carried out for both
strategies. The obtained results are compared as well with the proposed
parallel-series topology. In this case DCM operation is used since the
current loop is avoided. Experimental results for a multiphase forward
micro-inverter are presented and compared to a single-transformer and the
counterpart parallel-series configuration.
Chapter 6 presents the main contribution of this work and discusses future
work.
17
Chapter 2
Step-up Inverters for AC-Module
application
Chapter 2 Step-up Inverters for AC-Module Application
19
2. Step-up Inverters for AC-Module
Application
An AC-module is composed of a grid-connected inverter, also known as micro-
inverter, which is attached to a PV module. Among the advantages presented in
the previous chapter there are two main ones which make this technology
attractive: the opportunity to extract the maximum available power of each
individual PV module and the modularity and flexibility granted to a given
installation [Xue’11] [Meneses’13].
On the other hand, the main challenges of these PV systems are further
improvement in efficiency guaranteeing a long lifetime, preferably close to the
module expected lifetime, together with a cost reduction [Xue’11] [Blaabjerg’04].
These demands are clearly related with the difficulty to overcome the high
voltage boost required to interface a single PV module to the grid. This chapter
presents different micro-inverter solutions existing in the literature starting with
isolated topologies, which provide easy way to achieve the required voltage
boost.
However, the use of inverters without isolation in central and string inverters has
been demonstrated to be more efficient, less bulky and less costly compared to its
isolated counterparts, regardless whether a low or high frequency transformer is
utilized [Kerekes’11]. Therefore, the main transformerless topologies suitable for
module integration are also introduced in this chapter, separated in three main
groups according to their topological structure, as it is done for the isolated
topologies: two-stage, pseudo-DC link and single-stage topologies.
The compiled non-isolated topologies are not necessary meant for AC-module
application and therefore, they are presented for considerably different
specifications. In order to compare the most suitable topologies for AC-module
application, a benchmark is first set under which a comparison in terms of
efficiency, size, grounding and power decoupling is established.
2.1. Isolated Micro-Inverters
In section 1.2 the characteristics of the available commercial PV modules were
introduced. The maximum power point voltage is lower than 50V for crystalline
modules and around 70V in the case of thin-film technology. It is obvious that the
utilization of a transformer in PV applications not only guarantees to comply
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
20
with isolation and safety standards, but allows the required voltage boosting
between the low voltage of the PV module to the 110V or 230V of the AC grid.
In the literature multitude of isolated solutions has been proposed for micro-
inverter application [QLi’08]. In this section, these solutions are summarized
according to three main topological structures: two-stage, pseudo DC link and
single-stage topologies.
2.1.1 Two-Stage Topologies
Figure 2-1 shows the block diagram of a two-stage topology, also known as
topology with DC-link. These solutions consist of a DC-DC converter, which
commonly includes isolation, that performs the MPPT and amplifies the PV
module low voltage to an adequate level for the second stage. The DC-AC stage
controls the high performance current injected into the grid, typically using a
bridge inverter with pulse width modulation. In addition, the two-stage structure
allows reactive power capability.
The power decoupling is typically done by means of the DC-link capacitor (CP in
Figure 2-1). The high voltage level of the DC-link allows a lower decoupling
capacitance and since the ripple value of the DC-link is not restricted, the
capacitance value can be further decreased. This reduced capacitance allows
using ceramic capacitors thus reducing the size and increasing the reliability of
these topologies. However, a large ripple may deteriorate the second stage
output current performance as well as influence negatively the MPPT efficiency.
Figure 2-1. Block diagram of a two-stage topology for an AC-module.
The conventional cascade connection of a boost converter and a full-bridge
inverter has been used in isolated solutions for micro-inverters as illustrated in
Figure 2-2 [Attanasio’13]. A clamped version of the isolated boost converter is
used in the Solar Bridge micro-inverters [SolarBridge’12].
CpFilterPV
moduleGrid
Chapter 2 Step-up Inverters for AC-Module Application
21
Figure 2-2. Isolated boost and full-bridge inverter two-stage topology [Attanasio’13].
Variations in the DC-DC stage of the previous configuration have been proposed
in order to improve the efficiency as well as reduce the size and the cost of the
inverter. This can be obtained by reducing the number of semiconductors and
passives, as in the single-switch approach presented in [Zeng’12]. In addition, the
application of soft-switching techniques or resonant operation of the converters
enables an increase in switching frequency thus, size can be reduce while
efficiency is not degraded.
In [Jiang’12] a half-bridge boost isolated converter is implemented as DC-DC
stage. The leakage energy of the transformer is used to achieve ZVS in the
primary switches. The same topology with the appropriate design of the half-
bridge capacitors is operated as a resonant converter in [York’13]. In this case
ZVS and ZCS are achieved in primary and secondary respectively. In both cases
the 94% peak efficiency of the isolated boost presented in [Attanasio’13] is
incremented to more than 97%, for different power levels. Similar efficiency
levels are obtained for the active-clamping resonant converter presented in
[Choi’13].
Figure 2-3. Half-bridge boost utilized in [Jiang’12] and [York’13].
The introduction of wide-bandgap semiconductors allows further size reduction
by increasing the switching frequency, without jeopardizing the efficiency. Some
prototypes can be already found in the literature such as the one presented in
[Chen’13] (Figure 2-4). In this solution the DC-DC stage is a multilevel converter
which provides adequate voltage for a resonant inverter, while acting as an
energy buffer to reduce the input decoupling capacitor. A 70W prototype with
SMD components excluding the transformer and the decoupling capacitor,
operates at more than 300 kHz and presents CEC efficiency higher than 92%.
Cp
FILTER
Lb2 Db1
Qb2
Q1 Q3
Q2 Q4
C1
Lb1
Qb1
Cp
Db2
Cp2
FILTER
Db1Q1 Q3
Q2 Q4C1
Cp1
Db2
Q1
Q2Cr
CrLb Lr
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
22
Figure 2-4. Multilevel converter and resonant inverter proposed in [Chen’13]
2.1.2 Pseudo DC-Link Topologies
The topologies included in this category are based on a DC-DC converter that
implements the MPPT functionality and generates a rectified sinusoidal current.
This current is then unfolded in phase with the grid by means of a line-switched
bridge. As in the previous topologies, the power decoupling is usually done by a
capacitor. However, in this case the capacitor is in parallel with the PV module
(Cp in Figure 2-5). Therefore, the allowable voltage ripple must be low enough to
ensure a high MPPT efficiency. This fact together with the low voltage level
implies that a large capacitance is necessary [HHu’10]. In most of the cases an
electrolytic capacitor is used, which is normally bulky and may reduce the life
span of the solutions.
Figure 2-5. Block diagram of a Pseudo DC-link topology for an AC-module.
Interleaved flyback inverter is a extended solution for micro-inverters following
the structure presented in Figure 2-5 [ZheZhang’14][Enphase’10], due to its low
component account conferring the possibility of a higher power density and the
simplicity in the control when operated in DCM. However, the unfolding stage is
typically integrated within the flyback if a single inverter is implemented. The
configurations based on a single-stage flyback inverter will be discussed later in
section 2.1.4.
Other solutions besides flyback inverters have been proposed in the literature.
These solutions present similar efficiency with higher component counting, such
as the phase-shift full-bridge presented in [Kunzler’13] which achieves a
maximum efficiency of 90% by using the primary soft-switching characteristic. In
CpFilterPV
moduleGrid
Chapter 2 Step-up Inverters for AC-Module Application
23
[Chiu’13] the integration of a buck and an isolated boost implementing time-
sharing control is introduced and the CEC efficiency exceeds the 92%.
The main goal behind the most of these topologies is the reduction of component
counting pursuing an increase in the power density. However, as previously
discussed, the main drawback is the necessity of an electrolytic capacitor in
parallel with the PV module which negatively affects the size and the lifetime of
the converter. For this reason, the first solutions using a line frequency inverter
implemented a two-stage approach with a second stage supplying rectified AC
current to a current source inverter [Herman’93]. Recently a similar structure was
presented in [Rodriguez’06] using a resonant converter as DC-DC stage and a
current source inverter consisting of a current controlled buck together with a
line frequency inverter (Figure 2-6). The reported European efficiency is 88%
with a peak efficiency of 92% and the calculated lifetime can be prolonged from
5.5 years to approximately 20 years, by avoiding electrolytic capacitors.
Figure 2-6. Micro-inverter presented in [Rodriguez’06] composed of a two-stage solution plus unfolding stage.
In case of using only one stage to generate the rectified AC current and an
unfolding stage, an additional power decoupling circuitry with active switches
and complex control is necessary in order to avoid the non-desired electrolytic
capacitors (Figure 2-7)[Shinjo’07]. The same concept is applied in the forward
micro-inverter operated in CCM presented in (Figure 2-8)[Liao’13]. Furthermore,
the decoupling capacitor is applied in series with the secondary side transformer,
thus reducing the transformer turns ratio and allowing an increase in the
conversion efficiency. However, neither efficiency nor THD is reported.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
24
Figure 2-7. Push-pull micro-inverter with power decoupling circuit to avoid electrolytic capacitors [Shinjo’07].
Figure 2-8. Forward micro-inverter with series power decoupling capacitor and improved voltage gain [Liao’13].
2.1.3 Single-Stage Topologies
Nowadays the trend is the integration into a single-stage converter (Figure 2-9),
which includes all the desired functionalities developed by the multistage
topologies. As in the pseudo DC link topologies the power decoupling in single-
stage topologies is done by means of a capacitor in parallel with the PV module
(CP in Figure 2-9).
Figure 2-9. Block diagram of a single-stage topology for an AC-module.
A DC-AC inverter can be derived from any DC-DC converter by connecting two
of them in a differential way. Each converter generates a dc-biased unipolar
sinusoidal voltage and 180º phase shifted (Figure 2-10). Therefore, the main issue
is the control of both converters to obtain a correct operation, which could
include reactive power capability. In the literature, both boost-isolated
[Sivasubramanian’12] and buck-derived [Yundong’10] (Figure 2-11) topologies
FilterCp
PV
moduleGrid
Chapter 2 Step-up Inverters for AC-Module Application
25
can be found. In the last one neither efficiency nor THD are reported but the
reactive power capability is shown with inductive operation up to a power factor
of 0.75.
Figure 2-10. Concept of the inverter based on the differential connection of isolated converters.
Figure 2-11. Differential inverter, example with forward topology presented in [Yundong’10]
The main drawback in the design of a single-stage topology, as well as in many
of the pseudo-DC ones, is the transformer turns ratio and consequently a
challenging transformer design. Typically high turns ratio is required for an
appropriate voltage gain capability thus, high leakage inductance and stray
capacitance are normal in these designs.
Two main approaches were followed to overcome this issue. The first one
consists of integrating two or more isolated topologies, desirably current-fed,
into a single converter to obtain a better voltage gain characteristic. This
approach is followed in [Pan’12] where a Ćuk inverter and a flyback are
integrated (Figure 2-12). The reported efficiency is over 90% for light-load while
this value decreases for nominal load due to increased conduction losses.
Isolatedconverter 1
Isolatedconverter 2
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
26
Figure 2-12. Converter integration introduced in [Pan’12]
The other possibility used to overcome the transformer design is the integration
of the obtained parasitic components in the operation. This possibility has been
widely used for the DC-DC stage of two-stage topologies but also for some
single-stage solutions such as the inverter presented in [Huang’11] (Figure 2-13).
The use of a resonant topology increases the efficiency up to the 95% at full load,
providing efficiency over 90% at light load, with switching frequency up to 190
kHz.
Figure 2-13. Resonant inverter presented in [Huang’11]
2.1.4 Flyback Inverter
As introduced before, the main purpose of using a single-stage topology is to
increase the power density by reducing the component counting. Therefore,
flyback topology is a popular choice since it is a low cost solution, with low
number of components while achieving good performance. Furthermore, the
flyback converter operating in DCM behaves as a current source which is very
beneficial when interfacing a voltage source, e. g. the grid.
Several topological configurations are possible when using a flyback inverter, as
presented in [Fernandez’06]. However, the configuration with two secondary
windings and integrated unfolding is the most popular (Figure 2-14). The two
windings are used for the positive and negative half-cycle, while the primary
switch is modulated to get the sinusoidal current.
Chapter 2 Step-up Inverters for AC-Module Application
27
Figure 2-14. Flyback inverter with two secondary windings [Sukesh'14].
Different modifications to this solution have been proposed to improve the
performance. In terms of efficiency, [Nanakos’12] presents a methodology to
design a flyback inverter optimizing the weighted efficiency, boosting the
European efficiency to 90% for a 100W inverter with 40V DC input and 325 AC
voltage. A passive snubber is implemented in [Mukherjee'13] to use the leakage
inductance energy to reduce turn-off losses, achieving a 5% efficiency
improvement over the inverter with RCD snubber. However, the maximum
reported efficiency is under 88% for a 100W inverter, interfacing a 45V source to
a 110V grid. The DCM flyback can be operated without current sensing as
proposed in [Kasa’05], even for the MPPT operation, which implies a cost saving.
This solution offers a maximum efficiency close to 90% at 100W, but THD and PF
values are not provided.
Since the flyback inverter depicted in Figure 2-14 is a single-stage topology, a
bulky capacitor is needed in parallel with the PV module. This capacitor is
typically an electrolytic one which not only limits the life span of the solution but
also implies a big size and volume, limiting the power density. This issue has
been addressed by different authors in different ways. In [Zengin’13] the input
voltage AC ripple is considered in the control law, allowing a two thirds
capacitance reduction for a THD lower than 5%. Further reduction is possible but
limited by the allowed ripple and therefore the PV power utilization [Kjaer’05].
Decoupling circuits, briefly introduced in section 1.2, have been extensively
proposed for flyback inverters. A common structure is the PV side decoupling
circuit depicted in Figure 2-15. This configuration is presented in [Hirao’05]
reporting a conversion efficiency around 70%. Similar efficiency is obtained in
[Shimizu’06] for a 100W inverter with 35V DC input and 100V AC. However, a
large reduction of the decoupling capacitor is presented allowing a maximum
height of 35mm and achieving a THD under the 5%.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
28
Figure 2-15. Flyback inverter with power decoupling circuit presented in [Hirao’05] [Shimizu’06]
In the solutions presented above the decoupling circuit is referred to the positive
rail like in an active clamp flyback converter. Therefore, the capacitor has two
main tasks: storage element and recycle the transformer leakage inductance
energy. The same concept has been proposed for a configuration using film
decoupling capacitors referred to ground in [HHu’12] and [HHu’13], using two
different transformer configurations. In both cases peak efficiency slightly higher
than 90% is achieved for a 100W prototype with 65VDC and 110VAC.
Other conduction modes than DCM have been applied to the flyback inverter. In
[Kyritis’08] the utilization of BCM is analyzed based on the available PV power.
As a result, the utilization of BCM enables a transformer size reduction or higher
power handled by the inverter for the same size. However, the control
complexity increases and the current needs to be sensed. In addition, the variable
switching frequency has an impact in the topology design as well as in the EMI
filter. The combination of DCM and BCM, according to the power extracted to
the PV module, allows efficiencies over 90% for the whole power range with a
maximum efficiency over 96% at maximum power (200W).
A modified BCM operation allowing negative magnetizing inductance current is
presented in [Sukesh’14]. This negative current allows ZVS operation of both
primary and secondary switches thus, achieving a peak efficiency of 95% for a
250W micro-inverter. A CCM flyback inverter applying analog average current
mode control is introduced in [Yanlin Li’12]. With the CCM operation a
reduction of the RMS and peak currents in the topology is pursued for medium-
high power AC-module inverters. Despite the reported CEC efficiency is 87%, an
improvement of around 8% in respect to the DCM flyback inverter for a 200W
Chapter 2 Step-up Inverters for AC-Module Application
29
micro-inverter. Moreover, the THD is kept under the allowed 5% by the
standards with both operating modes.
2.2. Step-up Transformerless Inverters
As introduced above, the use of a step-up transformer is widespread in isolated
micro-inverters due to the required voltage jump. However, in other PV grid-
connected architectures such as central inverter, systems using transformerless
topologies are demonstrated to be more economical, less voluminous and more
efficient than the isolated inverter [Kerekes’11].
The utilization of non-isolated topologies is not common either in commercial or
custom micro-inverters. Therefore, it is of interest to review the existing solutions
for step-up non-isolated inverters to know their advantages and limitations. This
section presents this comprehensive review of topologies, following the same
classification proposed for the isolated configurations: two-stage, pseudo DC link
and single-stage topologies.
In this thesis an AC-module application benchmark is defined since the reviewed
topologies are presented originally for different applications. According to the
defined specifications, this thesis establishes a comparison of the most suitable
reviewed topologies in terms of size, cost and efficiency. The objective of the
comparison is to provide the necessary information to assess whether a
transformerless topology is suitable for AC-module application.
2.2.1 Two-Stage Topologies
For micro-inverter application a suitable configuration is the cascade connection
of a boost converter and the full-bridge inverter (Figure 2-16). A small topological
variation, as presented in Figure 2-17, allows a time-sharing control strategy
[Ogura’04]. This control strategy pursues an efficiency increase, reducing both
switching and conduction losses of the two stages, by switching one of the stages
under sine-wave modulation while the other does not operate.
As in the isolated solutions, the application of soft-switching techniques enables
not only an increase in the efficiency but also the possibility of increasing the
switching frequency to reduce the size of the inverter, without jeopardizing the
efficiency. In [Kim’10] (Figure 2-18) a soft-switched boost DC-DC converter that
achieves both ZVS and ZCS for all the switches is presented. Furthermore, a
hysteresis current control that allows ZVS in the second stage switches is applied.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
30
Figure 2-16. Boost converter and full-bridge inverter.
Figure 2-17. Time-sharing boost converter with full-bridge inverter. [Ogura’04]
Figure 2-18. Parallel resonant soft-switched boost converter and full-bridge inverter.
[Kim’10]
Figure 2-19. Parallel-input series-output bipolar DC output converter and full-
bridge inverter. [DistPower’08]
In [DistPower’08] a solution based on a DC-DC converter with parallel-input and
series-output connection to the solar panel voltage is presented. This solution
seeks to improve the efficiency by means of processing the energy one and half
times instead of two times as in the previously presented topologies.
Simultaneously, an improvement in the voltage gain of the DC-DC stage is
achieved. One of the preferred configurations of the introduced concept is
depicted in Figure 2-19.
If a half-bridge inverter is used as second stage the number of semiconductors
can be reduced (Figure 2-20) [Rahman’97]. However, the DC-link voltage needs
to be higher than twice the grid voltage peak and the semiconductors of the first
stage have to block that voltage. Additionaly, the inverter output voltage is
bipolar, which increases the filter size. To reduce the filter size, a Neutral Point
Clamped (NPC) inverter can be used (Figure 2-21) [Ma’09].
The main advantage of these inverter topologies, half-bridge and NPC, is that the
middle point of the DC-link is connected to the grid neutral. Therefore, ground
leakage currents can be drastically reduced for certain configurations
[Kerekes’07]. Besides, if DC-DC converters with bipolar output are used as the
first stage, the simultaneous grounding of the source and the load can be
achieved. Therefore, the ground currents would be theoretically avoided.
CpFILTER
Lb Db
Qb
Q1 Q3
Q2 Q4
C1 Lf
Cp
Lb Db
Qb
Q1 Q3
Q2 Q4
Dbp
C1FILTER
Lf
Cp
Q1 Q3
Q2 Q4
Lb Db
LrCr
Dr1
Dr2
Qr1
Qr2
Qp
C1FILTER
LfFILTER
Lbb
Dbb
Qbb Q1 Q3
Q2 Q4C1
Lf
Cp
Cp
Df
Chapter 2 Step-up Inverters for AC-Module Application
31
Figure 2-20. Boost converter and half-bridge inverter. [Rahman’97].
Figure 2-21. Boost converter and Neutral Point Clamped inverter [Ma’09].
In [Durán-Gómez’06] and [SMA’09] a parallel-series combination of boost and
buck-boost DC-DC converters is introduced (Figure 2-22). In [SMAsolar’12] and
[Araújo’08] a topology with coupled inductors is presented, as well as a variation
with tapped inductor (Figure 2-23) and improved voltage gain. It is possible to
generate bipolar outputs with only one inductor [Toko’10] (Figure 2-24) with the
corresponding size reduction, however the number of necessary active switches
considerably increases.
Figure 2-22. Series-combined boost and buck-boost and half-bridge inverter[Durán-
Gómez’06].
Figure 2-23. Center-tapped coupled inductor converter with bipolar output and
half-bridge inverter. [Araújo’08].
Figure 2-24. Single-inductor bipolar output buck-boost converter and half-bridge inverter [Toko’10].
The dual ground capability has also been studied for the classical configuration
presented in Figure 2-16. As a result a topology in which some of the switches are
shared by the two stages is presented (Figure 2-25) [MShen’12]. This topology
Cp
Cp
Lb Db
Qb
Q1
Q2
C1 FILTERLf
Cp
Cp
Q1
Q2
Q3
Q4
Lb Db
QbC1
FILTERLf
Cp
Cp
Lb Db
QbQ1
Q2Lbb
DbbQbb
C1
FILTERLf
Cp
Cp
L1aL1b
L2
Q3
Q4
Q1
D1
D2
Q2C1
FILTER
Lf
Cp
Cp
L1
Q1
Q2 Q3
Q4
Q5
Q6
Q7
C1
FILTERLf
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
32
increases the number of semiconductors and the complexity of the control stage,
while high performance output current (THD lower than 3%) and high efficiency
(higher than 94%) are reported.
Figure 2-25. Boost + FB integrated and dual grounded [MShen’12].
All the previously presented topologies use inductors to achieve the necessary
voltage gain. However, two-stage structures where the boost stage is substituted
by a DC-DC switched capacitors voltage multiplier [ZPeng’13], allow a
significant height reduction while providing 98% efficiency. Therefore, low
profile solutions which simplify the mounting of the micro-inverter in the back-
side of the PV module are possible, thus reducing the mounting cost. In addition,
the low-profile solutions present easier thermal management which is an
advantage in the high-temperature environment of the PV module. In this
regard, the new wide-bandgap semiconductors enable the cascade connection of
a voltage quadrupler and a switched capacitor step-up five-level inverter,
implemented with GaN [Scott’12].
The main features of the two-stage topology survey are presented in Table 2-I.
The results for topologies shown from Figure 2-21 to Figure 2-24 and Figure 2-19
are not included since results for one of the stages are only reported, or there is
no available information.
Table 2-I. Summary of the discussed two-stage topologies.
2.2.2 Pseudo DC-Link Topologies:
Like the flyback converter, the buck-boost converter operated in DCM behaves as
a current source dependant on the output voltage. This characteristic is exploited
in configurations that generate a rectified sinusoidal current which is then
Cp
FILTER
Lb Db1
Qb
Q1
Q3
Q2 Q4
C1
Lf
Cp
Db2
Qb1
Qb2
Figure Vin (V) Po (W) Vo (Vrms) fs (kHz) max eff(%)
2-16 160 1500 200 20 94
2-17 160 1500 200 20 96.5
2-18 100 250* 120 30 -
2-20 120 850 230 6.26 -
2-25 175 931 120 18 96.7
* Estimated
Chapter 2 Step-up Inverters for AC-Module Application
33
unfolded according to the grid polarity. Both inverting (Figure 2-26) [Kang’02]
and non-inverting (Figure 2-27) [Saha’96] buck-boost converters have been
utilized following the scheme presented in Figure 2-5.
Figure 2-26. Buck-boost DCM converter and unfolding stage [Kang’02].
Figure 2-27. Non-inverting buck-boost DCM converter and unfolding stage
[Saha’96].
Using the same operation mode, a switched inductor buck-boost inverter is
introduced in [Abdel-Rahim’11]. This inverter, depicted in Figure 2-28, achieves a
voltage gain increase of 2 compared to the classical DCM buck-boost converter,
while the efficiency is not jeopardized.
Figure 2-28. Switched-inductor buck-boost DCM converter and unfolding stage
[Abdel-Rahim’11].
Figure 2-29. Boost-buck time-sharing converter and unfolding stage [Zhao’12].
In [Zhao’12] a high efficiency PV inverter for 1 kW application is introduced and
shown in (Figure 2-29). This inverter is based on the cascaded connection of a
boost and a buck converter to generate the rectified sinusoidal current. The
reported high efficiency (around 98% at 1 kW) is achieved applying the time-
sharing concept introduced in [Ogura’04], i.e. the converter operates either as
buck or boost mode depending on the instantaneous grid voltage. The main
features for the pseudo DC link topologies discussed in this section are presented
in Table 2-II.
Cp FILTERLbb
Dbb
Qbb
Q1 Q3
Q2 Q4
C1
Lp
FILTERCp
LbbDbb2
Qbb1
Qbb2Dbb1 C1
Q1 Q3
Q2 Q4
Lp
FILTERCp
Lbb1
Dbb
Qbb
Lbb2
C1
Q1 Q3
Q2 Q4
D3
D2
D1
Lp
FILTER
Cp
C1 C2
Q1 Q3
Q2 Q4
Lbt Dbt
Qbt
Lbk
Dbk
Qbk
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
34
Table 2-II. Summary of the discussed pseudo-DC link topologies.
2.2.3 Single-Stage Topologies
Several step-up single-stage inverters have been proposed based on either boost
or buck-boost principles. A single-stage topology that can operate as a buck,
boost or buck-boost is presented in [Prasad’08] (Figure 2-30). This solution uses
the most appropriate configuration (switching pattern) for each PV array and
grid voltage. The solution is operated in DCM to guarantee smooth transition
during operation among the different configurations. Furthermore, the DCM
operation allows the current control based on input and output voltage
measurements, i.e. without current sensing, for all the switching patterns
Figure 2-30. Universal single-stage grid-connected inverter [Prasad’08].
In [Junior’11] the current source inverter (CSI) resulted from the integration of
the boost converter and the full-bridge, shown in Figure 2-31, is presented.
Figure 2-31. Integrated boost inverter [Junior’11].
As a boost converter cannot generate output voltages lower than the input
voltage, a zero cross current distortion is expected. The use of a tri-state
modulation has been proposed in order to improve the current at zero crossing
[Loh’08]. The application of this modulation requires an additional switch to
achieve the inductor current freewheeling state. Further improvement of the CSI
Figure Vin (V) Po (W) Vo (Vrms) fs (kHz) max eff(%)
2-26 50 150 100 10 -
2-27 16*8 200 110 10 70
2-28 20 170 230 10 85
2-29 200-400 1000 230 - 98.5
FILTERCp
Q2 Q3
Q4 Q5
Q1D1
D2
L1
FILTER
Cp
Q1 Q3
Q2 Q4
Lb
Chapter 2 Step-up Inverters for AC-Module Application
35
in the switching pattern as well as in terms of efficiency and size has been
reported in the recent years. As an example [Ohnuma’13] introduces an active
buffer, which consists of two diodes, one switch and one capacitor, to reduce the
twice-line frequency ripple in the input inductor. A reduction of 50% in the
converter volume is achieved, in respect to the cascaded boost and full-bridge
topology, with efficiency levels up to 94%.
The zero crossing distortion is not a problem if the boost inverter is obtained
through the differential connection of two boost converters [Cáceres’99] (Figure
2-32). The same differential configuration is analyzed in [Vázquez’99] for the
buck-boost association (Figure 2-33). Any DC-DC topology, isolated or not, can
be differentially connected in order to inject sinusoidal current to the grid or
generate sinusoidal voltage in stand-alone applications, as discussed before
(Figure 2-10). The challenge of these configurations is the implementation of the
control stage since one of the converters is voltage controlled while the other one
controls the injected current [WZhao’11]. The differential connection of
converters supposes that the grid is connected to the PV module through a
capacitor with DC plus low-frequency variation voltage. Hence, the ground
currents are small as analyzed in [Fang’10].
Figure 2-32. Differential boost inverter [Cáceres’99].
Figure 2-33. Differential buck-boost inverter [Vázquez’99].
The topology presented in Figure 2-31 is the result of the integration of a boost
converter and a bridge in a single power stage. The utilization of any DC-DC
converter is theoretically possible. In [Junior’11] the integration of the buck-boost
converter with the full-bridge inverter (Figure 2-34) is introduced as a solution
for the zero crossing distortion of the integrated boost topology. A variation of
this topology (Figure 2-35) that allows a wider input voltage range and operation
with reactive power is presented in [Funabiki’02].
FILTER
Cp
Lb1 Db1
Qb1 Cb1
Cb2
Lb2Db2
Qb2
FILTER
Cp
Lbb1
Dbb1Qbb1
Cbb1
Cbb2Lbb2
Dbb2Qbb2
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
36
Figure 2-34. Integrated buck-boost inverter [Junior’11].
Figure 2-35. Buck-boost inverter with extended input voltage range [Funabiki’02].
The previously reviewed single-stage topologies were based on the integration of
DC-DC converters with an inverter stage or on the differential connection of two
converters. In the case of buck-boost configurations, the association of two
converters working in DCM alternatively for each positive and negative grid
voltage has been proposed [Kasa’99] (Figure 2-36). This configuration requires
the utilization of two different PV modules or having access to two different
sections inside a single one, but will enable a virtual elimination of the ground
currents by a direct connection of the panels and the ground.
Figure 2-36. Two-sourced antiparallel buck-boost inverter [Kasa’99].
Figure 2-37. Single-stage full-bridge buck-boost inverter [Wang’04].
The same principle and operation mode are applied to the topologies introduced
in [Wang’04] and [Jain’07]. However, these two inverters, as depicted in Figure
2-37 and Figure 2-38 respectively, are using a common source. The configuration
presented in Figure 2-38 is preserved in [Abdel-Rahim’10], but the inductor is
substituted by a switched-inductor network (see Figure 2-39). This substitution
achieves an 2 increase in the voltage gain. Even higher increase in the voltage
gain is obtained in the center tapped topology introduced in [Yris’12], keeping
the configuration shown in Figure 2-38.
FILTERCp Lbb
Q2 Q3
Q4 Q5
Q1
FILTERCp Lbb
Q2
Q3
Q4
Q5Q1
Q6
Q7
D1 D2
C1
FILTERCp
Cp
Lbb1
Lbb2
Dbb1Qbb1
Dbb2Qbb2
Q1
Q2
CBb
FILTER
Cp
Lbb1Lbb2
Qbb1
Q1
Qbb2
Q2
Dbb1Dbb2
Chapter 2 Step-up Inverters for AC-Module Application
37
Figure 2-38. Buck-boost based single-stage inverter [Jain’07].
Figure 2-39. Switched-inductor buck-boost based single-stage inverter [Abdel-
Rahim’10].
The last cited topologies are based on two relatively independent converters that
operate for each half-cycle. However, some topologies such as the ones proposed
in [Kusakawa’01] (Figure 2-40), [Patel’09] (Figure 2-41) and [SMAsolar’10]
(Figure 2-42), share the passive components thus increasing the compactness. As
a disadvantage the number of switches as well as the complexity in the control is
as well extended.
Figure 2-40. Single-inductor buck-boost based inverter [Kusakawa’01].
Figure 2-41. Doubly grounded single-inductor buck-boost based inverter
[Patel’09].
Figure 2-42. Single inductor buck-boost based inverter with dual ground [SMAsolar’10].
FILTER
Cp
Lbb1
Lbb2
Q1
Q2
Qbb1
Qbb2
Dbb1
Dbb2
C1
FILTER
Cp
Q1
Q2
Qbb1
Qbb2
Dbb1
Dbb2
D2D1
D3
D5D4
D6
L1
L2
L3
L4
C1
FILTERCpLbb C1
Q2
Q1
Q3
Q4
Q5
Q6
FILTER
Cp Lbb
C1
Q1
Q2
Q3
Q4
Q5
D1
D2
D3
LbbQ5
Q6
FILTER
Q1 Q3
Q2 Q4
C1
Lf
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
38
Some of the existing solutions reduce the number of necessary semiconductors
by means of coupled inductors. This is the case for the topologies presented in
[Tan’06] (Figure 2-43) and [BHu’08], [YZhang’12] (Figure 2-44), where the
coupled inductors operate as an inductor during the negative half-cycle and as a
flyback transformer for the positive one. In these topologies only one of the
switches is high-frequency switched since transistors Q2 and Q3 are switched
according to the polarity of the grid voltage. In all these topologies based in more
or less to independent converters, a main concern is the possible DC current
injection due to possible asymmetries in the behavior.
Figure 2-43. Three-switch buck-boost inverter [Tan’06].
Figure 2-44. Coupled inductor buck-boost inverter [BHu’08].
All the presented solutions in this section are based either on boost or buck-boost
principle. However, in [Yatsuki’01] an inverter based on the impedance-
admittance conversion theory is introduced. The converter, depicted in Figure
2-45, transforms a high frequency voltage into a high frequency current by means
of an immittance conversion circuit (four terminal LC network). Afterwards a
cycloconverter generates the line frequency current that is then injected into the
grid. Despite the high number of passive components, the compactness of the
solution is still high, since the LC network resonant frequency is much higher
than the grid frequency.
Figure 2-45. Impedance-admittance conversion theory based inverter [Yatsuki’01].
Another energy conversion technique, mostly used in three-phase applications, is
the Z-source inverter [Peng’03]. This family of converters can provide boosting
capabilities to conventional H-bridge inverters by adding an LC impedance
network in the front end of the converter (Figure 2-46). In the recent years single-
FILTERCp
Q2
Q1
Q3
D1
D2 D3
C1
L1a L1b
FILTERCp
Q2Q1
Q3
D1 D2
D3
L1a L1bC1
FILTERCp
Q1 Q3
Q2 Q4
Q5 Q6
Q7 Q8
C1Lr1
Cr1
Lr2
Cr2
Lr3 L1a
L1b
Chapter 2 Step-up Inverters for AC-Module Application
39
phase topologies have been presented for Z-source or modified Z-source
inverters. The dual ground capability, desirable in PV applications, has also been
studied and topologies with lower switch counting were presented (Figure 2-47)
[Tang’11] [Cao’11]. The main drawback of these inverters is the limited practical
conversion range, which limits their use for AC-module application. As an
attempt to improve the voltage gain, in [DLi’13] switched inductor and switched
capacitor structures are analyzed and generalized. The study concludes that an
improvement in a factor of above 2 can be achieved using one switched-inductor
cell.
Figure 2-46. Single phase Z-source inverter.
Figure 2-47. Semi quasi-Z-source inverter with continuous voltage gain [Cao’11].
Table 2-III summarizes the performance of the single-stage topologies discussed
in this section.
Table 2-III. Summary of the discussed single-stage topologies.
2.2.4 Comparison of topologies at AC-module operating conditions
In the previous section the main features of the reviewed topologies are
summarized in Table 2-I, Table 2-II and Table 2-III for the three considered
topological groups. No conclusions can be drawn from these summaries since the
Figure Vin (V) Po (W) Vo (Vrms) fs (kHz) max. eff.(%)
2-30 100-200 500 230 10 -
2-31 25 200 127 - -
2-32 100 500 127 30 (max)^ -
2-33 50 200 120 -
2-35 100 640 100 17 (max)^ -
2-36 48 500 100 9.6 80
2-37 75 500 110 10 -
2-38 90 300 110 87
2-39 20 60* 230 10 -
2-40 30 50 110 70 87 (50% load)
2-41 92 170 100 10 87*
2-43 50 1000 70 10 -
2-44 50-300 1000 120 5 -
2-47 160 200 110 20 94,5
^ Variable frequency operation
* Estimated
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
40
topologies are designed for different power, input and output voltages and
frequency specifications.
In this section first a typical benchmark for AC-module application is proposed
based on the requirements introduced in the introductory chapter. Then the most
feasible transformerless topologies are designed and simulated in the frame of
the proposed benchmark, with the aim of providing information to select
transformerless topologies for AC-module application. The design and
simulation results together with other general issues are used in the next section
to compare the topologies under different points of view, from number of
components to simulated efficiency.
2.2.4.1 Benchmark settings
The following design specifications are considered for the detailed comparison,
based on the features mentioned in chapter 1 [Meneses’13]:
The output voltage and power of the solar panel have been set to 30 V
and 250 W respectively. These values correspond to a standard crystalline
PV module, as shown in Figure 2-11.
The micro-inverter is connected to US grid (110 V at 60 Hz). US grid is
selected since the necessary voltage gain is half as compared to the EU
grid and therefore, more adequate for transformerless topologies.
The selected switching frequency is 40 kHz for DC-AC stages, in the two-
stage topologies, and for all the pseudo DC link and single-stage
topologies.
In the DC-DC stages of the two-stage topologies a switching frequency of
80 kHz is selected.
Maximum ripple amplitude of 5% has been set for both the DC-link
voltage and the input voltage, to ensure the extraction of the maximum
available power.
DC-link voltage in the two-stage topologies is set to 200 V, except the
topologies with half-bridge as a second stage in which the bus voltage is
360 V.
The maximum allowable current ripple is 20% for the converters
operating in Continuous Conduction Mode (CCM). In case the converter
operates in Discontinuous Conduction Mode (DCM), the inductance has
been selected to ensure DCM for the whole operating range.
2.2.4.2 Comparison criteria and results
The thirteen most feasible transformerless solutions from the literature review
have been designed and simulated according to the proposed benchmark. The
Chapter 2 Step-up Inverters for AC-Module Application
41
selected topologies are considered to be representative of their group and the
obtained results can be extrapolated to the rest of solutions.
Figure 2-48 and Figure 2-49 show simulation results for two of the thirteen
simulated inverters. Performed simulation of the DC-DC stage of the topology
presented in Figure 2-22 are shown in Figure 2-48, illustrating the inductor
currents as well as the drain to source and the output voltages of the boost
(upper part) and buck-boost (bottom part) converters.
Figure 2-48. Simulated waveforms of the DC-DC converter in the two-stage topology presented in Figure 2-22.
Figure 2-49 shows the simulated inductor currents for the single-stage topology
presented in Figure 2-36. As it can be seen, each converter operates in DCM
during the proper half part of the grid voltage.
Figure 2-49. Simulated waveforms in a grid period and detail of maximum duty cycle of the single-stage topology presented in Figure 2-36
In order to facilitate the comparison and the discussion presented in the next
section, the obtained results are divided in two different parts: those related with
general features derived from the topologies and those coming from the design
and simulation process.
The designed inductances used for the simulations are shown in Table 2-IV. The
same table provides the considered general features derived from the analysis
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
42
and design of the selected topologies. These features allow a general discussion,
introduced in the next section, between topological groups in terms of:
grid interface together with the required type of filter,
necessary capacitance for a correct power decoupling and,
number of passive components and semiconductor devices.
Table 2-IV. General issues of the analyzed topologies, under the benchmark settings.
The other part of selected parameters, presented in Table 2-V, consists of data
obtained from the simulations as well as parameters obtained directly from the
design. These parameters compose the criteria used for the individual
comparison of the selected topologies, and are:
dual ground capability,
maximum ideal duty cycle applicable in the analyzed topologies,
mode of operation and,
passive and semiconductor ratings obtained by simulation.
Inductors* Cap:F(E)^ Transistors Diodes
Fig. 2-16 A.1 166uF@200V Lb=191μH 2 2(0) 5 1 VSI 4T LCL
Fig. 2-20 A.2 52uF@360V Lb=206μH 2 3(0) 3 1 VSI 4T LCL
Lb=382μH
Lbb=332μH
Fig. 2-26 B.1 7,4mF@30V 2 1(1) 5 1 CSI 4T CL
Fig. 2-27 B.2 7,4mF@30V 2 1(1) 6 2 CSI 4T CL
Fig. 2-29 B.3 7,4mF@30V Lbt=191μH Lbk=1,34mH 2 2(1) 6 2 CSI 4T CL
Fig. 2-31 C.1 7,4mF@30V Lb=182μH 1 0(1) 4 2 CSI 4T CL
Fig. 2-32 C.2 2x100uF@30V Lb1=382μH Lb2=382μH 2 3(0) 2 2 CSI 2T CL
Fig. 2-33 C.3 2x100uF@30V Lbb1=20μH Lbb2=20μH 2 3(0) 2 2 CSI 2D CL
Fig. 2-36** C.4 2x14mF@30V 2 1(2) 4 2 CSI 2T CL
Fig. 2-38 C.5 7,4mF@30V 2 1(1) 4 2 CSI 2T CL
Fig. 2-40 C.6 7,4mF@30V 1 1(1) 6 0 CSI 2T CL
Fig. 2-41 C.7 7,4mF@30V 1 1(1) 5 3 CSI 3T CL
**: two modules or two sections of 30V/125W
Grid
interface
LCL
Lf=1,15mH
Filter
Lbb1=10μH Lbb2=10μH
^: Film (F) and Electrolitic (E) capacitors
*: inductor of the CL component of the output filter not considered
Inductance value
Fig. 2-22 A.3 2x100uF@200V 2 3(0) 4
Topology Solution Power decouplingNumber of
Lbb=10μH
2 VSI 2T
Lbb=10μH Lf=1mH
Chapter 2 Step-up Inverters for AC-Module Application
43
Table 2-V. Simulation results and design parameters under the benchmark settings.
The proposed passive and semiconductor ratings, obtained from the simulation
results, are used as a simple method to compare the selected topologies in terms
of size and cost [Kjaer’05], respectively. The proposed passive component rating
consists of the stored energy in the decoupling capacitor and the inductors of
each topology, and can be calculated according to (2-1).
(2-1)
The proposed semiconductor rating is based on the product of the maximum
voltage and the RMS current withstood by every semiconductor in each
topology, and can be calculated according to (2-2). In equations (2-1) and (2-2) nI
and nSc are the number of inductors and semiconductors respectively, which are
presented in Table 2-IV together with the inductances and decoupling capacitors.
(2-2)
It must be noted that the accomplished comparison based on the presented
parameters presents limitations derived from the influence not only of the
specifications set in the benchmark but also by the design process.
The maximum applicable duty cycle is a clear example of a benchmark affected
parameter. Furthermore, the passive component ratings are also affected by the
set of specifications since the chosen switching frequency for DC-DC stages is
twice than the frequency used in DC-AC stages.
Inductors (mJ) Dec. Cap. (J) Semiconductors (kVA)
Fig. 2-16 A.1 NO 0.85 13,98 3,32 15,10 CCM
Fig. 2-20 A.2 NO 0.92 14,61 3,37 11,96 CCM
Fig. 2-22 A.3 YES 0.87 14,58 4,00 13,41 CCM
Fig. 2-26 B.1 NO 0.68 18,00 3,33 22,72 DCM
Fig. 2-27 B.2 NO 0.68 18,00 3,33 22,65 DCM
Fig. 2-29 B.3 NO 0.85 41,00 3,33 12,65 CCM
Fig. 2-31 C.1 NO 0.81 31,00 3,33 31,65 CCM
Fig. 2-32 C.2 NO 0.85 32,00 0,09 10,42 CCM
Fig. 2-33 C.3 NO 0.76 16,00 0,09 16,71 DCM
Fig. 2-36** C.4 YES 0.68 25,00 12,60 30,75 DCM
Fig. 2-38 C.5 NO 0.68 26,00 3,33 33,39 DCM
Fig. 2-40 C.6 NO 0.68 13,00 3,33 48,41 DCM
Fig. 2-41 C.7 YES 0.68 13,00 3,33 43,05 DCM
**: two modules or two sections of 30V/125W
Topology SolutionDual
Grounding
Dmax
(USgrid)
Components ratingMode
In
k
pkCppkLkk VCpILPR1
2
_
2
_2
1
2
1
SC
ii
n
i
RMSIVScR1
2
max
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
44
The selected operation mode affects both of the proposed ratings. The buck-boost
based topologies are designed in DCM thus increasing the peak and RMS
currents, influencing (2-1) and (2-2) respectively. However, the DCM operation
simplifies the control stage in the buck-boost topologies. These constraints have
been taken into account in the following discussion.
2.2.5 Discussion
In this section a discussion for both the general and the design and simulation
issues is presented. The analyzed topologies are cited according to the column
“solution” in Table 2-IV and Table 2-V. The name given to the different
topologies in those tables consists of the code “letter.number”, indicating the
letter the topological group: “A” for two-stage topologies, “B” for pseudo DC-
link topologies and “C” for single-stage approaches.
2.2.5.1 General Features
The differences among the topological groups can be discussed based on the
selected general features.
Grid interface and output filter:
The output filter in grid-connected inverters is essential to comply with the tight
harmonic requirements. The type of necessary filter depends on the topology
grid interface, as shown in Table 2-IV. In the two stage topologies, solutions A,
the interface to the grid is through a voltage source inverter (VSI) and therefore a
LCL filter is required. However, the other two topological structures (solutions B
and C) use a current source inverter (CSI) to interface the grid and only a CL
output filter is necessary.
The inverter side inductor of the LCL filter (Lf in Figure 2-16) plays an essential
role in the behavior of the VSI, since it enables the necessary output current
control in grid-connected applications. The CL filter, independent of the inverter
structure, is designed to improve the grid current quality to comply with the
relevant standards. Therefore, in order to present a fairer comparison the CL
components of the output filter for both CSI and VSI are excluded.
Power decoupling capacitor:
In terms of power decoupling, pseudo-DC link and single-stage topologies
(solutions B and C) use a bulky electrolytic capacitor in parallel with the PV
module, thus limiting the size reduction and the lifetime of the micro-inverter
[HHu’10]. In two-stage topologies (solutions A), lower capacitance in the DC-link
can be used allowing the utilization of different capacitor technology. The
Chapter 2 Step-up Inverters for AC-Module Application
45
technology change implies a possibility of size/height reduction as well as an
increase in the life-span of the integrated inverters. The application of decoupling
circuits is possible for the three topological groups and opens the possibility to a
further capacitance reduction, allowing the use of ceramic capacitors. However,
the number of topological variations significantly increases requiring a profound
analysis that is out of the scope of the comparison presented in this thesis.
Nevertheless, the analyzed single-stage configurations based on the differential
connection of two boost (C.2) or buck-boost (C.3) converters reduce drastically
the parallel capacitor. Therefore, the possibility of using longer lifetime capacitor
technologies can be explored for these configurations. Furthermore, these
topologies allow a capacitor size reduction with respect to the other topologies,
improving the power density. On the other hand, solution C4 needs more
capacitance for a proper power decoupling thus increasing the capacitor size.
Number of passive and semiconductor devices:
Despite the pseudo-DC link and single stage topologies (solutions B and C
respectively) are introduced with the idea of increasing the power density by
reducing the component account, the performed analysis shows that only certain
single-stage solutions are effectively reducing the number of inductors. In terms
of capacitors all the solutions use a similar number of them, with predominance
of electrolytic ones in solutions B and C. In respect to the number of
semiconductors, the total amount is also similar in all the analyzed solutions.
However, in solutions B and C some of the switches are operated at line
frequency.
2.2.5.2 Design and simulation based parameters comparison
In this section the selected topologies are compared according to simulation and
design based parameters, with the aim of providing the necessary information to
select transformerless topologies for AC-module application.
Based on simulation results the proposed semiconductor and passive component
ratings, presented in Table 2-V, have been calculated according to (2-1) and (2-2).
The stored energy in the decoupling capacitor is similar for the analyzed
topologies, with some exceptions highlighted in the previous section. Therefore,
the inductors contribute especially to the size of the solutions. Figure 2-50 shows
a comparison of the results introduced in Table 2-V in respect to the inductor and
semiconductor calculated ratings.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
46
Figure 2-50. Semiconductor and inductor components ratings for the simulated configurations; Red: two-stage (A solutions in Table 2-V), Blue: pseudo DC link (B
solutions in Table 2-V), Yellow: single-stage boost based, Green: single-stage buck-boost based (C solutions in Table 2-V).
As a result, the two-stage configurations (solutions A, marked red in Figure 2-50)
are the best positioned in both ratings, thus being the preferable option. It should
be emphasized here that the switching frequency set for the DC-DC converters is
doubled compared to the stages that withstand the AC component. A main
drawback of the high-frequency full-bridge inverter as a second stage is the
appearance of ground leakage currents. These currents have a negative impact
not only in harmonic content or EMC but also in personal safety. This is a known
issue and several modulation techniques and circuit modifications have been
proposed to mitigate the effect of the parasitic capacitor currents, thus complying
with the regulations [Kerekes’11], [Kerekes’07], [Gubía’07], [Araujo’10], [J-
MShen’12], [González’09], [Byang’12], [González’07].
These modifications can be also used in the rest of reviewed topologies, of any
group, to mitigate or even eliminate the leakage currents. However, they are
based on either DC or AC decoupling switches [Kerekes’07] therefore, more
complex control and more devices are necessary. The analysis of these
modifications requires deeper insight and it is out of the scope of this thesis due
to the wide range of possibilities that could be generated.
A simpler alternative is the use of a half-bridge inverter as second stage since the
device counting is reduced and ground currents can be drastically reduced or
eliminated, i.e. using a DC-DC stage with bipolar output. Therefore, the analyzed
solution A.3 which allows dual grounding with similar size and cost is the
preferred two-stage configuration.
In the case of the topologies with unfolding bridge (solutions B) the low
frequency switching of this element guarantees low leakage currents. Regarding
the single-stage configurations (solutions C), the dual ground is also possible in
0
10
20
30
40
50
0 10 20 30 40 50
Sem
ico
nd
uct
or
Rat
ing
(kV
A)
Inductors components Rating (mJ)
A.1
A.2
A.3
B.1
B.2
B.3
C.1
C.2
C.3
C.4
C.5
C.6
C.7
Chapter 2 Step-up Inverters for AC-Module Application
47
two of them, C.4 and C.7. From this selection of topologies, solutions A.3, B.1 and
C.7, with a similar estimated size, have been selected as representatives of each
topological group. More detailed simulations of these representative topologies
have been performed to obtain a comparison in efficiency (Figure 2-51). SPICE
Simulation models of the semiconductors MBR40250G (diode), IRFB4332PBF
(MOSFET) and IRFP4668PBF (Unfolding stage), available online, and Pemag®
FEA SPICE simulation models of the magnetic elements have been used in the
efficiency estimation.
Taken the selected representative topologies as reference, the rest of suitable AC-
module topologies are compared between them inside the groups.
Two stage topologies (A):
In the other two-stage approaches, A.1 and A.2, the number of high-frequency
switched semiconductors and inductors of the DC-DC stage is half than in
topology A.3. However, they must handle twice the power than each of the DC-
DC converters with bipolar output. Therefore, their efficiency is expected to be in
similar levels than the efficiency of A.3 presented in Figure 2-51, achieving a
weighted efficiency close to 91%.
Figure 2-51. Estimated efficiency of representative topologies A.3, B.1 and C.7 of each presented group
As set in the benchmark, the US grid voltage and frequency are considered in the
comparison with a DC-link voltage of 200 V. As an exception, the DC-link
voltage has been increased to 360 V for the topology C.3, which uses a half-
bridge inverter as second stage. In the considered two-stage topologies, operated
in CCM, the maximum obtained ideal duty cycle is higher than 0.85, which
implies difficulties in the converter implementation. This situation is even worse
in the case of connection to the European grid as the voltage is doubled. Several
high-step-up converters have been proposed in the literature [WLi’11] as an
alternative to the boost converter for low voltage PV systems.
78
80
82
84
86
88
90
92
94
0 100 200
Eff
ieie
ncy
(%
)
Output Power (Po)
Two-stage (A.3)
Pseudo DC link (B.1)
Single-stage (C.7)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
48
The cascaded connection of one of these DC-DC converters and a step-up
inverter among the reviewed is an interesting combination to achieve the
necessary voltage boosting.
Pseudo-DC link topologies (B):
The efficiency variation with the output power of the simulated pseudo-DC link
buck-boost topology is flatter than for the two- (A.3) or single-stage (C.7)
topologies (Figure 2-51) thus achieving the highest weighted efficiency (93%). In
the case of the non-inverting buck-boost the increase in the number of switching
elements presages an efficiency reduction, which will be higher at low power
levels. Despite the solution B.3 could achieve an improvement in the efficiency of
the solution B.1 due to the applied time-sharing strategy together with CCM
operation, its size is clearly higher due to the necessary big inductors to ensure
this conduction mode.
Single-stage topologies (C): boost based
The boost based single-stage inverters (solutions C.1 and C.2) present higher size
than the previous topologies, except solution B.3. Solution C.1 is more expensive
and the expected current THD is high due to the zero crossing distortion.
Solution C.2 corrects this drawback by means of the differential connection while
using less semiconductor devices. Furthermore, the negative DC side is
connected to the middle point of the output capacitors. Therefore, the negative
DC side voltage is more stabilized and the ground currents will be reduced, as in
half-bridge inverters [J-MShen’12].
Single-stage topologies (C): buck-boost based
The same differential configuration is used in solution C.3 for buck-boost
converters. Based on the obtained ratings this solution is smaller than the
previous one (C.2) with a similar cost, presenting equivalent ratings to the two-
stage analyzed inverters. The size reduction is due to DCM operation. In
addition, the reduced decoupling capacitor makes the differential configurations
of interest for AC-module application, while the complex control implementation
is the major drawback.
The rest of buck-boost based single-stage topologies (solutions C4 to C7), have a
higher cost than the analyzed two-stage topologies. Due to the operation in
discontinuous conduction mode, the RMS currents and therefore the obtained
semiconductor ratings are high. According to the simulation results, RMS
currents and inductor peak current are at least 43% bigger and 5 times higher
respectively, in the DCM buck-boost operated topologies than in the CCM boost
Chapter 2 Step-up Inverters for AC-Module Application
49
converter of solution A.1. Despite only one transistor (or two in the case of C.7) is
high frequency switched in the analyzed topologies, the efficiency of these
configurations is not expected to be high due to the aforementioned RMS
currents. The simulation for topology C.7 confirms this performance with an
obtained weighted efficiency of 90.2% (Figure 2-51).
Furthermore, since these topologies (from Figure 2-36 to Figure 2-44) are based in
two more or less independent converters an important concern is the DC current
injection. As an example, in topology C.7 (Figure 2-41) transistor Q2 is switched
either constantly on for negative grid voltage or under PWM modulation when
the grid voltage is positive. An important effort in the control stage is necessary
to manage this asymmetric operation.
In respect to leakage currents, the simulated solutions C.4 and C.7, as well as the
topologies depicted in Figure 2-42, Figure 2-43 and Figure 2-44, allow dual
grounding of the grid and the DC side thus, theoretically eliminating ground
currents. In solutions C.5 and C.6 either the positive (C.5) or the negative (C.6)
DC side is connected to both the grid neutral or the grid line, depending on the
grid half-cycle, through low-frequency switches. Therefore, the DC side voltages
have a big low-frequency component and the ground leakage currents are
expected to be low. Furthermore, the DC side transistors in C.6 (Figure 2-40)
would allow a DC side decoupling like in full-bridge inverters by means of
complicating the control strategy and therefore, increasing the losses since more
transistors would be high-frequency switched.
2.3. Conclusions
In this chapter the main topologies for both isolated and non-isolated micro-
inverters have been reviewed. In both cases the topologies have been grouped in
two-stage, pseudo-DC link and single-stage topologies.
The utilization of a transformer is clearly adopted to overcome not only the
elevated voltage difference between the PV module and the grid, but also the
possible safety issues required by the grid connection. Converters with inherent
boosting capability, i.e. boost and buck-boost derived, are commonly used in this
application, and the flyback inverter is one of the most implemented due to its
simplicity and good cost-performance ratio. A main issue of the isolated
topologies is the design of the step-up transformer, even more in buck-derived
topologies, which result in considerably high leakage inductance and stray
capacitance.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
50
A comprehensive review of single-phase non-isolated step-up inverters has been
presented. The contribution of this thesis is to provide information for selecting
suitable transformerless topologies for AC-module application. A typical
benchmark for AC-module application is defined to compare the reviewed
topologies, since they were presented for several different applications with
completely different specifications. Among other issues, a comparison in terms of
size and cost has been established using the proposed passive and semiconductor
ratings. The simulated efficiency of a representative topology of each group, with
low leakage currents, has been obtained as a topological reference.
As a result of the developed comparison, the two-stage topologies, including the
solution with dual grounding capability, are the preferred option for the set
benchmark in which the switching frequency for the DC-DC stage is set twice
than for the DC-AC one. Therefore, the cascaded connection of a step-up DC-DC
converter and a step-up inverter among the reviewed is an interesting
topological configuration for AC-module application.
The analyzed pseudo-DC link approaches are an alternative solution in terms of
size and cost. Furthermore, ground currents are expected to be low in these
solutions because of the line frequency interface and the weighted efficiency is
the highest due to the flat behavior of the efficiency with the output power. In the
case of single-stage solutions, they present higher cost and lower weighted
efficiency. However, the differentially connected inverters provide advantages
from the size point of view and further analysis is desirable.
51
Chapter 3
Proposed Single Stage Forward
Micro-Inverter
Chapter 3 Proposed Single Stage Forward Micro-Inverter
53
3. Proposed Single Stage Forward Micro-
Inverter
3.1. Introduction
In the AC-module topologies compiled in the previous section exists certain
similarities with the power factor correction (PFC) application. The utilization of
power decoupling circuits to balance the twice line frequency component
[HHu’10] is directly related with the attempts of reducing the processed energy
in PFC [OGarcia’03]. Furthermore, different of the presented topological
solutions have been derived from PFC topologies such as the full-bridge inverter
presented in [Araujo’10], or control strategies have been imported to comply
with the harmonic regulations as in [Fernandez’06].
In this thesis an isolated buck-derived micro-inverter controlled to operate in the
boundary (BCM) between the continuous (CCM) and discontinuous (DCM)
conduction modes is originally proposed. The application of this control strategy
is common in low and medium power PFC converters and guarantees high
power factor with a simple implementation. After presenting the single-stage
forward micro-inverter with BCM control, the operation principle, variable
switching frequency operation and power decoupling are discussed. In addition,
the MPPT capability of the proposed topology is presented.
In order to obtain a simple low-cost solution, the implementation of the proposed
micro-inverter with a BCM controller for PFC is proposed. The main necessary
modifications are discussed, with the focus on the zero current detection (ZCD)
and the compatibility of the controller with a MPPT algorithm. The resulting
prototype is taken as a proof of concept of the proposed topology, and
experimental results are provided for both DC and AC operation.
3.2. Proposed Forward Micro-Inverter
Figure 3-1 shows a buck converter connecting a PV array to the grid through an
unfolding stage, following the pseudo DC-link structure presented in Figure 2-5.
Therefore, the buck converter is controlled as a current source providing a
rectified sinusoidal current that is injected to the grid with the corresponding
polarity by means of the unfolding stage.
If in this configuration the considered energy flow is from the grid to a
hypothetical load substituting the PV array, the depicted converter becomes a
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
54
PFC circuit. In this application the boost converter operated in the boundary
between conduction modes, also known as critical current mode (CrCM), is a
suitable configuration for low and medium power applications [Lai’93]
[Yang’13]. Therefore, applying the same control scheme to the buck converter
presented in Figure 3-1, a sinusoidal current proportional to the grid voltage,
with high power factor, can be obtained.
Figure 3-1. Buck converter connected to the grid.
The buck inductor current in BCM during a switching cycle is depicted in Figure
3-2. According to the presented waveform the average current value, i. e. the
output current, can be easily obtained. Based on the obtained average current,
presented in (3-1), the inductor current is proportional to the grid voltage if the
off time is kept constant.
(3-1)
Figure 3-2. Inductor current of a BCM buck converter
Similarly to PFC boost converter [Lai’93], for the actual implementation of the
BCM control in the buck converter the PWM is modulated by comparing the
sensed inductor current with either zero (turn on) or a sinusoidal envelope (turn
off), as shown in Figure 3-2.
In the case of the system introduced in Figure 3-1, the PV array voltage is
required to be higher than the grid peak voltage for a proper operation.
However, in the case of AC-module application in which only one PV module is
connected to the grid, a voltage boosting is required. Therefore, a buck derived
topology with isolation is necessary.
PV
array
LC
Vp Vo
+
-+
-
. if ),()(
2
1
2
1, constttVoKt
L
tVoii OFFOFFLpkAVGL
iLiL,AVG
t
)(tiLpk iL iL
t
L
tVoVp )(
L
tVo )(
TtOFF
iL,AVG
Lpki
Chapter 3 Proposed Single Stage Forward Micro-Inverter
55
Any of the buck derived topologies could be used. However, due to the power
range of the commercial PV modules (lower than 300W), simple topologies as the
forward converter are preferred. The proposed forward power stage operated in
BCM with unfolding stage, following the previously presented scheme for the
buck converter, is presented in Figure 3-3.
Figure 3-3. BCM forward micro-inverter with unfolding stage.
The integration of the unfolding stage to obtain a single-stage inverter can be
made by applying a second winding and extra switches like in the flyback
inverter. This configuration is applied in the push-pull forward inverter
introduced in [Xianmin’11]. However, the necessary extra high frequency
switches increase considerably the number of semiconductors in the current path
and the efficiency is expected to be reduced, nevertheless measurements are not
reported.
In the proposed single-stage forward micro-inverter, which is a contribution of
this thesis [Meneses’12], the forward transformer structure is maintained as
depicted in Figure 3-4. The integration requires the use of bidirectional switches
in the secondary side and the inclusion of an extra switch in the primary
windings. The introduced switches in the secondary side are line-frequency
switched while the two primary switches are driven alternatively for each half-
cycle of the grid voltage, minimizing the number of semiconductors in the
current path.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
56
Figure 3-4. Proposed single-stage forward BCM micro-inverter
3.2.1 Operation of the single-stage forward micro-inverter
The operation of the proposed forward micro-inverter is divided in two different
sub-circuits for the positive and negative grid half-cycles (
Figure 3-5). These two sub-circuits are obtained by switching the secondary side
transistors at line frequency, according to the voltage polarity: MA and MD for
positive line voltage, and MB and MC for the negative half-cycle. It must be
noted that the line switched transistors which are not active in both sub-circuits
have been excluded from
Figure 3-5 for a simpler representation.
Figure 3-5. Equivalent circuits and driving signals for positive and negative grid cycles.
Regarding the primary side, M1 and M2 are switched applying the above
mentioned BCM control strategy in the corresponding line half-cycle: M1 during
the positive grid voltage and M2 during the negative one. The driving signals for
all the transistors of the topology are presented in Figure 3-5.
The transformer demagnetization within the proposed topology is done by
means of the primary winding that is not utilized for the power transfer, as in a
classical forward converter. As a consequence the turns ratio between the two
primary side windings is required to be one and therefore, the maximum
applicable duty cycle is limited to the 50%.
PV
panel
M2M1
MD
MA MB
MC
n1 n3n2
L
Co
CinVgrid
iinipiL
Chapter 3 Proposed Single Stage Forward Micro-Inverter
57
Regarding the high-frequency operation of the proposed forward micro-inverter,
Figure 3-6 shows the main ideal operation waveforms at different values of
positive and negative line voltage. The alternation of the primary switches
between power transfer and demagnetization is shown, as well as the variable
switching frequency according to the output voltage.
As it can observed the operation remains like in a DC-DC forward converter
operated in BCM. Therefore, the voltage stress of the semiconductors is the same
than for a DC-DC forward operated between the PV panel voltage and the peak
grid voltage. The primary switches must block twice the input voltage and the
secondary diodes the product of the input voltage and the transformer primary
to secondary turns ratio. Regarding the current, the peak current in the
secondary side is twice the average output current. This value is reflected to the
primary side through the transformer turns ratio.
a) b)
Figure 3-6. DC waveforms at positive (a) and negative (b) grid voltage.
Furthermore, the converter voltage gain can be expressed as the product of the
input voltage, the primary to secondary turns ratio and the duty cycle (3-2), as
the CCM or BCM forward converter.
(3-2)
iL
Vn1
iM1
iD_M2
)(tiLpk
Lin
n
1
2
Vp
VL
)(1
2 tVoVpn
n
)(tVo
Vp
iL
Vn1
iD_M1
iM2
)(tiLpk
Lin
n
1
2
Vp
VL
)(1
2 tVoVpn
n
)(tVo
Vp
Vptdn
ntVo )()(
1
2
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
58
3.2.2 Switching frequency range
The implemented control method assumes that the off time remains constant
during the inverter operation, as discussed previously. Therefore, this control
method implies variable frequency operation in order to modify the duty cycle
sinusoidally, according to the inverter voltage gain introduced in (3-2). Using the
inductor current waveform in Figure 3-2, the on-time (3-3) and consequently the
operation frequency dependency on the grid voltage (3-4) can be obtained.
(3-3)
(3-4)
According to these expressions, the minimum switching frequency is obtained at
the peak value of the line voltage while the maximum one is limited by the
selected off-time when the line voltage crosses zero. The normalized switching
frequency during a grid half-cycle is presented in Figure 3-7, for two different
turns ratio and the same PV module power.
Figure 3-7. Normalized Frequency variation
3.2.3 Inductance value
As introduced in (3-1), if the off-time is kept constant, the output current is
proportional to the output voltage. Utilizing this result in the calculation of the
delivered power and considering ideal efficiency, the relationship between the
extracted power from the PV panel, the inductance value and the selected off-
time is achieved.
OFFON t
tVoVpn
n
tVott
)(
)()(
1
2
OFF
swt
Vpn
n
tVotf
1)(1)(
1
2
0 0.005 0.010.4
0.6
0.8
1
n
1.5*n
n
1.5*n
time (s)
Sw
itch
ing f
requen
cy (
p.u
.)
Chapter 3 Proposed Single Stage Forward Micro-Inverter
59
Based on the extracted expression, presented in (3-5), a trade-off between the
chosen off-time, i.e. maximum allowed frequency, and the necessary inductance
value must be achieved, for the maximum power provided by the PV module.
(3-5)
3.2.4 Power decoupling
According to the waveforms presented in Figure 3-6, the inductor current is
reflected at the input by means of one of the primary windings. If the
magnetizing inductance current is neglected, this reflected current is the micro-
inverter input current (iin in Figure 3-8). The average value of this high-frequency
input current is calculated according to (3-6) and presents a square sinusoidal
value as expected.
(3-6)
The difference between this twice line-frequency demanded current and the DC
current provided by the PV module (ip in Figure 3-8) must be balanced. As
introduced in chapter 1 for the single-stage topologies, the straightforward
decoupling method is the use of an electrolytic capacitor in parallel with the PV
module. This capacitor is a limiting factor of the lifetime and a main contributor
in size of the micro-inverter.
Figure 3-8. Input current balance in the presented forward micro-inverter
The necessary capacitance is obtained according to expression (1-1). Since the
capacitor is in parallel with the PV module, the fluctuation of the voltage implies
a fluctuation of the power, decreasing the average extracted power from the PV
module [Kjaer’05]. Therefore, lower capacitances allow smaller size but reduced
extracted power. In [Kjaer’05] a ripple lower than 10% is recommended to
achieve a utilization of 98% of the PV module maximum power.
OFFRMSpkpkPV tVoL
IoVoP
2
2
1
2
1
)(sin22
1 2
2
2
, tVpntFL
Vofton
L
VoVpni
pk
swAVGin
PV
pan
elM1
Ci
n
iinip iiin,AVG
t
iin
ip
M2
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
60
3.2.5 MPPT capability
The power available in the system is provided by the solar panel. As introduced
in chapter 1.2, the implementation of a MPPT algorithm is mandatory to extract
the maximum available power over the time, due to the PV module
characteristics.
In the proposed micro-inverter, the injected current into the grid is directly
related with the inductor peak current envelope. Therefore, the MPPT algorithm
would modulate the amplitude of the current envelope, as depicted in Figure 3-9,
making the proposed micro-inverter compatible with the MPPT algorithm
implementation. Figure 3-9 show the inductor current for two different points of
the PV module which could be either two MPP (1 and 2a) for different irradiation
or temperature, or one of the steps (2b) towards MPP 1 taken by the MPPT
algorithm.
Figure 3-9. Inductor current for two different power levels.
As stated in section 3.2.2 a trade-off between power and switching frequency is
necessary in the proposed topology. Consequently, the maximum frequency and
the inductance value are selected for the maximum power provided by the PV
module. However, the MPPT operation of the converter implies the modification
of the maximum switching frequency with the extracted PV power as expressed
in (3-7), which is a rewritten version of equation (3-5). Hence the switching
frequency of the proposed topology increases at light load operation as depicted
in Figure 3-9 and Figure 3-10.
(3-7)
iLiL,AVG_1
t
)(1_ tiLpk iL
iL
iL,AVG_2
t
)(2_ tiLpk iL
1
2b2a
V
P
PV
RMSPV
PL
VoPf
1
2)(
2
max
Chapter 3 Proposed Single Stage Forward Micro-Inverter
61
Figure 3-10. Normalized switching frequency variation for different MPP.
3.3. Implementation with analog PFC controller
In order to verify the proposed concept, a prototype of the proposed single-stage
forward micro-inverter has been built. The prototype, shown in Figure 3-11, has
been designed to comply with the following specifications:
Input voltage: 30V
Output power: 50W
Grid voltage: 110V @ 60Hz
Maximum duty cycle: 45%
Maximum switching frequency 150kHz
Figure 3-11. Single-stage forward micro-inverter
Considering the maximum frequency allowed and the grid voltage, an
inductance of 1.6mH is necessary according to (3-5). A RM7 core has been used to
implement the mentioned inductor. The maximum duty cycle sets a requirement
for the primary to secondary turns ratio of 1:14, for the correct voltage boosting.
RM12 core is selected to implement the forward transformer and it must be noted
that both primary windings transfer energy to the secondary side thus,
increasing the size of the transformer. Transistors 2SK3586-01 and IPA90R340C3
0 0.005 0.010
0.5
1
1.5
2
2.5
Pnom
0.5*Pnom
Pnom
0.5*Pnom
time (s)
Sw
itch
ing
fre
qu
ency
(p
.u.)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
62
have been used for the primary and secondary switches respectively. In regard to
the primary and secondary diodes, the Schottky diode STPS8H100D and the
ultrafast diode STTH810D have been selected.
Due to the similarity of the proposed micro-inverter with the PFC applications
and considering the implementation of a low-cost solution [CFernández’07], an
analog controller (UCC38050) designed for a BCM PFC boost converter is used to
control the proposed micro-inverter. Figure 3-12 shows a block diagram of the
proposed analog controller implementation. The polarity information is used to
drive the secondary side bidirectional switches through isolated drivers (Si8220),
and as enable of the dual channel driver (UCC27424) to control the primary
switches.
Figure 3-12. Analog control implementation block diagram
3.3.1 PFC analog controller operation and adaptation
Because of the proposed secondary side configuration with bidirectional
switches, the forward micro-inverter is a two-quadrant converter. Therefore,
positive and negative voltage and current appear in the forward inductor. This is
an important difference with the PFC boost converter where the current and
voltage are measured after the diode bridge, thus being always positive. As a
consequence some external circuitry is necessary as depicted in Figure 3-12 in
order to adapt the different sensed variables.
In the proposed implementation, the inductor current and the output voltage are
sensed using Hall-effect sensors. In both cases the measurements are rectified
using a full-wave precision rectifier. Furthermore, the polarity of the AC voltage
is extracted from the voltage measurement and used for the generation of the
low-frequency driving signals, the primary side enable and the ZCD signal
generation.
PV
panel
M2M1
MD
MA MB
MC
n1 n3n2
L
Co
CinVgrid
Hall Effect
Sensor
X
MPPT
Polarity
UCC27424
Isolatation
driver
Enable
ZCDCS
UCC38050
VO_SNS
MULTIN
DRV
RL
Chapter 3 Proposed Single Stage Forward Micro-Inverter
63
The operation of the selected IC is based on two comparators for the switch turn-
on and turn-off (Figure 3-13). The turn-off transition occurs when the measured
inductor current (CS pin) reaches the current envelope, which is obtained as the
product of the rectified measured grid voltage (MULTIN pin) and the output of
the transconductance amplifier (COMP pin). For the presented micro-inverter,
the COMP pin is related with the MPPT functionality as explained later.
Figure 3-13. Block diagram of the PFC analog controller (UCC38050)
For the correct switch turn-on a zero current detection is necessary (ZCD pin).
Such detection is indirectly obtained using the inductor voltage, as suggested in
the manufacturer application note [UCC38050]. The selected controller
implements an internal timer that restarts the PWM after 400µs in case no zero
crossing of the current is detected after that time. Detailed description of the ZCD
implementation is provided in the following sections.
3.3.1.1 MPPT compatibility of the selected controller
The error amplifier included in the selected IC is a transconductance amplifier
used to control the DC output voltage of the PFC boost converter. The amplifier
modifies the current envelope according to the expression presented in (3-8),
where gm is the transconductance of the amplifier and Zcomp the impedance
connected to COMP pin.
(3-8)
For the micro-inverter purposes Zcomp is simply a resistance, hence the current
envelope can be modified proportionally to the difference of the MPPT signal
and the internal reference. Among the different MPPT algorithms [Esram’07],
some offer possibility for analog implementation [Ho’05], which are a more
Current
Measurement
Voltage
Measurement
MPPT signal
Envelope comparator (on) Zero comparator (off)
Envelope calculation (MPPT)PWM
COMPSNSOmCOMP ZVgV )5.2( _
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
64
applicable for the proposed solution with an analog controller. A digital
implementation [Gomes’13] is possible as well, but a DAC is necessary in order
to generate a proper voltage level to be applied to VO_SNS pin.
The sign of the subtraction in (3-8) implies that an increase in the MPPT signal
reduces the current envelope, i. e. a reduction in the extracted power from the PV
module, and vice versa. This must be considered in the design of the MPPT
algorithm, which is not in the scope of the implemented prototype.
3.3.1.2 ZCD implementation
As introduced above the zero crossing of the inductor current is detected
indirectly from the inductor voltage, as commonly done for PFC application. In
the micro-inverter implementation the inductor voltage presents opposite
polarity depending on the grid voltage, as depicted in Figure 3-14. Therefore, if
the same configuration is applied in both half-cycles the zero crossing is detected
properly for positive line voltage but not for negative or vice versa. As a solution
an analog multiplier is included. The inputs of the multiplier are the sensed
inductor voltage and a symmetric square signal which carries the information of
the output voltage polarity.
a) b)
Figure 3-14. Zero current detection configuration and waveforms for positive and negative grid voltage (a) and multiplier for correct ZCD (b).
Figure 3-15 shows the obtained ZCD signal for different positive and negative
voltages. In the performed test the peak current has been kept constant and the
voltage is changed modifying a resistive load. The output of the multiplier (MultV
in Figure 3-15) remains with the same polarity for both positive and negative line
voltages, thus guaranteeing a proper detection of the inductor current zero
crossing.
iL
t
VL
t)(tvVn oPV
)(tvo
0)( tvo0)( tvo
iLVL+ - iL
VL+ -
ZCD ZCD
)(tvo
)(tvVn oPV
ZCD
t
iL+ -
ZCDX
Chapter 3 Proposed Single Stage Forward Micro-Inverter
65
a) b) c)
Figure 3-15. ZCD signal for different positive (a, b) and negative output voltages (c)
For the correct operation of the selected IC, the voltage of pin ZCD must go
under a certain threshold when the current reaches the zero level. Therefore, the
auxiliary winding used for ZCD has to be designed to exceed that threshold
when the switch is off. This is not an impediment in the case of the boost
converter as shown in Figure 3-16, since the inductor voltage reaches zero from a
voltage oin VV . However, in the case of the proposed forward micro-inverter the
ZCD voltage when the switch is off is proportional to the grid voltage. As a
consequence, when the line voltage is close to zero the ZCD threshold is not
exceeded as plotted in Figure 3-16, and zero crossing distortion in the injected
current to the grid is expected. As a solution, an offset could be added to the
output of the multiplier or the current sensing information could be fed to a
comparator, requiring in both cases extra circuitry.
Figure 3-16. ZCD threshold and ZCD voltage variation in time for boost PFC and forward micro-inverter.
3.3.2 Experimental Results
The proposed forward micro-inverter has been tested first in DC to evaluate the
required modifications to adapt the PFC controller to the inverter control as well
as to confirm the proper operation of the micro-inverter itself. The converter has
1_MDSV
MultV
Li
1_MDSV
MultV
Li
1_MDSV
MultV
Li
2_MDSV
Time
ZC
D v
oltag
e
Boost PFCForward Micro-inverterZCD Threshold
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
66
been tested with an appropriate resistive load and different DC voltages in
VO_SNS pin in order to modify the inductor peak current.
Figure 3-17 shows the main waveforms of the proposed topology for different
positive and negative output voltages, showing the variable frequency operation.
It can be seen that when the inductor current is rising with positive output
voltage (Figure 3-17.a) transistor M1 is on, while transistor M2 is on if the output
voltage is negative and current rises (Figure 3-17.b). Therefore, the utilization of
the primary windings for either energy transfer or transformer demagnetization
is demonstrated in the presented waveforms. The obtained efficiency in the
developed reaches the 82% for 30V input and 150V output for both positive and
negative voltage.
a) b)
Figure 3-17. Waveforms of the forward micro-inverter operated in DC for positive (a) and negative (b) output voltage.
The transformer has been identified as a main contributor to the obtained low
efficiency. The elevated necessary turns ratio (1:14) implies a high RMS and peak
current in primary side (Figure 3-18.a) contributing to high conduction and
switching losses. Furthermore, in order to reduce the number of turns in
secondary side to minimize the stray capacitance, the number of turns in primary
side has been reduced to 3, for an actual 3:42:3 ratio in the transformer. Therefore,
the magnetizing current is low (Lm1 = 44uH) contributing to a higher primary
side current.
In addition, the difference in the number of turns and the section of the windings
makes the transformer coupling challenging. As a result a high leakage
inductance is obtained in the secondary side (Llk2 = 45uH). This inductance
together with the stray capacitance and the reverse recovery current of the
1_MDSV2_MDSV
secV
Li
1_MDSV2_MDSV
secV
Li
Chapter 3 Proposed Single Stage Forward Micro-Inverter
67
secondary side diodes provoke a voltage spike in the off transition of the primary
switch (Figure 3-18.b). The voltage spike not only contributes to extra switching
losses but also to a reliability reduction and potential breakdown by exceeding
the device ratings.
a) b)
Figure 3-18. Primary side waveforms of the forward micro-inverter operated in DC for positive output voltage.
The AC setup consists of the parallel connection of the built micro-inverter and
an AC power source to a resistive load, as shown in Figure 3-12. The power
source imposes the voltage, replacing the grid, while the micro-inverter works as
a current source. The resistive load is used to avoid negative current flowing
through the utilized AC source.
As in the DC experiments, the current capability of the micro-inverter is
controlled via VO_SNS pin of the selected analog controller, emulating in this
case a hypothetical MPPT algorithm. Figure 3-19 and Figure 3-20 show the
output voltage and the obtained inductor current for half and nominal load
respectively. In both cases the expected current distortion in the AC zero crossing
is evident. As previously introduced the distortion is caused by the lack of
inductor ZCD when the AC voltage is close to zero. After ZCD is not properly
detected, the controller tries to restart the operation after 400µs (internal feature)
which originates first a current spike and the posterior restarting with the
opposite polarity.
1_MDSV
Li
2_MDSV
2Mi
1Mi
1_MDSV2_MDSV
2Mi
Li
1Mi
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
68
Figure 3-19. Output voltage and inductor current for half-load operation.
Figure 3-20. Output voltage and inductor current for nominal-load operation.
3.4. Conclusions
This chapter introduced the proposed single-stage forward micro-inverter with
boundary mode control applying constant off-time, as an original contribution.
The transformer configuration in the proposed topology remains as in the
classical forward converter allowing power transfer and demagnetization for
both positive and negative line voltage. The selected control strategy is
compatible with MPPT functionality and allows the injection of unity power
factor current to the grid. Design considerations regarding the inductance value,
turn ratio, frequency variation, output power and input capacitor were also
presented.
A prototype was built as a proof of concept of the proposed micro-inverter. The
low power demonstrator uses an analog PFC controller to operate the micro-
inverter in BCM, with the aim of keeping a low-cost solution. The necessary
modifications to adapt the controller to an inverter application were discussed
with especial attention to the integration of a hypothetical MPPT and the
Chapter 3 Proposed Single Stage Forward Micro-Inverter
69
detection of the current zero crossing. Nevertheless, the zero-crossing distortion,
derived from the chosen implementation, and the extra required circuitry suggest
the assessment of the utilization of a low-cost microcontroller. The obtained
results validate the proposed topology and selected control strategy. However, a
low efficiency level is obtained and the transformer has been identified as a main
contributor to the micro-inverter losses.
71
Chapter 4
Primary-Parallel Secondary-Series
Multiphase Forward Micro-Inverter
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
73
4. Primary-Parallel Secondary-Series
Multiphase Forward Micro-Inverter
4.1. Introduction and background
In the forward micro-inverter presented in the previous chapter, the transformer
has been recognized as a main contributor to the degraded performance. A large
turns ratio prevents from obtaining good coupling between primary and
secondary. Therefore, the resulting high leakage inductance and extra losses due
to high series resistance jeopardize the performance of the micro-inverter.
Splitting a large turns ratio transformer in several units with unitary turns ratio
has been proposed in [Thai’09] to improve the converter performance. With the
well coupled transformers, a boost of 2% in efficiency is achieved together with
improved thermal management. Furthermore, the selection of of-the-self
transformers makes possible a reduction in the transformer manufacturing cost.
However, the PCB layout of the split transformers must be carefully considered
in order to take full advantage of the achievable coupling. As a result of the
analysis in [Thai’09], the recommendation is not only to split the transformer but
also the converter in several parallel-series connected units.
The primary-parallel secondary-series connection of transformers has been
proposed for high power high step-up applications, such as fuel-cell, using
mainly isolated boost-derived DC-DC converters [YZhao’11] [Ouyang’13]
[Mazunder’09]. In these solutions the primary-parallel connection reduces the
current stress thus, reducing the conduction losses in both switches and
windings. The secondary series connection improves the voltage gain of the
converters, which is further increased either by coupling inductors [YZhao’11] or
synchronized primary switches [Ouyang’13]. Furthermore, in the cited
topologies integrated magnetics are introduced to reduce the size of the
converter and to enable the implementation using planar magnetics.
Regarding the buck-derived topologies, the series connection of the output
capacitors of two converters is presented in [JShi’05] for the two-transistor
forward (TTF). Interleaving technique in primary side is applied to keep a low
primary side current ripple and the output filter is not shared to reduce the
voltage stress of the secondary side diodes. Each of the interleaved TTF
introduced in [JShi’05] is boosting the 30V input to 180V DC, using a turns ratio
of 1:11. Despite that the power levels are in the kW range in [JShi’05], the voltage
and turns ratio are comparable to the specifications followed in the proposed
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
74
forward micro-inverter prototype. As in the proposed micro-inverter, the
reported efficiency in [JShi’05] is under 85% and a RCD snubber is necessary to
limit the voltage spike in the primary switches. The series connection of
transformers in [GZhang’09] for the traditional interleaved forward converter
with common inductor is possible because of the addition of an extra diode
between the secondary windings. The extra diode enables the interleaved
operation with duty cycle over 0.5 to further increase the voltage gain.
This chapter presents a new primary-parallel secondary-series forward inverter
for AC-module application. The proposed topology, which is a main contribution
of this thesis, enables a current sharing in the primary side and an adequate
voltage gain with well coupled transformers. The operation principle of the
proposed topology, based in the BCM operation, is presented in the next section
together with the main design considerations. In Section 4.3 the influence of the
number of selected transformers in the size and efficiency of the topology is
discussed as well as DCM operation at low power conditions. Finally,
experimental results are introduced to validate the presented analysis, including
the test of a proposed simplified current sensorless MPPT algorithm.
4.2. Proposed Topology
Based on the proposed forward micro-inverter with unfolder stage, introduced in
Figure 3-3, a new micro-inverter using several transformers is proposed. The
topology, which is a contribution of this thesis (Figure 4-1) [Meneses’15], consists
of several well coupled transformers which are parallel connected in the primary
side and series connected in the secondary side.
The parallelization in the primary side reduces the current stress in both switches
and in the primary windings of the transformer. Current sharing is guaranteed
because of the secondary series connection, although affected by the coupling of
the individual transformers. The current stress is also decreased in the secondary
side diodes due to the common cathode configuration and the synchronized
driving of the primary switches. As a result SMD devices can be used, a low-
profile implementation is feasible and the thermal management is improved,
although more devices are needed.
The secondary series connection allows achieving the grid voltage using
transformers of lower turns ratio. Therefore, the primary to secondary coupling
at each transformer can be significantly improved. Consequently, parameters
such as leakage inductance can be reduced, thus improving the off transition of
the primary transistors and the overall performance of the forward micro-
inverter.
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
75
Figure 4-1. Proposed forward micro-inverter topology with primary-parallel secondary-series connected transformers.
4.2.1 Operation principle
In the proposed parallel-series forward micro-inverter, the primary switches are
synchronized and modulated following the boundary mode control (BCM)
strategy to generate a rectified sinusoidal current. This current is then unfolded
by a line frequency switched bridge to inject unitary power factor current to the
grid. Therefore, the proposed inverter does not have reactive power capability
and the application of the presented topology is intended for those grid
connections where grid support is not demanded by the grid operator [VDE-AR-
N 4105]. Furthermore, in order to comply with the harmonic requirements of the
different standards, as presented in chapter 1.2, an EMI filter is necessary. This
filter can be placed between the proposed topology and the unfolding stage in
order to reduce its size and cost [Erickson’09]. The analysis and design of the
filter is known and it is not included in the analysis developed in this thesis.
The high-frequency operation of the topology can be divided in two intervals as
the classical forward converter operating in BCM. The subcircuits resulting of
these intervals are shown in Figure 4-2 for a four-transformer inverter when two
phases are active. As it can be observed, the primary switches are synchronized
thus, a single PWM control signal is necessary. Due to this strategy, together with
the common cathode configuration of the secondary diodes, only one of the
secondary side diodes is in the current path at each moment.
L
En1
En2
Enp
Un
fold
ing
sta
ge
Co
n1:n3:n2
n1:n3:n2
n1:n3:n2
M1
M2
Mp
Dm1
Dm2
Dmp
D1
D2
Dp-1
Dp
DfVp+
-
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
76
Figure 4-2. Ton (left) and Toff (right) subcircuits of the proposed converter with four transformers, when two phases are active
The number of active phases changes during a line half-period and it is decided
at each moment according to the grid voltage as shown in Figure 4-3, for the
four-transformer inverter presented in Figure 4-2.
Figure 4-3. Number of active phases during a line half-period for a four-transformer parallel-series forward micro-inverter.
The effect of the change in the number of active phases is that the applied voltage
to the filter changes proportionally to the number of phases. As a result a voltage
envelope with the same profile than the blue curve in Figure 4-3 is applied to the
filter, which allows following conveniently the grid voltage. The voltage applied
to the filter, i.e. the voltage withstood by the freewheeling diode, together with
the main ideal waveforms of the proposed topology are depicted in Figure 4-4 in
the case that two or four phases are active. According to the presented
waveforms, all the primary switches and diodes present the same voltage stress
while the voltage stress of the series diodes in the secondary side depends on the
number of active phases.
L
Un
fold
ing
sta
ge
Co
n1:n3:n2
M1
M2
D1
D2
Df
M3
M4
D3
D4
LCo
Un
fold
ing
sta
ge
n1:n3:n2
M1
M2
D1
D2
Df
M3
M4
D3
D4
0 1 2 3 4 5 6 7 8
x 10-3
0
2
4
time (s)
Active
ph
ase
s
0 1 2 3 4 5 6 7 8
x 10-3
0
100
Grid
vo
lta
ge
(V
)
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
77
Figure 4-4. Main ideal waveforms of the proposed inverter with four transformers when two (left) and four (right) phases are active.
4.2.2 Transformers turns ratio
As shown in the presented ideal waveforms, during the on time the voltage
applied to the output filter is proportional to the number of active phases. During
off-time the inductor current flows through the free-wheeling diode in the same
manner than in classical forward converter. Therefore the voltage gain can be
expressed as (4-1).
(4-1)
Where ‘m’ is the number of active phases (e.g. m=2 in Figure 4-2), ‘Vp’ the PV
panel voltage, ‘d’ the applied duty cycle and ‘n’ is the primary to secondary turns
ratio (n2/n1) of each individual transformer, which is considered to be the same
in this thesis.
Using the presented voltage gain, the primary to secondary turns ratio of an
individual transformer (‘n’) can be calculated as a function of the total number of
transformers used ‘p’ (e.g. p=4 in Figure 4-2), for a given solar module (Vp) and a
grid voltage (4-2). It must be noted that the product ‘n∙p’ remains constant for the
same maximum duty cycle and input and output voltage requirements.
(4-2)
En1 En2
En4En3
iL
VDf Vpn
n
1
22
VM1/2
Vpn
n
1
2
VD1
VD2
Vp Vpn
n )1(
1
3 Vpn
n )1(
3
1
VDm1/2
iLm
VD3
VD4
Vpn
n
3
22
Vpn
n
3
22
VM3/4
VDm3/4
Vpn
n
3
2
OV
En1 En2 En4En3
VM1/2/3/4
Vp
Vpn
n )1(
1
3
Vpn
n )1(
3
1
VDm1/2/3/4
iLm
iL
VDf
VD1
VD2
VD3
VD4
Vpn
n
1
24
Vpn
n
1
23Vp
n
n
3
22 Vpn
n
1
22 Vpn
n
3
2
Vpn
n
3
23Vpn
n
3
24
Vpn
n
1
2
Vp
OV
VpdmnVo
minmax1
2
Vpdp
Vo
n
nn
peak
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
78
4.2.3 Component stress
Since the operation of the proposed converter is the same than in a classical
forward converter, the primary side component voltage stress is also the same, as
it was shown in the ideal waveforms. However, the parallel operation of the
converter reduces the current stress due to the current sharing (Figure 4-5.a).
Since the number of active phases varies during a half-cycle as introduced above,
the current stress is smaller for those phases which are not active during the
whole line period.
With regard to the secondary side, only one of the series diodes (Di in Figure 4-1)
is in the current path at a time due to the applied series configuration and the
synchronized driving strategy. Therefore, the current stress is reduced in the
secondary side diodes when the number of transformers is increased (Figure
4-5.b).
a) b)
Figure 4-5. Primary switches RMS current (a) and secondary series diodes AVG current (b) during a grid period.
The voltage stress for the ‘i-th’ phase diode can be calculated according to (4-3),
where ‘p’ is the total number of transformers for the selected configuration.
(4-3)
By analyzing the ideal waveforms in Figure 4-4, due to the selected secondary
configuration and the applied control strategy, the inductor current during free-
wheeling flows through one diode regardless the number of phases. Therefore,
the current stress of the freewheeling diode remains the same for all the
configurations, with slight variations caused by the modulation modification
with the number of phases. The voltage stress of the mentioned diode is the same
for all the configurations as shown in (4-4), where the product ‘n∙p’ is constant for
the same specifications as stated previously.
0
1
2
3
4
5
6
0 2 4 6 8 10
RM
S cu
rre
nt
(A)
Transformer
Switch RMS current
1-phase
2-phase
4-phase
8-phase
0
0,05
0,1
0,15
0,2
0,25
0,3
0,35
0 2 4 6 8 10
AV
G c
urr
en
t (A
)
Transformer
AVG series diode current
1-phase
2-phase
4-phase
8-phase
],)max[(3
2
1
2_ Vp
n
niVp
n
nipV DiKA
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
79
(4-4)
The current stress reduction in both primary and secondary side components
allows the utilization of SMD components, which provides advantages for the
AC-module application such as thermal management or low-profile
implementation. However, the increase in the number of components contributes
considerably to the cost of the solution when the number of transformers is large.
4.2.4 Input capacitor
In the proposed topology the primary switches are synchronized and therefore
there is no possibility to reduce the necessary input capacitance to filter the high-
frequency ripple of the input current, as in interleaved converters. However, in
the case of single-stage micro-inverters, like the ones proposed in this thesis, the
input capacitance is designed to guarantee a proper balance between the
demanded twice-line frequency current and the DC current provided by the PV
module [HHu’10].
As introduced in Chapter 3.2.4, a limited voltage ripple is necessary to achieve a
high utilization of the available power in the PV module. In the case of the
proposed single-stage topology a large capacitance is required in parallel with
the PV module (2mF@45V/120W, for an 8.5% of voltage ripple [Kjaer’05]), which
is typically some orders of magnitude larger than the required capacitance for
high-frequency filtering. As a consequence, in most of the cases an electrolytic
capacitor is used, which is bulky and may reduce the life span of the solution.
In the proposed topology with multiple transformers this capacitance is
distributed among the paralleled primaries, thus reducing the capacitor of each
phase. Therefore, low profile ceramic and electrolytic capacitors can be used,
which makes the proposed configuration suitable for AC-module application.
The combination of both capacitor technologies enables an increase in the lifetime
of the inverter while avoiding a drastic increment in the cost.
4.3. Size and Efficiency Estimation
The number of selected transformers in the introduced topology requires a
compromise in the design between size and efficiency. Indeed, a better coupling
in the individual transformers, i.e. higher number of phases/transformers, will
help to obtain a better performance of the inverter. However, a higher number of
phases imply bigger size and increased number of components and control
complexity.
Vpn
npV FWKA
1
2_
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
80
This section analyses the size and efficiency impact of the number of applied
transformers in the proposed micro-inverter. The assessment is based on detailed
designs and simulation of the proposed primary-parallel secondary-series
configuration with different number of transformers. The used specification for
this comparison is:
The voltage of the PV panel is fixed to 45V.
The maximum power available in the PV panel is 120W.
The micro-inverter is connected to an 110V grid.
The demagnetization turns ratio (n3/n1) is selected to be 1.
The maximum duty cycle is fixed to 0.45.
The maximum allowed frequency at maximum PV power is 150 kHz.
The critical conduction mode operation of the inverter implies variable frequency
operation. As in the proposed forward micro-inverter introduced in the previous
chapter, there is a relationship between the maximum allowed frequency and the
inductance value for a given power level as stated in (3-5). According to the
presented specification the resultant inductance is selected to be 400µH, with a
maximum frequency of 130kHz.
Once the inductance is selected according to the required specifications,
simulations are performed in MATLAB™ considering 1, 2, 4 and 8 transformers.
Figure 4-6 and Figure 4-7 depict the main simulated waveforms of the micro-
inverter in one half-cycle using different number of transformers. These results
are used for selecting the proper core for each of the transformers in the analyzed
configurations, as well as for estimating the semiconductor and magnetic losses.
Figure 4-6. Simulation output for the 1-transformer forward micro-inverter.
0 0.005 0.010
1
2
3
4Inductor current (iL)
0 0.005 0.010
2
4
6iL: PEAK(b), AVG(r) ans RMS2(g)
0 0.005 0.010
10
20
30iSwitch: PEAK(b) and AVG(r)
0 0.005 0.010
0.5
1FW diode avg. current
0 0.005 0.010
0.1
0.2
0.3
0.4
0.5Duty cycle
0 0.005 0.010
50
100
150Frequency(kHz)
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
81
Figure 4-7. Simulation output for the 8-transformer forward micro-inverter.
4.3.1 Transformer core selection
The area product parameter (Ap) is defined as the product of the cross section
(Ae) and the window area (Aw) of a given core. This parameter can be used to
estimate the volume and weight as well as the power-handling ability of a core
[Arboy’06][W-JGu’13][Versele’09]. Furthermore, it is simple to obtain from the
core datasheets provided by the manufacturers.
In terms of electrical parameters of the proposed topology, the area product can
be calculated according to (4-5), where ‘kw’ is the window filling factor and
‘Bmax’ and ‘Jmax’ are the maximum allowed flux and current density,
respectively. The used parameters for the presented analysis are introduced in
Table 4-I. For the calculation, the necessary primary and secondary windings
currents are obtained based on simulation, without considering the magnetizing
current, i.e. the utilized magnetizing inductance for the simulation is large. In
order to consider the necessary demagnetization windings in the window area, a
factor of 20% is introduced.
0 0.005 0.010
1
2
3
4Inductor current (iL)
0 0.005 0.010
2
4
6iL: PEAK(b), AVG(r) ans RMS2(g)
0 0.005 0.010
1
2
3
4iSwitch: PEAK(b) and AVG(r)
0 0.005 0.010
0.5
1FW diode avg. current
0 0.005 0.010
0.1
0.2
0.3
0.4
0.5Duty cycle
0 0.005 0.010
50
100
150Frequency(kHz)
(4-5)
max
21
minmax
max)(2.1
Jk
InI
fB
dVpAwAeAp
w
RMSRMS
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
82
Table 4-I. Parameters used for the area product calculation
A certain core is selected when the calculated area product using (4-5) is lower
than the product of the cross section and the window area stated by the
manufactured. In this comparison RM cores of 3C90 material have been selected.
Figure 4-8 shows the selected RM cores as well as the turns ratio of an individual
transformer for the analyzed configurations of the proposed topology.
Figure 4-8. Estimated RM cores based on the area product and individual transformer turns ratio for the different considered number of phases.
4.3.2 Transformer comparison
After selecting the cores, a detailed design of each of the different transformers
for the analyzed configurations has been developed using the software for
magnetic components design PExprt and its FEA tool. These designs are
compared in terms of losses, leakage inductance, series resistance and resonance
frequency. Furthermore, they enable a comparison of surface, volume and height.
The main values obtained from these designs are presented in Table 4-II.
Core/Material RM/3C90
kw 0.3
Jmax 600A/cm2
Bmax 0.65·Bsat
fmin 70kHz
VPV 45V
PPV 120W
Vgrid 110V@60Hz
6
7
8
9
10
11
12
13
0 2 4 6 8 10
RM
co
re
Transformer
RM estimated core (AP)
1 phase
2 phases
4 phases
8 phases
Phases n (n2/n1)
1
2
4
8
8
4
2
1
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
83
Table 4-II. Main values of the transformers designs.
Parasitic effects, such as the parasitic capacitance or leakage inductance, can
deteriorate the performance of the converter as introduced in the previous
chapter. The parasitic capacitance of the primary winding has been estimated
using FEA. This value is used together with the obtained magnetizing inductance
to estimate the transformer resonance frequency. As show in Figure 4-9, the
resonance frequency of the analyzed solutions increases when the turns ratio gets
closer to the unity, i. e. with the number of transformers, getting away from the
switching frequency range.
Figure 4-9. Estimated resonant frequency of the analyzed designs.
Another advantage of the proposed topology is that an increase in the number of
transformers allows the use of better coupled transformers. A better coupling
implies a significant decrease of the leakage inductance as well as the AC series
resistance as shown in Figure 4-10. The reduction of these non desirable effects
enables a better switching behavior, hence an improvement in the performance of
the inverter.
#transf. Core Turns ratio W. Filling(%) Lm1(uH) Fres1(kHz) Llk2(uH) J1(A/cm2) J2(A/cm2)
1 RM12 9:72:9 35,70% 504,08 214,81 37 477 347
RM12 10:40:10 30,29% 622,29 526,22 7,2 256 372
RM10 13:52:13 37,88 844,83 493,72 18,4 130 324
408 395
395 383
354 99
RM8 19:38:19 32,58% 1324,35 709,46 8 523 76
413 413
410 410
400 400
383 383
358 358
322 322
394 394
288 288RM7 27:27:27 36,10% 2249,69 1186,35 3,1
2398,59 2,3
8
RM8 20:20:20 32,07% 1467,6
4RM10 14:28:14 28,83% 979,9 1037,82 4,5
2
0
200
400
600
800
1000
1200
1400
0 2 4 6 8 10
Transformer
Resonance freq. (kHz)
1 phase
2 phase
4 phase
8 phases
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
84
Figure 4-10. Secondary side leakage inductance (left) and equivalent series resistance referred to secondary side (right) of the analyzed designs.
In addition to the coupling effects on the main transformer parameters it is of
high importance to analyze how the losses evolve when the number of
transformers increases. Figure 4-11 shows the total calculated losses for each
individual transformer and for the whole set of transformers for the analyzed
configurations.
In order to obtain these losses further simulations are performed including the
magnetizing inductance. Based on the simulations the RMS input current is
obtained by computing the average of the RMS current at each switching cycle
[Kyritsis’08]. This value is fed into the FEA model of the different transformers to
calculate the winding losses of an equivalent DC-DC forward converter.
Regarding the core losses, the simulation including the magnetizing inductance
calculates the average over a line period of the core losses at each switching cycle
according to the Steinmetz equation [Steinmetz’84].
As shown in Figure 4-11 the difference in the calculated losses is not significant
for the analyzed configurations. Nevertheless, as the number of transformers
increases the losses are spread, enabling easier thermal management.
Figure 4-11. Total losses in the transformers for the analyzed configurations.
0
10
20
30
40
0 2 4 6 8 10
Transformer
Secondary Leakage @ 70kHz(μH)
1 phase
2 phases
4 phases
8 phases
0
1
2
3
4
5
6
7
0 2 4 6 8 10
Transformer
Equivalent Series resistance @ 70kHz (Ω)
1 phase
2 phases
4 phases
8 phases
0,0
0,5
1,0
1,5
2,0
2,5
0 2 4 6 8 10
Loss
es
(W)
Transformer
Total Losses of the transformer set and per transformer
1 phase
2 phases
4 phases
8 phases
Total
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
85
4.3.3 Volume, area and height of the selected transformers
In AC-module application efficiency is a main concern, but also size and weight
are important design constraints to take into consideration. From the transformer
designs introduced in the previous section, the size information in terms of
surface, volume and maximum height can be extracted as show in Figure 4-12.
The presented information includes not only the core but also the bobbin, which
is affecting the height and area of the transformer.
Figure 4-12. Estimated volume (green), total area (blue) and maximum height (red) of the selected transformers.
The total estimated area as well as the total volume occupied by the transformers
increases with the number of phases. However, the maximum estimated height
decreases as the number of phases increase. With the aim of further decreasing
the overall height of the solution, the use of planar magnetics could be
considered for this application. The use of planar cores together with SMD
devices enables a low-profile solution, with the consequent increase in area.
It must be noted that in AC-module application the converter is attached to the
back side of a PV module and, therefore, the available area is large. Furthermore,
the low height allows mounting the micro-inverter in the frame of the solar
module, which enables lowering the price and increasing the reliability of the
mechanical connection [Meinhardt’99].
4.3.4 Efficiency
According to Figure 4-8 in the analyzed configurations the most of the selected
transformers are the same except for the last transformer of each configuration.
Therefore, considering a simple prototype implementation, the same core is used
for the whole set of transformers for each configuration. As a consequence, if the
core for transformer one in Figure 4-8 is selected for all the transformers in the set
not only the size will be affected but also the losses of the transformer set as
0
10
20
30
40
50
60
70
80
90
0 2 4 6 8 10
Are
a, V
olu
me
, Max
. he
igth
t
Number of phases
Surface (cm2)
Max. Heigth (mm)
Volume (cm3)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
86
depicted in Figure 4-13. Nevertheless, the maximum height of the considered
configurations remains the same, since the maximum height of the transformer
set corresponds to the height of transformer one.
a) b)
Figure 4-13. Comparison of area, volume and maximum height (a) and total losses (b) of the analyzed configurations with the selected cores and with the same core.
The presented losses of the transformer set for the different configurations are
used, together with the semiconductor and inductance losses, to estimate the
efficiency of the proposed topology with different number of transformers. The
considered inductance losses are the calculated losses at the worst DC point,
corresponding with the grid peak voltage and peak current for the different
power levels.
Regarding the semiconductor losses, the average losses in a line period are
computed based on the calculated losses of each switching cycle. Equation (4-6)
presents the losses of primary side switches during a half-line period, while
equation (4-7) is used for both primary and secondary side diodes.
(4-6)
(4-7)
As discussed in the introduction, the operation cycles of a PV inverter are
influenced by the changeable irradiance and temperature conditions. Therefore,
the inverter operates for long periods at power levels lower than the maximum
power of the PV module.
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10
Are
a, V
olu
me
, Max
. he
igth
t
Number of phases
Max. Heigth (mm)
Volume (cm3)
Volume same (cm3)
Area (cm2)
Area same (Cm2)
0,0
0,5
1,0
1,5
2,0
2,5
0 2 4 6 8 10
Loss
es
(W)
Number of Transformers
Total Losses of the transformer set
Total Selected
Total Same
gridgrid Tk
gridfallpkMiiOFF
Tk
kRMSMiDSoniSwitch ftIVIk
RP,
__
2
,
___ )(2
1)
1(6.1
gridTk
kavgDjjFjDiode Ik
VP,
____
1
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
87
Due to the BCM control strategy of the proposed topology, the operating
frequency range of the proposed solution increases when the delivered power
from the PV module decreases. Equations (3-3) and (3-4) address the frequency
variation with the load for the single-stage forward micro-inverter proposed in
this thesis. These equations are obviously valid for the 1-transformer without
modification and can be applied to the configurations with multiple transformers
if the total turns ratio is modified accordingly to the number of active phases.
As a consequence of the higher switching frequency at light load operation, the
inverter efficiency is jeopardized because of the increase in the switching losses.
As depicted in Figure 4-14 this effect is further penalized when the number of
transformers increases due to the higher number of utilized switches.
Figure 4-14. Calculated efficiency for different configurations of the proposed topology operated in BCM at the power levels according to CEC efficiency.
Therefore, discontinuous conduction mode (DCM) operation is proposed in
order to improve the efficiency at light load. The BCM operation of the proposed
micro-inverter achieves theoretically unity power factor by keeping constant off-
time as it was presented in Chapter 1. If the same control strategy is implemented
in DCM operation, as in its counterpart constant on-time DCM PFC [Liu’89], the
achievable PF and THD are limited.
The necessary duty cycle to keep constant off-time in DCM operation (4-8) as
well as the inductor average current if this control strategy is applied (4-9) can be
calculated considering the inductor current waveform depicted in Figure 4-15.
-40,00
-20,00
0,00
20,00
40,00
60,00
80,00
100,00
0 50 100 150
Effi
cie
ncy
(%
)
Power (W)
Efficiency (BCM; Load variation)
1 phase
2 phases
4 phases
8 phases
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
88
Figure 4-15. Output inductor current waveform in DCM operation.
(4-8)
(4-9)
The normalized output current according to equation (4-9) considering the
specifications set for the developed analysis is presented in Figure 4-16. The
achievable power factor is 0.995 independently on the number of transformers
used. However, the theoretical THD slightly exceeds the 10%, which is over the
required 5% by the most of the standards.
Therefore, a different control law is necessary if a better performance in THD
wants to be achieved. This control law, presented in (4-10), can be derived by
making the inductor current average value proportional to the grid voltage
[Lazar’95] [Prasad’08]. It must be noted that in the presented control law the
turns ratio ‘n’ has to be updated with the number of used phases, if more than
one transformer is used.
(4-10)
iL
t
Td offt
T
L
v0L
vVpn p 0
T
T
tvVgpn
tvtd
off
o
oDCM
)(
)()(
Vppn
V
t
t
TL
tVppniIo
pkOoff
AVGL
;
)sin(1
)sin(
2
2
,
Vp
tvtMP
V
fLk
tMnn
ktMtd o
o
RMSo
swDCM
DCM )()( ;
2 ;
)()()(
2
_
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
89
Figure 4-16. Normalized output current for different designs with constant off-time DCM operation.
The efficiency of the proposed topology has been recalculated taking into account
the mode of operation, by including DCM operation in the simulation. Based on
the obtained results, presented in Figure 4-17.a, the operation mode is changed
when the available power is lower than 80% of the considered maximum power
for all the analyzed configurations. Figure 4-17.b shows the calculated CEC
efficiency. According to the presented results a large increase in the number of
transformers would jeopardize the weighted efficiency, while going for two or
four phases would ensure a better performance. However, the calculation
excludes the effect of leakage inductance which is expected to be significant for
the single transformer configuration, since the turns ratio is far from unity.
a) b)
Figure 4-17. Calculated efficiency for the analyzed configurations.
4.4. Experimental Results
Three prototypes have been designed and built following the specifications used
in the analysis of the previous section, the single-transformer forward micro-
inverter with unfolding stage as well as two prototypes of the proposed parallel-
0 5 103
0.01 0.015
1
0.5
0.5
1
Control law (5-10)
Toff constant
Time (s)
Norm
. C
urr
ent (A
)
80
82
84
86
88
90
92
94
96
0 20 40 60 80 100 120 140
Effi
cie
ncy
(%)
Power (W)
Efficiency BCM-DCM
1 phase
2 phases
4 phases
8 phases
BCMDCM
DCM
DCM
DCM
DCM 85
86
87
88
89
90
91
92
93
94
95
0 2 4 6 8 10
Esti
mat
ed
Eff
icie
ncy
(%)
Number of transformers
CEC eff. BCM-DCM
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
90
series multiphase micro-inverter: the configuration with the best expected
efficiency (2-transformer) and the one with lowest transformer height and best
transformer coupling (8-transformer).
The three presented prototypes have the same output filter with an output
capacitor of 1μF and an inductance of 400μH, using a core ETD34 with material
3F3. Regarding semiconductors, the MOSFET IRFS4410PbF and the SiC diode
C3D02060E are used in the three tested prototypes. As introduced above, the set
of transformers of each prototype are designed according to the selected core for
transformer one in Figure 4-8: 1:8-RM12, 1:4-RM12 and 1:1-RM8 respectively. The
control of the presented prototypes, for both modes of operation, is implemented
in a TMS320F28069 microcontroller.
Figure 4-18.a shows the 2-transformer prototype with dimensions of 174x193mm.
The single-transformer inverter was mounted using the same PCB. In the case of
the 8-transformer prototype (Figure 4-18.b) the dimensions are 254x173mm.
Despite the 8-transformer configuration has lower transformer profile, the
maximum height is fixed by the 30mm of the inductor ETD34 core. In terms of
decoupling capacitor, the 8-transformer solution uses SMD ceramic capacitor
while the 1- and 2-transformer circuits use both ceramic and electrolytic
capacitors.
a) b)
Figure 4-18. 2-transformer (a) and 8-transformer (b) primary-parallel secondary–series forward micro-inverters
4.4.1 DC operation and Model Validation
The different prototypes have been tested as a DC-DC converter in order to check
not only the proper operation but also to validate the developed losses model.
The AC resistance together with the harmonics of the current in the transformer
windings is included with respect to the previously presented results. These
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
91
power losses are not included in the simulation of a whole half-cycle to simplify
the calculations and reduce the simulation time. The calculated and measured
results for the 8-transformer and 2-transformer configurations at different
operating points are presented in Figure 4-19.
a) b)
Figure 4-19. Calculated and measured efficiency of the 8-transformer forward micro-inverter for 120W BCM (a) and the 2-transformer for 60W DCM (b) operation at
different DC points.
The efficiency of the DC operating points calculated in the model correspond
with the maximum voltage achievable by the 8-transformer configuration when
the different phases are used ( 8/__ pkoDCo VkV ), thus fitting properly with the
measured efficiency of the 8-transformer prototype. Furthermore, the duty cycle
and frequency variation for different DC points is in a good agreement with the
developed model, as depicted in Figure 4-20.
However, in the case of the 2-transformer prototype working in DCM there are
discrepancies in the DC operating points, as shown in the measured duty cycle in
Figure 4-21. The different operating point in the calculation and the measurement
leads to the presented mismatches in the calculated efficiency.
For the selected DC operating points, the efficiency in DCM and BCM operation
at half load conditions (60W) has been compared. As shown in Figure 4-22, for
the case of 8-transformer prototype, the micro-inverter presents better efficiency
when it is operated in DCM as introduced above and predicted by the model.
The main reason for the worse efficiency in BCM is the high switching frequency,
which is approximately double than in DCM for the tested points, as depicted in
Figure 4-23.
0
50
100
150
200
250
75
77
79
81
83
85
87
89
91
93
95
0 50 100 150 200
Ou
tpu
t V
olt
age
(V) a
nd
Po
we
r (W
)
Effi
cie
ncy
(%)
Output voltage (V)
Est. Eff.
Meas. Eff.
Pout0
20
40
60
80
100
120
140
75
77
79
81
83
85
87
89
91
93
95
0 50 100 150 200
Ou
tpu
t V
olt
age
(V) a
nd
Po
we
r (W
)
Effi
cie
ncy
(%)
Output voltage (V)
Est. Eff.
Meas. Eff.
Pout
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
92
a) b)
Figure 4-20. Comparison of the simulated and measured duty cycle (a) and operating frequency (b) for the 8-transformer micro-inverter at different DC points in BCM.
Figure 4-21. Comparison of the simulated and measured duty cycle for the 2-transformer micro-inverter at different DC points in DCM.
Figure 4-22. Efficiency comparison of the 8-transformer micro-inverter operated in DCM and BCM for 60W output power.
0
0,05
0,1
0,15
0,2
0,25
0,3
0,35
0,4
0,45
0,5
0 50 100 150
Du
ty C
ucl
e
Output Voltage (V)
d_sim
d
60
70
80
90
100
110
120
130
0 50 100 150 200
Fre
qu
en
cy (k
Hz)
Output Voltage (V)
f_sim
f
0
0,05
0,1
0,15
0,2
0,25
0,3
0,35
0 50 100 150
Du
ty c
ycle
Output Voltage (V)
d_sim
d_test
80,00
82,00
84,00
86,00
88,00
90,00
92,00
94,00
0 50 100 150
Effi
cie
ncy
(%)
Output Voltage (V)
DCM Meas 60w
BCM Meas 60W
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
93
a) b)
Figure 4-23. Waveforms of the 8-transformer micro-inverter for BCM (a) and DCM (b) operation at the same half load DC point (4 active phases).
Regarding the single transformer variation, the performed tests for different DC
points show a voltage spike in the off transition of the switch which exceeds the
rated breakdown voltage of the selected transistor (Figure 4-24.a). A RCD
snubber to clamp as well as reduce the voltage slope was applied (Figure 4-24.b).
The inclusion of this snubber enables an efficiency improvement of around 1% in
the DC operation.
a) b)
Figure 4-24. Main waveforms of the single-transformer prototype in BCM at full load close to the grid peak voltage, without (a) and with (b) RCD snubber.
4.4.2 AC operation
To verify the AC operation two different tests have been run:
Static tests at different power levels with a DC source to evaluate the
efficiency, PF and THD.
A test with the micro-inverter connected to a solar array simulator
[SAS_E4360A] to validate the MPPT capability.
VDS1 VDS4 VF iL
VDS1 VDS4 VF iL
VDS1 VDmag
VL
iL
iL
VDS1
Vsec
VGS
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
94
The power curve of the PV module NA-F121 [NA-F121] has been used for these
tests, considering a temperature of 50ºC and different irradiation (power) levels.
In the case of the static tests the DC source is set accordingly to the MPP for the
different irradiation levels as presented in Table 4-III. These values are obtained
combining the temperature and irradiation characteristic curves provided in the
PV panel datasheet.
Table 4-III. Voltages applied in the static test of the parallel-series prototypes, according to PV module NA-F121 at 50ºC.
In both cases the grid connection is emulated with an AC source connected
through an isolation transformer and a series inductor. A parallel resistor is used
as a load to avoid the AC source to sink current, as shown in Figure 4-25
Figure 4-25. Connection scheme utilized in the AC tests.
As previously introduced the different phases have a common driving signal and
are enabled according to the grid voltage. The enable signals for the 8-
transformer configuration, as well as the driving signals for the 2-phase inverter,
are depicted in Figure 4-26. It can be appreciated how the phase which
transformer is the lowest in the secondary series connection (phase 1) is
continuously enabled while the decision of turning on the rest of phases is
dependent on the grid voltage.
P_MPP(W)V_MPP(V)
@50ºC
120 44
90 42.8
60 41.6
36 40.7
24 40.2
12 39.7
SAS/DC
source
AC
source
Proposed micro-inverter
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
95
a) b)
Figure 4-26. Enable signals of the 8-transformer prototype during a half-cycle (a) and driving signals applied in the 2-transformer demonstrator (b).
The injected current by the single-transformer micro-inverter for different power
levels and operation modes is shown in Figure 4-27, together with the grid
voltage, the driving signal and the synchronization signal used in the unfolder
stage. This last signal is obtained by applying a convenient delay to the grid zero
cross signal. The injected current presents a PF close to unity for the BCM
operation at nominal power. However, at 10% of the nominal power the reactive
current due to the output capacitor is comparable to the generated current thus,
reducing the PF. Nevertheless the PF is over 0.9.
Figure 4-27. Waveforms of the 1-transformer parallel-series micro-inverter operated in BCM at 120W (left) and DCM at 12W (right).
The inductor current substitutes the injected current in Figure 4-28 to
demonstrate the BCM operation at different grid voltages. The frequency and
duty cycle variation is according to the presented BCM strategy.
gridV
2GSV
1GSV
UnfoldV
gridV
Oi
1GSV
UnfoldV
gridV
Oi
1GSV
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
96
Figure 4-28. Waveforms of the single transformer parallel-series micro-inverter operated in BCM at 120W for different grid voltages.
Regarding the static test applied to the 2-transformer parallel-series micro-
inverter, Figure 4-29 and Figure 4-30 show the waveforms for nominal and half
load in BCM and DCM respectively. Right picture of Figure 4-29 shows the time
instant when the second phase is enabled. Before and after the transition BCM
operation is maintained with the corresponding change in frequency and duty
cycle as it was introduced in the simulation results and confirmed by the DC test.
In Figure 4-30 a detail of the high frequency waveforms during the off transition
of phase 2 is presented. In this case the voltage applied to the freewheeling diode
is introduced and it can be appreciated how the duty cycle changes since the
applied voltage to the filter is half when only one phase is working.
Figure 4-29. Waveforms of the 2-transformer parallel-series micro-inverter operated in BCM at 120W.
Li
1GSV
gridV
1GSV
gridV
1GSV
Li
rectgridV _
2GSV
Li
1GSVUnfoldV
gridV
Oi
2GSV
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
97
Figure 4-30. Waveforms of the 2-transformer parallel-series micro-inverter operated in DCM at 60W.
The applied voltage to the output filter, e. g. the voltage withstood by the
freewheeling diode, is shown in Figure 4-31 and Figure 4-32 in the case of the 8-
transformer prototype.
Figure 4-31. Waveforms of the 8-transformer parallel-series micro-inverter operated in BCM at 120W.
Figure 4-32. Waveforms of the 8-transformer parallel-series micro-inverter operated in DCM at 36W (left) and detail of the operation in DCM at 60W.
The voltage variation according to the number of active phases, either for BCM
or DCM operation can be clearly observed. For this configuration the voltage
change when a phase is enabled or disabled is smaller than in the 2-transformer
one. Therefore, the frequency or duty cycle variation required for the proper
operation of the presented topology is not as clear as the presented for the 2-
UnfoldV
gridV
Oi
2GSV gridVDFV
oi
UnfoldV
gridV
DfV
Oi
4GSV
gridV
DfV
Li
UnfoldV
gridV
DfV
Oi
3GSV
DFV
6GSV
Li
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
98
phase inverter, as can be noted based on the high frequency waveforms
presented in the right side of both figures.
The presented waveforms in this section have been obtained based on the static
tests. As a result of these tests, efficiency, power factor and harmonic distortion
(THD) of the injected current have been measured. The efficiency measurements,
presented in Figure 4-33, include the driving stage. The prototype with the
highest turns ratio (1:8, for the single transformer) presents the lowest efficiency
in the whole power range, being lower than the estimated one.
In the case of the configurations with multiple transformers, the 8-transformer
one (with 1:1 transformers) performs better than the single transformer in the
full-load range while the 2-transformer solution is better for power levels lower
than 50%. As a result, the prototypes with multiple transformers present a CEC
efficiency of 92.37% for the 8-transformer configuration and 92.47% if two
transformers are used, while the single-transformer micro-inverter weighted
efficiency is 90.1%.
Figure 4-33. Measured efficiency for the built configurations and computed CEC efficiency based on the measurements.
In terms of PF (Figure 4-34), the behavior of the tested prototypes is very similar
for the whole power range with PF higher than 0.97 from the 20% of the
maximum power for all the configurations. Regarding the THD, the 8-phases
transformer configuration has the best performance throughout the whole power
range, achieving under the 5% required for grid connection.
86
87
88
89
90
91
92
93
94
0 20 40 60 80 100 120 140
Effi
cie
ncy
(%
)
Power (W)
8 phases Meas.
8 phases CEC eff.
2 phases Meas.
2 phases CEC eff.
1 phase Meas.
1 phase CEC eff.
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
99
Figure 4-34. Measured power factor for the tested configurations
Figure 4-35. Current THD measured for the three tested prototypes.
The thermal management of the three prototypes has been compared using
thermal captures during the static tests, which are presented in Figure 4-36,
Figure 4-37 and Figure 4-38. As expected, the thermal management of the 8-
transformer prototype is better than for the other two prototypes.
Figure 4-36. Thermal image of the 2-transformer prototype at nominal load.
Figure 4-37. Thermal image of the 8-transformer prototype at nominal load.
Figure 4-38. Thermal image of the single transformer prototype for half-load operation.
In both multiphase prototypes the maximum temperature is located at the
freewheeling diode, which is over 70ºC. In the case of the primary switches the
maximum temperatures are 60ºC and 40ºC for the 2- and the 8-transformer
0,92
0,94
0,96
0,98
1
0 20 40 60 80 100 120 140
Cu
rre
nt
THD
(%
)
Power (W)
PF-8phases
PF-2phases
PF-1phase
0
2
4
6
8
10
0 20 40 60 80 100 120 140
Cu
rre
nt
THD
(%
)
Power (W)
THDi-8phases
THDi-2phases
THDi-1phase
THD limit
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
100
configurations, corresponding with the MOSFET in transformer 1 (M1 in Figure
4-1) which is the switch that is continuously enabled.
In the case of the micro-inverter with one transformer, the presented results are
obtained for half the nominal power. The difference with the multi-core
prototypes is clear since the transformer and the primary devices, both the switch
and the snubber, present the highest temperatures, i. e. the most of the losses. In
this case the secondary diodes present a lower temperature due to the lower
power.
The test has been run at room temperature without heatsink neither fan.
However the back side of a PV module can achieve temperatures higher than 50º,
thus requiring additional heatsink. The better thermal management provided by
the 8-transformer multiphase solution favors a reduced heatsink to ensure proper
operation of the micro-inverter as a comparison to the 1- or 2-transformer
configuration. Nevertheless, the freewheeling diode is the hot spot of the
solutions and requires the same attention in all of them.
4.4.2.1 Current sensorless MPPT algorithm
Several MPPT methods have been presented in the last years [Gomes’13]. A
simple implementation is the constant voltage (CV) MPPT algorithm, where only
a voltage sensor is necessary and a simple controller is used to control the PV
panel voltage around a target value. This target value is fixed, assuming that the
MPP voltage (VMPP) is around 70%-80% of the open-circuit voltage (VOC) in a PV
module, even when irradiation changes. On the other side, the VMPP variation
with the temperature might lead to low percentage of energy extracted. In
[Pandey’07] the MPPT is based on the input voltage gradient for a buck-based
converter, hence avoiding the open circuit voltage measurement. Other current
sensorless methods have been proposed [Samrat’13]. However, they are topology
dependent and increment the complexity of the controller.
A common algorithm applied in MPPT systems due to ease of implementation
and good performance, is the Perturb and Observe method (P&O). As common
base of the many proposed variations [Abdelsalam’11], the panel voltage is
periodically perturbed, either incremented or decremented, and then the new
power is compared to the previous one considering the voltage variation.
According to the result of this comparison the direction of the perturbation is
maintained or inverted. This algorithm requires a current measurement and is
independent on the PV panel and the topology. In addition, since the system is
constantly perturbed the algorithm is prompt to oscillations around the MPP.
Several modifications of the basic algorithm have been proposed to avoid this
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
101
problem as well as proportionate a faster adaptation to environmental changes
[Abdelsalam’11].
In this thesis a combination of the CV method and P&O algorithm is proposed.
The current sensorless algorithm takes advantage of the P-V characteristic to
substitute the traditional PI controller of the CV method by a voltage
comparison, thus reducing the calculation effort of the MPPT algorithm. The
VMPP/VOC ratio considered in the CV method is used to estimate the VMPP voltage
prior to the starting of the inverter by measuring the open circuit voltage (VOC)
and applying a 0.8 factor, as illustrated in Figure 4-39. Then the P&O algorithm is
applied based only on the voltage measurement: the power reference is
incremented if the sensed voltage is over the estimated VMPP and decreased
otherwise. In order to smooth the oscillations around the MPP, a smaller
reference step is applied when the sensed voltage is close to the target voltage. As
shown in Figure 4-39 the simplified MPPT method presents the same accuracy
problems than the traditional CV algorithm when the irradiation or temperature
changes. Therefore, periodic measurements of the open circuit voltage are
necessary to update the target voltage, which require the interrupt of the inverter
operation [Salas’06].
Figure 4-39. Power reference modification in the applied MPPT algorithm.
The proposed MPPT algorithm has been tested for the single-transformer
prototype and the configuration using eight transformers. Figure 4-40 and Figure
4-41 demonstrate the behavior of the mentioned micro-inverters connected to the
SAS. The array simulator has been configured with the PV panel characteristics
for a maximum power of 60W and 120W respectively. The oscillations around
the programmed voltage, due to the applied simplified P&O algorithm, can be
clearly seen. The set-up used for the AC tests presented in this section is shown
in Figure 4-42.
V
P
OCV
OCMPP VV 8.0
LREF _
SREF_SREF_
LREF _
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
102
Figure 4-40. Start-up and steady-state of the MPPT algorithm (right) for the 8-transformer micro-inverter connected to the SAS configured with MPP of 60W (right).
Figure 4-41. Input voltage and current during start-up (left) and steady-state operation (right) of the single-transformer prototype connected to the SAS configured with MPP of
120W.
Figure 4-42. Set-up used for the static and MPPT test.
4.5. Conclusions
In this chapter an original solution for an AC-module micro-inverter has been
proposed. The micro-inverter consists of a forward converter with primary-
parallel secondary-series connected transformers. The proposed solution allows a
PVVCH 1
PVICH 2
PVVCH 1
PVICH 2
SASAC-source
SAS-interfaceIsolationtransformer
Resistive loadand inductor
DSP interface Measurementequipment
Protoype
Chapter 4 Primary-Parallel Secondary-Series Multiphase Forward Micro-Inverter
103
proper voltage boosting using well coupled transformers and a reduction in the
current stress in both primary and secondary devices.
The influence of the applied number of transformers in the efficiency and size of
the proposed parallel-series topology has been analyzed. The analysis is based in
the detailed design of different transformer sets and a developed simulation
model of the proposed topology. As expected, an increase in the number of
transformers allows a better coupling in the transformers thus, reducing the
leakage inductance and series resistance as well as the stray capacitance.
Nevertheless, the losses in the transformer set are similar for the analyzed
configurations. The surface and volume of the transformer set increase drastically
with the number of phases. However, the maximum height decreases which
enables a low-profile implementation.
The efficiency of the proposed solution is jeopardized when the available power
in the PV module decreases, due to the increase in the switching frequency
because of BCM operation. Therefore, DCM operation is selected for power levels
lower than the nominal power. Two DCM control strategies have been evaluated
and the one with better PF and THD performance has been selected. Based on the
estimated efficiency and the experimental results, the single-transformer micro-
inverter performance is limited due to the transformer parasitics. The 8-
transformer configuration presents a 2% improvement in CEC efficiency and
lower THD than the other solutions. Furthermore, its better thermal management
configuration provides an advantage in a high temperature environment such
the back side of a PV module, since it would require smaller heatsink. However,
the height of the solutions with multiple transformers is limited by the output
inductor. Therefore, the 2-transformer configuration is the preferred alternative
with a slightly lower CEC efficiency but lower component account, which offers
a cost reduction and better reliability.
Finally, a combination of the CV and P&O MPPT algorithms has been proposed
in this chapter. The main advantage of the proposed current sensorless algorithm
is the simplification of the required calculations. However, the performance is
limited if the targeted MPP voltage is not regularly updated.
105
Chapter 5
Interleaved Multiphase Forward
Micro-Inverter
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
107
5. Interleaved Multiphase Forward
Micro-Inverter
5.1. Interleaving technique background
The use of parallel interleaved converters is common in low-voltage high-current
applications [García’06]. This technique allows dividing the converter in several
power stages (phases) which manage a portion of the total output power.
Therefore, the current stress for a single power stage is reduced. In addition, the
phase shifting among the phases implies a reduction of the input and output
current ripple in the converter. Consequently the size of the output and input
filter, inductors and capacitors, can be decreased [Zumel’06]. If the number of
utilized phases is large, the drastically reduced current level per phase and the
spread losses among the components enable a low profile implementation by the
use of SMD packages and heatsink reduction or elimination [García’06].
Furthermore, the use of several phases in parallel allows modifying dynamically
the number of active phases depending on the power demanded by the load
[Costabeber’10][Zumel’06]. This technique is known as phase shedding and
enables efficiency maximization for a certain load [Zumel’06].
In PV application, the operation power range is wide due to the changeable
irradiance and temperature conditions and the inverter operates for long periods
at power levels lower than the maximum power of the PV module. As an
example, according to the CEC weighted efficiency [Sandia’04], presented in
equation (1-2), a PV converter would operate almost 90% of the time between the
30% and 75% of its rated power. With this constraint, the implementation of
interleaved solutions with phase shedding characteristic is interesting in
photovoltaic applications to maximize the conversion efficiency, i.e. the energy
yield of the PV installation [Berasategui’09].
In AC-module application, the interleaving of micro-inverters and the phase
shedding concept has been widely applied to the flyback inverter. The most
common configuration is two interleaved flyback inverters sharing one unfolding
stage [Kim’13][Gu’10][ZZhang’13]. In these solutions, which apply different
phase shedding techniques and conduction modes, weighted efficiency
improvements between 2% to 4% are reported. The same interleaved
configuration has been implemented in available commercial micro-inverters
[Enphase’10].
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
108
In this chapter the interleaving technique is applied to the proposed forward
micro-inverter operated in DCM, which enables the operation without current
loop. Two different phase shedding strategies, previously applied to DC-DC
converters and micro-inverters, are first introduced and the critical inductance to
guarantee DCM operation for both strategies is discussed. Then a comparison of
transformer size and performance as well as efficiency is performed for the
interleaved forward micro-inverter applying both phase shedding strategies.
Furthermore, the obtained results in the previous chapter for the proposed
parallel-series forward are included in the comparison. Finally, experimental
results of an 8-phase interleaved micro-inverter are presented and compared to
the counterpart parallel-series configuration.
5.2. Interleaved Forward Micro-Inverter
The application of interleaving techniques to DC-DC converters is well known
also for the forward converter. The operation of two paralleled forward
converters with the corresponding phase difference is straight forward as
presented in [TZhang’98], since both converters are independent. With the idea
of reducing the size of the interleaved configuration while taking advantage of
the distributed magnetics, the forward converters can be paralleled sharing the
output filter. Eventually, as demonstrated in [TZhang’98], the cost and power
density of both solutions are similar with the drawback of a worse efficiency if a
single inductor is used. Therefore, since efficiency is a main concern in AC-
module applications the fully distributed solution, i.e. with separated inductors
(Figure 5-1), is used in this thesis. As in the proposed parallel-series topology the
rectified sinusoidal current generated by the micro-inverter is then unfolded into
the grid.
A main advantage of using interleaved techniques is the possibility of modifying
the number of active phases according to the power level. This phase shedding
strategy contributes to keep a flat efficiency behavior for a wide power range. In
micro-inverters, two different phase shedding strategies to decide the number of
active phases can be adopted:
• Based on the DC power extracted from the PV module, as in DC-DC
applications [Enphase’10]. In this case the number of active phases is decided at
the beginning of each line period, dividing the current equally among the phases.
• Based on the demanded instantaneous AC power [ZZhang'13]. This
strategy aims to keep the number of active converters in the minimum for a given
instantaneous power, thus the number of active phases varies during a half line
period.
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
109
Figure 5-1. Interleaved multiphase forward micro-inverter
Both operation strategies are illustrated in Figure 5-2 for a 2-phase forward
micro-inverter operated in nominal and half-load conditions. In case of half-load
operation both strategies use only one inverter to transfer the available power
into the grid, as depicted in the right side of Figure 5-2. The main difference
between strategies occurs when the delivered power is higher than 50% of the
nominal load, since both phases need to be active. In the upper left corner of
Figure 5-2 the number of active phases is decided in the beginning of the line
period and both phases are providing half of the power. However, if the AC
strategy is selected the number of active phases changes during a half-line cycle
according to the instantaneous power, i.e. output current. In this case the current
is provided by phase 1 until a maximum and then shared for both phases.
Figure 5-2. Normalized output currents of the 2-phase inverter under DC (top) and AC (bottom) control strategies for nominal (left) and half-load (right) conditions.
L
Un
fold
ing
sta
ge
CoVp
+
-
1:1:n
1:1:n
1:1:n
iL
L
L
PWM1
PWM2
PWMp
Vg(t)
2
1
0 0.002 0.004 0.006 0.008
0.2
0.4
0.6
0.8
1
Output current
Phase 1 (DC)
Phase 2 (DC)
Output current
Phase 1 (DC)
Phase 2 (DC)
Time (s)
Cu
rren
t (A
)
0 0.002 0.004 0.006 0.008
0.2
0.4
0.6
0.8
1
Output current
Phase 1 (AC)
Phase 2 (AC)
Output current
Phase 1 (AC)
Phase 2 (AC)
Time (s)
Cu
rren
t (A
)
0 0.002 0.004 0.006 0.008
0.2
0.4
0.6
0.8
1
Output current
Phase 1 (DC)
Phase 2 (DC)
Output current
Phase 1 (DC)
Phase 2 (DC)
Time (s)
Cu
rren
t (A
)
0 0.002 0.004 0.006 0.008
0.2
0.4
0.6
0.8
1
Output current
Phase 1 (DC)
Phase 2 (DC)
Output current
Phase 1 (AC)
Phase 2 (AC)
Time (s)
Cu
rren
t (A
)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
110
5.2.1 Critical Inductance for DCM Operation
For both considered shedding strategies the interleaved phases operate in DCM.
The implemented control law is the same than for the parallel-series micro-
inverter and presented again in (5-1). The combination of this operation mode
together with the selected control strategy guarantees a high power factor, as
shown in the previous chapter, without current loop. The absence of current
sensing and current loop is attractive for interleaved systems, especially when
the number of used phases is elevated.
(5-1)
In the case of the interleaved forward micro-inverter, the primary to secondary
turns ratio ‘n’ is constant as in the single-phase configuration of the previous
chapter. In order to obtain the transformer turns ratio, the same design
consideration is applied for both phase shedding strategies: the micro-inverter
operates in BCM at the grid peak voltage, as stated in (5-1). Considering the same
electrical specifications than the ones set for the size and efficiency comparison
introduced in the previous chapter, the resulting turns ratio for the interleaved
forward micro-inverter is 8.
For the DC strategy, the output power of an individual inverter (1oP in (5-1)) is
constant for a given power level. However, if the number of active phases
changes with the instantaneous power, 1oP must be changed accordingly.
Since the micro-inverter is operated in DCM it is necessary to know the critical
inductance that ensures this conduction mode for every operating condition. For
the DC shedding strategy this inductance is calculated at the peak voltage, which
corresponds to point 2 in Figure 5-2. The critical inductance can then be
calculated according to (5-2), where ‘p’ is the total amount of phases for a given
configuration and oTP is the maximum power available in the selected PV
module.
(5-2)
However, in the case of the AC strategy DCM must be guaranteed in every peak
current point, such as point 1 in Figure 5-2. Therefore the critical inductance can
be calculated using (5-3), where ‘m’ is the different peak current point and it
varies between 1 and the number of total phases ‘p’.
Vpd
Vn
Vp
tvtMP
V
fLk
tMnn
ktMtd
pkooo
RMSo
swDCM
DCM
max
_
12
_
;)(
)( ;2
;)(
)()(
pfPVn
VVVnpL
swoTp
pkgpkgp
DCcrit
4
)()(
2
__
_
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
111
(5-3)
The critical inductances have been calculated for both strategies, considering the
same specifications than for the parallel-series configuration, with a constant
switching frequency of 70 kHz. Figure 5-3 shows the results for a forward micro-
inverter composed of 8 phases. The critical inductance necessary to guarantee
DCM is obtained for the first peak current point, thus fixing the inductance for all
the phases. As a consequence, if the number of active phases is selected based on
the instantaneous power, the inductance is considerably smaller than if the
average power is applied (Figure 5-4). This leads to lower duty cycle range and
higher peak and RMS currents in the inverter. It must be noted that the critical
inductance is heavily influenced by the turns ratio selection, which has been
selected to be the same for both strategies for the presented comparison.
Figure 5-3. Critical inductance for an 8-phase interleaved forward micro-inverter under different phase shedding strategies.
Figure 5-4 Critical inductance as a function of the number of phases for DC and AC control strategies.
pfPVn
VVmVpnmpmL
swoTp
pkgpkgp
ACcrit
4
)(),(
2
__
_
0 2 4 6 80
1000
2000
3000
4000
LcritDC(8)
LcritAC(m,8)
LcritDC(8)
LcritAC(m,8)
Phase/DC point
Ind
uct
ance
(u
H)
0 2 4 6 80
1000
2000
3000
4000
Lcrit_AC(1)
Lcrit_DC
Lcrit_AC(1)
Lcrit_DC
Phase / DC point
Ind
uct
ance
(u
H)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
112
5.3. Size and Efficiency Estimation and Comparison with the
Parallel-Series Forward Micro-inverter
As in the case of the proposed parallel-series micro-inverter, the number of
phases to be interleaved has an impact not only on the performance of the
inverter but also on its size, number of components and complexity of the
driving. In this section a similar comparison to the introduced for the parallel-
series topology is presented for the interleaved forward configuration. Magnetic
components are the ones with higher volume, together with the decoupling
capacitor. Therefore, in addition to the transformers the output inductor should
be included in the comparison, since the output filter is split in the interleaved
micro-inverter.
For this comparison the same specifications introduced in the previous chapter
will be considered, with the exception that the switching frequency is fixed to 70
kHz. The same process used in the parallel-series analysis will be carried in this
case, considering 1, 2, 4 and 8 phases for the two interleaving techniques
discussed above. For the presented comparison a MATLAB simulation model for
both phase shedding techniques has been developed. A first simulation is run
without considering the magnetizing inductance, and the results are used for the
core selection. Afterwards, a detailed design of each selected core is performed to
compare the transformer performance. Finally, the magnetizing inductance is
then known and can be included in the simulation model to estimate the inverter
semiconductor and magnetic losses, thus allowing an efficiency comparison of
the analyzed configurations.
5.3.1 Transformer core selection and size of the transformer set.
The area product was shown to be a simple tool to select the core for the different
analyzed configurations of the proposed micro-inverter with parallel-series
connection. Therefore, this same method is used for the analysis of the number of
phases in the interleaved solution. The utilized formula for the area product is
the same than in the previous Chapter and presented in (5-4). The used
parameters for the core selection (Figure 5-5) are shown in Table 5-I.
(5-4)
max
21
minmax
max)(2.1
Jk
InI
fB
dVpAwAeAp
w
RMSRMS
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
113
Table 5-I. Parameters used for the area product calculation
Figure 5-5. Selected cores for the analyzed interleaved configurations
Based on the obtained results, the biggest core to be used in the interleaved
solutions is the same, regardless of the phase shedding strategy. Then, the
maximum height of the transformer set is the same for both strategies.
Furthermore, this parameter is the same than the calculated for the previously
presented parallel-series.
However, a reduction in the transformer set size is possible if the number of
active phases is kept in the minimum according to the instantaneous power
(Figure 5-6). This reduction is more effective in the case of 8 phases, where a
surface reduction of 40% is achieved in respect to the average power shedding
strategy and close to 30% when compared to the parallel-series approach. For the
rest of the analyzed options the size of the transformer set is almost the same. It
must be noted that the bobbin is included in the presented results, which limits
the expected size reduction in some of the analyzed configurations.
According to the results shown and for the sake of a simpler analysis and
implementation the same core will be used for all the paralleled phases in the
micro-inverter. In this case, not only the maximum height but also the surface
and volume would remain the same regardless of the applied shedding strategy
in the interleaved solution. In addition, the transformer set matches the set for
the proposed parallel-series micro-inverter configurations presented in chapter 4.
Core/Material RM/3C90
kw 0.3
Jmax 600A/cm2
Bmax 0.65·Bsat
fmin 70kHz
VPV 45V
PPV 120W
Vgrid 110V@60Hz
4
5
6
7
8
9
10
11
12
13
14
0 5 10
RM
co
re
Phase/Number of phases
RM estimated core (AP)
2 phases AC
4 phases AC
8 phases AC
DC-interleaved
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
114
a) b)
Figure 5-6. Area (a) and volume (b) of the interleaved and parallel-series configurations.
5.3.2 Transformer Performance Comparison
A detailed design of the selected cores according to Figure 5-5 has been
developed for the analyzed configurations. As stated above the same core is
selected for the considered phase shedding techniques, thus the transformer
design is also the same. Table 5-II and Table 5-III summarize the main
parameters of the designs, which have been obtained by FEA.
Table 5-II. Main values of the transformers design when the DC shedding strategy is selected.
Table 5-III. Main values of the transformers design when the AC shedding strategy is selected.
A reduction in the core size implies an increase in the primary turns, thus
increasing the turns in secondary side since the turns ratio is the same (n1:n2 =
1:8). As a result, both leakage and AC resistance at the switching frequency
increase with the number of phases (Figure 5-7). This behavior is the opposite of
the parallel-series converter, where the increase in the number of phases allows
using better coupled transformers and reducing the leakage inductance and the
series resistance.
0
10
20
30
40
50
60
0 2 4 6 8 10
Surf
ace
, Vo
lum
e, M
ax. h
eig
tht
Number of phases
Area AC (cm2)
Area DC (cm2)
Area P-S(cm2)
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10
Surf
ace
, Vo
lum
e, M
ax. h
eig
tht
Number of phases
Volume AC (cm3)
Volume DC (cm3)
Volume P-S (cm3)
Phases Core Turns ratio W. Filling(%) Lm1(uH) Cs1(nF) Fres1(kHz) Llk2(uH) Pfe_avg(W) Pcu_avg(W) Pt_avg(W)
1 RM12 9:72:9 31,83% 504,06 1,62 176,29 39 0,16 1,90 2,06
2 RM12 9:72:9 31,83% 504,06 1,62 176,29 39 0,32 1,68 2,00
4 RM10 13:104:13 31,96% 845,10 0,93 180,01 62 0,44 2,08 2,51
8 RM8 20:160:20 39,59% 1467,32 1,06 127,74 160 0,49 2,53 3,02
Phases Core Turns ratio W. Filling(%) Lm1(uH) Cs1(nF) Fres1(kHz) Llk2(uH) Pfe_avg(W) Pcu_avg(W) Pt_avg(W)
1 RM12 9:72:9 31,83% 504,06 1,62 176,29 39 0,16 1,90 2,06
2 RM12 9:72:9 31,83% 504,06 1,62 176,29 39 0,23 1,61 1,84
4 RM10 13:104:13 31,96% 845,10 0,93 180,01 62 0,12 1,90 2,03
8 RM8 20:160:20 39,59% 1467,32 1,06 127,74 160 0,06 2,17 2,23
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
115
Figure 5-7. Leakage inductance and series resistance of the transformer designs for the interleaved configurations.
The operation of the converter is different depending on the applied control
strategy, e. g. operation variables such as duty cycle or RMS currents are
different if the instantaneous or the DC power is considered to decide the
number of active phases. Therefore, the losses of the transformer set are different
for both strategies. In both cases the core losses are estimated determining the
average over a line period of the core losses at each switching cycle according to
the Steinmetz equation [Steinmetz’84]. The simulation is used as well to calculate
the RMS currents which are used in the FEA model to obtain the winding losses
of an equivalent DC-DC forward converter.
In the case of considering the average power when deciding the number of active
phases, the losses are equally distributed among the individual transformers,
which is not the case for the other shedding strategy as shown in Figure 5-8. If
the number of active phases changes during the half-cycle, the transformer losses
are in the same level than for the parallel-series configuration. On the contrary,
the total losses and the losses per transformer are higher if the number of active
phases remains constant during the half-cycle based on the average power.
Taking into account the total losses of the transformer set it is better to use the
instantaneous power to decide the number of active phases. For this strategy the
necessary critical inductance is smaller leading to higher RMS currents.
Nevertheless, the winding losses are in the same level than for the DC strategy
since the different phases are not active during the whole half-line cycle (Figure
5-9.b). The higher RMS currents are partly motivated for the low duty cycle
necessary in the presented designs, which leads to lower core losses (Figure
5-9.a).
-4
0
4
8
12
16
20
24
28
0
20
40
60
80
100
120
140
160
180
0 2 4 6 8 10
Equ
ival
ent
seri
es
Res
ista
nce
(Ω
)
Leak
age
Ind
uct
ane
(μH
)
Number of transformers/phases
Parallel LK
Par-Ser LK
Parallel Rs
Par-Ser Rs
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
116
a) b)
Figure 5-8. Total losses of the transformer set and the individual transformers when the DC (a) or AC (b) shedding is applied.
a) b)
Figure 5-9. Core (a) and winding losses (b) of the transformer set for the analyzed configurations.
5.3.3 Output Filter and Input Capacitor
In the single-transformer forward micro-inverter the output filter consists of a
single inductor. This inductor is the same for all the parallel-series configurations
since there is no change of the output filter in this topology. As demonstrated in
Chapter 4, this inductor limits the height reduction of the multiphase parallel-
series topology.
For the interleaved forward micro-inverter, increasing the number of parallel
phases means higher number of output inductors. Consequently, the micro-
inverter surface is considerably increased but the height of the output filer is
significantly decremented, in the same manner than the analysis presented above
for the transformers. Therefore, the height limitation introduced by the output
inductor disappears. In addition, the output capacitor is reduced due to the
diminish output current ripple enabled by the interleaved operation (Figure
5-10). This further height reduction is attractive for a true low-profile
0
0,5
1
1,5
2
2,5
3
3,5
0 2 4 6 8 10
Loss
es
(W)
Phase
Total losses DC
1-phase
2-phases
4-phases
8-phases
Total
Total P-S
0
0,5
1
1,5
2
2,5
3
3,5
0 2 4 6 8 10
Loss
es
(W)
Phase
Total losses AC
1-phase
2-phases
4-phases
8-phases
Total
Total P-S
0,00
0,10
0,20
0,30
0,40
0,50
0,60
0 2 4 6 8 10
Loss
es (W
)
Number of phases
AC_Fe_losses
DC_Fe_Losses
0,00
0,50
1,00
1,50
2,00
2,50
3,00
0 2 4 6 8 10
Loss
es (W
)
Number of phases
AC_Cu_Losses
DC_Cu_Losses
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
117
implementation which brings advantages for the mechanical mounting and cost
reduction [Meinhardt’09].
Figure 5-10. Output current ripple at nominal load for different number of interleaved phases in the forward micro-inverter.
Regarding the input capacitor, despite the interleaved operation could bring a
capacitance reduction, in the proposed interleaved forward micro-inverter the
input capacitor is designed to balance the twice-line frequency current demanded
by the inverter. As introduced for the single-stage parallel-series topology in
Chapter 4.2.4, this capacitance (2mF@45V/120W, for an 8.5% of voltage ripple
[Kjaer’05]) is some orders of magnitude higher than the required capacitance for
high-frequency filtering. Therefore, the application of the interleaving technique
does not contribute to a capacitance reduction. Nevertheless, the use of a
multiphase inverter allows splitting the capacitance and enables the use of low
profile capacitors.
5.3.4 Efficiency Comparison
The same procedure than for the parallel-series inverter has been applied to the
interleaved solutions to assess the influence of the shedding strategy on the
efficiency. Moreover, the objective is to establish a comparison with the efficiency
estimation presented in the previous chapter for the proposed parallel-series
topology.
Figure 5-11.a presents the estimated efficiency for the two considered
interleaving techniques in the forward micro-inverter. Based on the obtained
results the efficiency is higher if the average power strategy is selected for a given
number of phases. Furthermore, applying this strategy allows improving light
and medium load efficiency and obtaining a flatter efficiency profile, thus
slightly improving the weighted efficiency (Figure 5-11.b). The lower efficiency of
the AC interleaving technique is motivated by small inductance and low duty
cycle of these solutions, which lead to high peak and RMS currents in the
0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 0.0090
0.5
1
1.5
2
2.5
3
3.5
1-phase 120W
2-phase 120W
4-phase 120W
1-phase 120W
2-phase 120W
4-phase 120W
time (s)
Curr
ent R
ipple
(A
)
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
118
inverter. This is an effect of the selection of the turns ratio made in this
comparison, which conditions the operation of the micro-inverter when the
different phase shedding strategies are applied.
a) b)
Figure 5-11. Calculated efficiency for the interleaved configurations (a) and CEC computed efficiency (b) applying the considered phase shedding strategies.
It is important to mention that the interleaved designs present large primary to
secondary turns ratio. Therefore, the transformer leakage inductance and series
resistance are high as shown in the transformer comparison section. The effect of
those parameters is not included in the calculations hence the expected efficiency
in the interleaved configurations is expected to be lower as it was identified with
the parallel-series experimental results. However, it is expected to obtain the
advantage of a flatter efficiency behavior for a wide power range when the
number of phases increases.
5.4. Experimental Results
According to the presented analysis, the 2-phase interleaved forward micro-
inverter is the configuration with highest calculated efficiency. However, further
increase of the number of phases allows an important height reduction which is
interesting for AC-module application. Furthermore, based on the obtained
results for the single-transformer in the previous section, the expected efficiency
is lower than the estimated one for the interleaved configuration. Therefore, the
8-phase prototype has been built to explore the effect of increasing the number of
interleaved phases and compare the results with the proposed parallel-series
micro-inverter. Since the estimated efficiency for AC phase shedding strategy is
in any case lower than the expected efficiency of applying the DC strategy, the
first one will not be considered during the test of the prototype.
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Chapter 5 Interleaved Multiphase Forward Micro-Inverter
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An interleaved prototype has been designed to interface a 45V, 120W PV module
to an 110V grid at 60Hz. The core for the transformers is RM8 with turns ratio 1:8
according to Table 5-II. The same semiconductors than for the parallel-series
prototypes have been selected, the MOSFET IRFS4410PbF and the SiC diode
C3D02060E. The output filter consists of a 122nF capacitor and 3.2mH inductors
built using RM7 cores. The control, including the DC phase shedding strategy,
has also been implemented in a TMS320F28069 microcontroller. The built
prototype, shown in Figure 5-12, presents an area of 298x199 mm with a
maximum height of 1.65 cm, which corresponds to the height of the transformer
set.
For a proper operation of the interleaved solution, the phase difference among
phases must change when there is a modification of the number of active phases.
Therefore, the controller decides the number of active phases according to the
available power in the PV module and modifies the phase difference accordingly,
as well as the required number of phases. Figure 5-13 shows the driving signals
of the 8-phase prototypes, with constant duty cycle, when 2, 4, 6 and 8 phases are
active. In order to obtain a smooth transition between phases, the change in the
number of active phases happens in the zero crossing of the grid voltage.
Consequently, the MPPT algorithm must be synchronized with the change
decision.
Figure 5-12. 8-phase prototype of the interleaved forward micro-inverter.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
120
a)
b)
c)
d)
Figure 5-13. Pulses of the interleaved forward micro-inverter with 2 (a), 4(b), 6(c) and 8(d) active phases.
The presented results in this section are obtained with constant input voltage and
emulating the grid connection of the interleaved micro-inverter with an AC
source, using the same connection scheme introduced for the proposed micro-
inverter with parallel-series connection of transformers (Figure 4-25).
Static tests of the AC operation are run for different power levels in order to
obtain the interleaved micro-inverter CEC efficiency. Figure 5-14 and Figure 5-15
show the waveforms for these tests for 120W and 60W input power respectively,
when 8 and 4 phases are active. The presented inductor currents of phases 2 and
4 show a proper interleaved operation and a good current-sharing without using
current loop. The detailed waveforms depicted in Figure 5-15 show how the
converter is close to BCM operation when the grid voltage is close to its peak
value, since the inductance is designed to have the critical value presented in
Figure 5-3.
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
121
Figure 5-14. AC and high-frequency 120W (8 phases) interleaved forward micro-inverter waveforms
Figure 5-15. AC and high-frequency 60W (4 phases) interleaved forward micro-inverter waveforms
As a result of the carried out static tests, efficiency, power factor and THD of the
injected current have been measured. In terms of efficiency (Figure 5-16), the
gridV
2Li
4Li
Oi
gridV
2Li
4Li
Oi
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
122
interleaved configuration presents slightly better efficiency levels than the single-
transformer forward inverter, for the whole power range. Furthermore, the use of
phase shedding allows a flat behavior of the efficiency. Due to this flat curve the
weighted efficiency (CEC) is slightly increased for the interleaved solution up to
90.9%, as a comparison with 90.1% obtained for the single-transformer topology.
In both cases, the obtained CEC efficiency is around 2% lower than the estimated
one. Figure 5-17 presents the calculated efficiency for the compared micro-
inverters, where the parasitic of the transformers where not included. If the
multiphase configurations are compared, the forward micro-inverter with
parallel-series transformers presents a better performance for high power levels,
while the interleaved solution is better at light load operation. Nevertheless, the
CEC efficiency of the parallel-series topology is 92.37% which implies a 1.5%
improvement as compared to its interleaved counterpart.
Figure 5-16. Measured efficiency for different forward micro-inverter
configurations.
Figure 5-17. Calculated efficiency for different forward micro-inverter
configurations.
The application of the interleaved technique allows a reduction in the output
capacitor, thus reducing the passive current in this component due to the grid
voltage. As a consequence the power factor is significantly increased at low
power, as depicted in the measurements of Figure 4-34. Regarding the current
THD, the interleaved topology presents distortion levels over the 5% limit set in
the standards. The main improvement necessary to achieve a lower THD is the
zero crossing as it can be seen in the waveforms presented above.
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8 phases Inter. Meas.
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8 phases P-S Est.
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
123
Figure 5-18. Measured power factor for the tested configurations
Figure 5-19. Current THD measured for the three tested prototypes.
A part from the static tests already presented, the interleaved micro-inverter has
been tested with power steps emulating the behavior of a MPPT algorithm. The
test has been performed with a constant voltage source thus, without an actual
MPPT algorithm. Instead, the number of active phases is changed by software in
the zero crossing of the grid voltage, as the actual MPPT would do. At that
moment the driving signals of all the interleaved phases are off, making
smoother the phase change in case it would be necessary. As it can be seen in
Figure 5-20, phase 5 becomes active in the grid voltage zero crossing when a
power step from 60W (4 active phases) to 120W (8 phases) occurs. Consequently,
the transition between operating points is smooth.
Figure 5-20. Power step from 60W to 120W.
The phase modification for a proper interleaved operation is illustrated in Figure
5-21. In Figure 5-21.a the micro-inverter presents 6 phases providing 15W each,
for a total injected power of 90W. If the hypothetical MPPT would require to
change the operation point to 120W (Figure 5-21.b), the number of active phase
must be updated. Consequently, the phase delay is updated with the number of
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Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
124
active phases. This phase difference between operating points is shown in Figure
5-21 for the phases 1 and 5.
a) b)
Figure 5-21. Interleaved forward micro-inverter operating at 90W (a) and power step from 90W to 120W (b)
The micro-inverter is designed to be mounted in the back side of a PV module
and the low-profile of the interleaved solution would allow the micro-inverter to
be assembled in the module frame. This implies an easier mounting and cost
reduction, but also an increase in the ambient temperature of the converter
during operation. Therefore, the thermal behavior of the proposed micro-inverter
is an important issue, while the interleaved multiphase solution is theoretically
better concerning this aspect. A long time test at room temperature of the single-
transformer and the interleaved micro-inverter has been run.
The obtained thermal images are shown in Figure 5-22. Due to the high
temperature observed in the single-transformer forward, the test is run at half the
nominal power (60W) in DCM operation. Clearly the transformer losses are
dominant, making the temperature to reach the 75ºC, followed by the primary
side semiconductors. In the case of the multiphase micro-inverter, the test at
nominal load reveals that also the transformers are the hottest points. The
difference in the transformers parasitic, due to a manual winding, makes a
difference in the transformer losses with the hottest point over 77ºC.
Furthermore, the temperature profile presented in Figure 5-22.b shows a good
current sharing with an almost flat distribution of temperature in the filter
inductors.
gridV
1Li
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gridV
1Li
Oi
5Li
Chapter 5 Interleaved Multiphase Forward Micro-Inverter
125
a) b)
Figure 5-22. Thermal behavior of the single-transformer forward micro-inverter at 60W operation (a) and the interleaved multiphase at 120W (b)
5.5. Conclusions
In this chapter the implementation of interleaving techniques to the proposed
forward micro-inverter has been analyzed. This analysis and comparison with
the proposed parallel-series multiphase forward micro-inverter is considered a
contribution of this thesis.
Two different phase shedding strategies, previously presented in the literature,
have been considered for the interleaved forward in the presented analysis. In
both cases DCM operation is selected to avoid the current loop. If the number of
active phases is modified during the half-line period according to the
instantaneous power, the necessary critical inductance is smaller. This leads to
lower duty cycles, higher RMS and peak currents due to the selected design
specifications and turns ratio constraint. Consequently the efficiency of the
interleaved solution applying this shedding strategy is jeopardized and lower
than the estimated efficiency for the parallel-series configuration. However, the
volume for the transformer set is the lowest of the analyzed solutions.
The comparison of the traditional interleaved forward micro-inverter and the
proposed parallel-series has shown that the interleaved solution presents more
voluminous transformer set with the same maximum height. Furthermore, the
interleaved implementation leads to 20% higher area than the parallel-series one,
due to the increase in the number of output inductors. However, the height is
decreased a 45%, since the maximum height is limited by the output inductor in
the parallel-series connected topology. The PF is improved in the interleaved
solution due to lower filter capacitance but the zero crossing distortion must be
improved in order to reduce the current THD. As expected, the utilization of the
Transformers
Inductors
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
126
interleaved technique helped to obtain a flat efficiency behavior, which improves
the weighted efficiency in 0.8%. Nevertheless, the obtained efficiency is lower
than expected due to the excessive losses in the transformers, as confirmed by the
thermal measurements.
127
Chapter 6
Conclusions and Future Work
Chapter 6 Conclusions and future work
129
6. Conclusions and Future Work
6.1. Thesis summary and contributions
This thesis is focused in the application of multiphase techniques to single-phase
PV micro-inverters. These techniques have been applied to an originally
presented single-stage forward micro-inverter in both a proposed parallel-series
and an interleaved configuration. The impact in size and efficiency of the
number of transformers used in both solutions has been analyzed, and is the
main contribution of this thesis.
In Chapter 3 a single-stage forward micro-inverter with boundary mode control
applying constant off-time was originally proposed. In the proposed topology
the unfolding stage can be integrated in the main stage taking advantage of the
forward transformer structure. The boundary conduction mode guaranties high
power factor current and it is compatible with MPPT functionality. A proof of
concept prototype was built using an analog PFC controller, in order to keep a
low-cost solution. The obtained results validate the proposed topology and
selected control strategy. However, two main limitations of the proposed
solution have been found:
The performed test shows an important zero-crossing distortion due to the
selected implementation. This fact together with the extra circuitry
necessary for a proper controller adaptation and the integration of a MPPT
algorithm, suggest the utilization of a low-cost microcontroller.
Low efficiency level has been obtained, about 82% in the carried DC tests.
The high turns ratio (1:14) transformer has been identified as a main
contributor to the micro-inverter losses.
The proposed forward micro-inverter with external unfolding stage has been
taking as a base to study the application of multiphase design techniques. In
Chapter 4 the primary-parallel secondary-series connection of transformers has
been originally proposed to overcome the transformer large turns ratio. The
proposed topology allows achieving a proper voltage boosting with highly-
coupled transformers and reducing the currents stress in both primary and
secondary semiconductors.
In Chapter 5 the interleaved configuration of the proposed forward micro-
inverter is introduced with the intention of improving the weighted efficiency
by applying phase shedding techniques. Two different strategies to manage the
number of active phase have been presented and considered in the size and
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
130
efficiency estimation. The two strategies are considering the power in the system
in two different ways. On one side the DC extracted power from the PV module
and, the AC instantaneous demanded power on the other side.
In all the multiphase configurations the impact of increasing the number of
transformers in the size and efficiency of the solutions, as well as the transformer
performance, has been analyzed. The analysis is based in a developed MATLAB
simulation model and detailed designs of the different selected transformers. The
main conclusions that can be extracted from the comparison are discussed below.
In terms of transformer design and performance, increasing the number of
transformers in the proposed parallel-series micro-inverter enables a reduction
in the individual transformer turns ratio. Therefore, better coupling can be
achieved with the consequent reduction in leakage inductance, series resistance
and stray capacitance. On the contrary, the turns ratio is not affected in the
interleaved configurations and the same parameters increase with the number of
phases. This behavior has been demonstrated with the detailed designs of the
different transformers, which cores have been selected using the area product
parameter.
According to the presented size analysis, it can be concluded that increasing the
number of transformers implies increasing the surface and volume of the
transformer set in all the considered multiphase configurations. However, the
height of the transformer decreases and it was found to be the same in the
three multiphase solutions. This is suitable for AC-module application, where
the back side of a PV module offers high surface. Furthermore, a low-profile
implementation brings mechanical advantages when mounting the micro-
inverter. If the output filter is included in the comparison, the height reduction
in the proposed parallel-series implementation is limited by the output
inductor. This is not the case in the interleaved configurations where the
output inductor is split among the phases. As a result, the 8-transformer
interleaved configuration presents a 20% higher area while the height is
reduced a 45%, in respect to its parallel-series counterpart. In the analyzed
multiphase configurations the parallelization in the primary side allows splitting
the necessary decoupling capacitor in the input of the converter. This reinforces
the low-profile implementation, together with the possibility of using SMD
devices due to the reduction in the current stress of the semiconductors.
The proposed forward micro-inverter is operated in BCM to obtain a high PF and
high THD injected current. The same control strategy has been applied to the
proposed primary-parallel secondary-series forward solution. The main
drawback of this strategy is the increase in the switching frequency when the
Chapter 6 Conclusions and future work
131
available power decreases. This degrades the efficiency when the available
power is low, which is common in PV applications due to the dependency with
the environmental conditions. To overcome this issue DCM operation of the
inverter was adopted for power levels lower than the maximum panel provided
by the PV panel. The implemented DCM control modifies the necessary duty
cycle according to the input and output voltage to inject sinusoidal current into
the grid and therefore, a current loop is not required. This is the reason why
DCM operation has been selected for interleaved operation, where the absence of
current loop is required when the number of phases is high.
The efficiency of the multiphase configurations has been estimated using the
developed MATLAB simulation model. The model has been experimentally
validated for the parallel-series configuration in both BCM and DCM operation.
According to the results, selecting the number of phases based on the
instantaneous power in the interleaved configuration provides the worst
efficiency. However, these results are influenced by the decision of keeping the
same turns ratio for both interleaved configurations.
The estimated efficiency of the interleaved configuration is higher than for the
parallel-series configuration. However, the parasitic effects of the transformers
have not been considered in the efficiency estimation. Therefore, the obtained
efficiency is expected to be lower, as confirmed by the experimental results. The
measured efficiency of the 8-transformer interleaved forward micro-inverter is
90.9%, 0.8% higher than for the single-phase prototype. The efficiency increase
is enabled by the flat efficiency behavior with the power. The presented
waveforms show a proper current sharing among the phases, but the zero
crossing distortion must be reduced to improve THD. In addition, the results of
the thermal test show that the main losses of these configurations are in the
transformer.
The obtained efficiency for both parallel-series prototypes is 92.4%, which are
1.5% higher than the 8-phase interleaved and more than 2% higher than the
single-transformer micro-inverter. In addition, the 8-transformer parallel-series
prototype presents the best THD and thermal performance. However, the hot
spot is in the freewheeling diode and the height of the solutions with multiple
transformers is limited by the output inductor. Therefore, the 2-transformer
configuration is the preferred alternative with a slightly lower CEC efficiency
but lower component account, which offers a cost reduction and better
reliability.
The presented multiphase configurations in this thesis are compatible with the
MPPT functionality. A current sensorless MPPT algorithm has been proposed
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
132
and tested for the parallel-series micro-inverter. The combination of the proposed
algorithm and the DCM operation open the possibility of eliminating the current
measurement in multiphase systems. Therefore, the cost of the solution is
reduced at the same time than the controller requirements.
Transformerless topologies are not common in micro-inverters, although they
have demonstrated to have less volume and cost as well as better efficiency in
high power PV grid connected systems. In this thesis a compilation of single-
phase non-isolated step-up inverters has been presented as an original
contribution. The reviewed topologies were presented for different applications
and it is difficult to assess whether they are suitable for AC-module application.
The contribution of this thesis is a comparison of several of the reviewed
topologies based on a defined typical micro-inverter benchmark. Different issues
have been considered in the comparison, including the main concerns in
transformerless PV inverters: size, cost, efficiency and grounding. The main
conclusions extracted from the established comparison are:
Two-stage solutions are the preferred option in the defined benchmark. In
especial the configuration with dual grounding capability, which
eliminates the ground leakage currents.
The analyzed pseudo-DC link topologies present the highest efficiency and
are a good alternative in terms of size and cost. Furthermore, the low
frequency bridge enables low ground currents.
The considered single-stage inverters are more costly and less efficient. In
these solutions, ground currents must be analyzed individually. The
differentially connected inverters are interesting for AC-module
application due to a reduced decoupling capacitor.
The cascaded connection of a step-up DC-DC converter and a pseudo-DC
link or single-stage step-up inverter must be considered for further
development of non-isolated micro-inverters. In especial if the 230V grid is
addressed.
6.2. Future work
In this thesis the application of multiphase techniques has been applied to a
proposed forward micro-inverter. The parallel-series configuration improves the
inverter performance due to the better coupling transformers and the interleaved
configuration enables a flat efficiency behavior. A future line of work is the
analysis of an optimized solution implementing both configurations
simultaneously. Furthermore, other parameters could be considered in the
Chapter 6 Conclusions and future work
133
optimization, such as different turns ratio in the parallel-series structure or non-
homogenous power distribution in the interleaved configuration.
The phase shedding strategy based on the instantaneous power has been studied
in this thesis under the assumption of keeping the same turns ratio than for the
other considered phase shedding technique. As a consequence, the critical
inductance is small, which leads to low duty cycle, high RMS values and poor
efficiency. It is of interest for a future work to reconsider the analysis with a
reduced turns ratio for this configuration. The reduction will modify not only the
mentioned duty cycle and RMS currents but also the transformer design. The
transformer with reduced turns ratio leads to better coupling and better inverter
performance, as demonstrated in this thesis.
The presented results in this thesis were obtained for an 110V grid. Therefore,
further analysis is desirable for the connection of the proposed micro-inverter to
the 230V grid. In this regard, a two-stage configuration might be considered to
avoid a large increment of the parallel-series transformers.
Regarding the transformerless topologies, the comparison presented in this thesis
is among the non-isolated topologies. However, it would be of interest to
compare the most promising transformerless topologies with existing isolated
micro-inverter and the proposed topology of this thesis. This comparison will
add extra information in the possible savings in size and desirable efficiency
improvement.
6.3. Publications
In this section the conference and journal articles published during the research
period in the Center for Industrial Electronics (CEI-UPM) are detailed. They are
classified in two groups: the publications related with the work done in this
thesis and those resulting from the collaboration in projects and research
activities. These last publications are not directly related with the thesis scope,
however the knowledge obtained in the collaborations has been useful in the
achievements of this research work.
6.3.1 Publications related with the thesis scope
Journal articles:
Meneses, D.; Garcia, O.; Alou, P.; Oliver, J.A.; Cobos, J.A., "Grid-Connected
Forward Microinverter With Primary-Parallel Secondary-Series
Transformer," IEEE Transactions on Power Electronics, vol.30, no.9,
pp.4819-4830, Sept. 2015.
Multiphase Design and Control Techniques Applied to a Forward Micro-Inverter
134
Meneses, D.; Blaabjerg, F.; Garcia, O.; Cobos, J.A., "Review and
Comparison of Step-Up Transformerless Topologies for Photovoltaic AC-
Module Application," IEEE Transactions on Power Electronics, vol.28, no.6,
pp.2649-2663, June 2013.
Publications in internal conferences:
Meneses, D.; Garcia, O.; Alou, P.; Oliver, J.A.; Prieto, R.; Cobos, J.A.,
"Forward micro-inverter with primary-parallel secondary-series multicore
transformer," Annual IEEE Applied Power Electronics Conference and
Exposition (APEC), pp.2965-2971, 16-20 March 2014.
Meneses, D.; Garcia, O.; Alou, P.; Oliver, J.A.; Cobos, J.A., "Multiphase
parallel interleaved and primary-parallel secondary-series forward micro-
inverter comparison," IEEE Energy Conversion Congress and Exposition
(ECCE), pp.4237-4243, 14-18 Sept. 2014.
Meneses, D.; Garcia, O.; Alou, P.; Oliver, J.A.; Prieto, R.; Cobos, J.A.,
"Single-stage grid-connected forward microinverter with constant off-time
boundary mode control," Annual IEEE Applied Power Electronics
Conference and Exposition (APEC), pp.568-574, 5-9 Feb. 2012.
Meneses, D.; Garcia, O.; Alou, P.; Oliver, J.A.; Prieto, R.; Cobos, J.A.,
"Single-stage grid-connected forward microinverter with boundary mode
control," IEEE Energy Conversion Congress and Exposition (ECCE),
pp.2475-2480, 17-22 Sept. 2011.
6.3.2 Additional publications
Journal articles:
Garcia, O.; Alou, P.; Oliver, J.A.; Diaz, D.; Meneses, D.; Cobos, J.A.; Soto,
A.; Lapena, E.; Rancano, J., "Comparison of Boost-Based MPPT Topologies
for Space Applications," IEEE Transactions on Aerospace and Electronic
Systems, vol.49, no.2, pp.1091-1107, April 2013.
Diaz, D.; Meneses, D.; Oliver, J.A.; Garcia, O.; Alou, P.; Cobos, J.A.,
"Dynamic Analysis of a Boost Converter With Ripple Cancellation Network
by Model-Reduction Techniques," IEEE Transactions on Power Electronics,
vol.24, no.12, pp.2769-2775, Dec. 2009.
Publications in internal conferences:
Varela, P.; Meneses, D.; Garcia, O.; Oliver, J.A.; Alou, P.; Cobos, J.A.,
"Current mode with RMS voltage and offset control loops for a single-
Chapter 6 Conclusions and future work
135
phase aircraft inverter suitable for parallel and 3-phase operation modes,"
IEEE Energy Conversion Congress and Exposition (ECCE), pp.2562-2567,
17-22 Sept. 2011
Duret, B.; Moreno, F.; Meneses, D.; García, O.; Oliver, J.A.; Alou, P.; Cobos,
J.A., “Design and implementation in a DSP of a digital double
voltage/current loop for a power inverter for an aircraft application”,
Design of Circuits and Integrated Systems Conference (DCIS), pp.250-256,
17-19 Nov. 2010.
Diaz, D.; Meneses, D.; Oliver, J.A.; Garcia, O.; Alou, P.; Cobos, J.A.,
"Dynamic Analysis of a Boost Topology with Ripple Cancellation and
Comparison with the Conventional Boost," Annual IEEE Applied Power
Electronics Conference and Exposition, 2009. APEC 2009.pp.1318-1322, 15-
19 Feb. 2009.
Alou, P.; Oliver, J.A.; Cobos, J.A.; Díaz, D.; Meneses, D, “Pedal Energy
Generator for INTEL Competition on Renewable Energies (CORE)”,
International Technology, Education and Development Conference
(INTED), 3-5 March 2008.
García, O.; Cobos, J.A.; Alou, P.; Oliver, J.A.; Díaz, D.; Meneses, D.; Soto, A.;
Lapeña, E.; Rancaño, J., “ Boost-based MPPT Converter Topology Trade-off
for Space Applications”, Proceedings of the 8th European Space Power
Conference, 14-19 Sept. 2008.
137
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Chapter7 Bibliography
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