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1P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
MX29GL256E H/LDATASHEET
2P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
FEATURES
GENERAL FEATURES• PowerSupplyOperation -2.7to3.6voltforread,erase,andprogramoperations -VI/OvoltagemusttightwithVCC -VI/O=VCC=2.7V~3.6V• Byte/Wordmodeswitchable -33,554,432x8/16,777,216x16• 64KW/128KBuniformsectorarchitecture -MX29GL256EH/L:256equalsectors• 16-byte/8-wordpagereadbuffer• 64-byte/32-wordwritebuffer• Extra128-wordsectorforsecurity -Featuresfactorylockedandidentifiable,andcustomerlockable• Advancedsectorprotectionfunction(PersifentandPasswordProtect)• Latch-upprotectedto100mAfrom-1Vto1.5xVcc• LowVccwriteinhibit:Vcc≤VLKO• CompatiblewithJEDECstandard -PinoutandsoftwarecompatibletosinglepowersupplyFlash• Deeppowerdownmode
PERFORMANCE• HighPerformance -Fastaccesstime: -MX29GL256EH/L:100ns(VCC=2.7~3.6V),90ns(VCC=3.0~3.6V) -Pageaccesstime:25ns -Fastprogramtime:11us/word -Fasterasetime:0.6s/sector• LowPowerConsumption -Lowactivereadcurrent:30mA(typical)at5MHz -Lowstandbycurrent:30uA(typical)• Typical100,000erase/programcycle• 20yearsdataretention
SOFTWARE FEATURES• Program/EraseSuspend&Program/EraseResume -Suspendssector eraseoperation to readdata fromorprogramdata toanother sectorwhich is not beingerased
-Suspendssectorprogramoperationtoreaddatafromanothersectorwhichisnotbeingprogram• StatusReply -Data#Polling&Togglebitsprovidedetectionofprogramanderaseoperationcompletion• SupportCommonFlashInterface(CFI)
HARDWARE FEATURES• Ready/Busy#(RY/BY#)Output -Providesahardwaremethodofdetectingprogramanderaseoperationcompletion• HardwareReset(RESET#)Input -Providesahardwaremethodtoresettheinternalstatemachinetoreadmode• WP#/ACCinputpin -Hardwarewriteprotectpin/Providesacceleratedprogramcapability
PACKAGE• 56-PinTSOP• 64-BallFBGA(10mmx13mm)• 64-BallLFBGA(11mmx13mm)• 70-PinSSOP• All Pb-free devices are RoHS Compliant
SINGLE VOLTAGE 3V ONLY FLASH MEMORY
3P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
PIN CONFIGURATION
56 TSOP
64 FBGA/64 LFBGA
A B C D E F G H
NC8
7
6
5
4
3
2
1
A22 A23 VIO NCNC NC
A13 A12 A14 A15 A16 BYTE# Q15/A-1
A9 A8 A10 A11 Q7 Q14 Q13 Q6
WE# A21 A19RES-ET#
Q5 Q12 VCC Q4
WP#/ACC
A18 A20 Q2 Q10 Q11RY/BY#
A7 A17 A6 A5 Q0 Q8 Q9 Q1
Q3
A3 A4 A2 A1 A0 CE# OE# GND
GND
GND
NC NC NC NC NC VIO NC NC
A23A22A15A14A13A12A11A10
A9A8
A19A20
WE#RESET#
A21WP#/ACC
RY/BY#A18A17
A7A6A5A4A3A2A1NCNC
12345678910111213141516171819202122232425262728
NCNCA16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0NCVI/O
56555453525150494847464544434241403938373635343332313029
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MX29GL256E H/L
70 SSOP
PIN DESCRIPTIONSYMBOL PIN NAMEA0~A23 AddressInputQ0~Q14 DataInputs/OutputsQ15/A-1 Q15(WordMode)/LSBaddr(ByteMode)CE# ChipEnableInputWE# WriteEnableInputOE# OutputEnableInput
RESET# HardwareResetPin,ActiveLow
WP#/ACC* HardwareWriteProtect/ProgrammingAccelerationinput
RY/BY# Read/BusyOutputBYTE# Selects8bitsor16bitsmodeVCC +3.0VsinglepowersupplyGND DeviceGroundNC PinNotConnectedInternallyVI/O PowerSupplyforInput/Output
LOGIC SYMBOL
16 or 8Q0-Q15
(A-1)
RY/BY#
A0-A23
CE#
OE#
WE#
RESET#
WP#/ACC
BYTE#
VI/O
24
234567891011121314151617181920212223242526272829303132333435
7069686766656463626160595857565554535251504948474645444342414039383736
A20A21A18A17OE#
A6A5A4A3A2A1A0
BYTE#GND
NCNCNCNCNCNC
GNDNC
CE#GND
NCA7Q0Q8Q1Q9Q2
Q10Q3
Q11NC
A19A8A15A10A11A12A13A14A9A16WE#NCA22A23GNDNCNCWP#/ACCNCNCNCGNDRESET#GNDGNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCVCC
Notes:1.WP#/ACChasinternalpullup.2.VI/OvoltagemusttightwithVCC.VI/O=VCC=2.7V~3.6V.
5P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
BLOCK DIAGRAM
CONTROLINPUTLOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTERFLASHARRAY
X-D
EC
OD
ER
ADDRESS
LATCH
AND
BUFFER Y-PASS GATE
Y-DE
CO
DE
R
ARRAYSOURCE
HVCOMMANDDATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGMDATA
HV
PROGRAMDATA LATCH
SENSEAMPLIFIER
Q0-Q15/A-1
A0-AM
AM: MSB address
CE#OE#WE#
RESET#BYTE#
WP#/ACC
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MX29GL256E H/L
BLOCK DIAGRAM DESCRIPTION TheblockdiagramonPage5illustratesasimplifiedarchitectureofthisdevice.Eachblockintheblockdiagramrepresentsoneormorecircuitmodulesintherealchipusedtoaccess,erase,program,andreadthememoryarray.
The"CONTROLINPUTLOGIC"blockreceives inputpinsCE#,OE#,WE#,RESET#,BYTE#,andWP#/ACC.Itcreatesinternaltimingcontrolsignalsaccordingtotheinputpinsandoutputstothe"ADDRESSLATCHANDBUFFER"to latchtheexternaladdresspinsA0-AM(A23).Theinternaladdressesareoutput fromthisblocktothemainarrayanddecoderscomposedof"X-DECODER","Y-DECODER","Y-PASSGATE",AND"FLASHAR-RAY".TheX-DECODERdecodestheword-linesoftheflasharray,whiletheY-DECODERdecodesthebit-linesoftheflasharray.Thebitlinesareelectricallyconnectedtothe"SENSEAMPLIFIER"and"PGMDATAHV"se-lectivelythroughtheY-PASSGATES.SENSEAMPLIFIERSareusedtoreadoutthecontentsoftheflashmemo-ry,whilethe"PGMDATAHV"blockisusedtoselectivelydeliverhighpowertobit-linesduringprogramming.The"I/OBUFFER"controlstheinputandoutputontheQ0-Q15/A-1pads.Duringreadoperation,theI/OBUFFERreceivesdata fromSENSEAMPLIFIERSanddrives theoutputpadsaccordingly. In the lastcycleofprogramcommand,theI/OBUFFERtransmitsthedataonQ0-Q15/A-1to"PROGRAMDATALATCH",whichcontrolsthehighpowerdriversin"PGMDATAHV"toselectivelyprogramthebitsinawordorbyteaccordingtotheuserin-putpattern.
The"PROGRAM/ERASEHIGHVOLTAGE"blockcomprisesthecircuitstogenerateanddeliverthenecessaryhighvoltagetotheX-DECODER,FLASHARRAY,and"PGMDATAHV"blocks.Thelogiccontrolmodulecom-prisesof the "WRITESTATEMACHINE,WSM", "STATEREGISTER", "COMMANDDATADECODER", and"COMMANDDATALATCH".WhentheuserissuesacommandbytogglingWE#,thecommandonQ0-Q15/A-1is latched in theCOMMANDDATALATCHand isdecodedby theCOMMANDDATADECODER.TheSTATEREGISTER receives thecommandand records thecurrentstateof thedevice.TheWSM implements the in-ternalalgorithmsforprogramoreraseaccordingtothecurrentcommandstatebycontrollingeachblockintheblockdiagram.
ARRAY ARCHITECTURE ThemainflashmemoryarraycanbeorganizedasBytemode(x8)orWordmode(x16).Thedetailsofthead-dressrangesandthecorrespondingsectoraddressesareshowninTable1.
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Table 1. MX29GL256EH/L SECTOR ARCHITECTURE
BLOCK STRUCTURE
Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA0 00000000 000000h-00FFFFh128 64 SA1 00000001 010000h-01FFFFh128 64 SA2 00000010 020000h-02FFFFh128 64 SA3 00000011 030000h-03FFFFh128 64 SA4 00000100 040000h-04FFFFh128 64 SA5 00000101 050000h-05FFFFh128 64 SA6 00000110 060000h-06FFFFh128 64 SA7 00000111 070000h-07FFFFh128 64 SA8 00001000 080000h-08FFFFh128 64 SA9 00001001 090000h-09FFFFh128 64 SA10 00001010 0A0000h-0AFFFFh128 64 SA11 00001011 0B0000h-0BFFFFh128 64 SA12 00001100 0C0000h-0CFFFFh128 64 SA13 00001101 0D0000h-0DFFFFh128 64 SA14 00001110 0E0000h-0EFFFFh128 64 SA15 00001111 0F0000h-0FFFFFh128 64 SA16 00010000 100000h-10FFFFh128 64 SA17 00010001 110000h-11FFFFh128 64 SA18 00010010 120000h-12FFFFh128 64 SA19 00010011 130000h-13FFFFh128 64 SA20 00010100 140000h-14FFFFh128 64 SA21 00010101 150000h-15FFFFh128 64 SA22 00010110 160000h-16FFFFh128 64 SA23 00010111 170000h-17FFFFh128 64 SA24 00011000 180000h-18FFFFh128 64 SA25 00011001 190000h-19FFFFh128 64 SA26 00011010 1A0000h-1AFFFFh128 64 SA27 00011011 1B0000h-1BFFFFh128 64 SA28 00011100 1C0000h-1CFFFFh128 64 SA29 00011101 1D0000h-1DFFFFh128 64 SA30 00011110 1E0000h-1EFFFFh128 64 SA31 00011111 1F0000h-1FFFFFh128 64 SA32 00100000 200000h-20FFFFh128 64 SA33 00100001 210000h-21FFFFh128 64 SA34 00100010 220000h-22FFFFh128 64 SA35 00100011 230000h-23FFFFh128 64 SA36 00100100 240000h-24FFFFh128 64 SA37 00100101 250000h-25FFFFh128 64 SA38 00100110 260000h-26FFFFh128 64 SA39 00100111 270000h-27FFFFh
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Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA40 00101000 280000h-28FFFFh128 64 SA41 00101001 290000h-29FFFFh128 64 SA42 00101010 2A0000h-2AFFFFh128 64 SA43 00101011 2B0000h-2BFFFFh128 64 SA44 00101100 2C0000h-2CFFFFh128 64 SA45 00101101 2D0000h-2DFFFFh128 64 SA46 00101110 2E0000h-2EFFFFh128 64 SA47 00101111 2F0000h-2FFFFFh128 64 SA48 00110000 300000h-30FFFFh128 64 SA49 00110001 310000h-31FFFFh128 64 SA50 00110010 320000h-32FFFFh128 64 SA51 00110011 330000h-33FFFFh128 64 SA52 00110100 340000h-34FFFFh128 64 SA53 00110101 350000h-35FFFFh128 64 SA54 00110110 360000h-36FFFFh128 64 SA55 00110111 370000h-37FFFFh128 64 SA56 00111000 380000h-38FFFFh128 64 SA57 00111001 390000h-39FFFFh128 64 SA58 00111010 3A0000h-3AFFFFh128 64 SA59 00111011 3B0000h-3BFFFFh128 64 SA60 00111100 3C0000h-3CFFFFh128 64 SA61 00111101 3D0000h-3DFFFFh128 64 SA62 00111110 3E0000h-3EFFFFh128 64 SA63 00111111 3F0000h-3FFFFFh128 64 SA64 01000000 400000h-40FFFFh128 64 SA65 01000001 410000h-41FFFFh128 64 SA66 01000010 420000h-42FFFFh128 64 SA67 01000011 430000h-43FFFFh128 64 SA68 01000100 440000h-44FFFFh128 64 SA69 01000101 450000h-45FFFFh128 64 SA70 01000110 460000h-46FFFFh128 64 SA71 01000111 470000h-47FFFFh128 64 SA72 01001000 480000h-48FFFFh128 64 SA73 01001001 490000h-49FFFFh128 64 SA74 01001010 4A0000h-4AFFFFh128 64 SA75 01001011 4B0000h-4BFFFFh128 64 SA76 01001100 4C0000h-4CFFFFh128 64 SA77 01001101 4D0000h-4DFFFFh128 64 SA78 01001110 4E0000h-4EFFFFh128 64 SA79 01001111 4F0000h-4FFFFFh128 64 SA80 01010000 500000h-50FFFFh128 64 SA81 01010001 510000h-51FFFFh
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Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA82 01010010 520000h-52FFFFh128 64 SA83 01010011 530000h-53FFFFh128 64 SA84 01010100 540000h-54FFFFh128 64 SA85 01010101 550000h-55FFFFh128 64 SA86 01010110 560000h-56FFFFh128 64 SA87 01010111 570000h-57FFFFh128 64 SA88 01011000 580000h-58FFFFh128 64 SA89 01011001 590000h-59FFFFh128 64 SA90 01011010 5A0000h-5AFFFFh128 64 SA91 01011011 5B0000h-5BFFFFh128 64 SA92 01011100 5C0000h-5CFFFFh128 64 SA93 01011101 5D0000h-5DFFFFh128 64 SA94 01011110 5E0000h-5EFFFFh128 64 SA95 01011111 5F0000h-5FFFFFh128 64 SA96 01100000 600000h-60FFFFh128 64 SA97 01100001 610000h-61FFFFh128 64 SA98 01100010 620000h-62FFFFh128 64 SA99 01100011 630000h-63FFFFh128 64 SA100 01100100 640000h-64FFFFh128 64 SA101 01100101 650000h-65FFFFh128 64 SA102 01100110 660000h-66FFFFh128 64 SA103 01100111 670000h-67FFFFh128 64 SA104 01101000 680000h-68FFFFh128 64 SA105 01101001 690000h-69FFFFh128 64 SA106 01101010 6A0000h-6AFFFFh128 64 SA107 01101011 6B0000h-6BFFFFh128 64 SA108 01101100 6C0000h-6CFFFFh128 64 SA109 01101101 6D0000h-6DFFFFh128 64 SA110 01101110 6E0000h-6EFFFFh128 64 SA111 01101111 6F0000h-6FFFFFh128 64 SA112 01110000 700000h-70FFFFh128 64 SA113 01110001 710000h-71FFFFh128 64 SA114 01110010 720000h-72FFFFh128 64 SA115 01110011 730000h-73FFFFh128 64 SA116 01110100 740000h-74FFFFh128 64 SA117 01110101 750000h-75FFFFh128 64 SA118 01110110 760000h-76FFFFh128 64 SA119 01110111 770000h-77FFFFh128 64 SA120 01111000 780000h-78FFFFh128 64 SA121 01111001 790000h-79FFFFh128 64 SA122 01111010 7A0000h-7AFFFFh128 64 SA123 01111011 7B0000h-7BFFFFh
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MX29GL256E H/L
Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA124 01111100 7C0000h-7CFFFFh128 64 SA125 01111101 7D0000h-7DFFFFh128 64 SA126 01111110 7E0000h-7EFFFFh128 64 SA127 01111111 7F0000h-7FFFFFh128 64 SA128 10000000 800000h-80FFFFh128 64 SA129 10000001 810000h-81FFFFh128 64 SA130 10000010 820000h-82FFFFh128 64 SA131 10000011 830000h-83FFFFh128 64 SA132 10000100 840000h-84FFFFh128 64 SA133 10000101 850000h-85FFFFh128 64 SA134 10000110 860000h-86FFFFh128 64 SA135 10000111 870000h-87FFFFh128 64 SA136 10001000 880000h-88FFFFh128 64 SA137 10001001 890000h-89FFFFh128 64 SA138 10001010 8A0000h-8AFFFFh128 64 SA139 10001011 8B0000h-8BFFFFh128 64 SA140 10001100 8C0000h-8CFFFFh128 64 SA141 10001101 8D0000h-8DFFFFh128 64 SA142 10001110 8E0000h-8EFFFFh128 64 SA143 10001111 8F0000h-8FFFFFh128 64 SA144 10010000 900000h-90FFFFh128 64 SA145 10010001 910000h-91FFFFh128 64 SA146 10010010 920000h-92FFFFh128 64 SA147 10010011 930000h-93FFFFh128 64 SA148 10010100 940000h-94FFFFh128 64 SA149 10010101 950000h-95FFFFh128 64 SA150 10010110 960000h-96FFFFh128 64 SA151 10010111 970000h-97FFFFh128 64 SA152 10011000 980000h-98FFFFh128 64 SA153 10011001 990000h-99FFFFh128 64 SA154 10011010 9A0000h-9AFFFFh128 64 SA155 10011011 9B0000h-9BFFFFh128 64 SA156 10011100 9C0000h-9CFFFFh128 64 SA157 10011101 9D0000h-9DFFFFh128 64 SA158 10011110 9E0000h-9EFFFFh128 64 SA159 10011111 9F0000h-9FFFFFh128 64 SA160 10100000 A00000h-A0FFFFh128 64 SA161 10100001 A10000h-A1FFFFh128 64 SA162 10100010 A20000h-A2FFFFh128 64 SA163 10100011 A30000h-A3FFFFh128 64 SA164 10100100 A40000h-A4FFFFh128 64 SA165 10100101 A50000h-A5FFFFh
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Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA166 10100110 A60000h-A6FFFFh128 64 SA167 10100111 A70000h-A7FFFFh128 64 SA168 10101000 A80000h-A8FFFFh128 64 SA169 10101001 A90000h-A9FFFFh128 64 SA170 10101010 AA0000h-AAFFFFh128 64 SA171 10101011 AB0000h-ABFFFFh128 64 SA172 10101100 AC0000h-ACFFFFh128 64 SA173 10101101 AD0000h-ADFFFFh128 64 SA174 10101110 AE0000h-AEFFFFh128 64 SA175 10101111 AF0000h-AFFFFFh128 64 SA176 10110000 B00000h-B0FFFFh128 64 SA177 10110001 B10000h-B1FFFFh128 64 SA178 10110010 B20000h-B2FFFFh128 64 SA179 10110011 B30000h-B3FFFFh128 64 SA180 10110100 B40000h-B4FFFFh128 64 SA181 10110101 B50000h-B5FFFFh128 64 SA182 10110110 B60000h-B6FFFFh128 64 SA183 10110111 B70000h-B7FFFFh128 64 SA184 10111000 B80000h-B8FFFFh128 64 SA185 10111001 B90000h-B9FFFFh128 64 SA186 10111010 BA0000h-BAFFFFh128 64 SA187 10111011 BB0000h-BBFFFFh128 64 SA188 10111100 BC0000h-BCFFFFh128 64 SA189 10111101 BD0000h-BDFFFFh128 64 SA190 10111110 BE0000h-BEFFFFh128 64 SA191 10111111 BF0000h-BFFFFFh128 64 SA192 11000000 C00000h-C0FFFFh128 64 SA193 11000001 C10000h-C1FFFFh128 64 SA194 11000010 C20000h-C2FFFFh128 64 SA195 11000011 C30000h-C3FFFFh128 64 SA196 11000100 C40000h-C4FFFFh128 64 SA197 11000101 C50000h-C5FFFFh128 64 SA198 11000110 C60000h-C6FFFFh128 64 SA199 11000111 C70000h-C7FFFFh128 64 SA200 11001000 C80000h-C8FFFFh128 64 SA201 11001001 C90000h-C9FFFFh128 64 SA202 11001010 CA0000h-CAFFFFh128 64 SA203 11001011 CB0000h-CBFFFFh128 64 SA204 11001100 CC0000h-CCFFFFh128 64 SA205 11001101 CD0000h-CDFFFFh128 64 SA206 11001110 CE0000h-CEFFFFh128 64 SA207 11001111 CF0000h-CFFFFFh
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Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA208 11010000 D00000h-D0FFFFh128 64 SA209 11010001 D10000h-D1FFFFh128 64 SA210 11010010 D20000h-D2FFFFh128 64 SA211 11010011 D30000h-D3FFFFh128 64 SA212 11010100 D40000h-D4FFFFh128 64 SA213 11010101 D50000h-D5FFFFh128 64 SA214 11010110 D60000h-D6FFFFh128 64 SA215 11010111 D70000h-D7FFFFh128 64 SA216 11011000 D80000h-D8FFFFh128 64 SA217 11011001 D90000h-D9FFFFh128 64 SA218 11011010 DA0000h-DAFFFFh128 64 SA219 11011011 DB0000h-DBFFFFh128 64 SA220 11011100 DC0000h-DCFFFFh128 64 SA221 11011101 DD0000h-DDFFFFh128 64 SA222 11011110 DE0000h-DEFFFFh128 64 SA223 11011111 DF0000h-DFFFFFh128 64 SA224 11100000 E00000h-E0FFFFh128 64 SA225 11100001 E10000h-E1FFFFh128 64 SA226 11100010 E20000h-E2FFFFh128 64 SA227 11100011 E30000h-E3FFFFh128 64 SA228 11100100 E40000h-E4FFFFh128 64 SA229 11100101 E50000h-E5FFFFh128 64 SA230 11100110 E60000h-E6FFFFh128 64 SA231 11100111 E70000h-E7FFFFh128 64 SA232 11101000 E80000h-E8FFFFh128 64 SA233 11101001 E90000h-E9FFFFh128 64 SA234 11101010 EA0000h-EAFFFFh128 64 SA235 11101011 EB0000h-EBFFFFh128 64 SA236 11101100 EC0000h-ECFFFFh128 64 SA237 11101101 ED0000h-EDFFFFh128 64 SA238 11101110 EE0000h-EEFFFFh128 64 SA239 11101111 EF0000h-EFFFFFh128 64 SA240 11110000 F00000h-F0FFFFh128 64 SA241 11110001 F10000h-F1FFFFh128 64 SA242 11110010 F20000h-F2FFFFh128 64 SA243 11110011 F30000h-F3FFFFh128 64 SA244 11110100 F40000h-F4FFFFh128 64 SA245 11110101 F50000h-F5FFFFh128 64 SA246 11110110 F60000h-F6FFFFh128 64 SA247 11110111 F70000h-F7FFFFh128 64 SA248 11111000 F80000h-F8FFFFh128 64 SA249 11111001 F90000h-F9FFFFh
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Sector SizeSector Sector Address
A23-A16(x16)
Address RangeKbytes Kwords128 64 SA250 11111010 FA0000h-FAFFFFh128 64 SA251 11111011 FB0000h-FBFFFFh128 64 SA252 11111100 FC0000h-FCFFFFh128 64 SA253 11111101 FD0000h-FDFFFFh128 64 SA254 11111110 FE0000h-FEFFFFh128 64 SA255 11111111 FF0000h-FFFFFFh
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Table 2-1. BUS OPERATION
Notes:1.ThefirstorlastsectorwasprotectedifWP#/ACC=Vil.2. WhenWP#/ACC=Vih,theprotectionconditionsoftheoutmostsectordependsonpreviousprotectioncondi-
tions.Refertotheadvanedprotectfeature.3. Q0~Q15areinput(DIN)oroutput(DOUT)pinsaccordingtotherequestsofcommandsequence,sectorpro-
tection,ordatapollingalgorithm.4. InWordMode(Byte#=Vih),theaddressesareAMtoA0,AM:MSBofaddress. InByteMode(Byte#=Vil),theaddressesareAMtoA-1(Q15),AM:MSBofaddress.
Mode Select RE- SET# CE# WE# OE# Address
(Note4)
Data I/O
Q0~Q7
Byte#WP#/ ACC
Vil VihData (I/O) Q8~Q15
DeviceReset L X X X X HighZ HighZ HighZ L/H
StandbyMode Vcc±0.3V
Vcc±0.3V X X X HighZ HighZ HighZ H
OutputDisable H L H H X HighZ HighZ HighZ L/HReadMode H L H L AIN DOUT Q8-Q14=
HighZ,Q15=A-1
DOUT L/HWrite H L L H AIN DIN DIN Note1,2AccelerateProgram H L L H AIN DIN DIN Vhv
BUS OPERATION
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Notes:1.Sectorunprotectedcode:00h.Sectorprotectedcode:01h.2.Factorylockedcode: WP#protectshighaddresssector:99h. WP#protectslowaddresssector:89hFactoryunlockedcode: WP#protectshighaddresssector:19h. WP#protectslowaddresssector:09h3.AM:MSBofaddress.
Table 2-2. BUS OPERATION
ItemControl Input AM
to A12
A11 to
A10A9
A8 to A7
A6A5 to A4
A3 to A2
A1 A0 Q0 ~ Q7 Q8 ~ Q15CE# WE# OE#
SectorLockStatusVerification L H L SA X Vhv X L X L H L
01hor00h
(Note1)X
ReadSiliconIDManufacturerCode
L H L X X Vhv X L X L L L C2H X
ReadSiliconID--MX29GL256EH/L
Cycle1 L H L X X Vhv X L X L L H 7EH 22H(Word),XXH(Byte)
Cycle2 L H L X X Vhv X L X H H L 22H 22H(Word),XXH(Byte)
Cycle3 L H L X X Vhv X L X H H H 01H 22H(Word),XXH(Byte)
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FUNCTIONAL OPERATION DESCRIPTION
READ OPERATION Toperformareadoperation,thesystemaddressesthedesiredmemoryarrayorstatusregisterlocationbypro-viding itsaddressontheaddresspinsandsimultaneouslyenablingthechipbydrivingCE#&OE#LOW,andWE#HIGH.AftertheTceandToetimingrequirementshavebeenmet,thesystemcanreadthecontentsoftheaddressedlocationbyreadingtheData(I/O)pins.IfeithertheCE#orOE#isheldHIGH,theoutputswillremaintri-statedandnodatawillappearontheoutputpins.
PAGE READ
ThisdeviceisabletoconductMXICMaskROMcompatiblehighperformancepageread.Pagesizeis16bytesor8words.ThehigheraddressAmax~A3select the certainpage,whileA2~A0 forwordmode,A2~A-1 forbytemodeselecttheparticularwordorbyteinapage.ThepageaccesstimeisTaaorTce,followingbyTpafortherestofthepagereadtime.WhenCE#toggles,accesstimeisTaaorTce.Pagemodecanbeturnedonbykeeping"page-readaddress"constantandchangingthe"intra-readpage"addresses.
WRITE OPERATION
Toperformawriteoperation,thesystemprovidesthedesiredaddressontheaddresspins,enablesthechipbyassertingCE#LOW,anddisablestheData(I/O)pinsbyholdingOE#HIGH.ThesystemthenplacesdatatobewrittenontheData(I/O)pinsandpulsesWE#LOW.ThedevicecapturestheaddressinformationonthefallingedgeofWE#andthedataontherisingedgeofWE#.Toseeanexample,pleaserefertothetimingdiagraminFigure1onPage49. Thesystemisnotallowedtowrite invalidcommands(commandsnotdefined in thisdatasheet)tothedevice.Writinganinvalidcommandmayputthedeviceinanundefinedstate.
DEVICE RESET
DrivingtheRESET#pinLOWforaperiodofTrpormorewillreturnthedevicetoReadmode.Ifthedeviceisinthemiddleofaprogramoreraseoperation,theresetoperationwilltakeatmostaperiodofTready1beforethedevicereturnstoReadmode.UntilthedevicedoesreturnstoReadmode,theRY/BY#pinwillremainLow(BusyStatus).
WhentheRESET#pinisheldatGND±0.3V,thedeviceonlyconsumesstandby(Isbr)current.However,thede-vicedrawslargercurrentiftheRESET#pinisheldatavoltagegreaterthanGND+0.3VandlessthanorequaltoVil.
ItisrecommendedtotiethesystemresetsignaltotheRESET#pinoftheflashmemory.Thisallowsthedevicetoberesetwith thesystemandputs it inastatewhere thesystemcan immediatelybeginreadingbootcodefromit.
STANDBY MODE
ThedeviceentersStandbymodewhenevertheRESET#andCE#pinsarebothheldHighexceptintheembed-dedmode.Whileinthismode,WE#andOE#willbeignored,allDataOutputpinswillbeinahighimpedancestate,andthedevicewilldrawminimal(Isb)current.
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FUNCTIONAL OPERATION DESCRIPTION (cont'd)
OUTPUT DISABLE
Whileinactivemode(RESET#HIGHandCE#LOW),theOE#pincontrolsthestateoftheoutputpins.IfOE#isheldHIGH,allData(I/O)pinswillremaintri-stated.IfheldLOW,theByteorWordData(I/O)pinswilldrivedata.
BYTE/WORD SELECTION
TheBYTE#inputpinisusedtoselecttheorganizationofthearraydataandhowthedataisinput/outputontheData(I/O)pins.IftheBYTE#pinisheldHIGH,Wordmodewillbeselectedandall16datalines(Q0toQ15)willbeactive.
IfBYTE#isforcedLOW,BytemodewillbeactiveandonlydatalinesQ0toQ7willbeactive.DatalinesQ8toQ14willremaininahighimpedancestateandQ15becomestheA-1addressinputpin.
HARDWARE WRITE PROTECT
BydrivingtheWP#/ACCpinLOW.Thehighestor lowestwasprotectedfromallerase/programoperations. IfWP#/ACCisheldHIGH(VihtoVCC),thesesectorsreverttotheirpreviouslyprotected/unprotectedstatus.
ACCELERATED PROGRAMMING OPERATION
Byapplyinghighvoltage(Vhv)totheWP#/ACCpin,thedevicewillentertheAcceleratedProgrammingmode.Thismodepermitsthesystemtoskipthenormalcommandunlocksequencesandprogrambyte/wordlocationsdirectly.Duringacceleratedprogramming,thecurrentdrawnfromtheWP#/ACCpinisnomorethanICP1.
WRITE BUFFER PROGRAMMING OPERATION
Programs64bytes/32words inaprogrammingoperation.To trigger theWriteBufferProgramming,startby thefirsttwounlockcycles,thenthirdcyclewritestheWriteBufferLoadcommandatthedestinedprogrammingSec-torAddress.Theforthcyclewritesthe"wordlocationssubtractone"number.
Followingaboveoperations,systemstartstowritetheminglingofaddressanddata.Aftertheprogrammingofthefirstaddressordata,the"write-buffer-page"isselected.Thefollowingdatashouldbewithintheabovemen-tionedpage.
The"write-buffer-page"isselectedbychoosingaddressAmax-A5.
"Write-Buffer-Page"addresshastobethesameforalladdress/datawriteintothewritebuffer.Ifnot,operationwillABORT.
ToprogramthecontentofthewritebufferpagethiscommandmustbefollowedbyawritetobufferProgramcon-firmcommand.
Theoperationofwrite-buffercanbesuspendedorresumedbythestandardcommands,oncethewritebufferprogrammingoperationisfinished,it’llreturntonormalREADmode.
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FUNCTIONAL OPERATION DESCRIPTION (cont'd)
WRITE BUFFER PROGRAMMING OPERATION (cont'd)
ABORTwillbeexecutedfortheWriteBufferProgrammingSequenceiffollowingconditionoccurs:• Thevalueloadedisbiggerthanthepagebuffersizeduring"NumberofLocationstoProgram"• AddresswritteninasectorisnotthesameastheoneassignedduringtheWrite-Buffer-Loadcommand.• Address/Datapairwritten toadifferentwrite-buffer-page than theoneassignedby the "StartingAddress"
during the"writebufferdataloading"operation.• Writingnot"ConfirmCommand"aftertheassignednumberof"dataload"cycles.
TheabortistriggeredbyQ1=1,Q7=DATA#(lastaddresswritten),Q6=toggle,Q5=0.AWrite-to-Buffer-AbortRe-setcommandsequencehastobewrittentoresetthedeviceforthenextoperation.
Writebufferprogrammingcanbeconductedinanysequence.HowevertheCFIfunctions,autoselect,SecuredSiliconsectorarenotfunctionalwhenprogramoperationisinprogress.Multiplewritebufferprogrammingopera-tionsonthesamewritebufferaddressrangewithoutinterveningerasesisavailable.Anybitinawritebufferad-dressrangecan’tbeprogrammedfrom0backto1.
SECTOR PROTECT OPERATION
Thedeviceprovidesuserprogrammableprotectionoperationsforselectedsectors.PleaserefertoTable1whichshowallSectorassignments.
Duringtheprotectionoperation,thesectoraddressofanysectormaybeusedtospecifytheSectorbeingpro-tected.
AUTOMATIC SELECT BUS OPERATIONS
ThefollowingfivebusoperationsrequireA9toberaisedtoVhv.PleaseseeAUTOMATICSELECTCOMMANDSEQUENCEintheCOMMANDOPERATIONSsectionfordetailsofequivalentcommandoperationsthatdonotrequiretheuseofVhv.
SECTOR LOCK STATUS VERIFICATION
Todeterminetheprotectedstateofanysectorusingbusoperations,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,thesectoraddressappliedtoaddresspinsA22toA12,addresspinsA6,A3,A2&A0heldLOW,andaddresspinA1heldHIGH.IfdatabitQ0isLOW,thesectorisnotprotected,andifQ0isHIGH,thesectorisprotected.
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FUNCTIONAL OPERATION DESCRIPTION (cont'd)
READ SILICON ID MANUFACTURER CODE
Todetermine theSilicon IDManufacturerCode, thesystemperformsaREADOPERATIONwithA9 raised toVhvandaddresspinsA6,A3,A2,A1,&A0heldLOW.TheMacronixIDcodeofC2hshouldbepresentondatabitsQ0toQ7.
READ INDICATOR BIT (Q7) FOR SECURITY SECTOR
TodetermineiftheSecuritySectorhasbeenlockedatthefactory,thesystemperformsaREADOPERATIONwithA9raisedtoVhv,addresspinA6,A3&A2heldLOW,andaddresspinsA1&A0heldHIGH.IftheSecuritySectorhasbeenlockedatthefactory,thecode99h(H)/89h(L)willbepresentondatabitsQ0toQ7.Otherwise,thefactoryunlockedcodeof19h(H)/09h(L)willbepresent.
INHERENT DATA PROTECTION
Toavoidaccidentalerasureorprogrammingofthedevice,thedeviceisautomaticallyresettoReadmodeduringpowerup.Additionally,thefollowingdesignfeaturesprotectthedevicefromunintendeddatacorruption.
COMMAND COMPLETION
Onlyafter thesuccessfulcompletionof thespecifiedcommandsetswill thedevicebegin itseraseorprogramoperation.Thefailureinobservingvalidcommandsetswillresultinthememoryreturningtoreadmode.
LOW VCC WRITE INHIBIT
Thedevice refuses to accept anywrite commandwhenVcc is less thanVLKO.This prevents data fromspuriously beingalteredduringpower-up, power-down, or temporary power interruptions.Thedeviceautomaticallyresets itselfwhenVcc is lower thanVLKOandwritecyclesare ignoreduntilVcc isgreater thanVLKO.ThesystemmustprovidepropersignalsoncontrolpinsafterVccrisesaboveVLKOtoavoidunintentionalprogramoreraseoperations.
WRITE PULSE "GLITCH" PROTECTION
CE#,WE#,OE#pulsesshorter than5nsaretreatedasglitchesandwillnotberegardedasaneffectivewritecycle.
LOGICAL INHIBIT
AvalidwritecyclerequiresbothCE#andWE#atVilwithOE#atVih.WritecycleisignoredwheneitherCE#atVih,WE#atVih,orOE#atVil.
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FUNCTIONAL OPERATION DESCRIPTION (cont'd)
POWER-UP SEQUENCE
Uponpowerup, thedevice isplaced inReadmode.Furthermore,programoreraseoperationwillbeginonlyaftersuccessfulcompletionofspecifiedcommandsequences.
POWER-UP WRITE INHIBIT
WhenWE#,CE#isheldatVilandOE#isheldatVihduringpowerup,thedeviceignoresthefirstcommandontherisingedgeofWE#.
POWER SUPPLY DECOUPLING
A0.1uFcapacitorshouldbeconnectedbetweentheVccandGNDtoreducethenoiseeffect.
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COMMAND OPERATIONS
READING THE MEMORY ARRAY Readmodeisthedefaultstateafterpoweruporafteraresetoperation.Toperformareadoperation,pleasere-fertoREADOPERATIONintheBUSOPERATIONSsectionabove.
If thedevice receivesanEraseSuspend commandwhile in theSectorErase state, theeraseoperationwillpause(afteratimedelaynotexceeding20us)andthedevicewillenterErase-SuspendedReadmode.WhileintheErase-SuspendedReadmode,datacanbeprogrammedorreadfromanysectornotbeingerased.Readingfromaddresseswithinsector(s)beingerasedwillonlyreturnthecontentsofthestatusregister,whichisinfacthowthecurrentstatusofthedevicecanbedetermined.
If a programcommand is issued to any inactive (not currently beingerased) sector duringErase-SuspendedReadmode,thedevicewillperformtheprogramoperationandautomaticallyreturntoErase-SuspendedReadmodeaftertheprogramoperationcompletessuccessfully.
WhileinErase-SuspendedReadmode,anEraseResumecommandmustbeissuedbythesystemtoreactivatetheeraseoperation. Theeraseoperationwill resume fromwhere iswassuspendedandwill continueuntil itcompletessuccessfullyoranotherEraseSuspendcommandisreceived.
Afterthememorydevicecompletesanembeddedoperation(automaticChipErase,SectorErase,orProgram)successfully,itwillautomaticallyreturntoReadmodeanddatacanbereadfromanyaddressinthearray.Iftheembeddedoperationfailstocomplete,asindicatedbystatusregisterbitQ5(exceedstimelimitflag)goingHIGHduringtheoperations,thesystemmustperformaresetoperationtoreturnthedevicetoReadmode.
ThereareseveralstatesthatrequirearesetoperationtoreturntoReadmode:
1.Aprogramorerasefailure--indicatedbystatusregisterbitQ5goingHIGHduringtheoperation.Failuresdur-ingeitherofthesestateswillpreventthedevicefromautomaticallyreturningtoReadmode.
2.ThedeviceisinAutoSelectmodeorCFImode.Thesetwostatesremainactiveuntiltheyareterminatedbyaresetoperation.
Inthetwosituationsabove, ifaresetoperation(eitherhardwareresetorsoftwareresetcommand) isnotper-formed,thedevicewillnotreturntoReadmodeandthesystemwillnotbeabletoreadarraydata.
AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY
ThedeviceprovidestheusertheabilitytoprogramthememoryarrayinBytemodeorWordmode.AslongastheusersentersthecorrectcycledefinedintheTable3(including2unlockcyclesandtheA0Hprogramcom-mand),anybyteorworddataprovidedonthedatalinesbythesystemwillautomaticallybeprogrammedintothearrayatthespecifiedlocation.
Aftertheprogramcommandsequencehasbeenexecuted,theinternalwritestatemachine(WSM)automaticallyexecutesthealgorithmsandtimingsnecessaryforprogrammingandverification,whichincludesgeneratingsuit-ableprogrampulses,checkingcell thresholdvoltagemargins,andrepeatingtheprogrampulse ifanycellsdonotpassverificationorhavelowmargins.Theinternalcontrollerprotectscellsthatdopassverificationandmar-gintestsfrombeingover-programmedbyinhibitingfurtherprogrampulsestothesepassingcellsasweakercellscontinuetobeprogrammed.
WiththeinternalWSMautomaticallycontrollingtheprogrammingprocess,theuseronlyneedstoenterthepro-gramcommandanddataonce.
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COMMAND OPERATIONS (cont'd)
AUTOMATIC PROGRAMMING OF THE MEMORY ARRAY (cont'd)
Programmingwillonlychangethebitstatusfrom"1"to"0".Itisnotpossibletochangethebitstatusfrom"0"to"1"byprogramming.Thiscanonlybedonebyaneraseoperation.Furthermore,theinternalwriteverificationonlychecksanddetectserrorsincaseswherea"1"isnotsuccessfullyprogrammedto"0".
Anycommandswrittentothedeviceduringprogrammingwillbeignoredexcepthardwareresetorprogramsus-pend.Hardwareresetwillterminatetheprogramoperationafteraperiodoftimenomorethan10us.Whentheembeddedprogramalgorithmiscompleteortheprogramoperationisterminatedbyahardwarereset,thede-vicewillreturntoReadmode.Programsuspendready,thedevicewillenterprogramsuspendreadmode.
Aftertheembeddedprogramoperationhasbegun,theusercancheckforcompletionbyreadingthefollowingbitsinthestatusregister:
Note:RY/BY#isanopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.
ERASING THE MEMORY ARRAY
Thereare two typesoferaseoperationsperformedon thememoryarray--SectorEraseandChipErase. IntheSectorEraseoperation,oneormoreselectedsectorsmaybeerasedsimultaneously. In theChipEraseoperation,thecompletememoryarrayiserasedexceptforanyprotectedsectors.Moredetailsoftheprotectedsectorsareexplainedinsection5.
SECTOR ERASE
Thesectoreraseoperation isusedtocleardatawithinasectorbyreturningallof itsmemory locationstothe"1"state.Itrequiressixcommandcyclestoinitiatetheeraseoperation.Thefirsttwocyclesare"unlockcycles",thethird isaconfigurationcycle, thefourthandfiftharealso"unlockcycles",andthesixthcycle istheSectorErasecommand.Afterthesectorerasecommandsequencehasbeenissued,aninternal50ustime-outcounterisstarted.Untilthiscounterreacheszero,additionalsectoraddressesandSectorErasecommandsmaybeis-suedthusallowingmultiplesectorstobeselectedanderasedsimultaneously.Afterthe50ustime-outcounterhasexpired,nonewcommandswillbeacceptedandtheembeddedsectoreraseoperationwillbegin.Notethatthe50ustimer-outcounterisrestartedaftereveryerasecommandsequence.IftheuserentersanycommandotherthanSectorEraseorEraseSuspendduringthetime-outperiod,theeraseoperationwillabortandthede-vicewillreturntoReadmode.
Aftertheembeddedsectoreraseoperationbegins,allcommandsexceptEraseSuspendwillbeignored.TheonlywaytointerrupttheoperationiswithanEraseSuspendcommandorwithahardwarereset.ThehardwareresetwillcompletelyaborttheoperationandreturnthedevicetoReadmode.
Status Q7*1 Q6*1 Q5 Q1 RY/BY# (Note)Inprogress Q7# Toggling 0 0 0
Exceedtimelimit Q7# Toggling 1 N/A 0
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COMMAND OPERATIONS (cont'd)
SECTOR ERASE (cont'd)
Thesystemcandeterminethestatusoftheembeddedsectoreraseoperationbythefollowingmethods:
CHIP ERASE
TheChipEraseoperationisusederaseallthedatawithinthememoryarray.Allmemorycellscontaininga"0"willbereturnedtotheerasedstateof"1".Thisoperationrequires6writecyclestoinitiatetheaction.Thefirsttwocyclesare"unlock"cycles,thethirdisaconfigurationcycle,thefourthandfiftharealso"unlock"cycles,andthesixthcycleinitiatesthechiperaseoperation.
During thechiperaseoperation,noothersoftwarecommandswillbeaccepted,but ifahardware reset is re-ceivedortheworkingvoltageistoolow,thatchiperasewillbeterminated.AfterChipErase,thechipwillauto-maticallyreturntoReadmode.
Thesystemcandeterminethestatusoftheembeddedchiperaseoperationbythefollowingmethods:
*1:RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.
Note:1.TheQ3statusbitisthe50ustime-outindicator.WhenQ3=0,the50ustime-outcounterhasnotyetreachedzeroandanewSectorErasecommandmaybeissuedtospecifytheaddressofanothersectortobeerased.WhenQ3=1,the50ustime-outcounterhasexpiredandtheSectorEraseoperationhasalreadybegun.EraseSuspendistheonlyvalidcommandthatmaybeissuedoncetheembeddederaseoperationisunderway.
2.RY/BY#isopendrainoutputpinandshouldbeconnectedtoVCCthroughahighvaluepull-upresistor.3.Whenanattemptismadetoeraseonlyprotectedsector(s),theeraseoperationwillabortthuspreventinganydatachanges intheprotectedsector(s). Q7willoutput"0"andQ6will togglebriefly(100usor less)beforeabortingandreturningthedevicetoReadmode.Ifunprotectedsectorsarealsospecified,however,theywillbeerasednormallyandtheprotectedsector(s)willremainunchanged.
4.Q2isalocalizedindicatorshowingaspecifiedsectorisundergoingeraseoperationornot.Q2toggleswhenuserreadsataddresseswherethesectorsareactivelybeingerased(inerasemode)ortobeerased(inerasesuspendmode).
Status Q7 Q6 Q5 Q3*1 Q2 RY/BY#*2
Time-outperiod 0 Toggling 0 0 Toggling 0Inprogress 0 Toggling 0 1 Toggling 0
Exceededtimelimit 0 Toggling 1 1 Toggling 0
Status Q7 Q6 Q5 Q2 RY/BY#*1
Inprogress 0 Toggling 0 Toggling 0Exceedtimelimit 0 Toggling 1 Toggling 0
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Afterbeginningasectoreraseoperation,EraseSuspendistheonlyvalidcommandthatmaybeissued.Ifsys-temissuesanEraseSuspendcommandduringthe50ustime-outperiodfollowingaSectorErasecommand,thetime-outperiodwillterminateimmediatelyandthedevicewillenterErase-SuspendedReadmode.IfthesystemissuesanEraseSuspendcommandafterthesectoreraseoperationhasalreadybegun,thedevicewillnotenterErase-SuspendedReadmodeuntil20ustimehaselapsed.ThesystemcandetermineifthedevicehasenteredtheErase-SuspendedReadmodethroughQ6,Q7,andRY/BY#.
AfterthedevicehasenteredErase-SuspendedReadmode,thesystemcanreadorprogramanysector(s)ex-ceptthosebeingerasedbythesuspendederaseoperation.Readinganysectorbeingerasedorprogrammedwillreturnthecontentsofthestatusregister.Wheneverasuspendcommandisissued,usermustissueare-sumecommandandcheckQ6togglebitstatus,beforeissueanothererasecommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletodeterminethecurrentstateofthedevice:
COMMAND OPERATIONS (cont'd)
ERASE SUSPEND/RESUME
When thedevicehassuspendederasing,user canexecute thecommandsetsexcept sectoreraseandchiperase,suchasreadsiliconID,sectorprotectverify,program,CFIqueryanderaseresume.
SECTOR ERASE RESUME
The sectorEraseResumecommand is valid onlywhen thedevice is inErase-SuspendedReadmode.Aftereraseresumes,theusercanissueanotherEaseSuspendcommand,butthereshouldbea400usintervalbe-tweenEaseResumeandthenextEraseSuspendcommand.
Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Erasesuspendreadinerasesuspendedsector 1 Notoggle 0 N/A toggle N/A 1Erasesuspendreadinnon-erasesuspendedsector Data Data Data Data Data Data 1Erasesuspendprograminnon-erasesuspendedsector Q7# Toggle 0 N/A N/A N/A 0
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COMMAND OPERATIONS (cont'd)
PROGRAM SUSPEND/RESUME
WhenthedevicehasProgram/Erasesuspended,usercanexecutereadarray,auto-select,readCFI,readsecu-ritysilicon.
PROGRAM RESUME
TheProgramResumecommandisvalidonlywhenthedevice is inProgram-Suspendedmode.Afterprogramresumes,theusercanissueanotherProgramSuspendcommand,butthereshouldbea5usintervalbetweenProgramResumeandthenextProgramSuspendcommand.
Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#Programsuspendreadinprogramsuspendedsector Invalid 1Programsuspend read in non-programsuspendedsector Data Data Data Data Data Data 1
BUFFER WRITE ABORT
Q1istheindicatorofBufferWriteAbort.WhenQ1=1,thedevicewillabortfrombufferwriteandgobacktoreadstatusregistershownasfollowingtable:
Status Q7 Q6 Q5 Q3 Q2 Q1 RY/BY#BufferWriteBusy Q7# Toggle 0 N/A N/A 0 0
BufferWriteAbort Q7# Toggle 0 N/A N/A 1 0
BufferWriteExceededTimeLimit Q7# Toggle 1 N/A N/A 0 0
Afterbeginningaprogramoperation,ProgramSuspendistheonlyvalidcommandthatmaybeissued.Thesys-temcandetermineifthedevicehasenteredtheProgram-SuspendedReadmodethroughQ6andRY/BY#.
AfterthedevicehasenteredProgram-Suspendedmode,thesystemcanreadanysector(s)exceptthosebeingprogramdbythesuspendedprogramoperation.Readingthesectorbeingprogramsuspendedisinvalid.When-everasuspendcommandisissued,usermustissuearesumecommandandcheckQ6togglebitstatus,beforeissueanotherprogramcommand.Thesystemcanusethestatusregisterbitsshowninthefollowingtabletode-terminethecurrentstateofthedevice:
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AUTOMATIC SELECT OPERATIONS
WhenthedeviceisinReadmode,ProgramSuspendedmode,Erase-SuspendedReadmode,orCFImode,theusercan issuetheAutomaticSelectcommandshowninTable3(twounlockcyclesfollowedbytheAutomaticSelectcommand90h)toenterAutomaticSelectmode.AfterenteringAutomaticSelectmode,theusercanquerytheManufacturerID,DeviceID,SecuritySectorlockedstatus,orSectorprotectedstatusmultipletimeswithoutissuinganewAutomaticSelectcommand.
WhileInAutomaticSelectmode,issuingaResetcommand(F0h)willreturnthedevicetoReadmode(orEase-SuspendedReadmodeifErase-Suspendwasactive)orProgramSuspendedReadmodeifProgramSuspendwasactive.
Anotherway to enterAutomaticSelectmode is to useoneof thebusoperations shown inTable2.BUSOPERATION_2.Afterthehighvoltage(Vhv)isremovedfromtheA9pin,thedevicewillautomaticallyreturntoReadmodeorErase-SuspendedReadmode.
AUTOMATIC SELECT COMMAND SEQUENCE
AutomaticSelectmodeisusedtoaccessthemanufacturerID,deviceIDandtoverifywhetherornotsecuredsiliconislockedandwhetherornotasectorisprotected.Theautomaticselectmodehasfourcommandcycles.Thefirst twoareunlockcycles,and followedbyaspecificcommand.Thefourthcycle isanormal readcycle,andusercanreadatanyaddressanynumberoftimeswithoutenteringanothercommandsequence.TheResetcommandisnecessarytoexittheAutomaticSelectmodeandbacktoreadarray.Thefollowingtableshowstheidentificationcodewithcorrespondingaddress.
Afterenteringautomaticselectmode,noothercommandsareallowedexcepttheresetcommand.
COMMAND OPERATIONS (cont'd)
Address Data (Hex) Representation
ManufacturerIDWord X00 C2Byte X00 C2
DeviceID MX29GL256EWord X01/0E/0F 227E/2222/2201
Byte X02/1C/1E 7E/22/01
SecuredSiliconWord X03 99/19(H) Factorylocked/unlocked89/09(L)
Byte X06 99/19(H) Factorylocked/unlocked89/09(L)
SectorProtectVerify Word (Sectoraddress)X02 00/01 Unprotected/protectedByte (Sectoraddress)X04 00/01 Unprotected/protected
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READ MANUFACTURER ID OR DEVICE ID
TheManufacturerID(identification)isauniquehexadecimalnumberassignedtoeachmanufacturerbytheJE-DECcommittee.EachcompanyhasitsownmanufacturerID,whichisdifferentfromtheIDofallothercompa-nies.ThenumberassignedtoMacronixisC2h.
AfterenteringAutomaticSelectmode,performingareadoperationwithA1&A0heldLOWwillcausethedevicetooutputtheManufacturerIDontheDataI/O(Q7toQ0)pins.
RESET
Inthefollowingsituations,executingresetcommandwillresetdevicebacktoReadmode:
• Amongerasecommandsequence(beforethefullcommandsetiscompleted)• Sectorerasetime-outperiod• Erasefail(whileQ5ishigh)• Amongprogramcommandsequence(beforethefullcommandset iscompleted,erase-suspendedprogramincluded)
• Programfail(whileQ5ishigh,anderase-suspendedprogramfailisincluded)• Auto-selectmode• CFImode
Whiledeviceisatthestatusofprogramfailorerasefail(Q5ishigh),usermustissueresetcommandtoresetdevicebacktoreadarraymode.WhilethedeviceisinAuto-SelectmodeorCFImode,usermustissueresetcommandtoresetdevicebacktoreadarraymode.
Whenthedeviceisintheprogressofprogramming(notprogramfail)orerasing(noterasefail),devicewillig-noreresetcommand.
COMMAND OPERATIONS (cont'd)
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Start
Q1=0 Q2=0
Password Protection Mode
To chooseprotection mode
set lock register bit(Q1/Q2)
SetSPB Lock Bit
SPB = 0
SPB = 1
SPB Lock bit UnlockedSPB is changeable
Solid Write Protect bit (SPB)
SPB=0 sector protect
SPB=1 sector unprotect
Temporary Unprotect SPB bit (USPB)
USPB=0 Temp. Unprotect SPB bit, SPB changeable
USPB=1 SPB bit can not changeable
USPB 0
USPB 1
USPB 2
::
USPB N-1
USPB N
SPB 0
SPB 1
SPB 2
::
SPB N-1
SPB N
SA 0
SA 1
SA 2
::
SA N-1
SA N
DPB 0
DPB 1
DPB 2
::
DPB N-1
DPB N
SPB Lock bit lockedAll SPB can not changeable
Solid Protection Mode
Set 64 bit Password
Sector Array
Dynamic Write Protect bit (DPB)
DPB=0 sector protect
DPB=1 sector unprotect
Advanced Sector Protection/Un-protection
Thereare twoways to implement softwareAdvancedSectorProtectionon this device:PasswordmethodorSolidmethods.Throughthesetwoprotectionmethod,usercandisableorenable theprogrammingorerasingoperationtoanyindividualsectororwholechip.Thefigurebelowhelpsdescribeanoverviewofthesemethods.
ThedeviceisdefaulttotheSolidmodeandallsectorsareunprotectedwhenshippedfromfactory.showsthedetailalgorithmofadvancesectorprotecting.
Advance Sector Protection/Unprotection SPB Program Algorithm :
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1. Lock Register
UsercanchoosefavoritesectorprotectingmethodviasettingLockRegisterbitsQ1andQ2.LockRegister isa16-bitone-timeprogrammableregister.OnceprogrammingeitherQ1orQ2,theywillbelockedinthatmodeandtheotherswillbedisabledpermanently.Q1andQ2cannotbeprogrammedatthesametime,otherwisethedevicewillaborttheoperation.
IfuserselectsPasswordProtectionmode,thepasswordsettingisrequired.Usercansetpasswordbyissuingpasswordprogramcommand.
AftertheLockRegisterBitsCommandSetEntrycommandsequenceisissued,thereadandwriteoperationsfornormalsectorsaredisableduntilthismodeexits.
ALockRegisterallowsthememorysectorsandextendedmemorysectorprotectiontobeconfigured.
Lock Register bitsQ15-Q3 Q2 Q1 Q0
Don'tcare PasswordProtectionModeLockBit
SolidProtectionModeLockBit
SecuredSiliconSectorProtectionBit
PleaserefertothecommandforLockRegistercommandsettoreadandprogramtheLockregister.
Lock Register Program Algorithm :
START
Pass
Exit Lock Register command
Done YES
YES
NO
Q5 = 1NO
Write Data AAH, Address 555H
Lock register command set EntryWrite Data 55H, Address 2AAH
Write Data 40H, Address 555H
Write Data A0H, Address don’t care
Write Program Data, Address don’t care
Data # Polling Algorithm
Fail
Reset command
Lock register data program
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2. Solid write (non-volatile) protection Mode
2.1 Solid write Protection Bits (SPB)
TheSolidwriteProtectionbit (SPB) is a nonvolatile bitwith the sameendurancesas theFlashmemory. Itis assigned to each sector individually.TheSPB isPreprogramming, and its verificationprior to erasurearemanagedbythedevice,sosystemmonitoringisnotnecessary.
WhenaSPBissetto“0”,theassociatedsectorisprotected,preventinganyprogramoreraseoperationonthissector.TheSPBbitsaresetindividuallybySPBprogramcommand.However,itcannotbeclearedindividually.IssuingtheAllSPBErasecommandwilleraseallSPBinthesametime.DuringSPBprogrammingperiod,thereadandwriteoperationsaredisabledfornormalsectoruntilthismodeexits.
If oneof theprotected sector need tobeunprotected (correspondingSPBset to “1”), a fewmore stepsarerequired.First,theSPBLockBitmustbeclearedbyeitherputtingthedevicethroughapower-cycle,orhardwarereset.TheSPBscanthenbechangedtoreflectthedesiredsettings.SettingtheSPBLockBitonceagainlockstheSPBs,andthedeviceoperatesnormallyagain.
To verify theprogramming state of theSPB for a given sector, issuingaSPBStatusReadCommand to thedeviceisrequired.RefertotheflowchartbelowfordetailsofSPBProgramAlgorithm.
Notes1.TheReadactionswithinthatsectorwillbringtheSPBstatusbackforthatsector.AllReadactionsmustbe
executedbyreadmode.Thespecificsectoraddressiswrittenastheprogramcommandatthesametime.2.OnceSPBLockBit is set, itsProgramor erase commandwill not beexecutedand times-outwithout
programmingorerasingtheSPB.3.Alwaysissueexitcommandaftertheexecutionofresettingthedevicetoreadmodeandre-enablesreadand
writeactionsfornormalarray.4.Toachievethebesteffectofprotection,itisrecommendedtoexecutetheSPBLockBitSetcommandearly
inthebootcodeandprotectthebootcodebyholdingWP#/ACC=VIL.NotethattheSPBandDPBbitshavethesamefunctionwhenWP#/ACC=VHH,anditissamewhenACC=VIH.
2.2 Dynamic Protection Bits (DPBS)
TheDynamicProtectionallows the softwareapplication to easily protect sectorsagainst inadvertent change.However,theprotectioncanbeeasilydisabledwhenchangesarenecessary.
AllDynamicProtectionbit (DPB)are volatile andassigned to each sector. It canbemodify individual.DPBsprovide theprotection schemeonly for unprotected sectors that have theirSPBs cleared (erase canbeindividuallymodifiedd to “1”).Tomodify theDPBstatusby issuing theDPBSet (programmed to “0”) orDPBClear(erasedto“1”)commands,thenplacingeachsectorintheprotectedorunprotectedstateseperately.AftertheDPBClearcommandisissued(erasedto“1”),thesectormaybemodifieddependingontheSPBstateofthatsector
Whenthepartsarefirstshipped,theSPBsarecleared(erasedto“1”)anduponpoweruporreset,theDPBscanbesetorcleareddependingupontheorderingoptionchosen.
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2.3 Temporary Un-protect Solid write protect bit (USPB)TemporaryUn-protectSolidwriteProtectBits are volatile andunique for each sector and canbe individuallymodified.By issuing theUSPBSetorClearcommandsequences, theUSPBsareset (programmedto“0”)orcleared(erasedto“1”),thusmaskeachsector'ssolidwriteprotectbitproperty.ThisfeatureallowssoftwaretotempunprotectwriteprotectsectorsdespiteofSPB'spropertywhenDPBsarecleared.
Notes:1.TheUSPBscanbeset(programmedto“0”)orcleared(erasedto“1”)asoftenasneeded.TheUSPBsarecleared(all1s)uponpowerup.Hardwareresetwon”tchangeUSPBs/DPBsstatus.ThesectorsSPBswouldbeineffectivestateafterpowerupischosen.
2.However, ifthereisaneedtowriteasolidprotectbitprotectsectorstatus,userdon'thavetoclearallSPBbits.TheyjustusesoftwaretosetcorrespondingUSPBto0,whichguaranteesthatcorrespondingDPBstatusisclear,andoriginalsolidprotectbitprotectedsectorscanbetemporarywritten.
3.SPBLKshouldbeclearedtomodifyUSPBstatus.
Q6 Toggle ?
Q6 Toggle ?
Q5 = 1 ?
NO
NO
YES
NO
NO
SPB command set entry
Program SPB
Read Q7~Q0Twice
Read Q7~Q0Twice
Read Q7~Q0Twice
YES
YES
YES
Wait 500 s
Program Fail Write Reset CMD
Pass
Q0='1' (Erase)
'0' (Program)
SPB command set Exit
Note:SPBprogram/erasestatuspollingflowchart:checkQ6toggle,whenQ6stoptoggle,thereadstatusis00H/01H(00Hforprogram/01Hforerase),otherwisethestatusis“fail”and“exit”.
SPB Program Algorithm :
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4. Password Protection Method
ThesecuritylevelofPasswordProtectionMethodishigherthentheSolidprotectionmode.The64bitpasswordisrequestedbeforemodifySPBlockbitstatus.Whendeviceisunderpasswordprotectionmode,theSPBlockbitisset“0”,afterapower-upcycleorResetCommand.
AcorrectpasswordisrequiredforpasswordUnlockcommand,tounlocktheSPBlockbit.Await2usisnecessaryto unlocked thedeviceafter valid password is given.After that, theSPBbits are allows to be changed.ThePasswordUnlockcommandareissuedslowerthen2μseverytime,.topreventhackerfromtryingallthe64-bitpasswordcombinations.
Toplace thedevice in passwordprotectionmode, a fewmore stepsare required.First, prior to entering thepasswordprotectionmode, it is necessary to set a 64-bit password to verify it.Password verification is onlyallowedduringthepasswordprogrammingoperation.Second,thepasswordprotectionmodeisthenactivatedbyprogramming thepassword thePasswordProtectionModeLockBit to”0”.Thisoperation isnot reversible.Oncethebit isprogrammed, itcannotbeerased,andthedeviceremainspermanently inpasswordprotectionmode, and the64-bit password canneither be retrievednor reprogrammed.Moreover, all commands to theaddresswherethepasswordisstoredaredisabled.
Thepasswordisall“1”swhenshippedfromthefactory,itisonlycapabletoprogramming"0"sunderpasswordprogramcommand.All64-bitpasswordcombinationsarevalidasapassword.Nospecialaddress is requiredforprogramming thepassword. Inorder topreventaccess, thePasswordModeLockingBitmustbesetafterthePassword isprogrammedandverified.OncethePasswordModeLockBit isset,preventsreading64-bitspasswordonthedatabusandanyfuturemodification.Thereisnomeanstoverifywhatthepasswordisafteritisset.
Entrycommandsequencewillcausethereadandwriteoperationtobedisabledfornormalsectoruntilthismodeexits.Oncesectorunderprotectedstatus,devicewillignorestheprogram/erasecommand,enablestatuspollingandreturnstoreadmodewithoutcontentschange.TheDPB,SPB,USPBandSPBlockbitstatusofeachsectorcanbeverifiedbyissuestatusreadcommands.
3. Solid Protection Bit Lock Bit
TheSolidProtectionBit LockBit (SPB) is assign to control allSPBstatus. It is a uniqueand volatile.WhenSPB=0 (set),allSPBsare lockedandcannotbechanged.WhenSPB=1 (cleared),allSPBsareunlockandallowstobechanged.
There isno software commandsequence requested tounlocks thisbit, unless thedevice is in thepasswordprotectionmode.TocleartheSPBlockbit,justtakethedevicethroughahardwareresetorapower-upcycle.Inordertopreventmoified,theSPBLockBitmustbeset(SPB=0)afterallSPBsaresettingthedesiredstatus.
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Sector Protection Status TableProtection Bit Status
Sector StatusDPB SPBLK SPB USPBclear clear clear clear unprotect,DPB/SPB/USPBarechangeableclear clear clear set unprotect,DPB/SPB/USPBarechangeableclear clear set clear protect,DPB/SPB/USPBarechangeableclear clear set set unprotect,DPB/SPB/USPBarechangeableclear set clear clear unprotect,DPB/USPBarechangeableclear set clear set unprotect,DPB/USPBarechangeableclear set set clear protect,DPB/USPBarechangeableclear set set set unprotect,DPB/USPBarechangeableset clear clear clear protect,DPB/SPB/USPBarechangeableset clear clear set protect,DPB/SPB/USPBarechangeableset clear set clear protect,DPB/SPB/USPBarechangeableset clear set set protect,DPB/SPB/USPBarechangeableset set clear clear protect,DPB/USPBarechangeableset set clear set protect,DPB/USPBarechangeableset set set clear protect,DPB/USPBarechangeableset set set set protect,DPB/USPBarechangeable
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Secured Silicon Sector Address Range Standard Factory Locked Express Flash
Factory Locked Customer Lockable
000000h-000007h ESN ESNorDeterminedbyCustomer DeterminedbyCustomer
000008h-00007Fh Unavailable DeterminedbyCustomer
Customer Lockable: Security Sector NOT Programmed or Protected at the Factory
Whenthesecurityfeatureisnotrequired,thesecurityregioncanactasanextramemoryspace.
Securitysiliconsectorcanalsobeprotectedbytwomethods.Notethatoncethesecuritysiliconsector ispro-tected,thereisnowaytounprotectthesecuritysiliconsectorandthecontentofitcannolongerbealtered.
Afterthesecuritysiliconislockedandverified,systemmustwriteExitSecuritySectorRegion,gothroughapow-ercycle,orissueahardwareresettoreturnthedevicetoreadnormalarraymode.
SECURITY SECTOR FLASH MEMORY REGION
TheSecuritySectorregionisanextraOTPmemoryspaceof128wordsin length.Thesecuritysectorcanbelockeduponshippingfromfactory,oritcanbelockedbycustomeraftershipping.CustomercanissueSecuritySectorFactoryProtectVerifyand/orSecuritySectorProtectVerifytoquerythelockstatusofthedevice.
In factory-lockeddevice,securitysectorregion isprotectedwhenshippedfromfactoryandthesecuritysiliconsectorindicatorbitissetto"1".Incustomerlockabledevice,securitysectorregionisunprotectedwhenshippedfromfactoryandthesecuritysiliconindicatorbitissetto"0".
Factory Locked: Security Sector Programmed and Protected at the Factory
Inafactorylockeddevice,theSecuritySectorispermanentlylockedbeforeshippingfromthefactory.Thede-vicewillhavea16-byte(8-word)ESNinthesecurityregion.TheESNoccupiesaddresses00000hto0000Fhinbytemodeor00000hto00007hinwordmode.
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TABLE 3. COMMAND DEFINITIONS
WA=WriteAddressWD=WriteDataSA=SectorAddressN-1=WordCountWBL=WriteBufferLocationPWD=PasswordPWDn=Passwordword0,word1,wordnID1/ID2/ID3:RefertoTable2-2fordetailID.
Comm-and
ReadMode
ResetMode
AutomaticSelect SecuritySectorRegion
ExitSecuritySectorSiliconID DeviceID FactoryProtect
VerifySectorProtectVerify
Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle
Addr Addr XXX 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData Data F0 AA AA AA AA AA AA AA AA AA AA AA AA
2ndBusCycle
Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55 55 55
3rdBusCycle
Addr 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA 555 AAAData 90 90 90 90 90 90 90 90 88 88 90 90
4thBusCycle
Addr X00 X00 X01 X02 X03 X06 (Sector)X02
(Sector)X04 XXX XXX
Data C2h C2h ID1 ID1 99/19(H)89/09(L) 00/01 00/01 00 00
5thBusCycle
Addr X0E X1CData ID2 ID2
6thBusCycle
Addr X0F X1EData ID3 ID3
Comm-and
ProgramWritetoBuffer
Program
WritetoBuffer
ProgramAbortReset
WritetoBuffer
Programconfirm
ChipErase SectorErase CFIRead
Program/Erase
Suspend
Program/EraseResume
Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte
1stBusCycle
Addr 555 AAA 555 AAA 555 AAA SA SA 555 AAA 555 AAA 55 AA xxx xxx xxx xxxData AA AA AA AA AA AA 29 29 AA AA AA AA 98 98 B0 B0 30 30
2ndBusCycle
Addr 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555Data 55 55 55 55 55 55 55 55 55 55
3rdBusCycle
Addr 555 AAA SA SA 555 AAA 555 AAA 555 AAAData A0 A0 25 25 F0 F0 80 80 80 80
4thBusCycle
Addr Addr Addr SA SA 555 AAA 555 AAAData Data Data N-1 N-1 AA AA AA AA
5thBusCycle
Addr WA WA 2AA 555 2AA 555Data WD WD 55 55 55 55
6thBusCycle
Addr WBL WBL 555 AAA Sec-tor
Sec-tor
Data WD WD 10 10 30 30
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Command
DeepPowerDown PasswordProtection
Enter ExitPassword
CommandSetEntry
PasswordProgram
PasswordRead
PasswordUnlock
PasswordCommandSet
ExitWord Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte
1stBusCycle
Addr 555 AAA XXX XXX 555 AAA XXX XXX X00 X00 00 00 XXX XXXData AA AA AB AB AA AA A0 A0 PWD0 PWD0 25 25 90 90
2ndBusCycle
Addr 2AA 555 2AA 555 PWA PWA X01 X01 00 00 XXX XXXData 55 55 55 55 PWD PWD PWD1 PWD1 03 03 00 00
3rdBusCycle
Addr XXX XXX 555 AAA X02 X02 X00 X00Data B9 B9 60 60 PWD2 PWD2 PWD0 PWD0
4thBusCycle
Addr X03 X03 X01 X01Data PWD3 PWD3 PWD1 PWD1
5thBusCycle
Addr X04 X02 X02Data PWD4 PWD2 PWD2
6thBusCycle
Addr X05 X03 X03Data PWD5 PWD3 PWD3
7thBusCycle
Addr X06 00 X04Data PWD6 29 PWD4
8thBusCycle
Addr X07 X05Data PWD7 PWD5
9thBusCycle
Addr X06Data PWD6
10thBusCycle
Addr X07Data PWD7
11thBusCycle
Addr 00Data 29
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Command
LockRegister GlobalNon-Volatile
LockregisterCommandSetEntry
Program ReadLockregisterCommandSetExit
SPBCommandSetEntry
SPBProgram
AllSPBErase
SPBStatusRead
Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle
Addr 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXX SA SAData AA AA A0 A0 DATA DATA 90 90 AA AA A0 A0 80 80 00/01 00/01
2ndBusCycle
Addr 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA 00 00Data 55 55 Data Data 00 00 55 55 00 00 30 30
3rdBusCycle
Addr 555 AAA 555 AAA Data 40 40 C0 C0
4thBusCycle
AddrData
5thBusCycle
AddrData
Command
GlobalNon-Volatile GlobalVolatileFreeze Volatile
SPBCommandSetExit
SPBLockCommandSetEntry
SPBLockSet
SPBLockStatusRead
SPBLockCommandSetExit
DPBCommandSetEntry
DPBSet DPBClear
Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte Word Byte1stBusCycle
Addr XXX XXX 555 AAA XXX XXX XXX XXX XXX XXX 555 AAA XXX XXX XXX XXXData 90 90 AA AA A0 A0 00/01 00/01 90 90 AA AA A0 A0 A0 A0
2ndBusCycle
Addr XXX XXX 2AA 555 XXX XXX XXX XXX 2AA 555 SA SA SA SAData 00 00 55 55 00 00 00 00 55 55 00 00 01 01
3rdBusCycle
Addr 555 AAA 555 AAA Data 50 50 E0 E0
4thBusCycle
AddrData
5thBusCycle
AddrData
Command
Volatile
DPBStatusRead
DPBCommandSetExit
Word Byte Word Byte1stBusCycle
Addr SA SA XXX XXXData 00/01 00/01 90 90
2ndBusCycle
Addr XXX XXXData 00 00
3rdBusCycle
AddrData
4thBusCycle
AddrData
5thBusCycle
AddrData
Notes:*Itisnotrecommendedtoadoptanyothercodenotinthecommanddefinitiontablewhichwillpotentiallyenterthehiddenmode.*FortheSPBLockandDPBStatusRead"00"meanslock(protect),"01"meansunlock(unprotect).
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Table 4-1. CFI mode: Identification Data Values(Allvaluesinthesetablesareinhexadecimal)
Table 4-2. CFI mode: System Interface Data Values
COMMON FLASH MEMORY INTERFACE (CFI) MODE
QUERY COMMAND AND COMMAND FLASH MEMORY INTERFACE (CFI) MODE
Thedevice featuresCFImode.Host systemcan retrieve theoperating characteristics, structureand vendor-specified informationsuchas identifying information,memorysize,byte/wordconfiguration,operatingvoltagesandtiming informationof thisdevicebyCFImode. If thesystemwritestheCFIQuerycommand"98h", toad-dress"55h"/"AAh"(dependingonWord/Bytemode),thedevicewillentertheCFIQueryMode,anytimethede-viceisreadytoreadarraydata.ThesystemcanreadCFIinformationattheaddressesgiveninTable4.
OnceuserentersCFIquerymode,usercan issue resetcommand toexitCFImodeand return to readarraymode.
DescriptionAddress (h) (Word Mode)
Address (h)(Byte Mode)
Data (h)
Vccsupplyminimumprogram/erasevoltage 1B 36 0027Vccsupplymaximumprogram/erasevoltage 1C 38 0036VPPsupplyminimumprogram/erasevoltage 1D 3A 0000VPPsupplymaximumprogram/erasevoltage 1E 3C 0000Typicaltimeoutpersingleword/bytewrite,2nus 1F 3E 0003Typicaltimeoutformaximum-sizebufferwrite,2nus(00h,notsupport)
20 40 0006
Typicaltimeoutperindividualblockerase,2nms 21 42 0009Typicaltimeoutforfullchiperase,2nms(00h,notsupport) 22 44 0013Maximumtimeoutforword/bytewrite,2ntimestypical 23 46 0003Maximumtimeoutforbufferwrite,2ntimestypical 24 48 0005Maximumtimeoutperindividualblockerase,2ntimestypical 25 4A 0003Maximumtimeoutforchiperase,2ntimestypical(00h,notsupport)
26 4C 0002
DescriptionAddress (h) (Word Mode)
Address (h)(Byte Mode)
Data (h)
Query-uniqueASCIIstring"QRY"10 20 005111 22 005212 24 0059
PrimaryvendorcommandsetandcontrolinterfaceIDcode 13 26 000214 28 0000
Addressforprimaryalgorithmextendedquerytable 15 2A 004016 2C 0000
AlternatevendorcommandsetandcontrolinterfaceIDcode 17 2E 000018 30 0000
Addressforalternatealgorithmextendedquerytable 19 32 00001A 34 0000
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Table 4-3. CFI mode: Device Geometry Data Values
DescriptionAddress (h) (Word Mode)
Address (h)(Byte Mode)
Data (h)
Devicesize=2ninnumberofbytes 27 4E 0019
Flashdeviceinterfacedescription(02=asynchronousx8/x16)28 50 000229 52 0000
Maximumnumberofbytesinbufferwrite=2n(00h,notsupport)2A 54 00062B 56 0000
Numberoferaseregionswithindevice(01h:uniform,02h:boot) 2C 58 0001
IndexforEraseBankArea1:[2E,2D]=#ofsame-sizesectorsinregion1-1[30,2F]=sectorsizeinmultiplesof256K-bytes
2D 5A 00FF2E 5C 00002F 5E 000030 60 0002
IndexforEraseBankArea2
31 62 000032 64 000033 66 000034 68 0000
IndexforEraseBankArea3
35 6A 000036 6C 000037 6E 000038 70 0000
IndexforEraseBankArea4
39 72 00003A 74 00003B 76 00003C 78 0000
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Table 4-4. CFI mode: Primary Vendor-Specific Extended Query Data Values
DescriptionAddress (h) (Word Mode)
Address (h)(Byte Mode)
Data (h)
Query-Primaryextendedtable,uniqueASCIIstring,PRI40 80 005041 82 005242 84 0049
Majorversionnumber,ASCII 43 86 0031Minorversionnumber,ASCII 44 88 0033Unlockrecognizesaddress(0=recognize,1=don'trecognize) 45 8A 0014Erasesuspend(2=tobothreadandprogram) 46 8C 0002Sectorprotect(N=#ofsectors/group) 47 8E 0001Temporarysectorunprotect(1=supported) 48 90 0000Sectorprotect/Chipunprotectscheme 49 92 0008SimultaneousR/Woperation(0=notsupported) 4A 94 0000Burstmode(0=notsupported) 4B 96 0000Pagemode(0=notsupported,01=4wordpage,02=8wordpage) 4C 98 0002
MinimumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4D 9A 0095
MaximumACC(acceleration)supply(0=notsupported),[D7:D4]forvolt,[D3:D0]for100mV 4E 9C 00A5
WP#Protection04=UniformsectorsbottomWP#protect05=UniformsectorstopWP#protect
4F 9E 0004/0005
ProgramSuspend(0=notsupported,1=supported) 50 A0 0001
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ABSOLUTE MAXIMUM STRESS RATINGS
OPERATING TEMPERATURE AND VOLTAGE
ELECTRICAL CHARACTERISTICS
SurroundingTemperaturewithBias -65°Cto+125°CStorageTemperature -65°Cto+150°C
VoltageRange
VCC -0.5Vto+4.0V
VI/O -0.5Vto+4.0V
A9,WP#/ACC -0.5Vto+10.5VTheotherpins. -0.5VtoVcc+0.5V
OutputShortCircuitCurrent(lessthanonesecond) 200mA
Commercial (C) Grade SurroundingTemperature(TA ) 0°Cto+70°CIndustrial (I) Grade SurroundingTemperature(TA ) -40°Cto+85°C
VCC Supply Voltages
FullVCC range +2.7Vto3.6VRegulatedVCC range +3.0Vto3.6VVI/Orange +2.7Vto3.6V
NOTICE:1.Stressesgreater than those listedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisstressratingonlyandfunctionaloperationalsectionsofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodmayaffectreliability.
2.Specificationscontainedwithinthefollowingtablesaresubjecttochange.3.Duringvoltagetransitions,allpinsmayovershootVssto-2.0VandVccto+2.0Vforperiodsupto20ns,seebelowFigure.
Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform
Vss
Vss - 2.0V
20ns 20ns
20ns
Vcc + 2.0V
Vcc
20ns 20ns
20ns
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MX29GL256E H/L
DC CHARACTERISTICSSymbol Description Min Typ Max Remark
Iilk InputLeak ±2.0uA
Iilk9 A9Leak 35uA A9=10.5V
Iolk OutputLeak ±1.0uA
Icr1 ReadCurrent
6mA 20mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=1MHz,ByteMode
30mA 50mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=5MHz,ByteMode
60mA 100mACE#=Vil,OE#=Vih,Vcc=Vccmax;f=10MHz
Iio VIOnon-activecurrent 0.2mA 10mA
Icw WriteCurrent 26mA 30mA CE#=Vil,OE#=Vih,WE#=Vil
Isb StandbyCurrent 30uA 100uA Vcc=Vccmax,otherpindisable
Isbr ResetCurrent 30uA 100uAVcc=Vccmax,RESET#enable,otherpindisable
Isbs SleepModeCurrent 30uA 100uA
Idpd Vccdeeppowerdowncurrent 10uA
Icp1 AcceleratedPgmCurrent,WP#/Accpin(Word/Byte) 5mA 10mA CE#=Vil,OE#=Vih
Icp2 AcceleratedPgmCurrent,Vccpin,(Word/Byte) 20mA 30mA CE#=Vil,OE#=Vih
Vil InputLowVoltage -0.1V 0.3xVI/OVih InputHighVoltage 0.7xVI/O VI/O+0.3V
Vhv VeryHighVoltageforAutoSelect/AcceleratedProgram 9.5V 10.5V
Vol OutputLowVoltage 0.45V Iol=100uA
Voh1 OuputHighVoltage 0.85xVI/O Ioh1=-100uA
Voh2 OuputHighVoltage VI/O-0.4V Ioh2=-100uA
Vlko LowVccLock-outvoltage 2.3V 2.5V
Note:Sleepmodeenablesthelowerpowerwhenaddressremainstablefortaa+30ns.
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SWITCHING TEST CIRCUITS
SWITCHING TEST WAVEFORMS
TestConditionOutputLoadCapacitance,CL:1TTLgate,30pF(90ns)Rise/FallTimes:5nsInputPulselevels:0.0~VI/OIn/Outreferencelevels:0.5VI/O
Test Points
VI/O
VI/O / 2VI/O / 2
0.0VOUTPUTINPUT
DEVICE UNDERTEST
CL
3.3V
6.2KΩ
2.7KΩ
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AC CHARACTERISTICS
Symbol Description29GL256E
(VCC=2.7V~3.6V)29GL256E
(VCC=3.0V~3.6V) UnitMin. Typ. Max. Min. Typ. Max.
Taa Validdataoutputafteraddress 100 90 nsTpa Pageaccesstime 25 25 nsTce ValiddataoutputafterCE#low 100 90 nsToe ValiddataoutputafterOE#low 25 25 nsTdf DataoutputfloatingafterOE#high 20 20 nsTsrw Latencybetweenreadandwriteoperation 20 20 ns
Toh Output hold time from theearliest risingedgeofaddress,CE#,OE# 0 0 ns
Trc Readperiodtime 100 90 nsTwc Writeperiodtime 100 90 nsTcwc Commandwriteperiodtime 100 90 nsTas Addresssetuptime 0 0 ns
Taso Address setup time toOE# lowduring toggle bitpolling 15 15 ns
Tah Addressholdtime 45 45 ns
Taht Addresshold time fromCE#orOE#highduringtogglebitpolling 0 0 ns
Tds Datasetuptime 30 30 nsTdh Dataholdtime 0 0 nsTvcs Vccsetuptime 500 500 usTcs ChipenableSetuptime 0 0 nsTch Chipenableholdtime 0 0 nsToes Outputenablesetuptime 0 0 ns
Toeh OutputenableholdtimeRead 0 0 ns
Toggle&Data#Polling 10 10 ns
Tws WE#setuptime 0 0 nsTwh WE#holdtime 0 0 nsTcepw CE#pulsewidth 35 35 nsTcepwh CE#pulsewidthhigh 30 30 nsTwp WE#pulsewidth 35 35 nsTwph WE#pulsewidthhigh 30 30 nsTbusy Program/EraseactivetimebyRY/BY# 100 90 nsTghwl Readrecovertimebeforewrite 0 0 nsTghel Readrecovertimebeforewrite 0 0 nsTwhwh1 Programoperation Byte 11 11 usTwhwh1 Programoperation Word 11 11 usTwhwh1 Accprogramoperation(Word/Byte) 11 11 usTwhwh2 Sectoreraseoperation 0.6 5 0.6 5 secTbal Sectoraddholdtime 50 50 usTrdp Releasefromdeeppowerdownmode 200 200 us
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Figure 1. COMMAND WRITE OPERATION
Addresses
CE#
OE#
WE#
DIN
Tds
Tah
Data
Tdh
Tcs Tch
Tcwc
TwphTwpToes
Tas
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
VA
VA: Valid Address
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MX29GL256E H/L
READ/RESET OPERATION
Figure 2. READ TIMING WAVEFORMS
Addresses
CE#
OE#
Taa
WE#
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Voh
Vol
Tsrw
HIGH Z HIGH ZDATA Valid
ToeToeh Tdf
Tce
Trc
Outputs
Toh
ADD Valid
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Figure 3. RESET# TIMING WAVEFORM
Trh
Trb1
Trp2
Trp1
Tready2
Tready1
RY/BY#
CE#, OE#
RESET#
Reset Timing NOT during Automatic Algorithms
Reset Timing during Automatic Algorithms
RY/BY#
CE#, OE#
Trb2
WE#
RESET#
AC CHARACTERISTICS
Item Description Setup Speed UnitTrp1 RESET#PulseWidth(DuringAutomaticAlgorithms) MIN 10 us
Trp2 RESET#PulseWidth(NOTDuringAutomaticAlgorithms) MIN 500 ns
Trh RESET#HighTimeBeforeRead MIN 200 ns
Trb1 RY/BY#RecoveryTime(toCE#,OE#golow) MIN 0 ns
Trb2 RY/BY#RecoveryTime(toWE#golow) MIN 50 ns
Tready1 RESET#PINLow(DuringAutomaticAlgorithms)toReadorWrite MAX 20 us
Tready2 RESET#PINLow(NOTDuringAutomaticAlgorithms)toReadorWrite MAX 500 ns
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MX29GL256E H/L
ERASE/PROGRAM OPERATION
Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM
Twc
Address
OE#
CE#
55h
2AAh 555h
10h
InProgress Complete
VA VA
Tas Tah
Tghwl
Tch
Twp
Tds Tdh
Twhwh2
Read StatusLast 2 Erase Command Cycle
Tbusy Trb
Tcs TwphWE#
Data
RY/BY#
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Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
YES
NOData=FFh ?
Write Data 10H Address 555H
Write Data 55H Address 2AAH
Data# Polling Algorithm or
Toggle Bit Algorithm
Auto Chip Erase Completed
50P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Twc
Address
OE#
CE#
55h
2AAh SectorAddress 1
SectorAddress 0
30h
InProgress Complete
VA VA
30h
SectorAddress n
Tas
Tah
Tbal
Tghwl
Tch
Twp
Tds Tdh
Twhwh2
Read Status
Last 2 Erase Command Cycle
TbusyTrb
Tcs TwphWE#
Data
RY/BY#
30h
51P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data AAH Address 555H
Write Data 80H Address 555H
Write Data 30H Sector Address
Write Data 55H Address 2AAH
Data# Polling Algorithm or
Toggle Bit Algorithm
Auto Sector Erase Completed
NOLast Sector
to Erase
YES
YES
NOData=FFh
52P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 8. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
Toggle Bit checking Q6 not toggled
ERASE SUSPEND
YES
NO
Write Data 30H
Continue Erase
Reading or Programming End
Read Array orProgram
AnotherErase Suspend ?
NO
YES
YES
NO
ERASE RESUME
53P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS
Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tghwl
Tch
Twp
Tds Tdh
Twhwh1
Last 2 Read Status CycleLast 2 Program Command Cycle
TbusyTrb
Tcs TwphWE#
Data
RY/BY#
WP#/ACC
250nS 250nS
Vhv(9.5V ~ 10.5V)
Vil or Vih Vil or Vih
54P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM
Address
OE#
CE#
A0h
555h PA
PD Status DOUT
VA VA
Tas Tah
Tghwl
Tcepw
Tds Tdh
Twhwh1 or Twhwh2
Tbusy
Tcepwh
WE#
Data
RY/BY#
55P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Program Data/Address
Write Data A0H Address 555H
YES
Read Again Data:Program Data?
YES
Auto Program Completed
Data# Polling Algorithm orToggle Bit Algorithm
next address
Last Word to beProgramed
No
No
56P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 13. SILICON ID READ TIMING WAVEFORM
Taa Taa Taa Taa
Tce
Toe
Toh Toh Toh Toh
Tdf
DATA OUT
Manufacturer ID Device IDCycle 1
Device IDCycle 2
Device IDCycle 3
VhvVihVil
ADDA9
ADD
CE#
A1
OE#
WE#
ADDA0
DATA OUT DATA OUT DATA OUTDATAQ0-Q15
VCC3V
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
A2
Disable
Enable
57P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
WRITE OPERATION STATUS
Figure 14. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tdf
Tce
Tch
Toe
Toeh
Toh
CE#
OE#
WE#
Q7
Q0-Q6
RY/BY#
Tbusy
Status Data Status Data
Status Data Complement True Valid Data
Taa
Trc
Address VAVA
High Z
High ZValid DataTrue
58P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 15. DATA# POLLING ALGORITHM
Notes:1.Forprogramming,validaddressmeansprogramaddress.Forerasing,validaddressmeanserasesectorsaddress.2.Q7shouldberecheckedevenQ5="1"becauseQ7maychangesimultaneouslywithQ5.
Read Q7~Q0 at valid address(Note 1)
Read Q7~Q0 at valid address
Start
Q7 = Data# ?
Q5 = 1 ?
Q7 = Data# ?(Note 2)
FAIL Pass
No
No
No
Yes
Yes
Yes
59P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 16. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tdf
Taht Taso
Tce
Tch
Toe
Toeh
Taa
Trc
Toh
Address
CE#
OE#
WE#
Q6/Q2
RY/BY#
Tbusy
Valid Status
(first read)
Valid Status
(second read) (stops toggling)
Valid Data
VA VAVA
VA : Valid Address
VA
Valid Data
60P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 17. TOGGLE BIT ALGORITHM
Notes:1.Readtogglebittwicetodeterminewhetherornotitistoggling.2.RechecktogglebitbecauseitmaystoptogglingasQ5changesto"1".
Read Q7-Q0 Twice
Q5 = 1?
Read Q7~Q0 Twice
PGM/ERS failWrite Reset CMD PGM/ERS Complete
Q6 Toggle ?
Q6 Toggle ?
NO
(Note 1)
YES
NO
NO
YES
YES
Start
61P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 18. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode)
AC CHARACTERISTICS
WORD/BYTE CONFIGURATION (BYTE#)
Parameter Description Test Setup All Speed Options Unit
Telfl/Telfh CE#toBYTE#fromL/H Max. 5 nsTflqz BYTE#fromLtoOutputHiz Max. 30 nsTfhqv BYTE#fromHtoOutputActive Min. 90 ns
Figure 19. PAGE READ TIMING WAVEFORM
Tfhqv
Telfh
DOUT(Q0-Q7)
DOUT(Q0-Q14)
VA DOUT(Q15)
CE#
OE#
BYTE#
Q0~Q14
Q15/A-1
Amax:A3
(A-1),A0,A1,A2
DATA
CE#/OE#
Note: CE#, OE# are enable. Page size is 8 words in Word mode, 16 bytes in Byte mode. Address are A2~A0 for Word mode, A2~A-1 for Byte mode.
VALID ADD
Data 1 Data 2 Data 3
1'st ADD 2'nd ADD
tpa taa
3'rd ADD
tpa
62P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 20. DEEP POWER DOWN MODE WAVEFORM
CEB
WEB
ADD
DATA
XX
B9
2AA55
tDP
XX (don't care)
AB
Standby mode
AA 55
Deep power down mode
tRDP
Standby mode
ITEM TYP MAXWEBhightoreleasefromdeeppowerdownmode tRDP 100us 200us
WEBhightodeeppowerdownmode tDP 10us 20us
AC CHARACTERISTICS
63P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
Figure 21. WRITE BUFFER PROGRAM FLOWCHART
Write CMD: Data=AAh, Addr=555h
Write CMD: Data=55h, Addr=2AAh
Write CMD: Data=25h, Addr=SA
SA: Sector Address of to be Programmed page
Write CMD: Data=PWC, Addr=SA
PWC: Program Word Count
Write CMD:Data=PGM_data, Addr=PGM_addr
PWC =0?
Write CMD: Data=29h, Addr=SA
Polling Status
Yes
Pass
No
No
Write Buffer Abort
Write reset CMD to return to read Mode
PWC=PWC-1 NoFail
YesWant to Abort ?
Yes
NoNo
Yes
Return to read Mode
Write Abort reset CMD to return to read Mode
Write a different sector address to cause Abort
Yes
64P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
ACtimingillustratedinFigureAisrecommendedforthesupplyvoltagesandthecontrolsignalsatdevicepower-up.Ifthetiminginthefigureisignored,thedevicemaynotoperatecorrectly.
Figure A. AC Timing at Device Power-Up
Vcc
ADDRESS
CE#
WE#
OE#
DATA
Tvr
TaaTr or Tf Tr or Tf
TceTf
Vcc(min)
GND
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
Vih
Vil
VohHigh Z
Vol
WP#/ACC
ValidOuput
ValidAddress
Tvcs
Tr
ToeTfTr
Symbol Parameter Min. Max. UnitTvr VccRiseTime 20 500000 us/VTr InputSignalRiseTime 20 us/VTf InputSignalFallTime 20 us/V
Tvcs VccSetupTime 500 us
65P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
LATCH-UP CHARACTERISTICS
ERASE AND PROGRAMMING PERFORMANCE
PIN CAPACITANCE
Notes:1. Typicalprogramanderasetimesassumethefollowingconditions:25°C,3.0VVCC.Programmingspecifica-
tionsassumecheckboarddatapattern.2.MaximumvaluesaremeasuredatVCC=3.0V,worstcasetemperature.Maximumvaluesarevaliduptoand
including100,000program/erasecycles.3.Erase/ProgramcyclescomplywithJEDECJESD-47E&A117Astandard.4.Exclude00hprogrambeforeeraseoperation.
Parameter Symbol Parameter Description Test Set TYP MAX UNITCIN2 ControlPinCapacitance VIN=0 7.5 9 pFCOUT OutputCapacitance VOUT=0 8.5 12 pFCIN InputCapacitance VIN=0 6 7.5 pF
MIN. MAX.InputVoltagevoltagedifferencewithGNDonWP#/ACCandA9pins -1.0V 10.5VInputVoltagevoltagedifferencewithGNDonallnormalpinsinput -1.0V 1.5VccVccCurrent -100mA +100mAAllpinsincludedexceptVcc.Testconditions:Vcc=3.0V,onepinpertesting
PARAMETER LIMITS UNITSMIN. TYP. (1) MAX. (2)ChipEraseTime 128 300 secSectorEraseTime 0.6 5 sec
ChipProgrammingTime 100 350 sec
WordProgramTime 11 360 us
TotalWriteBufferTime 200 us
ACCTotalWriteBufferTime 100 us
Erase/ProgramCycles 100,000 Cycles
DATA RETENTIONPARAMETER Condition Min. Max. UNITDataretention 55˚C 20 years
66P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
ORDERING INFORMATION
PART NO. ACCESS TIME (ns) PACKAGE RemarkMX29GL256EHMC-90Q** 90 70PinSSOP Pb-free*
MX29GL256EHXFI-90Q 90 64LFBGA Pb-free*
MX29GL256ELXFI-90Q 90 64LFBGA Pb-free*
MX29GL256EHXCI-90Q 90 64FBGA Pb-free*
MX29GL256ELXCI-90Q 90 64FBGA Pb-free*
MX29GL256EHT2I-90Q 90 56PinTSOP Pb-free*
MX29GL256ELT2I-90Q 90 56PinTSOP Pb-free*
Note:*90Qcovers2.7V~3.6Vfor100nsand3.0V~3.6Vfor90ns.**70-pinSSOPonlyforPachinkoSocket.
67P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
PART NAME DESCRIPTION
MX 29 GL 90E H T2 I QOPTION:Q: Lead-free with restricted Vcc: 3.0V~3.6V (Note 1)
SPEED:90: 90ns
TEMPERATURE RANGE:I: Industrial (-40° C to 85° C)C: Commercial (0° C to 70° C)
PACKAGE:
BOOT BLOCK TYPE:H: Highest Address Sector ProtectedL: Lowest Address Sector Protected
REVISION:E
DENSITY & MODE:256: 256Mb x8/x16 Uniform Block
GL: 3V Page ModeTYPE:
DEVICE:29:Flash
256
T2: 56-TSOPM: 70SSOPXF: LFBGA (11mm x 13mm)XC: FBGA (10mm x 13mm)
Note1:90Qcovers2.7V~3.6Vfor100nsand3.0V~3.6Vfor90ns
68P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
PACKAGE INFORMATION
69P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
70P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
71P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
72P/N:PM1499 REV. 1.0, APR. 28, 2009
MX29GL256E H/L
REVISION HISTORY
Revision No. Description Page Date1.0 1.Revised70-SSOPgroundpinconfigurations P4 APR/28/2009 2.Addedovershoot&undershootspecifications P41 3.Removed"Preliminary" P2 4.Changeddataretentionfrom10yearsto20years P2,65
73
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MX29GL256E H/L
Macronix'sproductsarenotdesigned,manufactured,orintendedforuseforanyhighriskapplicationsinwhichthefailureofasinglecomponentcouldcausedeath,personalinjury,severephysicaldamage,orothersubstan-tialharmtopersonsorproperty,suchas life-supportsystems,high temperatureautomotive,medical,aircraftandmilitaryapplication.Macronixanditssupplierswillnotbeliabletoyouand/oranythirdpartyforanyclaims,injuriesordamagesthatmaybeincurredduetouseofMacronix'sproductsintheprohibitedapplications.
Copyright© Macronix InternationalCo., Ltd. 2008~2009.AllRightsReserved.Macronix,MXIC,MXICLogo,MXLogo,aretrademarksorregisteredtrademarksofMacronixInternationalCo.,Ltd..Thenamesandbrandsofothercompaniesarefor identificationpurposesonlyandmaybeclaimedasthepropertyoftherespectivecompanies.
