554 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 2, FEBRUARY 1998

Numerical and ExperimentalCharacterization of Single- and Double-GateRace-Track-Shaped Field Emitter Structures

Baoping Wang, Johnny K. O. Sin,Senior Member, IEEE, Jun Cai,Vincent M. C. Poon,Member, IEEE, Chen Wang, Yongming Tang, and Linsu Tong

Abstract—In this paper, numerical and experimental char-acterization of new single- and double-gate race-track-shapedfield emitter structures are reported. The race-track-shaped edgeemission is used to provide good uniformity and large fieldemission current density, and the double-gate control is usedto provide small turn-on voltage and minimum gate current.Experimental results show that the turn-on voltage of the single-gate structure is approximately 100 V, and the field emissioncurrent density is approximately 2.4 A/cm2. Furthermore, fieldemission characteristics of the single- and double-gate structuresare numerically simulated. Results show that turn-on voltage ofthe double-gate structure is reduced by 30% and ratio of anodecurrent to gate current is increased by 36 times compared to thatof the single-gate structure at a gate voltage of 350 V.

Index Terms—Displays, electron emission, RF amplifier, vac-uum microelectronics.

I. INTRODUCTION

V ACUUM microelectronic devices with field emittershave many advantages compared to other vacuum and

solid-state devices. The main applications of these field emitterdevices are flat panel displays and RF power amplifiers [1],[2]. In order to be used in these applications, the field emittershave to be high yield and low cost. Among the various fieldemitter structures, the gated cone-type emitters provide thehighest emission current density [3]. However, these structuresare fabricated using expensive technologies. Recently, a newvolcano-shaped field emitter structure was proposed [4]. Thisstructure provides more uniform field emission over a largearea without the need of expensive technology. However,the turn-on voltage is increased significantly. Due to thecircular nature of the volcano-shape of the emitter, a low celldensity results. This in turn causes the field emission currentdensity to be small. To solve these problems, new single- anddouble-gate race-track-shaped field emitter structures were

Manuscript received February 24, 1997; revised September 11, 1997. Thereview of this paper was arranged by Editor J. A. Dayton, Jr. This work wassupported by the RGC Competitive Earmarked Research Grant, Hong KongGovernment, HKUST6001/97E.

B. Wang is on leave from Southeast University, Nanjing, Jiangsu, 210018,P.R.O.C.

J. K. O. Sin, J. Cai, and M. C. Poon are with the Department of Electricaland Electronic Engineering, Teh Hong Kong University of Science andTechnology, Clear Water Bay, Hong Kong, R.O.C.

C. Wang, Y. Tang, and L. Tong are with the Department of ElectronicEngineering, Southeast University, Nanjing, Jiangsu 210018, China.

Publisher Item Identifier S 0018-9383(98)00958-7.

proposed [5]. These structures have higher field emissioncurrent density. In the case of the double-gate structure, lowturn-on voltage and most importantly lower gate current wereobtained. Furthermore, these field emitters can be used as linecathodes for flat panel large area displays [6].

In this paper, computational and experimental characteri-zations of the single- and double-gate race-track-shaped fieldemitter structures are reported. Numerical characterization ofthe structures is carried out using two-dimensional (2-D)numerical device simulator developed in-house.

II. FIELD EMITTER STRUCTURES AND OPERATION

Fig. 1 illustrates the single-gate and double-gate race-track-shaped field emitter structures. In the single-gate structure,the post gate is surrounded by the emitter. Due to the use ofthe race-track-shaped field emitter, the active emission areais increased compared to the volcano-shaped structure. In thedouble-gate structure, the emitter is situated between the twogates. When sufficient voltage is applied between the post gateand the emitter, electrons will be emitted by the emitter. If anappropriate voltage is applied to the second gate, the turn-onvoltage of the emitter can be reduced, and electron currentcan be deflected to minimize the gate current. Fig. 2 showsthe cross sections of the single- and double-gate structuresused in the simulations. The race-track-shaped field emitterstructure is with a post gate dimension of 16mThe other dimensions are: emitter radius10 nm, thicknessof the emitter m, distance between the emitter and postgate m, distance between the emitter and the second gate

m m m m m,and m The 10-nm emitter radius only refers to theedge of the emitter which is facing the post gate. TiW/Au isused in the fabrication of the emitter. The workfunction of theemitter is taken as 4.35 eV in our calculations.

III. N UMERICAL SIMULATIONS

The finite-difference method (FDM) in nonorthogonal curvi-linear coordinate system and the four-order Runge–Kuttamethod [7] are used to calculate the electric field and electrontrajectories of the field emitter. The basic idea of FDMin nonorthogonal curvilinear coordinate system is that thephysical domain with an arbitrary shape can be transformedinto the computational domain with a rectangular shape as

0018–9383/98$10.00 1998 IEEE

WANG et al.: SINGLE- AND DOUBLE-GATE RACE-TRACK-SHAPED FIELD EMITTER STRUCTURES 555

(a)

(b)

Fig. 1. (a) Single-gate and (b) double-gate race-track-shaped field emitterstructures.

shown in Fig. 3. Then, the Poisson’s equation can be solvedeasily using FDM in the computational domain.

For the axis symmetry condition, the Poisson’s equationcan be rewritten in as [7]

(1)

where is the Jacobian of the transformation andare thecovariant metric tensor components

(2)

(3)

The transformed (1) is then discretized numerically usingFDM in the computational domain. This discretization resultsin the difference formula. The potential electrostatic fielddistributions can be obtained using this difference formulatogether with the boundary conditions.

The electric fields in the single- and double-gate structuresare calculated first using the FDM in nonorthogonal curvilinearcoordinate system described above. And then the electrontrajectories between the emitter and the anode are calculatedusing the fourth-order Runge–Kutta method. In these simula-tions, space charge effects are ignored. Only 2-D simulationis considered.

The simulated numerical grids around the emitter are shownin Fig. 4. It can be seen that very fine numerical grids are

(a)

(b)

Fig. 2. Cross section of the (a) single-gate and (b) double-gaterace-track-shaped field emitter structures used in the numerical simulation.

Fig. 3. Transformation from physical domain to computational domain in3-D.

formed at the vicinity of the emitter, and coarse numericalgrids are placed farther away from the emitter. Very smoothsimulation grids have been obtained for accurate simulation.

For the single-gate structure, calculation results show thatthe turn-on voltage is about 250 V. For the double-gatestructure, the characteristics as a function of the gatevoltage with a constant anode voltage of 400 V is shown inFig. 5. Both gates are at the same potential. It can be seen

556 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 2, FEBRUARY 1998

Fig. 4. Simulated numerical grids around the emitter.

Fig. 5. I�V characteristics as a function of gate voltage for the double-gatestructure atVa = 400 V.

that the turn-on voltage is about 175 V. Comparing with theturn-on voltage of the structure without the second gate (250V), a 30% reduction in turn-on voltage is observed.

In order to study the effects of the double-gate on thegate current characteristics, electron trajectories around theemitter and the gate at an anode voltage of 3000 V and a gatevoltage of 250 V for the single- and double-gate structuresare calculated and shown in Fig. 6. The trajectories shown inFig. 6 for both and the single- and double-gate structures areequally weighted in current. It can be seen that the slope of theelectron trajectories for the single-gate structure is less steepcompared to the double-gate structure. The gate current andanode current as a function of gate voltage for these structuresare also calculated and shown in Fig. 7. The ratio of the anodecurrent to the gate current for the single-gate structure at a gatevoltage of 350 V is about 0.3. This is because the structureis not symmetrical. Most of the electrons emitted from theemitter are captured by the post gate. For the double-gate

(a)

(b)

Fig. 6. Electron trajectories in the (a) single-gate and (b) double-gate struc-tures at an anode voltage of 3000 V and a gate voltage of 250 V.

structure, the anode current is obviously larger than the gatecurrent. The ratio of the anode current to the gate current at agate voltage of 350 V is about 11. This symmetrical structurenot only reduces the turn-on voltage but also improves the

characteristics. Comparing to the single-gate structure,the ratio of the anode current to the gate current for the double-gate structure is increased by 36 times at a gate voltage of350 V.

IV. EXPERIMENTAL RESULTS

Major fabrication steps of the single-gate structure areshown in Fig. 8. First, silicon posts are formed on the (100)n-type silicon wafer with cm Then a 1-

m thick SiO is deposited using LPCVD. After the Ti-W0.1 m Au 0.2 m deposition and the photolithography

step, the emitter rims are formed by metal etching. The nextstep is to remove the SiOon top of the post gate. In orderto prevent leakage due to field emission between the emitterand the post gate substrate at the periphery of the device [4],an extra layer of SiO is needed to be placed underneath theperiphery of the emitter prior to the first SiOdeposition. Thus,one additional mask is needed to pattern this SiOlayer tosolve the leakage problem.

A SEM micrograph of an 11-strip single-gate race-track-shaped field emitter array (FEA) with an active area of

WANG et al.: SINGLE- AND DOUBLE-GATE RACE-TRACK-SHAPED FIELD EMITTER STRUCTURES 557

(a)

(b)

Fig. 7. Gate and anode current characteristics of the (a) single-gate and (b)double-gate structures.

(a)

(b)

(c)

Fig. 8. Major fabrication steps of the single-gate race-track-shaped fieldemitter structure.

cm is shown in Fig. 9. The length of the strip is280 m The strips can be made very long and can be usedas an electron source to replace the thermionic line cathodesin flat CRT applications. In doing so, problems in thermionicline cathodes for flat CRT applications can be solved. This

Fig. 9. A SEM micrograph of the single-gate race-track-shaped FEA.

Fig. 10. An SEM micrograph of the close-up view of the single-gatestructure at the post-gate tip.

approach also improves the ant ibration and reduces theweight of the flat CRT. Fig. 10 shows a close-up view ofthe FEA at one of the strips. The spacing between two stripsis 28 m And the width of the post gate is 16m Allthe dimensions of the structure are not optimized. A SEMmicrograph of the cross section of the structure is shown inFig. 11 with the post gate, the SiOand the emitter shownclearly. Thickness of the metal emitter is 0.3m, and thicknessof the SiO layer deposited between the post gate and theemitter is 1 m

The devices are characterized using HP 4156A. For propercharacterization, the devices are packaged inside vacuum tubesevacuated to 10 torr. In order to maintain the vacuumlevel, a getter is put inside the tube. The chip is mountedon the stage using silver epoxy, and the device is bonded. An

curve and a Fowler–Nordheim plot of the device areshown in Figs. 12 and 13, respectively. The turn-on voltageis approximately 100 V. When the gate voltage is increasedabove 105 V, the field emission current increases drastically.At the gate voltage of 106 V, the field emission current is

558 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 2, FEBRUARY 1998

Fig. 11. A SEM micrograph of the cross section of the single-gate structureat the post-gate edge.

Fig. 12. ExperimentalI�V characteristics of the single-gate FEA shownin Fig. 9.

approximately 1.4 mA, and the emission current density isapproximately 2.4 A/cm, which is 12 times larger than thatof the volcano-shaped emitter structure. It is worth mentioningthat the experimental turn-on voltage (100 V) is much smallerthan that of the simulated value (250 V). This is because thespacing between the post gate and the emitter is less than1 m near the top of the post gate due to the nonconformalnature of the SiO In addition, part of the discrepancy iscaused by the difference between the 2-D simulation and theactual three-dimensional (3-D) behavior of the structure. TheFowler–Nordheim curve shown in Fig. 13 demonstrates thatthe field emission, not some other phenomena, is obtained inthe structure.

V. CONCLUSIONS

Numerical and experimental characterizations of the single-and double-gate race-track-shaped metal field emitter struc-

Fig. 13. Fowler–Nordheim plot of the device shown in Fig. 9.

tures have been presented. The single-gate structure wasdemonstrated experimentally to have a field emission currentdensity over 12 times larger than that of the volcano-shapedemitter structure reported earlier due to the use of a race-track-shaped emitter geometry and the lower turn-on voltage.Furthermore, the structure (fabricated with 1m SiO spac-ing) has a turn-on voltage of 100 V, which is 60% smallerthan the previously reported value. In the case of the double-gate structure, numerical simulations show that with the use ofthe second gate, a 36 times increase in the ratio of the anodecurrent to the gate current and a 30% reduction in turn-onvoltage can be obtained compared to that of the single-gatestructure. In addition, the second gate can also be used as afocus and deflection electrode.

ACKNOWLEDGMENT

The authors would like to thank the fabrication staff of theMicrofabrication Facility of the Department and Mr. Sam Laifor the excellent technical support. The authors would alsolike to thank Prof. K. Xue and L. Li of the Department ofElectronic Engineering, Southeast University, P.R.O.C., fortheir constant support and encouragement. The wafers andpackages provided by Microsemi Corporation are gratefullyacknowledged.

REFERENCES

[1] C. A. Spindt, C. E. Holland, I. Brodie, J. B. Mooney, and E. R. Wester-berg, “Field-emitter arrays applied to vacuum fluorescent display,”IEEETrans. Electron Devices,vol. 36, pp. 225–228, Jan. 1989.

[2] G. Gammie, R. Kozlowski, R. Mallavarpu, and A. Palevsky, “Fieldemission arrays for microwave applications,” inProc. IEDM, 1993, pp.753–756.

[3] C. A. Spindt, C. E. Holland, A. Rosengreen, and I. Brodie, “Field-emitterarrays for vacuum microelectronics,”IEEE Trans. Electron Devices,vol.38, pp. 2355–2363, Oct. 1991.

[4] H. Busta, G. Gammie, S. Skala, J. Pogemiller, R. Nowicki, J. Hubacek,D. Devine, and R. Rao, “Volcano-shaped field emitters for large areadisplays,” in Proc. IEDM, 1995, pp. 405–408.

[5] B. Wang, J. K. O. Sin, J. Cai, M. C. Poon, Y. Tang, C. Wang, andL. Tong, “Novel single- and double-gate race-track-shaped field emitterstructures,” inProc. IEDM, 1996, pp. 313–316.

WANG et al.: SINGLE- AND DOUBLE-GATE RACE-TRACK-SHAPED FIELD EMITTER STRUCTURES 559

[6] K. Yamamoto, M. Yokomakura, S. Inohara, and K. Nonomura, “A 14-incolor flat-panel display using filament cathodes,” inDig. SID, 1994, pp.381–384.

[7] C. Wang, B. Wang, H. Zhao, J. K. O. Sin, and M. C. Poon, “Numericalmodeling of the disk-edge field emitter triode,”J. Vac. Sci. Technol. B,vol. 15, no. 2, Mar./Apr. 1997.

Baoping Wang received the B.S., M.S., and Ph.D.degrees in electronics from Southeast University,Nanjing, Jiangsu Province, P.R.O.C., in 1983, 1988,and 1995, respectively.

He joined the department of electronic engineer-ing, Southeast University in 1991. His research in-terests include vacuum microelectronics, field emis-sion display, plasma display, film fabrication, andmicrofabrication technologies.

Johnny K. O. Sin (S’79–M’88–SM’96) was bornin Hong Kong. He received the B.A.Sc., M.A.Sc.,and Ph.D. degrees in electrical engineering fromthe University of Toronto, Toronto, Ont., Canada,in 1981, 1983, and 1988, respectively.

Upon the completion of his Ph.D. studies, hejoined Philips Laboratories, where he was a SeniorMember of the research staff from 1988 to 1991.Since 1991, he has been with the Department ofElectrical and Electronic Engineering, Hong KongUniversity of Science and Technology, Hong Kong,

where he is currently an Associate Professor. His research interests lie inthe general area of microelectronic devices and fabrication technology, andhe is currently working in the areas of power semiconductor devices and ICtechnology, silicon-on-insulator RF power devices and technology, and thin-film and field emission devices.

Dr. Sin is the holder of two U.S. patents and three pending, and haspublished over 90 papers in technical journals and refereed conferences inthe above areas. He was made an Honorary Visiting Professor of the DalianUniversity of Technology, Dalian, P.R.O.C., in 1996.

Jun Cai, photograph and biography not available at the time of publication.

Vincent M. C. Poon (M’89) was born in HongKong in 1957. He received the B.Sc. degree inphysics, and the M.Phil. and Ph.D. degrees in elec-tronics from the Chinese University of Hong Kongin 1980, 1983, and 1989, respectively.

In 1988, he joined the Department of ElectronicEngineering of the City Polytechnic of Hong Kongas a Founding Lecturer for the new campus. In1991, he joined the Department of Electrical andElectronic Engineering of the Hong Kong Uni-versity of Science and Technology as one of the

seven founding faculties. Since 1980, he has been working in the researchand development of various semiconductor devices. His current work ison advanced porous silicon, wafer bonding silicon-on-insulator, and deepsubmicron silicide metallization technology.

Chen Wang received the B.S. degree in electron-ics from Southeast University, Nanjing, JiangsuProvince, P.R.O.C., in 1993. Currently, she is pur-suing the Ph.D. degree in the Department of Elec-tronic Engineering, Southeast University. Her re-search topics include numerical modeling of FEA’s,electron gun, deflection system design, and electronoptical simulation. She is also interested in softwaredevelopment.

Yongming Tang was born in Suzhou, P.R.O.C., in1973. He received the B.S. degree in electronicengineering from Southeast University, Nanjing,Jiangsu Province, P.R.O.C., in 1996, where he iscurrently pursuing the M.S. degree. He won thefirst prize of the National Electronic Circuit DesignCompetition for an undergraduate in 1995. Cur-rently, he is working on numerical simulation ofvacuum electronic device. His interests cover bothcircuit design and software design.

Linsu Tong, photograph and biography not available at the time of publi-cation.