Upload
trinity-mchugh
View
220
Download
0
Tags:
Embed Size (px)
Citation preview
OCP IF for CAST PCIe Core — slide 1
IP Core Integration Using OCP:A PCI Express Example
March 2010CAST, Inc.
OCP IF for CAST PCIe Core — slide 2
Need for Easier System Integration
Background:CAST has been delivering IP cores for 16 yearsHundreds of diverse customers and applications
Challenge:Integrating core into system rarely straightforward“Plug and play” impossible with even simple propriety IFs
Solution:Make standard system bus interface an option where suitableOCP available for many of our 100 products …
OCP IF for CAST PCIe Core — slide 3
CAST’s Broad Line of IP Products
See more at http://www.cast-inc.com
MULTIMEDIA
H.264 1080p encoderDeinterlacerJPEG 2000 with BIIF JPEG, Extended,
Speedview, Lossless,JPEG-LS
Support Functions:Deinterlacer, ColorSpace Converters, etc.
Audio InterfacesI2S, SPDIF
PERIPHERALS
Smart Card Reader TV DisplayHigh-Res Display
DMAS & TIMERS
8237 & 82380 DMAs8254 timer/counter
ENCRYPTION
AES DES, Triple DES MD5, SHA-1, SHA-256
SERIAL COMM.
IR Controllers: RC5, NEC Synchronous UARTS SDLC, HDLC
INTERFACES
PCI & PCI ExpressEthernet MACs USB 1.1, 2.0, 3.0
device, OTG & hubCAN, LIN, I2C, SPI, ECP
MEMORY & STORAGE
Memory ControllersDDR1 & DDR2 SDRAMNAND flash, Serial flashSDR mobile SDRAMSD/SDIO/MMC cards
Storage ControllersATA/IDE interface
PROCESSORS
8-bit 8051 family: fast & configurable, small & low-power,entry-level; debug
8-bit: Z80 16 bit: 68000, 80186XL,
387 math coprocessor32-bit: 68000 for AHBDSP: 32025, 32025TX
SYSTEM IP
Subsystems:8051, MAC, PCI
Platforms:ARM, eASIC, Tensilica
AMBA Library
OCP IF for CAST PCIe Core — slide 4
Example: OCP IF for PCIe Endpoint Controller Core
PCIe core integration challengesUnderstanding of specTransaction Layer Packet Details
Possible approachesThrough examplesThrough a proprietary interfaceThrough an Application Interface (AIF) and standard bus
Decision: Implement an AIF for OCPHiding PCIe and OCP detailsDelivering a complete solution CAST PCI Express IP
http://www.cast-inc.com/ip-cores/pcie
OCP IF for CAST PCIe Core — slide 5
PCIe Design LayersPCIe is a high-speed serial bus
Layered architecture
Application Data transferred via packets
PCIe IP cores usually implementthe lower three layers
PCIe IP cores solve most of the protocol handling
connection establishinglink controlflow controlpower managementerror detection and reporting
OCP IF for CAST PCIe Core — slide 6
PCIe Core Design
Endpoint Controller core handles internal PCIe details
But typical core stops at the Transaction Layer Packet (TLP) interface
Designer still required to understand PCIe details for TLP
correct packet decodingcorrect packet forming
Can impact many elements in application system
OCP IF for CAST PCIe Core — slide 7
Incoming Requests
Incoming requests perform local subsystem read or write
Some incoming requests require sending completion TLP
Completion TLP rulesMust form completion packets with respect to Max_Payload and Read Completion BoundaryMust correctly encode fields in completion TLPCompletion address in packet differs (I/O x Memory)
Application must correctly report a request processing problem to the core
OCP IF for CAST PCIe Core — slide 8
Outgoing Requests
Outgoing Requests are generated by the application
There is a set of rules for forming outgoing request TLPMust be identified by unique Tag
Read requests restricted by Max_Read_Request_Size
Write requests restricted by Max_Payload
Must not cross 4kB address boundary
Violations will result in request being discarded and error detected at receiver
Completion request processingCompletions for multiple outstanding requests must be processed by TagMust have correct values in lower addresses to process multiple TLPs
Must process both Unsupported Request and Completer Abort responses
OCP IF for CAST PCIe Core — slide 9
User Application Architecture
OCP IF for CAST PCIe Core — slide 10
Possible Approaches
PCIe IP core providers are aware of the design challenges
Guiding by Design Examples
Application interface module with a proprietary backend interface
Application interface with a standard SoC bus interface
OCP IF for CAST PCIe Core — slide 11
Guiding by Examples
RequirementsDeliverables should follow QIP Metric for quality & completeness, with extensive design examples illustrating TLP
Designer dutiesUnderstand PCIe specificationImplement interface and functional logic for incoming request processingImplement a module for outgoing request generation and processingHandle verification including PCIe compliance testing
This approach Can result in highly optimized small designRequires more time for design and verification
OCP IF for CAST PCIe Core — slide 12
Proprietary Application Interface
FeaturesCustom completion controller for processing incoming requests DMA channels to generate and process outgoing requestsProprietary backend interface Verification of PCIe protocol guaranteed by IP provider
Designer DutiesDesigner must learn new backend interfaceAdopt application subsystems to interface with the proprietary interface
This approachIsolates designer from PCIe complexitiesSubsystems not reusable in any other design unless modified
OCP IF for CAST PCIe Core — slide 13
Application Interface with SoC Bus
Similar to previous approach, but with industry-standard bus backend
Using SoC bus interface offers significant advantages:
Already familiar to designerSimple system architectureSimple reuse of a previously designed componentsSoC bus verification models availableThe bridge fully verifiedby IP core provider
OCP IF for CAST PCIe Core — slide 14
OCP Bus
Well-defined SoC bus
Point-to-Point connections with unique On-Chip Bus architecture
Flexible extensions to the basic signal set
SystemC models available for free
OCP IF for CAST PCIe Core — slide 15
Implementing the AIF for OCP
AIF bridges TLP interface and OCP bus
Completion Controller with queued request processing
DMA core with up to eight channels
OCP-PCIe Bridge Controller
Optional Message Controller
OCP IF for CAST PCIe Core — slide 16
Verification & Reference Design
Rigorously verified with Avery’s PCI-Xactor
PureSpec PCIe modelsPureSuite compliance testsuite
Implemented in reference design (Wishbone & AHB versions)
Controller core passed PCI-SIG certification testing
OCP IF for CAST PCIe Core — slide 17
Conclusions
Integration challenges: designer must understand PCIe to deal with TLP interface
Of possible approaches, Application Interface (AIF) to standard bus is best
AIF with OCP offers several advantages
CAST makes OCP interface available for many of it’s 100 products. Learn more:http://www.cast-inc.com