OPERATION MANUAL - BAHA ENERJi RESMi WEB … Thytronic/NT10...Differential protection (87T) ..... 138 Breaker failure 4.5 CONTROL AND MONITORING .....154 ... the technical data of

NT10 - Manual - 04 - 2011

OPERATIONMANUAL

NT10BIASED DIFFERENTIAL

FOR TWO WINDING TRANSFORMERS

22 NT10 - Manual - 04 - 2011 TABLE OF CONTENTS

T A B L E O F C O N T E N T ST A B L E O F C O N T E N T S

1 INTRODUCTION 6Scope and liability ...........................................................................................................................................................................................6Applicability ......................................................................................................................................................................................................6Conformity ........................................................................................................................................................................................................6Technical support ............................................................................................................................................................................................6Copyright ...........................................................................................................................................................................................................6Warranty ...........................................................................................................................................................................................................6Safety recommendations ...............................................................................................................................................................................6Insulation tests ................................................................................................................................................................................................6Product identification .....................................................................................................................................................................................7Environment .....................................................................................................................................................................................................7Graphical conventions ...................................................................................................................................................................................7Glossary/definitions ........................................................................................................................................................................................7

2 GENERAL 11Premessa ........................................................................................................................................................................................................11Photo ...............................................................................................................................................................................................................11Main features .................................................................................................................................................................................................12

3 TECHNICALTECHNICAL DATA 1DATA 1333.1 GENERAL ........................................................................................................................................................................................................... 13

Mechanical data .......................................................................................................................................................................................... 13Insulation ....................................................................................................................................................................................................... 13EMC tests for interference immunity ........................................................................................................................................................ 13Voltage dip and interruption ....................................................................................................................................................................... 13EMC tests for interference immunity ........................................................................................................................................................ 13Emission ..........................................................................................................................................................................................................14Mechanical tests ...........................................................................................................................................................................................14Climatic tests ..................................................................................................................................................................................................14Safety ..............................................................................................................................................................................................................14Certifications ..................................................................................................................................................................................................15

3.2 INPUT CIRCUITS ...............................................................................................................................................................................................15Auxiliary power supply Uaux ......................................................................................................................................................................15Phase current input circuits (side H and side L) ......................................................................................................................................15Residual current input circuit (side 1 and side 2) ....................................................................................................................................15Binary input circuits ......................................................................................................................................................................................15Block input (Logic selectivity) .....................................................................................................................................................................15

3.3 OUTPUT CIRCUITS ............................................................................................................................................................................................15Relays ..............................................................................................................................................................................................................15Block output (Logic selectivity) ...................................................................................................................................................................16

3.4 MMI .....................................................................................................................................................................................................................163.5 COMMUNICATION INTERFACES ...................................................................................................................................................................16

Local port ........................................................................................................................................................................................................16Remote ports ..................................................................................................................................................................................................16

3.6 GENERAL SETTINGS ........................................................................................................................................................................................17Rated values (Base) ......................................................................................................................................................................................17Reference values for compensation (Base) .............................................................................................................................................17Transformer ....................................................................................................................................................................................................17Input sequence .............................................................................................................................................................................................17Polarity [4]............................................................................................................................................................................................................................................................................ 17

3.7 PROTECTIVE FUNCTIONS .............................................................................................................................................................................. 18Thermal protection with Pt100 probes - 26 .............................................................................................................................................. 18Undercurrent - 37 side H ............................................................................................................................................................................. 18Undercurrent - 37 side L .............................................................................................................................................................................. 18Thermal image - 49 side H ........................................................................................................................................................................... 20Thermal image - 49 side L ........................................................................................................................................................................... 20Phase overcurrent - 50/51 side H ...............................................................................................................................................................21Phase overcurrent - 50/51 side L ................................................................................................................................................................22Residual overcurrent (calculated) - 50N/51N side H............................................................................................................................. 23Residual overcurrent (calculated) - 50N/51N side L ..............................................................................................................................24Residual overcurrent (measured) - 50N.1/51N.1 - 87NHIZ.1 side H/L..................................................................................................26Residual overcurrent (measured at IE2 input) - 50N.2/51N.2 - 87NHIZ.2 side H/L.............................................................................27Low impedance restricted ground fault - 64REF side H......................................................................................................................... 28Breaker failure - BF side H ......................................................................................................................................................................... 28

3NT10 - Manual - 04 - 2011TABLE OF CONTENTS

Breaker failure - BF side L .......................................................................................................................................................................... 28 3.8 CONTROL AND MONITORING ....................................................................................................................................................................... 29

Trip Circuit Supervision side H and side L - 74TCS ................................................................................................................................. 29Selective block - BLOCK2 ........................................................................................................................................................................... 29Internal selective block - BLOCK4 ............................................................................................................................................................. 29Circuit Breaker supervision side H ............................................................................................................................................................ 29Circuit Breaker supervision side L ............................................................................................................................................................ 29CT supervision - 74CT side H ...................................................................................................................................................................... 29CT supervision - 74CT side L ....................................................................................................................................................................... 29Pilot wire diagnostic .................................................................................................................................................................................... 29Demand measures ....................................................................................................................................................................................... 30Oscillography (DFR) ..................................................................................................................................................................................... 30PLC (Programmable Logic Controller) ...................................................................................................................................................... 30

3.9 METERING..........................................................................................................................................................................................................31

4 FUNCTION CHARACTERISTICS 324.1 HARDWARE DESCRIPTION .............................................................................................................................................................................32

Power supply board ..................................................................................................................................................................................... 33CPU board ...................................................................................................................................................................................................... 33Input board .................................................................................................................................................................................................... 33MMI (keyboard, LED and display) ............................................................................................................................................................. 33

4.2 SOFTWARE DESCRIPTION ..............................................................................................................................................................................34Base software ................................................................................................................................................................................................34Real-time operating system .........................................................................................................................................................................34Task ..................................................................................................................................................................................................................34Drivers .............................................................................................................................................................................................................35Application Software ....................................................................................................................................................................................35Data Base .......................................................................................................................................................................................................35Self test (Application) ...................................................................................................................................................................................35Development tools (Builder) ........................................................................................................................................................................35

4.3 I/O DESCRIPTION ..............................................................................................................................................................................................36Metering inputs .............................................................................................................................................................................................36Signal processing ..........................................................................................................................................................................................36Conventions ................................................................................................................................................................................................... 40Polarity inversion ...........................................................................................................................................................................................41Use of measured values ...............................................................................................................................................................................42Binary inputs ................................................................................................................................................................................................. 43Output relays ................................................................................................................................................................................................. 48LED indicators ................................................................................................................................................................................................51Communication interfaces ...........................................................................................................................................................................54

4.4 PROTECTIVE ELEMENTS .................................................................................................................................................................................55Rated values ...................................................................................................................................................................................................55Transformer menu .........................................................................................................................................................................................56Thermal protection with RTD thermometric probes - 26 ........................................................................................................................57Undercurrent - 37 - side H and side L ....................................................................................................................................................... 59Negative sequence overcurrent - 46 - side H and side L .......................................................................................................................61Negative sequence current / positive sequence current ratio - I2/I1 - side H and side L ................................................................71Thermal image - 49 side H and side L ........................................................................................................................................................76Phase overcurrent - 50/51 - side H and side L ..........................................................................................................................................91Calculated residual overcurrent - 50N/51N - side H and side L .........................................................................................................105Residual overcurrent / High impedance restricted ground fault - 50N.1/51N.1-87NHIZ.2/ 50N.1/51N.2-87NHIZ.2 ................... 119Low impedance restricted ground fault- 64REF .................................................................................................................................... 133Differential protection (87T) ...................................................................................................................................................................... 138Breaker failure - BF .....................................................................................................................................................................................152

4.5 CONTROL AND MONITORING ......................................................................................................................................................................154Logical block - BLOCK1 ..............................................................................................................................................................................154Selective block -BLOCK2 ...........................................................................................................................................................................156Internal selective block -BLOCK4 .............................................................................................................................................................161Logic block summary ..................................................................................................................................................................................164Remote tripping ...........................................................................................................................................................................................165Frequency tracking .....................................................................................................................................................................................166Second Harmonic Restraint - 2ndh-REST ...............................................................................................................................................167Cold Load Pickup - CLP ............................................................................................................................................................................. 168CT supervision - 74CT - side H and side L .............................................................................................................................................. 169Trip circuit supervision - 74TCS - side H and side L ............................................................................................................................. 170Circuit breaker supervision - side H and side L .................................................................................................................................... 173Demand measures ......................................................................................................................................................................................175Oscillography ..............................................................................................................................................................................................175

44 NT10 - Manual - 04 - 2011 TABLE OF CONTENTS

5 MEASURES, LOGIC STATES AND COUNTERS 176Measures ......................................................................................................................................................................................................176Protection .....................................................................................................................................................................................................176Delayed inputs .............................................................................................................................................................................................176Internal states ..............................................................................................................................................................................................176Relays ............................................................................................................................................................................................................177Counters ........................................................................................................................................................................................................177Self test ........................................................................................................................................................................................................ 178Pilot wire diagnostic .................................................................................................................................................................................. 178Selective Block - BLOCK2 ......................................................................................................................................................................... 179Fault recording - SFR ................................................................................................................................................................................. 179Event recording - SER ................................................................................................................................................................................ 179Oscillography - DFR ................................................................................................................................................................................... 180

6 INSTALLATION 1826.1 PACKAGING .....................................................................................................................................................................................................1826.2 MOUNTING ......................................................................................................................................................................................................1826.3 ELECTRICAL CONNECTIONS ........................................................................................................................................................................1866.4 NOMINAL CURRENT In AND IEn SETTING ................................................................................................................................................1946.5 LED ALLOCATION ........................................................................................................................................................................................... 1986.6 FINAL OPERATIONS ...................................................................................................................................................................................... 198

7 PROGRAMMING AND SETTINGS 1997.1 SW ThySetter.................................................................................................................................................................................................. 199

ThySetter installation ................................................................................................................................................................................. 199ThySetter use .............................................................................................................................................................................................. 199

7.2 MMI (Man Machine Interface) ................................................................................................................................................................... 200Reading variables (READ) ......................................................................................................................................................................... 200Setting modifying (SET) ..............................................................................................................................................................................201TEST ...............................................................................................................................................................................................................202Communication ............................................................................................................................................................................................202Circuit breaker commands ........................................................................................................................................................................202

7.3 MENU TREE..................................................................................................................................................................................................... 2037.4 MAINTENANCE ...............................................................................................................................................................................................2157.5 REPAIR ..............................................................................................................................................................................................................2157.6 PACKAGING .....................................................................................................................................................................................................215

8 APPENDIX 2168.1 APPENDIX A1 - Inverse time IEC curves ...................................................................................................................................................216

Mathematical formula ................................................................................................................................................................................216Negative sequence overcurrent 46 - Standard inverse time curve side H and side L - (IEC 60255-3/BS142 type A) ...............217Negative sequence overcurrent 46 - Very inverse time curve side H and side L - (IEC 60255-3/BS142 type B)....................... 218Negative sequence overcurrent 46 - Extremely inverse time curve side H and side L - (IEC 60255-3/BS142 type C) ............. 219Phase overcurrent 50/51 - Standard inverse time curve side H and side L (IEC 60255-3/BS142 type A) ................................... 220Phase overcurrent 50/51 - Very inverse time curve side H and side L (IEC 60255-3/BS142 type B ..............................................221Phase overcurrent 50/51 - Extremely inverse time curve side H and side L (IEC 60255-3/BS142 type C) ...................................222Calculated residual overcurrent 50N/51N - Standard inverse time curve side H and side L (IEC 60255-3/BS142 type A) ...... 223Calculated residual overcurrent 50N/51N - Very inverse time curve side H and side L (IEC 60255-3/BS142 type B) ...............224Calculated residual overcurrent 50N/51N - Extremely inverse time curve side H and side L (IEC 60255-3/BS142 type C) ......225Measures residual overcurrent 50N/51N - Standard inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type A) ........226Measures residual overcurrent 50N/51N - Very inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type B) .................227Measures residual overcurrent 50N/51N - Extremely inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type C) ...... 228

8.2 APPENDIX A2 - Inverse time ANSI/IEEE curves ...................................................................................................................................... 229Mathematical formula ............................................................................................................................................................................... 229Negative sequence overcurrent 46 - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L ........................ 230Negative sequence overcurrent 46 - Very inverse time curve (ANSI/IEEE type VI) side H and side L .......................................231Negative sequence overcurrent 46 - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L ..............................232Phase overcurrent 50/51 - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L ........................................... 233Phase overcurrent 50/51 - very inverse time curve (ANSI/IEEE type VI) side H and side L ..........................................................234Phase overcurrent 50/51 - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L.................................................235Calculated residual overcurrent 50N/51N - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L ..............236Calculated residual overcurrent 50N/51N - Very inverse time curve (ANSI/IEEE type VI) side H and side L ............................237Calculated residual overcurrent 50N/51N - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L .................. 238Measured residual overcurrent 50N/51N - Moderately inverse time curve (ANSI/IEEE type MI) side 1 and side 2 ............... 239Measured residual overcurrent 50N/51N - Very inverse time curve (ANSI/IEEE type VI) side 1 and side 2 ............................. 240Measured residual overcurrent 50N/51N - Extremely inverse time curve (ANSI/IEEE type EI) side 1 and side 2 ....................241

5NT10 - Manual - 04 - 2011TABLE OF CONTENTS

8.3 APPENDIX A3 - Inverse time - RECTIFIER, I2t and EM curves ................................................................................................................242Mathematical formula ................................................................................................................................................................................242Phase overcurrent 50/51 - Rectifier curves side H and side L ............................................................................................................ 243Negative sequence overcurrent 46 - I2t inverse curves (I2t=K) side H and side L .........................................................................244Phase overcurrent 50/51 - I2t inverse curves (I2t=K) side H and side L ............................................................................................245Phase overcurrent 50/51 - Electromechanical inverse curves (EM) side H and side L .................................................................246Calculated residual overcurrent 50N/51N - Electromechanical inverse curves (EM) side H and side L ....................................247Measured residual overcurrent 50N/51N - Electromechanical inverse curves (EM) side 1 and side 2 .................................... 248

8.4 APPENDIX B1 - I/O Diagram ........................................................................................................................................................................ 2498.5 APPENDIX B2 - Interfaces ........................................................................................................................................................................... 2508.6 APPENDIX B3- Connection diagrams .........................................................................................................................................................2518.7 APPENDIX C - Dimensions ............................................................................................................................................................................2548.8 APPENDIX D - Setting table ..........................................................................................................................................................................2558.9 APPENDIX E - Revisions history ...................................................................................................................................................................3178.10 APPENDIX F - EC Declaration of conformity ............................................................................................................................................. 318

66 NT10 - Manual - 04 - 2011 INTRODUCTION

1 I N T R O D U C T I O N1 I N T R O D U C T I O NScope and liability

This document describes the functions, the technical data of NT10 devices; instructions for mount-ing, setting and commissioning are included.This manual has been checked out, however, deviations from the description cannot be completely ruled out, so that no liability in a legal sense for correctness and completeness of the information or from any damage that might result from its use is formally disclaimed.The information given in this document is reviewed regularly; any corrections and integration will be included in subsequent editions that are identifi ed by the date of revision.We appreciate any suggestions for improvement.We reserve the right to make technical improvements without notice.

ApplicabilityThis manual is valid for NT10 devices with fi rmware version 2.01 and following.

ConformityThe product complies with the CEE directives:

EMC Council Directives: 2004/108/ECLow voltage Directives: 2006/95/EC

Technical supportContact: Service tecnico THYTRONIC www.thytronic.it

CopyrightAll right reserved; It is forbidden to copy, modify or store material (document and sw) protected by copyright without Thytronic consent.

WarrantyThytronic warrants devices against defects in materials and workmanship under normal use for a period of ONE (1) YEAR from the date of retail purchase by the original end-user purchaser (“War-ranty Period”).

Safety recommendationsThe warming contained in this document are all-important for safety; special attention must be paid to the following symbols:

Installation and commissioning must be carried out by qualifi ed person; Thytronic assumes no re-sponsibility for damages caused from improper use that does not comply all warning and caution in this manual.In particular the following requirements must be met:

Remove power before opening it.Verify the voltage absence by means suitable instrumentation on relay connections; attention must be paid to all circuits supplied by external sources (binary input, CT, etc...) Care must be taken when handling metal parts.

Insulation testsAfter insulation tests, hazardous voltages (capacitor charges,...) may be arise; it is advisable to grad-ually reduce the test voltage avoiding to erase it abruptly.

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DANGERDeath, severe personal injury or substantial property damage will result if proper precautionsare not takenDANGERDeath, severe personal injury or substantial property damage will result if proper precautionsare not taken

WARNING Death, severe personal injury or substantial property damage can result if proper precautionsare not taken.WARNING Death, severe personal injury or substantial property damage can result if proper precautionsare not taken.

CAUTIONSettings must be established on the basis of a coordination study.Numerical values inside examples have educational purpose only; they don’t be used, in no way,for actual applications.

CAUTIONSettings must be established on the basis of a coordination study.Numerical values inside examples have educational purpose only; they don’t be used, in no way,for actual applications.

CAUTION Minor personal injury or property damage can result if proper precautions are not taken

http://www.thytronic.it

7NT10 - Manual - 04 - 2011INTRODUCTION

Product identifi cationEach device is equipped with:

Identifi cation label installed on the front side with following informations: code number, phase and residual nominal currents, auxiliary voltage range and CE mark:

Connection diagramTest label with following informations: data, serial number and test operator signature.

EnvironmentThe NT10 device must be employed according to the environment conditions shown (see technical data).In case of different environment conditions, appropriate provisions must be provided (conditioning system, humidity control, etc...).If contaminants are present (dust, corrosive substances, etc...), filters must be provided.

Graphical conventionsThe CEI/IEC and ANSI symbols is employed where possible:e.g.: 51 = ANSI code concerning the overcurrent element.Following text formats are used:The ThySetter[1] menu: Phase overcurrent -50/51The parameter description (measures, thresholds, operate time,...) and related value: I> element Defi nite time I>defThe display messages (MMI) are shown as: NT10Notes are highlighted with cursive letters inside colored bar

Note: Useful description note

Glossary/defi nitionsf n Rated frequencyI nH Relay phase nominal current side HI npH Phase CT primary nominal current side HI nL Relay phase nominal current side LI npL Phase CT primary nominal current side LI En1 Relay residual nominal current (input 1)I Enp1 Residual CT primary nominal current (input 1)I En2 Relay residual nominal current (input 2)I Enp2 Residual CT primary nominal current (input 2)26 Thermometric probe ANSI code37 Undercurrent ANSI code46 Negative sequence overcurrent ANSI code49 Thermal image ANSI code50/51 Phase overcurrent ANSI code50N/51N Calculated residual overcurrent ANSI code50N.1/51N.1-50N.2/51N.2 Measured residual overcurrent ANSI code87T Biased differential ANSI code64REF Low impedance restricted earth fault ANSI code87NHIZ High impedance restricted earth fault ANSI codeI2/I1 Negative to positive sequence current ratioBF Breaker Failure ANSI code74CT CT monitoring ANSI code74TCS Trip Circuit Supervision ANSI code52 or CB (Circuit Breaker) Circuit Breaker52a Auxiliary contact in the breaker that is in the same position as the

breaker. It can be assigned to a binary input to locate the CB position (Breaker failure and/or CB diagnostic functions). (52a open = CB open)

Note 1 The graphic interface and the operation of the ThySetter software are described in the relative chapters

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NT10#0A2TM00

InH 5A

UAUX 110-230 Vac/dcIEn11A 1A

5A 1A InL 5A5A 1A5A IEn21A 1A 5A

12345

NT10#0A2TM00

InH 5A

UAUX 110-230 Vac/dcIEn11A 1A

5A 1A InL 5A5A 1A5A IEn21A 1A 5A

12345


52b Auxiliary contact in the breaker that is in the opposite position as the breaker (52b open = CB closed)

DFR Digital Fault RecorderSER Sequential Event RecorderSFR Sequential Fault RecorderANSI American National Standard InstituteIEEE Institute of Electrical and Electronics EngineersIEC International Electrotechnical CommissionCENELEC Comité Européen de Normalisation Electrotechnique

K1...K6...K10 Output relaysIMPULSIVO Relè fi nale programmato con uscita impulsivaPulse Output relay with pulse operationtTR Output relay minimum pulse widthLatched Output relay with latched operation (manual reset) Output relay with

latched operation (automatic reset)No-latched Output relay with no-latched operation (automatic reset)

CT Current TransformerP1 IEC nomenclature for primary polarity mark of CTs (as an alternative to

a ANSI dot)P2 IEC nomenclature for primary polarity mark of CTs (as an alternative to

a ANSI no-dot)S1 IEC nomenclature for secondary polarity mark of CTs (as an alternative

to a ANSI dot)S2 IEC nomenclature for secondary polarity mark of CTs (as an alternative

to a ANSI no-dot)Self test DiagnosticStart Leave an initial condition or reset condition (Pickup)Trip Operation (with operate time)

Operating time Duration of time interval between the instant when the character-istic quantity in reset condition is changed, under specifi ed condi-tions, and the instant when the relay operates

Dropout ratio The ratio of a reset value to an operate value in well-specifi ed con-ditions. The dropout ratio may be lower or greater than 1 according as an over or under element is considered

Reset time Duration of the time interval between the instant when the charac-teristic quantity in operate condition is changed, under specifi ed conditions, and the instant when the relay operates.

The stated reset time is related to a step variation of characteristic quantity in operate condition to the reset condition.

Overshoot time The critical impulse time for a relay which is in its reset condition, is the longest duration a specifi ed change in the input energizing quantity(ies) (characteristic quantity), which will cause the relay to change to operate condition, can be applied without the relay switches. The overshoot time is the difference from the operate time and the critical impulse time.

The declared values for the overshoot time are applicable with the lower setting value of the operation time.

MMI (Man Machine Interface) Operator front panel

ThySetter Setting and monitoring softwareLog fi le A text fi le that lists actions that have occurred (ThySetter).J2SE Java Platform Standard EditionSubnet Mask (Ethernet nomenclature)Sw SoftwareFw FirmwareUpgrade Firmware upgradeXML eXtensible Markup Language

9NT10 - Manual - 04 - 2011INTRODUCTION

Symbols.ai

Symbols

I>> Star t

I>> BF_OUT

IPh Block2

Logic internal signal (output); may be a logical state (e .g . I>> Star t) or a numerical valueIt is available for reading (ThySetter + communication interface)

Logic external signal (intput); may be a command coming from a binary input or a sw commandIt is available for reading (ThySetter + communication interface)

Internal signal (e.g. Breaker Failure output state concerning to the 2nd threshold of the 50 element) It is not available for reading (missing arrow)

AND and NAND logic gates

OR and NOR logic gates

Limit block (I>> threshold).

Computation block (Max phase current)

Threshold setting (e.g. pickup I >>).The value is available for reading and is adjustable by means ThySetter + MMI.

Switch

ON delay timer with reset (tON delay)

ON delay timer without reset (tON delay)

OFF delay timer (dropout) without reset (tOFF delay)

Curve type (definite/inverse time)0T

I L3

M a x [ I L1 ,I L2 ,I L3 ]I L2

I L1

tON tON tON tON

t

RESET

INPUT

OUTPUT

tOFF

t

tOFF

INPUT

OUTPUT

tON tON tON

t

INPUT

OUTPUT

0TtON

& &

≥1 ≥1

EXOR logic gate

tOFF

=1

I >>

II ≥ I >>

tON

RESET

0T

0 T


Symbols1 .ai

t

RESET

INPUT

OUTPUT

tOFF

tOFF

tOFF tOFF

Minimum pulse width operation for output relays (tTR) tTR

t

tTR

INPUT

OUTPUT

tTR

0 T

tTR

t

tTR

INPUT

OUTPUT

Latched operating mode for output relays and LEDs

Pulse operating mode for output relays

t

INPUT

OUTPUT

Latched

tTR

T0RESET

OFF delay timer (dropout) with reset (tOFF delay)

11NT10 - Manual - 04 - 2011GENERAL

2 G E N E R A L2 G E N E R A LPremessa

The relay can be typically used as two windings MV and LV power transformer protection

The phase and amplitude adaptation of the current for differential protection can be achieved both through internal compensation is through the use of external adapters transformers

Following input circuits are available:Three phase current side HThree phase current side L Two residual current side 1 and side 2.

For any input the rated current is independently selectable at 1 A or 5 A using dip-switch.

In addition to the main protection element, the breaker failure (BF), CT monitoring (74CT), Trip Circuit Supervision (TCS) and programmable logic (PLC) are also provided.Setting, programming and reading operations must be effected by means of Personal Computer with ThySetter software or by means of remote communication interface (RS485 bus and Ethernet net-work); all operations must be performed through MMI.According to the hardware confi gurations, the NT10 protection relay can be shipped in various case styles depending on the required mounting options:

Flush.Projecting mounting.Rack.With separate operator panel.

Other options are:Auxiliary power supply operating range.Communication protocols.

Photo

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1212 NT10 - Manual - 04 - 2011 GENERAL

Main featuresMetallic case. Backlight LCD 4x16 Display.Eight LEDs that may be joined with matrix criteria to many and various functions.RESET key to clear LED indications and latched output relays.Two free settable binary inputs.Independently settable for start, trip, self-test and control six output relay (K1...K6) Each output relay may be set with normally energized or normally de-energized operating mode and manual or automatic reset (latched/no-latched).Rear Ethernet communication port, with MODBUS TCP/IP® protocol, with RJ45 (copper wires) or FX (optical fi ber) connection.Rear RS485 port, with ModBus protocol.RS232 front serial port (local communication for Thysetter).Real time clock with super capacitor.

The most signifi cant constructive features are:Galvanically insulated input and output circuits (communication and binary circuits included).Optimum fi ltering of input signals through combined use of analog and digital fi lters.Traditional electromechanical-type fi nal output contacts with continuous monitoring of control coil continuity.Auxiliary supply comprising a switching-type voltage stabilizing circuit having a very wide working range and a very small power dissipationNominal frequency: 50 or 60 Hz.

The most signifi cant operating features are:Programming of operating modes and parameters by means of the front keys and alphanumeric display, with a programming procedure based on carrying out guided selections and on explicit and immediate signalling of the operations being performed, so that such procedure can be carried out without coding tables or mnemonic informations.The feature modifi cation operations do not interrupt the normal functions of the relay.Impossibility of programming unacceptable parameter values, thanks to the automatic limitation of top and bottom scale values for the relative setting ranges.Currents are sampled 24 times per period and measured in the effective value (RMS) of the funda-mental component using the DFT (Discrete Fourier Transform) algorithm and digital fi lters.The fault recorder (SFR) runs continuously capturing in circular mode the last twenty events upon trigger of binary input/output and/or element pickup (start-trip).The event recorder (SER) runs continuously capturing in circular mode the last three hundred events upon trigger of binary input/output.Recording of the last setting changes (Logger).Digital fault recorder (DFR) in COMTRADE format (oscillography).

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13NT10 - Manual - 04 - 2011TECHNICAL DATA

3 3 T E C H N I C A LT E C H N I C A L D A T AD A T A

3.1 GENERAL

Mechanical dataMounting:

Flush.Projecting.Rack.Separated operator panel.

External dimensions (Flush mounting) 177 x 107 x 235 (high x width x depth)Terminals screw connectionMax conductor cross section 4 mm2

Mass (Flush mounting) 2.0 kg

Reference standards EN 60529, EN 60529/A1Degrees of protection provided by enclosures (IP Code)

Front IP52Terminals IP20

Insulation

Reference standards EN 60255-5 IEC 60255-5

High voltage test (50 Hz 60 s) Auxiliary power supply 2 kVInput circuits 2 kVOutput circuits 2 kVOutput circuits (between open contacts) 1 kV

Impulse voltage withstand test (1.2/50 μs):Auxiliary power supply 5 kVInput circuits 5 kVOutput circuits 5 kVOutput circuits (between open contacts) 2.5 kV

Insulation resistance >100 MΩ

EMC tests for interference immunityReference standards

Product standard for measuring relays EN 50263

Generic standards immunity for industrial environments EN 61000-6-2Electromagnetic compatibility requirements for measuring relays and protection equipment

EN 60255-26

Apparati di automazione e controllo per centrali e stazioni elettricheCompatibilità elettromagnetica - Immunità ENEL REMC 02

• Normativa di compatibilità elettromeccanica per apparati e sistemi ENEL REMC 01

Voltage dip and interruption

Reference standards EN 61000-4-29 IEC 60255-22-11Voltage dips, short interruptions and voltage variations on dc input power port immunity tests

Auxiliary power supply in dc energizing quantity Interruption (UT=40%) 100 msInterruption (UT=0%) 50 ms

• Voltage variations (UT=80...120%) 10 s

EMC tests for interference immunityReference standards EN 60255-22-1 IEC 60255-22-1 EN 61000-4-12 EN 61000-4-12Damped oscilsidery wave

0.1 MHz and 1 MHz common mode 2.5 kV0.1 MHz and 1 MHz differential mode 1.0 kVRing wave common mode 2.0 kVRing wave differential mode 1.0 kV

Reference standards EN 60255-22-2 IEC 60255-22-2 EN 61000-4-2 IEC 61000-4-2Electrostatic discharge

Contact discharge 6 kVAir discharge 8 kV

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1414 NT10 - Manual - 04 - 2011 TECHNICAL DATA

Reference standards EN 60255-22-3 IEC 60255-22-3 EN 61000-4-3 IEC 61000-4-3Radiated radio-frequency fi elds

80...1000 MHz AM 80% 10 V/m 900 MHz Pulse modulated 10 V/m

Reference standards EN 60255-22-4 IEC 60255-22-4 EN 61000-4-4 IEC 61000-4-4 Fast transient burst (5/50 ns)

Auxiliary power supply 2 kVInput circuits 4 kV

Reference standards EN 60255-22-5 IEC 60255-22-5 EN 61000-4-5 IEC 61000-4-5High energy pulse

Uaux (line-to-ground 10 ohm, 9 μF) 2 kVUaux (line-to-line 0 ohm, 18 μF) 1 kVI/O ports (line-to-ground 40 ohm, 0.5 μF) 2 kVI/O ports (line-to-line 40 ohm, 0.5 μF) 1 kV

Reference standards EN 60255-22-6 IEC 60255-22-6 EN 61000-4-6 IEC 61000-4-6Conducted radio-frequency fi elds

0.15...80 MHz AM 80% 1kHz 10 V

Reference standards EN 60255-22-7 IEC 60255-22-7 EN 61000-4-16 IEC 61000-4-16Power frequency immunity tests

Dc voltage 30 V50 Hz continuously 30 V50 Hz 1 s 300 V0.015...150 kHz 30 V

Reference standards EN 61000-4-8 IEC 61000-4-8Magnetic fi eld 50 Hz

50 Hz continuously 100 A/m50 Hz 1 s 1 kA/m

Reference standards EN 61000-4-10 IEC 61000-4-10Damped oscilsidery magnetic fi eld

Damped oscilsidery wave 0.1 MHz 30 A/m• Damped oscilsidery wave 1 MHz 30 A/m

EmissionReference standards EN 60255-25 IEC 60255-25 EN 61000-6-4 IEC 61000-6-4 EN 55011 CISPR 11Electromagnetic emission tests

Conducted emission auxiliary power supply 0.15...0.5 MHz 79 dB μVConducted emission auxiliary power supply 0.5...30 MHz 73 dB μVRadiated emission 30...230 MHz 40 dB μV/m

• Radiated emission 230...1000 MHz 47 dB μV/m

Mechanical testsReference standards EN 60255-21-1 EN 60255-21-2 RMEC01Vibration, shock, bump and seismic tests on measuring relays and protection equipment

EN 60255-21-1 Vibration tests (sinusoidal) Class 1• EN 60255-21-2 Shock and bump test Class 1

Climatic testsReference standards IEC 60068-x ENEL R CLI 01 CEI 50Ambient temperature -25...+70 °CStorage temperature -40...+85 °CRelative humidity 10...95 %Atmospheric pressure 70...110 kPa

SafetyReference standards EN 61010-1Safety requirements for electrical equipment for measurement, control and laboratory usePollution degree 3Reference voltage 250 VOvervoltage category III

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Certifi cationsReference standardsProduct standard for measuring relays EN 50263 CE Conformity

EMC Directive 2004/108/ECLow Voltage Directive 2006/95/EC

Type tests IEC 60255-6

3.2 INPUT CIRCUITS

Auxiliary power supply Uaux VoltageNominal value (range)[1] 24...48 V~/- 115...230 V~/110...220 V-Operative range (each one of the above nominal values) 19...60 V~/- 85...265 V~/75...300 V-Inrush current (max)

24 V- 6 A, 5 ms48 V- 14 A, 5 ms110 V- 20 A, 1 ms230 V~ 50 A, 1 ms

Frequency (for alternate voltage supply) 45...66 HzMax distortion factor ( for alternating voltage supply) 15%Max alternating component (for dc voltage supply):

Full wave rectifi ed sine wave 100 %Sine wave 80 %

Power consumption: Maximum (energized relays, Ethernet TX) 10 W (20 VA)

• Maximum (energized relays, Ethernet FX) 15 W (25 VA)

Phase current input circuits (side H and side L)Relay nominal phase current InH and InL 1 A or 5 A selectable by dip-switchPermanent overload 25 AThermal overload (1 s) 500 ADynamic overload (half cycle) 1250 ARated consumption (for any phase) ≤ 0.002 VA with InH or InH = 1 A ≤ 0.04 VA with InH or InH = 5 A

Residual current input circuit (side 1 and side 2)Relay nominal residual current IEn1 and IEn1 1 A or 5 A selectable by dip-switch Permanent overload 25 AThermal overload (1 s) 500 ADynamic overload (half cycle) 1250 ARated consumption ≤ 0.006 VA with IEn1 or IEn2 = 1 A ≤ 0.12 VA with IEn1 or IEn2 = 5 A

Binary input circuitsQuantity 2Type optocouplerOperative range 24...265 V~/-Min activation voltage 18 VMax consumption, energized 3 mAON delay time OFF->ON (IN1 tON, IN2 tON) 0.00...100.0 s 0.00...9.99 s 10.0...100.0 sOFF delay time ON->OFF (IN1 tOFF, IN2 tOFF) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Block input (Logic selectivity)Quantity 1Type polarized wet input (powered by internal isolated supply) Max consumption, energized 5 mA

3.3 OUTPUT CIRCUITS

RelaysQuantity 6Type of contacts K1, K2 changeover (SPDT, type C) Type of contacts K3, K4, K5 make (SPST-NO, type A)Type of contacts K6 break (SPST-NC, type B)Nominal current 8 ANominal voltage/max switching voltage 250 V~/400 V~

Note 1 Version must be selected at ordering

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Breaking capacity:Direct current (L/R = 40 ms) 50 WAlternating current (λ = 0,4) 1250 VA

Make 1000 W/VAShort duration current (0,5 s) 30 AMinimum switching load 300 mW (5 V/ 5 mA)Life:

Mechanical 106 operationsElectrical 105 operations

Minimum pulse width 0...0.500 s (step 0.005 s)

Block output (Logic selectivity)Quantity 1Type optocoupler

3.4 MMI

Display 16 x 4 alphanumeric LCD

LEDs Quantity 8

ON/fail (green) 1Start (yellow) 1Trip (red) 1Freely allocatable (red) 5

Keyboard 8 keys

3.5 COMMUNICATION INTERFACES

Local portConnection RJ10Baud rate 19200 bpsParity NoneProtocol Modbus RTU®

Remote ports

RS485Connection screw terminalsBaud rate 1200...57600 bpsProtocol[1] ModBus®RTU

IEC 60870-5-103 DNP3

Ethernet 100BaseT Connection[2] Optical fi ber 1300 nm, ST 100 Base TX, RJ45Baud rate 100 MbpsProtocol ModBus®TCP/IP

Note 1 Different version must be selected at ordering

Note 2 Different version must be selected at ordering

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3.6 GENERAL SETTINGS

Rated values (Base)Relay nominal frequency (fn) 50, 60 HzRelay phase nominal current side H and L (InH and InH) 1 A or 5 A [1]

Phase CT primary nominal current side H and L (InpH and InpH) 1 A...20.0 kA 1...499 A (step 1 A) 500...4990 A (step 10 A) 5000...20000 A (step 100 A)Relay residual nominal current side 1 and 2 (IEn1 e IEn2) 1 A o 5 A [1]

Residual CT primary nominal current side 1 and 2 (IEnp1 e IEnp2) 1 A...20.0 kA 1...499 A (step 1 A) 500...4990 A (step 10 A) 5000...20000 A (step 100 A)Protected object by differential protection (ProtObj ) TRANSF

Reference values for compensation (Base)Current matching type (MatchType) INTERNAL/EXTERNALSide reference for compensation (Refsize)[2] - (set by device)Primary nominal current chosen as reference (Inref)[2] - (set by device)

TransformerTransformer nominal power (Snt) 0.01...1000.00 MVA (step 0.01 MVA)Transformer nominal voltage side H (VntH) 0.200...500.00 kV 0.200...0.999 kV (step 0.001 kV) 1.00...500.00 kV (step 0.01 kV)Transformer nominal current side H (IntH) [3] - (set by device)Transformer mismatching factor side H (mH)[3] -Transformer base current side H (IBH)[3] - InHTransformer grounding side H (GndH) In/OutTransformer connection side H (ConnH) Y/D/ZTransformer vector group side H (VectGroupH) 0Transformer nominal power side L (SntL) 0.01...1000.00 MVATransformer nominal voltage side L (VntL) 0.200...500.00 kV 0.200...0.999 kV (step 0.001 kV) 1.00...500.00 kV (step 0.01 kV)Transformer nominal current side L (IntL) [3] -Transformer mismatching factor side L (mL)[3] -Transformer base current side L (IBL)[3] - InLTransformer grounding side L (GndL) In/OutTransformer connection side L (ConnL) y/d/zTransformer vector group side L (VectGroupL) 0-1-2-...11

Input sequence [4]

Phase current sequence side H (I-SequenceH) IL1-IL2-IL3 Default IL1-IL3-IL2 IL2-IL1-IL3 IL2-IL3-IL1 IL3-IL1-IL2 IL3-IL2-IL2

Phase current sequence side L (I-SequenceL) IL1-IL2-IL3 Base IL1-IL3-IL2 IL2-IL1-IL3 IL2-IL3-IL1 IL3-IL1-IL2 IL3-IL2-IL2

Polarity [4]

C09-C10 (IL1H) terminal polarity (C09-C10 POL) NORMAL/REVERSEC11-C12 (IL2H) terminal polarity (C11-C12 POL) NORMAL/REVERSEC13-C14 (IL3H) terminal polarity (C13-C14 POL) NORMAL/REVERSEC15-C16 (IE1) terminal polarity(C15-C16 POL) NORMAL/REVERSEC01-C02 (IL1L) (terminal polarity C01-C02 Pol) NORMAL/REVERSEC03-C04 (IL2L) terminal polarity (C03-C04 POL) NORMAL/REVERSEC05-C06 (IL3L) terminal polarity (C05-C06POL) NORMAL/REVERSEC07-C08 (IL3L) terminal polarity (C07-C08POL) NORMALE/INVERTITA

Note 1 The nominal current settings doesn’t concern the protection elements; they must agree with hardware setting (dip-switch 1 A or 5 A) .

Nota 2 Calculated by relay (L or H)

Nota 3 Calculated by relay

Nota 4 Adjusting enabled by working with session-level 1


3.7 PROTECTIVE FUNCTIONS

Thermal protection with Pt100 probes - 26[1]

ThAL1...8 Alarm:Alarm threshold 26 PT1...PT8 (ThAL1...8) 0...200 °COperating time ThAL1...8 (tThAL1...8) 0....100 s

Th>1...8 Trip:Trip threshold 26 PT1...PT8 (Th>1...8) 0...200 °COperating time ThAL1...8 (tTh>1...8) 0....100 s

Undercurrent - 37 side HI(H)< defi nite time

37 Operating logic (Logic37) AND/OR37 First threshold defi nite time (I(H)<def) 0.10...1.00 InH (step 0.01 InH)I(H)<def Operating time (tIH<def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Undercurrent - 37 side LI(L)<defi nite time

37 Operating logic (Logic37) AND/OR37 First threshold defi nite time (I(L)<def) 0.10...1.00 InL (step 0.01 InL) I(L)<def Operating time (tIL<def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Negative sequence overcurrent - 46 side HI2(H)> Element

Curve type (I2(H)>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI, I2t, EMI2(H)> CLP activation time (t2(H)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I2(H)> Reset time delay (t2(H)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time46 First threshold defi nite time (I2(H)>def) 0.100...10.00 InH 0.100...0.999 Inh (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)I2(H)>def threshold within CLP (I2(H)CLP>def) 0.100...10.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)I2(H)>def Operating time (t2(H)>def) 0.03...200 s 0.03...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time [2]

46 First threshold inverse time (I2(H)>inv) 0.100...10.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)I2(H)>inv threshold within CLP (I2(H)CLP>inv) 0.100...10.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)

Note 1 The 26 element is available when the MPT module is connect on Thybus and enabled

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t2(H)>inv / [(I2(H)/I2(H)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t2(H)>inv / [(I2(H)/I2(H)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t2(H)>inv / [(I2(H)/I2(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t2(H)>inv · {0.01 / [(I2(H)/I2(H)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = t2(H)>inv · {3.922 / [(I2(H)/I2(H)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = t2(H)>inv · {5.64 / [(I2(H)/I2(H)>inv)2 - 1] + 0.024} I-squared-t (I 2t = K): t = 16 · t2(H)>inv / (I2(H)/I2(H)>inv)2

Electromechanical (EM): t = 0.28 · t2(H)>inv / [-0.236 · (I2(H)/I2(H)>inv)-1+ 0.339] where: t : operate time I2(H)>inv: pickup value t2(H)>inv: operate time setting Asymptotic reference value: 1.1 I2(H)>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ I2(H) / I2(H)>inv ≤ 20 - With I2(H)>inv pickup ≥ 2.5 InH, the upper limit is 50 InH


I2(H)>inv Operating time (t2(H)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

I2(H)>> ElementI2(H)CLP>> CLP activation time (t2(H)CLP>>) 0.00...200 s 0.00...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)I2(H)>> Reset time delay (t2(H)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time46 Second threshold defi nite time (I2(H)>>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I2H>>def threshold within CLP (I2(H)CLP>>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I2(H)>>def Operating time (t2(H)>>def) 0.03...10.00 s (step 0.01 s)

Negative sequence overcurrent - 46 side LI2(L)> Element

Curve type (I2(L)>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI, I2t, EM

I2(L)> Activation time (t2(L)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I2(L)> Reset time delay (t2(L)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time46 First threshold defi nite time (I2(L)>def) 0.100...10.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)

I2(L)>def threshold within CLP (I2(L)CLP>def) 0.100...10.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)I2(L)>def Operating time (t2(L)>def) 0.03...200 s 0.03...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time [1]

46 First threshold inverse time (I2(L)>inv) 0.100...10.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)I2(L)>inv threshold within CLP (I2(L)CLP>inv) 0.100...10.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)I2(L)>inv Operating time (t2(L)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

I2(L)>> ElementI2(L)CLP>> Activation time (t2(L)CLP>>) 0.00...200 s 0.00...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t2(H)>inv / [(I2(H)/I2(H)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t2(H)>inv / [(I2(H)/I2(H)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t2(H)>inv / [(I2(H)/I2(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t2(H)>inv · {0.01 / [(I2(H)/I2(H)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = t2(H)>inv · {3.922 / [(I2(H)/I2(H)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = t2(H)>inv · {5.64 / [(I2(H)/I2(H)>inv)2 - 1] + 0.024} I-squared-t (I 2t = K): t = 16 · t2(H)>inv / (I2(H)/I2(H)>inv)2

Electromechanical (EM): t = 0.28 · t2(H)>inv / [-0.236 · (I2(H)/I2(H)>inv)-1+ 0.339] where: t : operate time I2(H)>inv: pickup value t2(H)>inv: operate time setting Asymptotic reference value: 1.1 I2(H)>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ I2(H) / I2(H)>inv ≤ 20 - With I2(H)>inv pickup ≥ 2.5 InL, the upper limit is 50 InL


I2(L)>> Reset time delay (t2(L)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time46 Second threshold defi nite time (I2(L)>>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I2L>>def threshold within CLP (I2(L)CLP>>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I2(L)>>def Operating time (t2(L)>>def) 0.03...10.00 s (step 0.01 s)

Negative / Positive current sequence side H ratio - I2/I1 side HI21(H)> Element

I21(H)CLP> CLP activation time (t21(H)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite timeFirst threshold defi nite time I2/I1 side H (I21(H)>def) 0.10...1.00 (step 0.01)I21(H)>def threshold within CLP (I21(H)CLP>def) 0.10...1.00 (step 0.01)I21(H)>def Operating time (t21(H)>def) 0.04..15000 s 0.04...9.99 s (step 0.01 s) 1...15000 s (step 1 s)

Negative / Positive current sequence side L ratio - I2/I1 side LI21(L)> Element

I21(L)CLP> CLP activation time (t21(L)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite timeFirst threshold defi nite time I2/I1 side H (I21(L)>def) 0.10...1.00 (step 0.01)I21(L)>def threshold within CLP (I21(L)CLP>def) 0.10...1.00 (step 0.01)I21(L)>def Operating time (t21(L)>def) 0.04..15000 s 0.04...9.99 s (step 0.01 s) 1...15000 s (step 1 s)

Thermal image - 49 side HCommon confi guration:

Initial thermal image side H (DthIN(H)) 0.0...1.0 ΔθB(H) (step 0.1 ΔθB(H))[1]

Reduction factor at inrush (KINR(H)) 1.0...3.0 (step 0.1)Thermal time constant τ(H) (T(H)) 1...200 min (step 1 min)DthCLP(H) CLP activation time (tDthCLP(H)) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

DthAL1(H) Element49(H) First alarm threshold (DthAL1(H)) 0.3...1.0 ΔθB(H) (step 0.1 ΔθB(H))

DthAL2(H) Element49(H) Second alarm threshold (DthAL2(H)) 0.5...1.2 ΔθB(H) (step 0.1 ΔθB(H))

Dth(H)> Element49(H) Trip threshold (Dth>(H)) 1.100...1.300 ΔθB(H) (step 0.001 ΔθB(H))

Thermal image - 49 side LCommon confi guration:

Initial thermal image side L (DthIN(L)) 0.0...1.0 ΔθB(L) (step 0.1 ΔθB(L))[2]

Reduction factor at inrush (KINR(L)) 1.0...3.0 (step 0.1)Thermal time constant τ(L) (T(L)) 1...200 min (step 1 min)DthCLP(L) activation time (tDthCLP(L)) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

DthAL1(L) Element49(L) First alarm threshold (DthAL1(L)) 0.3...1.0 ΔθB(L) (step 0.1 ΔθB(L))

DthAL2(L) Element49(L) Second alarm threshold (DthAL2(L)) 0.5...1.2 ΔθB(L) (step 0.1 ΔθB(L))

Dth(L)> Element49(L) Trip threshold (Dth>(L)) 1.100...1.300 ΔθB(L) (step 0.001 ΔθB(L))

Nota 1 Δθ is the thermal image in p.u. of the base temperature ΔθB(H) corresponding to the base current IBH on the H side

Nota 2 Δθ is the thermal image in p.u. of the base temperature ΔθB(L) corresponding to the base current IBL on the L side


Phase overcurrent - 50/51 side HI(H)> Element

I(H)> Curve type (I(H)>Curve) DEFINITE IEC/BS A, B, C, ANSI/IEEE MI, VI, EI, RECTIFIER, I2t or EM I(H)CLP> CLP activation time (t(H)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(H)> Reset time delay (t(H)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 First threshold defi nite time (IH>def) 0.100...40.0 InH 0.100...0.999 In (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I(H)>def threshold within CLP (I(H)CLP>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I(H)>def Operating time (t(H)>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time[1]

50/51 First threshold inverse time (I(H)>inv) 0.100...20.00 InH 0.100...0.999 In (step 0.001 InH) 1.00...20.00 InH (step 0.01 InH)I(H) >inv Threshold within CLP (I(H) CLP>inv) 0.100...20.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...20.00 InH (step 0.01 InH)I(H)>inv Operating time (t(H)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

I(H)>> ElementI(H)>> Curve type (I(H)>>Curve) DEFINITE or I2tI(H)CLP>> CLP Activation time (t(H)CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(H)>> Reset time delay (t(H)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 Second threshold defi nite time (I (H) >>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I(H)>>def Threshold within CLP (I(H)CLP>>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)I(H)>>def Operating time (t(H)>>def) 0.03...10.00 s (step 0.01 s)

Inverse timeSecond threshold inverse time (I(H)>>inv) 0.100...20.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...20.00 InH (step 0.01 InH)I(H)>>inv Threshold within CLP (I(H)CLP>>inv) 0.100...20.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...20.00 InH (step 0.01 InH)I(H)>>inv Operating time (t(H)>>inv) 0.02...10.00 s (step 0.01 s)

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t(H)>inv / [(I/I(H)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t(H)>inv / [(I/I(H)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t(H)>inv / [(I/I(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t(H)>inv · {0.01 / [(I/I(H)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = t(H)>inv · {3.922 / [(I/I(H)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = t(H)>inv · {5.64 / [(I/I(H)>inv)2 - 1] + 0.024} I-squared-t (I 2t = K): t = 16 · t(H)>inv / (I/I(H)>inv)2

Electromechanical (EM): t = 0.28 · t(H)>inv / [-0.236 · (I/I(H)>inv)-1+ 0.339] RECTIFIER (RI): t = 2351 · t(H)>inv / [(I/I(H)>inv)5.6- 1] t : operate time I(H)>inv: pickup value t(H)>inv: operate time setting Asymptotic reference value: 1.1 I(H)>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ I/I(H)>inv ≤ 20; with I(H)>inv pickup ≥ 2.5 InH, the upper limit is 50 InH


I(H)>>> ElementI(H)CLP>>> CLP activation time (t(H)CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(H)>>> Reset time delay (t(H)>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 Third threshold defi nite time (I(H)>>>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH(step 0.1 InH)I(H)>>>def Threshold within CLP (I(H)CLP>>>def) 0.100...40.0 InH 0.100...0.999 InH (step 0.001 InH) 1.00...9.99 InH (step 0.01 InH) 10.0...40.0 InH (step 0.1 InH)(H)>>>def Operating time (t(H)>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sReference values rest: 0Pickup accuracy ± 4% ± 1% InHOperate time accuracy 5% or ± 10 ms

Phase overcurrent - 50/51 side LI(L)> Element

I(L)> Curve type (I(L)>Curve) DEFINITE IEC/BS A, B, C, ANSI/IEEE MI, VI, EI, RECTIFIER, I2t or EM I(L)CLP> CLP activation time (t(L)CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(L)> Reset time delay (t(L)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 First threshold defi nite time (IL>def) 0.100...40.0 InL 0.100...0.999 In (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I(L)>def threshold within CLP (I(L)CLP>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I(L)>def Operating time (t(L)>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time[1]

50/51 First threshold inverse time (I(L)>inv) 0.100...20.00 InL 0.100...0.999 In (step 0.001 InL) 1.00...20.00 InL (step 0.01 InL)I(L) >inv Threshold within CLP (I(L) CLP>inv) 0.100...20.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...20.00 InL (step 0.01 InL)I(L)>inv Operating time (t(L)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t(L)>inv / [(I/I(L)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t(L)>inv / [(I/I(L)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t(L)>inv / [(I/I(L)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t(L)>inv · {0.01 / [(I/I(L)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = t(L)>inv · {3.922 / [(I/I(L)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = t(L)>inv · {5.64 / [(I/I(L)>inv)2 - 1] + 0.024} I-squared-t (I 2t = K): t = 16 · t(L)>inv / (I/I(L)>inv)2

Electromechanical (EM): t = 0.28 · t(L)>inv / [-0.236 · (I/I(L)>inv)-1+ 0.339] RECTIFIER (RI): t = 2351 · t(L)>inv / [(I/I(L)>inv)5.6- 1] t : operate time I(L)>inv: pickup value t(L)>inv: operate time setting Asymptotic reference value: 1.1 I(L)>inv Minimum operate time: 0.1 s Equation is valid for 1.1 ≤ I/I(L)>inv ≤ 20; with I(L)>inv pickup ≥ 2.5 InL, the upper limit is 50 InL


I(L)>> ElementI(L)>> Curve type (I(L)>>Curve) DEFINITE or I2tI(L)CLP>> CLP Activation time (t(L)CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(L)>> Reset time delay (t(L)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 Second threshold defi nite time (I (L) >>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I(L)>>def Threshold within CLP (I(L)CLP>>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I(L)>>def Operating time (t(L)>>def) 0.03...10.00 s (step 0.01 s)

Inverse timeSecond threshold inverse time (I(L)>>inv) 0.100...20.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...20.00 InL (step 0.01 InL)I(L)>>inv Threshold within CLP (I(L)CLP>>inv) 0.100...20.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...20.00 InL (step 0.01 InL)I(L)>>inv Operating time (t(L)>>inv) 0.02...10.00 s (step 0.01 s)

I(L)>>> ElementI(L)CLP>>> CLP activation time (t(L)CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)I(L)>>> Reset time delay (t(L)>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50/51 Third threshold defi nite time (I(L)>>>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL(step 0.1 InL)I(L)>>>def Threshold within CLP (I(L)CLP>>>def) 0.100...40.0 InL 0.100...0.999 InL (step 0.001 InL) 1.00...9.99 InL (step 0.01 InL) 10.0...40.0 InL (step 0.1 InL)I(L)>>>def Operating time (t(L)>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sPickup accuracy ± 4% ± 1% InLOperate time accuracy 5% or ± 10 ms

Residual overcurrent (calculated) - 50N/51N side HIE(H)> Element

IEH> Curve type (IE(H)>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI EM IE(H)CLP> CLP activation time (tEH (H) CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(H)> Reset time delay (tE(H)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N First threshold defi nite time (IE(H)>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>def threshold within CLP (IE(H)CLP>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>def Operating time (tE(H)>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)


Inverse time[1]

50N/51N First threshold inverse time (IE(H)>inv) 0.010...2.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...2.00 InH (step 0.01 InH)IE(H)>inv Threshold within CLP (IE(H)CLP>inv) 0.010...2.00 InH 0.100...0.999 InH (step 0.001 InH) 1.00...2.00 InH (step 0.01 InH)IE(H)>inv Operating time (tE(H)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

IE(H)>> ElementIE(H)CLP>> CLP activation time (tE(H)CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(H)>> Reset time delay (tE(H)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Second threshold defi nite time (IE(H)>>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>>def Threshold within CLP (IE(H)CLP>>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>>def Operating time (tE(H)>>def) 0.03...10.00 s (step 0.01 s)

Soglia IE(H)>>>IE(H)CLP>>> CLP activation time tE(H)CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(H)>>> Reset time delay (tE(H)>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Third threshold defi nite time (IE(H)>>>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>>>def Threshold within CLP (IE(H)CLP>>>def) 0.002...10.00 InH 0.002...0.999 InH (step 0.001 InH) 1.00...10.00 InH (step 0.01 InH)IE(H)>>>def Operating time (tE(H)>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sPickup accuracy ± 4% ± 1% InHOperate time accuracy 5% or ± 10 ms

Residual overcurrent (calculated) - 50N/51N side LIE(L)> Element

IEH> Curve type (IE(L)>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI or EM IE(L)CLP> CLP activation time (tEH (L) CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(L)> Reset time delay (tE(L)>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE(H)>inv / [(IE(H)/IE(H)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE(H)>inv / [(IE(H)/IE(H)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE(H)>inv / [(IE(H)/IE(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE(H)>inv · {0.01 / [(IE(H)/IE(H)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tE(H)>inv · {3.922 / [(IE(H)/IE(H)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tE(H)>inv · {5.64 / [(IE/IE(H)>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tE(H)>inv / [-0.236 · (IE(H)/IE(H)>inv)-1+ 0.339] t : operate time tE(H)>inv: operate time setting IE(H)>inv: pickup value IE(H): input residual current (calculated for side H) Asymptotic reference value: 1.1 IE(H)>inv Minimum operate time: 0.1 s Equation is valid for: 1.1 ≤ IE/IE(H)>inv ≤ 20 With IE(H)>inv setting ≥ 2.5 InH, the upper limit is 50 InH


Defi nite time50N/51N First threshold defi nite time (IE(L)>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>def Threshold within CLP (IE(L)CLP>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>def Operating time (tE(L)>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time[1]

50N/51N First threshold inverse time (IE(L)>inv) 0.010...2.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...2.00 InL (step 0.01 InL)IE(L)>inv Threshold within CLP (IE(L)CLP>inv) 0.010...2.00 InL 0.100...0.999 InL (step 0.001 InL) 1.00...2.00 InL (step 0.01 InL)IE(L)>inv Operating time (tE(L)>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

IE(L)>> ElementIE(L)CLP>> CLP activation time (tE(L)CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(L)>> Reset time delay (tE(L)>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Second threshold defi nite time (IE(L)>>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>>def Threshold within CLP (IE(L)CLP>>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>>def Operating time (tE(L)>>def) 0.03...10.00 s (step 0.01 s)

IE(L)>>> ElementIE(L)CLP>>> CLP activation time tE(L)CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE(L)>>> Reset time delay (tE(L)>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Third threshold defi nite time (IE(L)>>>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>>>def Threshold within CLP (IE(L)CLP>>>def) 0.002...10.00 InL 0.002...0.999 InL (step 0.001 InL) 1.00...10.00 InL (step 0.01 InL)IE(L)>>>def Operating time (tE(L)>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sPickup accuracy ± 4% ± 1% InLOperate time accuracy 5% or ± 10 ms

Note 1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE(L)>inv / [(IE(L)/IE(L)>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE(L)>inv / [(IE(L)/IE(L)>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE(L)>inv / [(IE(L)/IE(L)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE(L)>inv · {0.01 / [(IE(L)/IE(L)>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tE(L)>inv · {3.922 / [(IE(L)/IE(L)>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tE(L)>inv · {5.64 / [(IE(L)/IE(L)>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tE(L)>inv / [-0.236 · (IE(L)/IE(L)>inv)-1+ 0.339] t : operate time tE(L)>inv: operate time setting IE(L)>inv: pickup value IE(L): input residual current (calculated for side L) Asymptotic reference value: 1.1 IE(L)>inv Minimum operate time: 0.1 s Equation is valid for: 1.1 ≤ IE/IE(L)>inv ≤ 20 With IE(L)>inv setting ≥ 2.5 InL, the upper limit is 50 InL


Residual overcurrent (measured) - 50N.1/51N.1 - 87NHIZ.1 side H/LIE1> Element

IE1> Curve type (IE1>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI EM IE1CLP> CLP activation time (tE1CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE1> Reset time delay (tE1>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N First threshold defi nite time (IE1>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)IE1>def Threshold within CLP (IE1CLP>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)IE1>def Operating time (tE1>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time[1]

50N/51N First threshold inverse time (IE1>inv) 0.005...2.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...2.00 IEn1 (step 0.01 IEn1)IE>inv Threshold within CLP (IECLP>inv) 0.005...2.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...2.00 IEn1 (step 0.01 IEn1)IE1>inv Operating time (tE1>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

IE1>> ElementIE1CLP>> CLP activation time (tE1CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE1>> Reset time delay (tE1>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Second threshold defi nite time (IE1>>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)IE1>>def Threshold within CLP(IE1CLP>>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)IE1>>def Operating time (tE1>>def) 0.03...10.00 s (step 0.01 s)

IE1>>> ElementIE1CLP>>> CLP activation time (tE1CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE1>>> Reset time delay (tE1>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Third threshold defi nite time (IE1>>>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)

Note1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE1>inv / [(IE1/IE1>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE1>inv / [(IE1/IE1>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE1>inv / [(IE1/IE1>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE1>inv · {0.01 / [(IE1/IE1>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tE1>inv · {3.922 / [(IE1/IE1>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tE1>inv · {5.64 / [(IE1/IE1>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tE1>inv / [-0.236 · (IE1/IE1>inv)-1+ 0.339] t : operate time tE1>inv: operate time setting IE1>inv: regolazione soglia d’ intervento IE1: residual current input (measured at IE1 input) Asymptotic reference value: 1.1 IE1>inv Minimum operate time: 0.1 s Equation is valid for: 1.1 ≤ IE1/IE1>inv ≤ 20 With IE1>inv setting ≥ 0.5 IE1n, the upper limit is 10 IE1n


IE1>>>def Threshold within CLP (IE1CLP>>>def) 0.005...10.00 IEn1 0.005...0.999 IEn1 (step 0.001 IEn1) 1.00...10.00 IEn1 (step 0.01 IEn1)IE1>>>def Operating time (tE1>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sPickup accuracy ± 4% ± 1% IEn1Operate time accuracy 5% or ± 10 ms

Residual overcurrent (measured at IE2 input) - 50N.2/51N.2 - 87NHIZ.2 side H/LIE2> Element

IE2> Curve type (IE2>Curve) DEFINITE IEC/BS A, B, C ANSI/IEEE MI, VI, EI EM IE2CLP> CLP activation time (tE2CLP>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE2> Reset time delay (tE2>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N First threshold defi nite time (IE2>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>def Threshold within CLP (IE2CLP>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>def Operating time (tE2>def) 0.04...200 s 0.04...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)

Inverse time[1]

50N/51N First threshold inverse time (IE2>inv) 0.005...2.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...2.00 IEn2 (step 0.01 IEn2)IE2>inv Threshold within CLP (IE2CLP>inv) 0.005...2.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...2.00 IEn2 (step 0.01 IEn2)IE2>inv Operating time (tE2>inv) 0.02...60.0 s 0.02...9.99 s (step 0.01 s) 10.0...60.0 s (step 0.1 s)

IE2>> ElementIE2CLP>> CLP activation time (tE2CLP>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE2>> Reset time delay (tE2>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

Defi nite time50N/51N Second threshold defi nite time (IE2>>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>>def Threshold within CLP(IE2CLP>>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>>def Operating time (tE2>>def) 0.03...10.00 s (step 0.01 s)

Note1 Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE2>inv / [(IE2/IE2>inv)0.02 - 1] Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE2>inv / [(IE2/IE2>inv) - 1] Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE2>inv / [(IE2/IE2>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE2>inv · {0.01 / [(IE2/IE2>inv)0.02 - 1] + 0.023} Very Inverse (ANSI/IEEE type VI): t = tE2>inv · {3.922 / [(IE2/IE2>inv)2 - 1] + 0.098} Extremely Inverse (ANSI/IEEE type EI): t = tE2>inv · {5.64 / [(IE2/IE2>inv)2 - 1] + 0.024} Electromechanical (EM): t = 0.28 · tE2>inv / [-0.236 · (IE2/IE2>inv)-1+ 0.339] t : operate time tE2>inv: operate time setting IE2>inv: threshold setting IE2: residual current input (measured at IE2 input) Asymptotic reference value: 1.1 IE2>inv Minimum operate time: 0.1 s Equation is valid for: 1.1 ≤ IE2/IE2>inv ≤ 20 With IE2>inv setting ≥ 0.5 IE2n, the upper limit is 10 IE2n


IE2>>> ElementIE2CLP>>> CLP activation time (tE2CLP>>>) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)IE2>>> Reset time delay (tE2>>>RES) 0.00...100.0 s 0.00...9.99 s (step 0.01 s) 10.0...100.0 s (step 0.1 s)

TDefi nite time50N/51N Third threshold defi nite time (IE2>>>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>>>def Threshold within CLP (IE2CLP>>>def) 0.005...10.00 IEn2 0.005...0.999 IEn2 (step 0.001 IEn2) 1.00...10.00 IEn2 (step 0.01 IEn2)IE2>>>def Operating time (tE1>>>def) 0.03...10.00 s (step 0.01 s)

Pickup time ≤ 0.03 sDropout ratio 0.95...0.98Dropout time ≤ 0.04 sOvershoot time 0.03 sPickup accuracy ± 4% ± 1% IEn2Operate time accuracy 5% or ± 10 ms

Low impedance restricted ground fault - 64REF side H64REF(H) Minimum threshold (IREF(H)>) 0.05...2.00 IEn1 (step 0.01 IEn1)64REF(H) Intentional delay (tREF(H)>) 0.03...60.00 s (step 0.01 s)

Low impedance restricted ground fault - 64REF side L64REF(L) Minimum threshold (IREF(L)>) 0.05...2.00 IEn2 (step 0.01 IEn2)64REF(L) Intentional delay (tREF(L)>) 0.03...60.00 s (step 0.01 s)

Differential - 87THarmonic restraint

87T Second harmonic restraint threshold (2nd-REST>) 10...80% Id (step 1% Id)87T Fifth harmonic restraint threshold (5th-REST>) 10...80% Id (step 1% Id)87T Harmonic restraint intentional reset time delay (tH-RES) 0.00...10.00 s (step 0.01 s)87T Cross phase harmonic restraint enable (CROSS H-RES) ON/OFF

CT saturation detector87T Saturation detector enable (Sat-Det) ON/OFF87T Saturation detector intentional reset time delay (tSat-Det-RES) 0.00...0.50 s (step 0.01 s)

Id> Element87T First threshold (Id>) 0.05...2.00 Inref (step 0.01 Inref)87T First stretch slope percentage (K1) 10...50% (step 1 %)87T Second branch slope percentage (K2) 25...100% (step 1 %)87T Second branch intersection with vertical axis (Q) 0.00...3.00 Inref (step 0.01 Inref)87T First threshold operating time Id> (td>) 0.04 s

Id>> Element87T Second threshold (Id>>) 0.50...30.00 Inref (step 1.00 Inref)87T Second threshold operating time Id>> (td>>) 0.03 s

Breaker failure - BF side HBF(H) Phase current threshold (IBF(H)>) 0.05...1.00 InH (step 0.01 InH) BF(H) Residual current threshold (IEBF(H)>) 0.01...2.00 InH (step 0.01 InH)BF(H) Operating time (tBF(H)) 0.06...10.00 s (step 0.01 s)Dropout ratio 0.95...0.98Dropout time ≤ 0.05 sIBF(H)>Pickup accuracy ± 4% ± 1% InHIEBF(H)>Pickup accuracy ± 4% ± 1% InHtBF(H) Operate time accuracy 5% or ± 10 ms

Breaker failure - BF side LBF(L) Phase current threshold (IBF(L)>) 0.05...1.00 InL (step 0.01 InL) BF(L) Residual current threshold (IEBF(L)>) 0.01...2.00 InL (step 0.01 InL)BF(L) Operating time (tBF(L)) 0.06...10.00 s (step 0.01 s)Dropout ratio 0.95...0.98Dropout time ≤ 0.05 sIBF(L)>Pickup accuracy ± 4% ± 1% InLIEBF(L)>Pickup accuracy ± 4% ± 1% InLtBF(L) Operate time accuracy 5% or ± 10 ms


3.8 CONTROL AND MONITORING

Trip Circuit Supervision side H and side L - 74TCSOperate time:

One binary input supervision 40 sTwo binary inputs supervision 2 s

Reset time delay:One binary input supervision 6 sTwo binary inputs supervision 0.6 s

Selective block - BLOCK2Selective block IN:

BLIN Selective block operating mode (ModeBLIN1) OFF-ON IPh/IE-ON IPh-ON IEBLIN maximum activation time for phase protections (tB-IPh) 0.10...10.00 s (step 0.01 s)BLIN maximum activation time for ground protections (tB-IE) 0.10...10.00 s (step 0.01 s)

Selective block OUT:BLOUT Selective block operating mode (ModeBLOUT1) OFF-ON IPh/IE-ON IPh-ON IEBLOUT Dropout time for phase protections (tF -IPh) 0.00...1.00 s (step 0.01 s)BLOUT Dropout time for ground protections (tF -IE) 0.00...1.00 s (step 0.01 s)BLOUT Dropout time for ground and phase protections (tF-IPh/IE) 0.00...1.00 s (step 0.01 s)

Internal selective block - BLOCK4Output internal selective block dropout time for phase protections (tFI-IPh) 0.00...10.00 s (step 0.01 s)Output internal selective block dropout time for ground protections (tFI-IE) 0.00...10.00 s (step 0.01 s)

Circuit Breaker supervision side HCircuit breaker diagnostic

Number of CBH trips threshold (CBH N.Open) 0...10000 (step 1) Cumulative CBH tripping currents threshold (CBH SumI) 0....5000 In (step 1 InH)Cumulative CBH tripping I2t threshold (CBH SumI^2t) 0....5000 (InH)2∙s (step 1 InH2∙s)Circuit Breaker opening time for I^2t calculation (CBH tbreak) 0.05...1.00 s (step 0.01 s)Circuit Breaker maximum allowed opening time (CBH tbreak>) 0.05...1.00 s (step 0.01 s)

Circuit Breaker supervision side LCircuit breaker diagnostic

Number of CBH trips threshold (CBL N.Open) 0...10000 (step 1) Cumulative CBH tripping currents threshold (CBL SumI) 0....5000 InL (step 1 InL)Cumulative CBH tripping I2t threshold (CBL SumI^2tL) 0....5000 (InL)2∙s (step 1 InL2∙s)Circuit Breaker opening time for I^2t calculation (CBL tbreak) 0.05...1.00 s (step 0.01 s)Circuit Breaker maximum allowed opening time (CBL tbreak>) 0.05...1.00 s (step 0.01 s)

CT supervision - 74CT side H74CT(H) Threshold (S (H)<) 0.10...0.95 (step 0.01)74CT(H) Overcurrent threshold 74CT (I (H)*) 0.10...1.00 InH (step 0.01 InH)S (H)< Operating time (tS(H)<) 0.03...200 s 0.03...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)Dropout ratio for the I (H)* pickup 0.95...0.98Dropout time ≤ 0.04 sPickup accuracy S< ± 4%Pickup accuracy I (H)* ± 3% ± 0.5% InHOperate time accuracy 5% or ± 10 ms

CT supervision - 74CT side L74CT(L) Threshold (S (L)<) 0.10...0.95 (step 0.01)74CT(L) Overcurrent threshold 74CT (I (L)*) 0.10...1.00 InL (step 0.01 InL)S (L)< Operating time (tS(L)<) 0.03...200 s 0.03...9.99 s (step 0.01 s) 10.0...99.9 s (step 0.1 s) 100...200 s (step 1 s)Dropout ratio for the I (L)* pickup 0.95...0.98Dropout time ≤ 0.04 sPickup accuracy S< ± 4%Pickup accuracy I (L)* ± 3% ± 0.5% InLOperate time accuracy 5% or ± 10 ms

Pilot wire diagnosticBLOUT1 Diagnostic pulse period (PulseBLOUT1) OFF-0.1-1-5-10-60-120 sBLIN1 Diagnostic pulse control time interval (PulseBLIN1) OFF-0.1-1-5-10-60-120 s

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Demand measuresFix on demand period (tFIX) 1...60 min (step 1 min)Rolling on demand period (tROL) 1...60 min (step 1 min)Number of cycles for rolling on demand (N.ROL) 1...24 (step 1)

Oscillography (DFR)[1]

Format COMTRADERecording mode circularSampling rate 16 samples / cycle

Trigger setup:Pre-trigger time 0.05...1.00 s (step 0.01 s)Post-trigger time 0.05...60.00 s (step 0.05 s)

Set sample channels: iL1H, iL2H, iL3H, iL1L, iL2L, iL3L, iL1cH, iL2cH, iL3cH, iL1cL, iL2cL, iL3cL, iSL1, iSL2, iSL3, idL1, idL2, idL3, iE1, iE2, iEH, iEL

Set analog channels:Analog 1...Analog 12 IL1H, IL2H, IL3H, IL1L, IL2L, IL3L, DThH, DThL, IE1, IE2, IEH, IEL, IL1cH, IL2cH, IL3cH, IL1cL, IL2cL, IL3cL, ISL1, ISL2, ISL3, IdL1, IdL2, IdL3, Id2L1, Id2L2, Id2L3, Id5L1, Id5L2, Id5L3, IESH, IESL, I1H, I1L, I2H, I2L, I2H/I1H, I2L/I1L T1...T8[2]

Set digital channels:Digital 1...Digital 16 K1... K6, K7...K10, IN1, IN2, IN3...IN42[3]

Set digital channels from 87G-M-L states(Digital 17...32)

Start states ST Id>-L1...L3, ST Id>>-L1...L3, ST 2nd-REST, ST 5th-REST, ST H-REST-L1... L3, ST satDetTrip states TR Id>-L1...L3, TR Id>>-L1...L3

PLC (Programmable Logic Controller)[4]

Reference standard IEC 61131-3Language[5] IL (Instruction List)

Inputs:Binary inputs IN1, IN2 on board IN8...IN10 with MRI module IN11...IN26 with one MID16 module IN27...IN42 with two MID16 modulesDelayed binary inputs[6] IN1, IN2 on board IN8...IN10 with MRI module IN11...IN26 with one MID16 module IN27...IN42 with two MID16 modulesStart (all elements) Start U<, Start U<<,...etcTrip (all elements) Trip U<, Trip U<<,...etcMeasures IL1, IL2,...eccTemperature Pt100Block inputs BLK2IN-Iph, BLK2IN-IE,...etc

Outputs:Relays K11...K6 on board K7...K10 with MRI moduleLEDs START, TRIP, L1...L6 on board L7...L10 with MRI moduleBlock outputs BLK2OUT-Iph, BLK2OUT-IE,...etcCurrent converter DAC

Note 1 For the DFR function a licence is required; call Thytronic for purchasing.

Note 2 The measures of temperature are available only when the MPT module on Thybus is enabled (eigth Pt100 inputs)

Note 3 Output relay K7...K10 and binary input IN3...IN42 states are available only when the concerning I/O circuits are implemented (MRI and MID16 modules on Thybus)

Note 4 For the PLC function a licence is required; call Thytronic for purchasing.

Note5 With ThySetter V3.4.3 release and compiler IEC 61131-3 V1.2.7 only the IL language is implemented (Instruction List); other languages, according with IEC 61131 standard (ST (Structured Text)), LD (Ladder Diagram), FBD (Function Block Diagram), SFC (Sequential

Functional Chart), will be available soon

Note 6 The input state is acquired downstream the tON and tOFF timers

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3.9 METERINGMore data (range and accuracy) are available inside Section 5 - MEASURES, LOGIC STATES AND COUNTERS

DiretteFrequency (f )RMS value of fundamental component for phase currents side H (IL1H, IL2H, IL3H)RMS value of fundamental component for phase currents side L (IL1L, IL2L, IL3L)RMS value of fundamental component for measured residual currents (IE1, IE2)

CalculatedThermal image side H and side L (DThetaH, DThetaL)Calculated residual currents side H and side L (IEH, IEL)Maximum current between IL1-IL2-IL3 side H and side L (ILMAXH, ILMAXL)Minimum current between IL1-IL2-IL3 side H and side L (ILMINH, ILMINL)Average current between side H and side L (ILH, ILL)Compensated phase currents side H (IL1cH, IL2cH, IL3cH)Compensated phase currents side L (IL1cL, IL2cL, IL3cL)Stabilization currents (87 element) (ISL1, ISL2, ISL3) Differential phase currents (IdL1, IdL2, IdL3)(H) Stabilization current (64REF-1 element) side H (IESH)(H) Stabilization current (64REF-2 element) side L (IESL)

SequenzePositive sequence currents side H and side L (I1H, I1L)Negative sequence currents side H and side L (I2H, I2L)Negative sequence current/positive sequence current ratio side H and side L (I2H/I1H, I2L/I1L)

2nd harmonicSecond harmonic of differential phase currents (Id2L1, Id2L2, Id2L3)

5th harmonicFifth harmonic of differential phase currents (Id5L1, Id5L2, Id5L3)

Demand phasePhase fi xed currents demand side H (IL1FIXH, IL2FIXH, IL3FIXH)Phase fi xed currents demand side L (IL1FIXL, IL2FIXL, IL3FIXL)Phase rolling currents demand side H (IL1ROLH, IL2ROLH, IL3ROLH)Phase rolling currents demand side L (IL1ROLL, IL2ROLL, IL3ROLL)Phase peak currents demand side H (IL1MA XH, IL2MA XH, IL3MA XH)Phase peak currents demand side L (IL1MA XL, IL2MA XL, IL3MA XL)Phase minimum currents demand side H (IL1MINH, IL2MINH, IL3MINH)Phase minimum currents demand side L (IL1MINL, IL2MINL, IL3MINL)

PT100 [1]

Temperature PT1 (T1)Temperature PT2 (T2)Temperature PT3 (T3)Temperature PT4 (T4)Temperature PT5 (T5)Temperature PT6 (T6)Temperature PT7 (T7)Temperature PT8 (T8)

Note 1 The measures of temperature are available only when the MPT module on Thybus is enabled (eight Pt100 inputs)

3232 NT10 - Manual - 04 - 2011 FUNCTION CHARACTERISTICS

4 F U N C T I O N C H A R A C T E R I S T I C S4 F U N C T I O N C H A R A C T E R I S T I C S

4.1 HARDWARE DESCRIPTION

The following fi gure illustrates the device layout.

Printed boards hold the circuit components arranged according to a modular allocation of the main functions.

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RTC

EEprom Flash SRam SRam

SPICPU

ETHERNET

CPU BOARD

POWER SUPPLY BOARD

INPUT MODULE

8 x CTs

DSPDUALPORT

1A/5A

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EEprom

Thyb

us

RS48

5

RELAYS

K1...K6 Output contacts

RS232

MMILCD

LEDs

BINARY INPUTS

IN1 InputIN2

BLOCK I/O

BLKIN Input

OutputBLKOUT

POWER SUPPLY

+5 V

+10

V

0 V

+24

V-1

0 V

POW

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RTC

EEprom Flash SRam SRam

SPICPU

ETHERNET

CPU BOARD

POWER SUPPLY BOARD

INPUT MODULE

8 x CTs

DSPDUALPORT

1A/5A

≈≈≈≈

EEprom

Thyb

us

RS48

5

RELAYS

K1...K6 Output contacts

RS232

MMILCD

LEDs

BINARY INPUTS

IN1 InputIN2

BLOCK I/O

BLKIN Input

OutputBLKOUT

POWER SUPPLY

+5 V

+10

V

0 V

+24

V-1

0 V

POW

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33NT10 - Manual - 04 - 2011FUNCTION CHARACTERISTICS

Power supply boardAll the components necessary for conversion and stabilization functions are present.Two versions are envisaged suited to the input ranges 24...48 V and 115...230 V. The circuit provides stabilized voltages of +10 V and -10 V, required for the analogue measurement, +24 V for relays and +5 V for supplying the digital circuits. The circuit board additionally comprises:INPUT CIRCUITS:

Two binary input circuits, One block input circuit (BLIN1).

The logical input circuits and the block circuits include photo-couplers which provide for galvanic separation. OUTPUT CIRCUITS:

One block output circuit (BLOUT 1),Six output relays (k1...K6).

CPU boardThis circuit board contains all the circuits necessary for performing the analogue and digital pro-cessing of the signals.

Analog processingThe following are envisaged:

Anti aliasing fi lter circuits, Amplifi er circuits for conditioning the input signals, Reference voltage adjustment circuits for the measurement A/D converter.

The Pro-n relays use a DSP processor operating at 40 MHz; it performs all the processing on the analogue signals and furthermore coordinates management of the TX-RX signals to the CPU. The input currents are sampled at a frequency of 24 samples per period by means of a dual conver-sion system which allows the attainment of information pertaining to polarity and amplitude with high resolution. The measurement criterion allows precise measurement of even those signals having a unidirectional component, such as transient currents with overlapping exponential, which typically appear during faults. The circuit board also houses the output relays with the corresponding command and control cir-cuits, communication circuits, buttons, LCD display, LEDs and the key switch.

CPUA 32 bit CPU is provided. The following are envisaged:

Real Time Clock circuits with oscillator and super capacitor,RS232 communication port,RS485 communication port,Thybus communication circuits for external modules and MMI board,Network communication circuits (optional Ethernet).

Memories:SRam: high speed static memory, used for data and cache,Flash memory: used for fw storage and upgrade,EEprom memory: used for calibration data storage,Dual port Ram for data transfer between CPU and DSP.

Input boardThree CTs committed for phase currents acquisition side HThree CTs committed for phase currents acquisition side LOne CT committed for residual current acquisition side 1One CT committed for residual current acquisition side 2

The input circuits are suitable for 1 A or 5 A external CTs[1]

MMI (keyboard, LED and display)The MMI module (Man Machine Interface) includes:

An eight keys 8 keyboard,a backlight LCD display,Eight signalling LEDs,

The removable plug allows separation of the MMI module for free access to the CPU board when DIP-switch setting is required.

Note 1 The phase and residual nominal currents must be adjusted by means dip-switch.

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4.2 SOFTWARE DESCRIPTION

The program which handles operation of the Pro-N relays is made up of three fundamental elements shown in the following block diagram.

Base softwareSingle modules are application independent with modular and scalable structure.The system can be assimilated to the PC BIOS (Basic Input-Output System); three main function are provided:

Start-up test execution;RAM loading of the operating system;Provide a suitable interface to access the relay hardware.

Real-time operating system

An embedded operative system is employed suitable for real-time applications (RTOS). A multithread preemptive structure is able to menage several task with multiple priority levels .The kernel represents the nucleus of the system: it includes the processing functions closest to the electronic circuits. In addition, the kernel manages a service communication protocol known as Basic Protocol (BP).

TaskThe task (process e thread) are the base components.Ejemplo are:

Keyboard managementRTC (Real Time Clock) updatingRAM/EEPROM updatingDiagnosticInput acquisitionOutput relay managementMMII/O updatingDSP data processing

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KEYSPC com

Sync

Binary inputs

Output relays

LEDs

Fast devices

EEPROM

Slow devices

RTC refresh

EEPROMupdate

Diagnostic

DSP

MMI

task

Oscillography

Measures

Drivers

sampling

RTOS timer

SIMBOLOGIA

Processo (task)

Libreria funzionale (Drivers)

Timer del sistema operativoInterrupt

RTOS timer

I/O

I/O boards

KEYS

RTOS timer

RAM/EPROMmemory check

RTOS timer

RTOS timer

DATA BASE

TIMEREthernet RS232RS485

Counters

Events

Data Base

Messages

Thybus

+

sw.ai

KEYSPC com

Sync

Binary inputs

Output relays

LEDs

Fast devices

EEPROM

Slow devices

RTC refresh

EEPROMupdate

Diagnostic

DSP

MMI

task

Oscillography

Measures

Drivers

sampling

RTOS timer

SIMBOLOGIA

Processo (task)

Libreria funzionale (Drivers)

Timer del sistema operativoInterrupt

RTOS timer

I/O

I/O boards

KEYS

RTOS timer

RAM/EPROMmemory check

RTOS timer

RTOS timer

DATA BASE

TIMEREthernet RS232RS485

Counters

Events

Data Base

Messages

Thybus

+


DSP FirmwareBy means of Discrete Fourier Transform calculation, based on 24 samples/period, information is de-duced in relation to the amplitude and phase of all the current measurements; these are constantly updated and at the disposal of all the protection and control application algorithms.

DriversInside the driver library, all the specialized module for protection and control function are provided.They are the link from kernel and application layer. Ejemplos are:

Data base managementPC messages managementTCP/IP messages managementBasic Protocol managementCounter managementEvent and fault managementMeasuring managementOscillography management

Application SoftwareThe software acts the specialization of the base system; all protective and control elements are inside it.The main modules ate:

Diagnostic function for application layer,Input management (binary inputs),Protective functions,Event recording,Output management (LEDs and relays)

Each element (Kernel, Drivers and Application) may, in turn, be split into modules:

Base protocol (kernel)The module known as the Basic Protocol (BP) manages the service communication between the kernel and the other modules through the communication buses with the following services:

Data and information exchange,Calibration,Upgrade fw DSP,Upgrade application sw

Communication (drivers)

The ModBus TCP/IP protocol, with ethernet interface, the ModBus RTU, IEC 60870-5-103 and DNP3 protocol over RS485 interface and the ModBus RTU RS232 for ThySetter are provided.

MMI (drivers)The drivers deal with the menu management (MMi and/or communication messages).

Data BaseThe data base is split into three main sections:

RAM for volatile data,REE and PAR for non volatile data.

Self test (Application)The main hw and sw function are permanently verifi ed in background; no additional delay are intro-duced.In particular the following function are tested:

Reference voltages;Output relays;Sw fl ow with execution time monitoring;REE and PAR data congruence.

Development tools (Builder)For the development of the project, a CASE instrument has been developed, responsible for the opti-mized production of software code for the management of collaboration, the database and the MMI data and the Xml files used for communication. The automatic code generation criteria ensures the quality of the result in terms of the reusability, verifiability and maintainability of the software life cycle.

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4.3 I/O DESCRIPTION

Metering inputsThe following inputs are provided:

Three phase current inputs for side HThree phase current inputs for side LOne residual current input for side 1[1]

One residual current input for side 2[1]The nominal currents are independently adjustable at 1 A or 5 A through DIP-switches

The input circuits are appropriately dimensioned in order to withstand the currents which arise when a fault occurs, both in transient and steady state condition.

Signal processingVarious processing levels are involved:

Acquisition (base level).Direct measures of physical channels (fi rst level).Calculated measures (second level).Derived (third level).

The measures concerning a level are based on data worked out in the previous level.For each level the required resources concerning the priority for tasks (conditioning circuits, DSP and CPU) are on hand.

ACQUISITION (base level)The input signals are sampled 16 times per period:

- iL1H...iL3H Phase current instantaneous values - side H- iL1L...iL3L Phase current instantaneous values - side L- iE1, iE2 Residual current instantaneous values

From the sampled quantities, several measures are computed for protection, monitoring and meter-ing purposes.

DirectCalculatedPhaseSequenceHarmonicDemand

Nota 1 The positioning of the measuring circuits of the current residual IE1 and IE2 are not necessarily on the H and L as shown on the fi gure

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sensor i .a i

NT10

side H

side L

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Three phase current inputs - side H

Three phase current inputs - side L

One residual current input IE1 [1]


sensor i .a i

NT10

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52

Three phase current inputs - side H

Three phase current inputs - side L



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ACQUISITION

instantaneous values≈

acquis iz ione.ai

ACQUISITION

instantaneous values≈


DirectSamples are processed by means DFT (Discrete Fourier Transform) algorithm and the phase and amplitude of fundamental are computed:

Phase currents IL1H, IL2H, IL3H, IL1L, IL2L, IL3L,

Residual currents IE1 and IE2

CalculatedBy means vector addition of direct measures the following are calculated (RMS value of fundamen-tal components):

Thermal image Δθ side H ΔθH and ΔθL side L

Calculated residual currents - side H IEH and side L IEL

Phase compensated currents - side H IL1cH, IL2cH, IL3cH and side L IL1cL, IL2cL, IL3cL

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IL1 .a i

(InH, InL)iL1H, iL2H, iL3H

iL1L, iL2L, iL3LDFT≈ IL1H, IL2H, IL3H

IL1L, IL2L, IL3L

ACQUISITION

IL1.a i

(InH, InL)iL1H, iL2H, iL3H

iL1L, iL2L, iL3LDFT≈ IL1H, IL2H, IL3H

IL1L, IL2L, IL3L

ACQUISITION

IE.a i

(IEn1, IEn2)

ACQUISITION

iE1, iE2DFT≈ IE1, IE2

IE .a i

(IEn1, IEn2)

ACQUISITION

iE1, iE2DFT≈ IE1, IE2

Theta .a i

IL1H

I2HI2H = (IL1H+ e-j120°IL 2H+ e+j120°IL 3H)

I1H = (IL1H+ e+j120°IL 2H+ e-j120°IL 3H)

IL3H

IL2H

I1H

IthH=√(I1H2+ K2

2∙I2H2)

ΔθH (ΔθBH)2

dΔθdt

IB

IthH

ΔθT+ T+

( )+ =

IL1L

I2LI2 L = (IL1L+ e-j120°IL 2 L+ e+j120°IL 3L)

I1L = (IL1L+ e+j120°IL 2 L+ e-j120°IL 3L)

IL3L

IL2L

I1L

IthL=√(I1L2+ K2

2∙I2L2)

ΔθL (ΔθBL)2

dΔθdt

IB

IthL

ΔθT+ T+

( )+ =

Theta.a i

IL1H

I2HI2H = (IL1H+ e-j120°IL 2H+ e+j120°IL 3H)

I1H = (IL1H+ e+j120°IL 2H+ e-j120°IL 3H)

IL3H

IL2H

I1H

IthH=√(I1H2+ K2

2∙I2H2)

ΔθH (ΔθBH)2

dΔθdt

IB

IthH

ΔθT+ T+

( )+ =

IL1L

I2LI2 L = (IL1L+ e-j120°IL 2 L+ e+j120°IL 3L)

I1L = (IL1L+ e+j120°IL 2 L+ e-j120°IL 3L)

IL3L

IL2L

I1L

IthL=√(I1L2+ K2

2∙I2L2)

ΔθL (ΔθBL)2

dΔθdt

IB

IthL

ΔθT+ T+

( )+ =

IEC.a i

IEH = IL1H + IL2H + IL3H (InH)

IL1H

IL3H

IL2H

IEL = IL1L + IL2L + IL3L (InL)

IL1L

IL3L

IL2L

IEH

IEL

IEC.a i

IEH = IL1H + IL2H + IL3H (InH)

IL1H

IL3H

IL2H

IEL = IL1L + IL2L + IL3L (InL)

IL1L

IL3L

IL2L

IEH

IEL

ILC.a i

iL1H

iL3H

iL2H

iL1L

iL3L

iL2L

iL1cH, iL2cH, iL3cH IL1cH, IL2cH, IL3cH

iL1cL, iL2cL, iL3cL

iL1cH = iL1H·PH·MH·CH



iL1cL = iL1L·PL·ML·CL

PH,PL: Polarity matchingMH,ML: Magnitute matchingCH,CL: Phase and Ciclic sequence and zero sequence matching



(Inref)DFT

IL1cL, IL2cL, IL3cL (Inref)DFT

ILC.a i

iL1H

iL3H

iL2H

iL1L

iL3L

iL2L

iL1cH, iL2cH, iL3cH IL1cH, IL2cH, IL3cH

iL1cL, iL2cL, iL3cL





PH,PL: Polarity matchingMH,ML: Magnitute matchingCH,CL: Phase and Ciclic sequence and zero sequence matching



(Inref)DFT

IL1cL, IL2cL, IL3cL (Inref)DFT


Stabilization currents (87 element) ISL1, ISL2, ISL3

Differential currents (87 element) IdL1, IdL2, IdL3

SequenceFundamental RMS positive sequence current: I1 - side H I1H and side L I1LFundamental RMS negative sequence current: I2 - side H I2H and side L I2L

Demand Fixed demand (IL1FIXH, IL2FIXH, IL3FIXH)

Inside an adjustable time interval tFIX, an average magnitude is calculated for phase currents side H (IL1FIXH, IL2FIXH, IL3FIXH) and side L (IL1FIXL, IL2FIXL, IL3FIXL). The average values are stored at the end of the same time interval.

Rolling demand - side H (IL1ROLH, IL2ROLH, IL3ROLH) and side L (IL1ROLL, IL2ROLL, IL3ROLL)Inside an adjustable time interval NROL∙tROL , an average magnitude is calculated for phase currents side H and side L of measures taken every second, where tROL is the length of any time subinterval and NROL is the number of the time intervals. The average values are stored at the end of the same time subinterval.

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ISL.a i

iL1cH,iL1cL

iL2cH,iL2cL

iL3cH,iL3cL

iSL1, iSL2, iSL3 ISL1, ISL2, ISL3

iSL1 = {iL1cH+sign[iL1cL·iL1cH]·iL1cL}/2



sign[a·b]=+1 se a·b ≥ 0sign[a·b]=-1 se a·b < 0

(Inref)DFT

ISL.a i

iL1cH,iL1cL

iL2cH,iL2cL

iL3cH,iL3cL

iSL1, iSL2, iSL3 ISL1, ISL2, ISL3




sign[a·b]=+1 se a·b ≥ 0sign[a·b]=-1 se a·b < 0

(Inref)DFT

IdL.a i

iL1cH,iL1cL

iL2cH,iL2cL

iL3cH,iL3cL

idL1, idL2, idL3 IdL1, IdL2, IdL3

idL1 = iL1cH+iL1cL

idL2 = iL1cH+iL1cL

idL3 = iL1cH+iL1cL

(Inref)DFT

IdL.a i

iL1cH,iL1cL

iL2cH,iL2cL

iL3cH,iL3cL

idL1, idL2, idL3 IdL1, IdL2, IdL3

idL1 = iL1cH+iL1cL

idL2 = iL1cH+iL1cL

idL3 = iL1cH+iL1cL

(Inref)DFT

I1-I2 .a i

I1H = (IL1H+ e+j120°IL 2H+ e-j120°IL 3H) / 3I1H

I2H

(InH, InL)

(InH, InL)

e-j120°= - √3j1

2 2-

e+j120°= - √3j1

2 2+

I2H = (IL1H+ e-j120°IL 2H+ e+j120°IL 3H) / 3

IL1H

IL3H

IL2H

I1L = (IL1L+ e+j120°IL 2 L+ e-j120°IL 3L) / 3I1L

I2L

(InH, InL)

(InH, InL)I2L = (IL1L+ e-j120°IL 2 L+ e+j120°IL 3L) / 3

IL1L

IL3L

IL2L

I1- I2 .a i

I1H = (IL1H+ e+j120°IL 2H+ e-j120°IL 3H) / 3I1H

I2H

(InH, InL)

(InH, InL)

e-j120°= - √3j1

2 2-

e+j120°= - √3j1

2 2+

I2H = (IL1H+ e-j120°IL 2H+ e+j120°IL 3H) / 3

IL1H

IL3H

IL2H

I1L = (IL1L+ e+j120°IL 2 L+ e-j120°IL 3L) / 3I1L

I2L

(InH, InL)

(InH, InL)I2L = (IL1L+ e-j120°IL 2 L+ e+j120°IL 3L) / 3

IL1L

IL3L

IL2L

F ix-Demand.a i

1s

IL1F I XH, IL 2 F I XH,IL 3 F I XH

tF I X

(InH )

IL1F I XL , IL 2 F I XL ,IL 3 F I XL (InH )

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

IL x F I X IL xntF I X ∙ 60

tF I X ∙ 60

n=1

1

tF I X tF I X tF I X

Fix-Demand.a i

1s

IL1F I XH, IL 2 F I XH,IL 3 F I XH

tF I X

(InH )

IL1F I XL , IL 2 F I XL ,IL 3 F I XL (InH )

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

IL x F I X IL xntF I X ∙ 60

tF I X ∙ 60

n=1

1

tF I X tF I X tF I X

Rol-Demand.ai

IL1ROL HIL 2 ROL HIL 3ROL H (InH)

IL1ROL LIL 2 ROL LIL 3ROL L (InL)

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L 0 1 2 3 4 5

1stROL tROL

NROL

tROL tROL tROL

6

tROL

IL x ROL x= IL xktROL∙60

t R OL∙60

k=1

NR OL

n=1 n

1NROL

1

Rolling demand example with NROL=4

Average inside subinterval tROL

Rol-Demand.ai

IL1ROL HIL 2 ROL HIL 3ROL H (InH)

IL1ROL LIL 2 ROL LIL 3ROL L (InL)

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L 0 1 2 3 4 5

1stROL tROL

NROL

tROL tROL tROL

6

tROL

IL x ROL x= IL xktROL∙60

t R OL∙60

k=1

NR OL

n=1 n

1NROL

1

Rolling demand example with NROL=4

Average inside subinterval tROL


Peak phase currents - side H (IL1MAXH, IL2MAXH, IL3MAXH) and side L (IL1MAXL, IL2MAXL, IL3MAXL)Inside an adjustable time interval tROL, the maximum magnitude is calculated for phase currents- side H and side L of measures taken every second. The average values are stored at the end of the same time interval tROL (Rolling demand common parameter).

Minimum phase currents s- side H (IL1MINH, IL2MINH, IL3MINH) and side L (IL1MINL, IL2MINL, IL3MINL)Inside an adjustable time interval tROL, the minimum magnitude is calculated for phase currents

- side H and side L of measures taken every second. The average values are stored at the end of the same time interval tROL (Rolling demand common parameter).

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•

Max-Demand.ai

IL1MA XHIL 2 MA XHIL 3MA XH (InH)

IL1MA XLIL 2 MA XLIL 3MA XL (InL)

1stROL tROL tROL tROL tROL tROL

MAXIL xMA Xx= IL xntROL∙60

t R OL∙60

n=1

1

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

Maximum value of averages inside time interval tROLAverage inside time interval tROL

Max-Demand.ai

IL1MA XHIL 2 MA XHIL 3MA XH (InH)

IL1MA XLIL 2 MA XLIL 3MA XL (InL)

1stROL tROL tROL tROL tROL tROL

MAXIL xMA Xx= IL xntROL∙60

t R OL∙60

n=1

1

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

Maximum value of averages inside time interval tROLAverage inside time interval tROL

Min-Demand.ai

Reset

IL1MINHIL 2 MINHIL 3MINH

(InH)

IL1MINLIL 2 MINLIL 3MINL

(InL)1s

tROL tROL tROL tROL tROL tROL

MINIL xMINx= IL xntROL∙60

t R OL∙60

n=1

1

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

Minimum value of averaged inside time intervaltROLAverage inside time intervaltROL

Min-Demand.ai

Reset

IL1MINHIL 2 MINHIL 3MINH

(InH)

IL1MINLIL 2 MINLIL 3MINL

(InL)1s

tROL tROL tROL tROL tROL tROL

MINIL xMINx= IL xntROL∙60

t R OL∙60

n=1

1

IL2H

IL1H

IL3H

IL2L

IL1L

IL3L

Minimum value of averaged inside time intervaltROLAverage inside time intervaltROL


ConventionsCyclic phase sequence order

For three phase rotating currents, a direct cyclic sequence is defi ned when the three phases are L1, L2, L3 ordered, while an inverse cyclic sequence is defi ned when the three phases are L1, L3, L2 ordered. By setting with ThySetter, working at level 1, you can select any one of the six combinations of cycli-cal succession of the phasor currents..

fasor i1.ai

cyclic direct sequencefor current phasors side H (default)

IL1H-IL3H-IL2H

IL2H-IL1H-IL3H

IL2H-IL3H-IL1H

IL3H-IL1H-IL2H

IL3H-IL2H-IL1H

IL1H

IL2HIL3H

IL1H

IL2H IL3HIL2H

IL3H IL1H

IL2H

IL1H IL3HIL3H

IL2H IL1HIL3H

IL1H IL2H

cyclic inverse sequencefor current phasors side L (default)

IL1L-IL3L-IL2L

IL2L-IL1L-IL3L

IL2L-IL3L-IL1L

IL3L-IL1L-IL2L

IL3L-IL2L-IL1L

IL1L

IL2LIL3L

IL1L

IL2L IL3LIL2L

IL3L IL1L

IL2L

IL1L IL3LIL3L

IL2L IL1LIL3L

IL1L IL2Lfasor i1.ai

cyclic direct sequencefor current phasors side H (default)

IL1H-IL3H-IL2H

IL2H-IL1H-IL3H

IL2H-IL3H-IL1H

IL3H-IL1H-IL2H

IL3H-IL2H-IL1H

IL1H

IL2HIL3H

IL1H

IL2H IL3HIL2H

IL3H IL1H

IL2H

IL1H IL3HIL3H

IL2H IL1HIL3H

IL1H IL2H

cyclic inverse sequencefor current phasors side L (default)

IL1L-IL3L-IL2L

IL2L-IL1L-IL3L

IL2L-IL3L-IL1L

IL3L-IL1L-IL2L

IL3L-IL2L-IL1L

IL1L

IL2LIL3L

IL1L

IL2L IL3LIL2L

IL3L IL1L

IL2L

IL1L IL3LIL3L

IL2L IL1LIL3L

IL1L IL2L

cycl ic.ai

Right connection -> cyclic sequence correction is not required

Sequence = IL1-IL2-IL3 default

IL1-> IL1

IL2-> IL2

IL3-> IL3

IL1-> IL1

IL2-> IL3

IL3-> IL2

L1 L2 L3

Wrong connections -> cyclic sequence correction is required

Sequence = IL1-IL3-IL2

L1 L2 L3

NT10

NT10


Polarity inversionFor each of the inputs for each phase current and residual current inputs, the user can select the polarity “NORMAL” or “REVERSE. “By selecting an input with polarity “NORMAL” the measured input from this line is not reversed, while selection of an input with “REVERSE” polarity the measured input is reversed. This feature allows you to correct any polarity mistakes.

polar i ty.ai

Proper connections -> no software polarity correction is required

CT side H

CT side L

CT side H

CT side L

CT side H

CT side L

Polarity = NORMAL

Polarity = NORMAL

Polarity = NORMAL

Polarity = NORMAL

Polarity = REVERSE

Polarity = REVERSE

C9-C11-C13

C10-C12-C14

C1-C3-C6

C2-C4-C8

Wrong connections -> software polarity correction is required


Phase current inputs side H

C9-C11-C13

C10-C12-C14

Phase current inputs side L



C1-C3-C6

C2-C4-C8

NT10

NT10


C9-C11-C13

C10-C12-C14


C1-C3-C6

C2-C4-C8

NT10

polar i ty.ai

Proper connections -> no software polarity correction is required

CT side H

CT side L

CT side H

CT side L

CT side H

CT side L

Polarity = NORMAL

Polarity = NORMAL

Polarity = NORMAL

Polarity = NORMAL

Polarity = REVERSE

Polarity = REVERSE

C9-C11-C13

C10-C12-C14

C1-C3-C6

C2-C4-C8




C9-C11-C13

C10-C12-C14




C1-C3-C6

C2-C4-C8

NT10

NT10


C9-C11-C13

C10-C12-C14


C1-C3-C6

C2-C4-C8

NT10


Use of measured values

i L1H

, iL2

H, i

L3H

, iL1

L, i L

2L, i

L3L

I L1H

, IL2

H, I

L3H

, IL1

L, I L

2L, I

L3L

i L1cH

, iL2

cH, i L

3cH

, iL1

cL, i

L2cL

, i L3c

L

I L1c

H, I

L2cH

, IL3

cH, I

L1cL

, IL2

cL, I

L3cL

i SL1

, iSL

2, i S

L3

I SL1

, ISL

2, I S

L3

i dL1

, i dL2

, idL

3I d

L1, I

dL2,

I dL3

i dL1

, IdL

2, I d

L3

I d2L

1, I d

2L2,

I d2L

3

I d5L

1, I d

5L2,

I d5L

3I 1H

, I1L

I 2H

, I2L

I 2H

/I 1H

, I2L

/I 1L

Dth

H, D

thL

I ESH

, IES

L

I EH

, IEL

i E1,

i E2

I E1,

I E2

Tem

pera

tura

(PT1

....P

T8)

Bina

ry in

puts

IN1,

IN2

PROTECTIONThermal with Pt100 probes (26) gUndercurrent (side L and H) - 37 gNegative sequence overcurrent (side L and H) - 46 gNegative to positive sequence overcurrent ratio (side L and H) - I21 gThermal image (side L and H) - 49 gPhase overcurrent (side L and H) - 50/51 gCalculated residual overcurrent (side L and H) - 50N/51N gMeasured residual overcurrent (side 1 and 2) - 50N1/51N1, 50N2/51N2 gLow impedance restricted ground fault (64REF) (side L and H) - 64REF g gDifferential (87T) g g g g gBreaker failure (BF) g g

CONTROL and MONITORINGCT Monitoring (74CT) gTrip Circuit Supervision (TCS) gSecond harmonic restraint (2NDH-REST) g

MEASURESPhase currents (side L and H) gCompensated phase currents (side L and H) gStabilization currents gDifferential phase currents gDifferential currents second harmonic gDifferential currents fifth harmonic gDirect current sequence (side L and H) gInverse current sequence (side L and H) gThermal image (side L and H) gCalculated residual current (side L and H) gMeasured residual current (1 e 2) gTemperature (Pt100 with MPT module) g

FAULT RECORDERFault 0 g g g g g g g g g g g g g g gFault 1 g g g g g g g g g g g g g g gFault ... g g g g g g g g g g g g g g gFault 19 g g g g g g g g g g g g g g g

OSCILLOGRAPHYRecord 1 g g g g g g g g g g g g g g g g g g g g gRecord 2 g g g g g g g g g g g g g g g g g g g g gRecord ... g g g g g g g g g g g g g g g g g g g g g


Binary inputsTwo binary inputs are available on board.The dry inputs must be powered with an external voltage, (usually the auxiliary power supply).The connections are shown in the schematic diagrams.The following settings can be used to confi gure each input:

Logic Active-ON (activated when powered), or Active-OFF (activated when power is turned off).ON Timer (OFF-to-ON time delay) and OFF Timer (ON-to-OFF time delay).Binary input allocation.

Adjustable debounce timer allows any transient to decay avoiding false activation of the input; the positive transition is acquired if the input is permanently high for a time interval longer than the tON setting delay; similarly for the negative transitions, the negative transition is acquired if the input is permanently high for a time interval longer than the tOFF setting delay.

In the above shown diagram, INTERNAL STATE represents the logical state of the binary input used in the following processing.Each binary input may be matched to one of the following default functions.

FUNCTIONSBinary inputsIN1 IN2

Reset LEDs g gSet profile (switching setting A and B) g gFault trigger (fault recording) g gBlock2 IPh/IE (selective block from phase and/or ground elements) g gBlock2 IPh (selective block from phase elements) g gBlock2 IE (selective block from ground elements) g gBlock1 (logic block) sides H-L-87T g gBlock1 (logic block) sides H g gBlock1 (logic block) sides L g gBlock1 (logic block) 87T g gTCS1 (Trip Circuit Supervision) side H g gTCS2 (Trip Circuit Supervision) side H g gTCS1 (Trip Circuit Supervision) side L g gTCS2 (Trip Circuit Supervision) side L g gTrip ProtExt (trip from external protection relays) side H and side L g gTrip ProtExt (trip from external protection relays) side H g gTrip ProtExt (trip from external protection relays) side L g gReset counters g gReset CBH Monitor (clear CB monitoring data - side H) g g52a (CB auxiliary contact - side H) g g52b (CB auxiliary contact - side H) g gOpen CB - side H g gClose CB - side H g gReset CBL Monitor (clear CB monitoring data - side L) g g52a (CB auxiliary contact - side L) g g52b (CB auxiliary contact - side L) g gOpen CB - side L g gClose CB - side H g gPreset DTheta (thermal image preset - side H and side L) g gPreset DTheta (thermal image preset - side H) g gPreset DTheta (thermal image preset - side L) g gRemote trip g gReset on demand measures g g

•••

BINARY INPUT

INTERNAL STATE

tON tON tOFF tOFF

t

binary-t imers.ai

BINARY INPUT

INTERNAL STATE

tON tON tOFF tOFF

t

binary-t imers.ai


Reset LEDsIf the element tripped have gone back to rest condition, the latched LEDs and/or relays may be reset.

Set profi leInside Pro-N devices, two independent setting profi les (A and B) are available. Whereas different settings are required, they are made in the setting profi les and stored in the non volatile memory of relay. Applicable setting profi le is activated usually via a binary input; when the programmed input is activated, the profi le B becomes operative as a replacement for the default profi le A.[1]

Fault triggerWhen the programmed input is activated, a trigger is issued for fault record SFR). Data storing takes place with the same procedure resulting from a trip of any protective elements.

Block2 IPh/IEA change in status of a binary input effects a block[2] common for the phase and ground protective elements.The application of the IN1 and IN2 binary inputs for the acquisition of Block2 (selective block) com-ing from external protection relays is shown in the following fi gure (one phase overcurrent and one phase and residual overcurrent protection).

Note 1 To enable the profi le switching the “Input-selected” parameter must be set inside the “Profi le selection” submenu. If multiple setting groups are not required, Group A is the default selection

Note 2 The exhaustive treatment of the Block 2 function is described in the “Logic selectivity” paragraph.

Switch-profile.ai

(A, B, f rom binary input )

OFF≡Profile A, ON≡Profile B

Binary input allocation for switching of setting profiles

Profile AProfile B

Profile A Profile selectionProfile B

Set profile

T 0 INx t ON

T0n.o.n.c.

INx t O NLogic INx t O F F

INx t OFF

Binary input INx

Switch-profile.ai

(A, B, f rom binary input )

OFF≡Profile A, ON≡Profile B

Binary input allocation for switching of setting profiles

Profile AProfile B

Profile A Profile selectionProfile B

Set profile

T 0 INx t ON

T0n.o.n.c.


INx t OFF

Binary input INx

Trigger-faults.ai Binary input allocation for fault recorder trigger

Fault trigger

T 0 INx t ON

T0n.o.n.c.


INx t OFF

Binary input INx

Fault recording

Protectionelement

IL1->IL1r

IL2->IL2r

.....

DTheta->DTheta-r

Inputs

Outputs

Fault cause info

≥1

Trigger-faults.ai Binary input allocation for fault recorder trigger

Fault trigger

T 0 INx t ON

T0n.o.n.c.


INx t OFF

Binary input INx

Fault recording

Protectionelement

IL1->IL1r

IL2->IL2r

.....

DTheta->DTheta-r

Inputs

Outputs

Fault cause info

≥1

Block2H(L)

T 0t BH(L)

BlockIph-Ie.ai

t BH(L)

xxxxx Tr ip Block2

Block2 input enable (ON≡Enable)

& B lock2 IN

towards reset timer

Block2H(L) input

Block2 input

FROM ANY PROTECTIONS

Block2

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF

T0n.o.n.c. INx t OFF

Binary input allocation for logic selectivity (Block2)

Block2H(L)

T 0t BH(L)

BlockIph-Ie.ai

t BH(L)

xxxxx Tr ip Block2


& B lock2 IN

towards reset timer

Block2H(L) input

Block2 input


Block2

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input allocation for logic selectivity (Block2)

Reset-led.ai

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥

≥&&

Set (ON≡ turn on LED/re lay)S

Set-Reset latch

RReset (ON≡ turn of f LED/re lay)

Reset LEDs

Binary input allocation for reset signalling (LEDs)

T 0 INx t ON

T0n.o.n.c.


INx t OFF

Binary input INx


Block2 IPhA change in status of a binary input effects a block[1] for the phase protective elements.

Block2 IEA change in status of a binary input effects a block[1] for the earth protective elements.

Block1A change in status of a binary input effects a block for a length of time equal to the activation of the input[2]; the element pickup that wish be blocked must be enabled (the Block1 parameter must be set to ON in the concerning menu).[3]

The application of the INx binary input for the acquisition of the Block1 (logic block) coming from external signal is shown in the following fi gure; in the example the block signal is ORed with Block2 (selective block) to block the generic (xxx) element).

TCS1 and TCS2 - side H and side L

Trip Circuit Supervision.Supervision with one or two binary input can be performed.The exhaustive treatment of the TCS function is described in the concerning paragraph.

Trip ProtExtThe binary input detects a trip coming from an external protective relay: the information is available for the breaker failure function (BF)The following signals are provided:

Trip Protext sides H-L (a single input block functions on H and L sides)Trip Protext side H (a single input block functions on H side)Trip Protext side L (a single input block functions on L side)

Reset countersA change in status of a binary input effects a reset of all start/trip partial counters.[4]

Note 1 The exhaustive treatment of the Block 2 function is described in the “Logic selectivity” paragraph. The application of the inputs for the acquisition of Block2 (selective block) for Phase (Block2 Iph) and earth protective functions (Block2 IE) is

similar to that illustrated in the scheme concerning the Block2 IphIIE

Note 2 Unlike the Block2 (selective block), that houses a safety logic founded on programmable timers, the Block1 (logic block) keeps block of the protection for the whole time when the input is active.

Note 3 The activation of one binary input produces indiscriminately a block of all protective elements programmed for being blocked from Block1

Note 4 The reset of the total counters is practicable by means ThySetter command with Session Level 1 (available with password)

•••

Block1.ai

xxxx Block1

Enable (ON≡Enable)

Block1 input (ON≡Block)

Block1

from Block2 (ON≡Block)

&

B lock1

Block1

Binary input INx

Blocking

T 0 INx t ON

T0n.o.n.c.


INx t OFF

≥1

Binary input allocation for Block 1 acquisition Block1.ai

xxxx Block1



Block1

from Block2 (ON≡Block)

&

B lock1

Block1

Binary input INx

Blocking

T 0 INx t ON

T0n.o.n.c.


INx t OFF

≥1

Binary input allocation for Block 1 acquisition

TCS2.aiTrip Circuit Supervision - 74TCS

CB TC

TRIP TRIP

74TCS

52a 52b

Uaux

Uaux Uaux

IN1

IN2

CB TC

74TCS

52a 52b

Uaux

IN1

74TCSIN2IN1

001

011010

1 (2 s after)00

74TCSIN1

011 (40 s after)0

TCS2.aiTrip Circuit Supervision - 74TCS

CB TC

TRIP TRIP

74TCS

52a 52b

Uaux

Uaux Uaux

IN1

IN2

CB TC

74TCS

52a 52b

Uaux

IN1

74TCSIN2IN1

001

011010

1 (2 s after)00

74TCSIN1

011 (40 s after)0


Reset CB MonitorA change in status of a binary input effects a reset of all counters concerning the circuit breaker diagnostic (sides H and L):

Breaking Sum phase IL1H and IL1LBreaking Sum phase IL2H and IL2LBreaking Sum phase IL3H and IL3LBreaking SumI2t phase IL1H and IL1LBreaking SumI2t phase IL2H and IL2LBreaking SumI2t phase IL3H and IL3LCB Open counter

52a side H, 52b side H52a side L, 52b side L

The CB position can be acquired by means of binary inputs connected to the auxiliary contacts[1]: the information is used in the following functions:

CB position (open-closed)CB diagnostic (N. of operations, trip time)Breaker Failure (BF).

Open CB - side H or side LClose CB - side H or side L

The external acquisition of remote commands allows to drive CB remotely.

Note 1 Conventionally, the 52nd is the auxiliary contact that is in the same position of power contacts, while 52b is the auxiliary contact that is in the opposite direction compared to the power contacts

•••••••

•••

CB-pos.ai

CB positionCB diagnostic

Breaker failure (BF)

52a52

52b

+UAUX

-UAUX

Binary input INxT 0

INx t ON

T0n.o.n.c.

INx t O NLogic 52aH(L)

52bH(L)

INx t O F F

INx t OFF

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

Binary input allocation for CB remote command CB-pos.ai

CB positionCB diagnostic


52a52

52b

+UAUX

-UAUX

Binary input INxT 0

INx t ON

T0n.o.n.c.

INx t O NLogic 52aH(L)

52bH(L)

INx t O F F

INx t OFF

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

Binary input allocation for CB remote command

CB-com.ai

ComandoApertura

ComandoChiusura

+UAUX +UAUX

-UAUX

Close CB(L or H)

Binary input INxT 0

INx t ON

T0n.o.n.c.

INx t O NLogic Open CB(L or H) INx t O F F

INx t OFF

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S) -UAUX

-UAUX

52a52 O

I

52b

Binary input allocation for CB remote command CB-com.ai

ComandoApertura

ComandoChiusura

+UAUX +UAUX

-UAUX

Close CB(L or H)

Binary input INxT 0

INx t ON

T0n.o.n.c.

INx t O NLogic Open CB(L or H) INx t O F F

INx t OFF

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S) -UAUX

-UAUX

52a52 O

I

52b

Binary input allocation for CB remote command

ExtProt.ai


+UAUX

-UAUX

Tr ip ProtExt

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

Binary input allocation for trip acquisition from external protection device


Preset DThetaThe input activation presets the thermal image (49).

side H and side L (a single input initializes the thermal image on the sides H and L)side H (a single input initializes the thermal image on the sides H)side H and side L (a single input initializes the thermal image on the sides H and L)

The preset value can be adjusted by means the DθIN setting. The thermal image is initialized at the DθIN value when the device is powered or when the binary input become active DθIN. .

Remote tripThe input activation drives an expressly programmed output relay.

Reset demand measuresThe input activation make a reset of all demand measures.

•••

inhit-theta.ai

t = T+·ln{[(Ith/IB)2-DθP/DθB]/[(Ith/IB)2-1.2]DθP = DθIN

UAUX

UAUX

INx

PresetDThetaPresetDTheta

Binary input INxT 0

Logic INx t ON

IN1 t ON

INx t OFF

0n.o.n.c. IN1 t OFF

Binary input allocation for thernal image preset (49) inhit-theta.ai

t = T+·ln{[(Ith/IB)2-DθP/DθB]/[(Ith/IB)2-1.2]DθP = DθIN

UAUX

UAUX

INx

PresetDThetaPresetDTheta

Binary input INxT 0

Logic INx t ON

IN1 t ON

INx t OFF

0n.o.n.c. IN1 t OFF

Binary input allocation for thernal image preset (49)

Remote-trip.ai

Remote tripUAUX

UAUX

Remote t r ip

Binary input INx

INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Binary input allocation for remote trip Remote-trip.ai

Remote tripUAUX

UAUX

Remote t r ip

Binary input INx

INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Binary input allocation for remote trip


Output relaysSix output relays are available (K1...K6):[1]

K1 and K2 have two changeover contacts (SPDT, type C).K3, K4 and K5 have one make contact (SPST-NO, type A).[2]

K6 has one break contact (SPST-NC, type B).[3]

Each output relay may be programmed with following operating mode:Operation MODE (No latched, Pulse, Latched).Logic (Energized/De-energized).

To each output relay a programmable timer is matched (Minimum pulse width parameter).All parameters are available inside the Set \ Relays menu.

Any change to the settings can be affected at any time, also with the relay on duty, separately for each relay.Notes:

When de-energized operating mode is set, the relay remains in rest condition if no trip command is in progress.When energized operating mode is set, the relay remains in operating condition if no trip command is in progress and the auxiliary supply is powered on.When no-latched operating mode is set (Operation MODE No latched), the output relay reset at the end of the trip condition. To each output relay a programmable timer is matched (minimum pulse width operation).When latched operating mode is set (Operation MODE Latched), the output relay doesn’t reset at the end of the trip condition; it stays ON until a reset command is issued (RESET key, ThySetter or communication command).When pulse operating mode is set (Operation MODE Pulse), the output relay reset after a tTR programmable delay regardless of the trip condition. It is advisable to make sure that the output contact technical data are suitable for load (Nominal current, breaking capacity, make current, switching voltage,...).

Matching every output relay to any protective element is freely programmable inside the Setpoints submenus according a tripping matrix structure.[4][5]

Note 1 Schematic diagram are shown inside APPENDIX B1.

Note 2 K3 and K4 have a common terminal (A10)

Note 3 K5 and K6 have a common terminal (A13)

Note 4 Matching of the output relay to the protective and control functions can be defi ned so that any collision from other function is avoided. All output relay are unassigned in the default setting.

Note 5 Self test relay: it is advisable to plan the following settings: - Energized operating mode, - No-latched , in order that it stays ON for normal conditions and the other way round it goes OFF if any fault is detected and/or the auxiliary supply turns OFF.

•••

••

•

•

•

•

•

•

Input

No-latched operation

Latched operation

Pulse operation

Output relay operationMinimum pulse width

Relay-operat ion-t imers.ai

t

Minimum pulse widthtTR

tTR

Input

No-latched operation

Latched operation

Pulse operation

Output relay operationMinimum pulse width

Relay-operat ion-t imers.ai

t

Minimum pulse widthtTR

tTR


FUNCTIONSRELAYS

K1 K2 K3 K4 K5 K6Self-test relay g g g g g g

ThALx Alarm relays (ThAL1-K...ThAL8-K) g g g g g g

ThALx Trip relays (Th>1-K...Th>8-K) g g g g g g

I< Start - 37 element side H (I(H)< ST-K) g g g g g g

I< Trip - 37 element side H (I(H)< TR-K) g g g g g g

I< Start - 37 element side L (I(L)<< ST-K) g g g g g g

I< Trip - 37 element side L (I(L)<< TR-K) g g g g g g

I2> Start - 46 first element side H (I2(H)> ST-K) g g g g g g

I2> Trip - 46 first element side H (I2(H)>TR-K) g g g g g g

I2> Start - 46 second element side H (I2(H)>> ST-K) g g g g g g

I2> trip - 46 second element side H (I2(H)>>TR-K) g g g g g g

I2> Start - 46 first element side L (I2(L)> ST-K) g g g g g g

I2> Trip - 46 first element side L (I2(L)>TR-K) g g g g g g

I2> Start - 46 second element side L (I2(L)>> ST-K) g g g g g g

I2> trip - 46 second element side L (I2(L)>>TR-K) g g g g g g

I21> Start - negative to positive sequence ratio first element side H (I21(H)> ST-K) g g g g g g

I21> Trip - negative to positive sequence ratio first element side H (I21(H)>TR-K) g g g g g g

I21> Start - negative to positive sequence ratio first element side L (I21(L)> ST-K) g g g g g g

I21> Trip - negative to positive sequence ratio first element side L (I21(L)>TR-K) g g g g g g

DthAL1 Alarm relays side H (DthAL1(H)-K) g g g g g g

DthAL2 Alarm relays side H (DthAL2(H)-K) g g g g g g

Dth> Trip relays side H (Dth(H)>-K) g g g g g g

DthAL1 Alarm relays side L (DthAL1(L)-K) g g g g g g

DthAL2 Alarm relays side L (DthAL2(L)-K) g g g g g g

Dth> Trip relays side L (Dth(L)>-K) g g g g g g

50/51 I> First element start relays side H (I(H)>ST-K) g g g g g g

50/51 I> First element trip relays side H (I(H)>TR-K) g g g g g g

50/51 I> Second element start relays side H (I(H)>>ST-K) g g g g g g

50/51 I> Second element trip relays side H (I(H)>>TR-K) g g g g g g

50/51 I> Third element start relays side H (I(H)>>>ST-K) g g g g g g

50/51 I> Third element trip relays side (I(H)>>>TR-K) g g g g g g

50/51 I> First element start relays side L (I(L)>ST-K) g g g g g g

50/51 I> First element trip relays side L (I(L)>TR-K) g g g g g g

50/51 I> Second element start relays side L (I(L)>>ST-K) g g g g g g

50/51 I> Second element trip relays side L (I(L)>>TR-K) g g g g g g

50/51 I> Third element start relays side L (I(L)>>>ST-K) g g g g g g

50/51 I> Third element trip relays side L (I(L)>>>TR-K) g g g g g g

50N/51N IE> First element start relays side H (IE(H)>ST-K) g g g g g g

50N/51N IE> First element trip relays side H (IE(H)>TR-K) g g g g g g

50N/51N IE>> Second element start relays side H (IE(H)>>ST-K) g g g g g g

50N/51N IE>> Second element trip relays side H (IE(H)>>TR-K) g g g g g g

50N/51N IE>> Third element start relays side H (IE(H)>>>ST-K) g g g g g g

50N/51N IE>>> Third element trip relays side H (IE(H)>>>TR-K) g g g g g g

50N/51N IE> First element start relays side L (IE(L)>ST-K) g g g g g g

50N/51N IE> First element trip relays side L (IE(L)>TR-K) g g g g g g

50N/51N IE>> Second element start relays side L (IE(L)>>ST-K) g g g g g g

50N/51N IE>> Second element trip relays side lato L (IE(L)>>TR-K) g g g g g g

50N/51N IE>> Third element start relays side L (IE(L)>>>ST-K) g g g g g g

50N/51N IE>>> Third element trip relays side L (IE(L)>>>TR-K) g g g g g g

50N.1/51N.1 - NHIZ.1 First element start relays (IE1>ST-K) g g g g g g

50N.1/51N.1 - NHIZ.1 First element trip relays (IE1>TR-K) g g g g g g

50N.1/51N.1 - NHIZ.1 Second element start relays (IE1>>ST-K) g g g g g g

50N.1/51N.1 - NHIZ.1 Second element trip relays (IE1>>TR-K) g g g g g g

50N.1/51N.1 - NHIZ.1 Third element start relays (IE1>>>ST-K) g g g g g g

50N.1/51N.1 - NHIZ.1 Third element trip relays (IE1>>>TR-K) g g g g g g

50N.2/51N.2 - NHIZ.2 First element start relays (IE2>ST-K) g g g g g g

50N.2/51N.2 - NHIZ.2 First element trip relays (IE2>TR-K) g g g g g g

50N.2/51N.2 - NHIZ.2 Second element start relays (IE2)>>ST-K) g g g g g g

50N.2/51N.2 - NHIZ.2 Second element trip relays (IE2>>TR-K) g g g g g g

50N.2/51N.2 - NHIZ.2 Third element start relays (IE2>>>ST-K) g g g g g g

50N.2/51N.2 - NHIZ.2 Third element trip relays (IE2>>>TR-K) g g g g g g

64REF Start relays side H (64REF(H)-ST-K) g g g g g g

64REF Trip relays side H (64REF(H)-TR-K) g g g g g g

64REF Start relays side L (64REF(L)-ST-K) g g g g g g

64REF Trip relays side L (64REF(L)-TR-K) g g g g g g


FUNCTIONSRELAYS

K1 K2 K3 K4 K5 K687T Id> Start - 87T first element Start relays (Id> ST-K) g g g g g g

87T Id> trip - 87T first element Start relays (Id>TR-K) g g g g g g

87T Id> Start - 87T second element Start relays (Id>> ST-K) g g g g g g

87T Id> Start - 87T second element Trip relays (Id>>TR-K) g g g g g g

I2ndh> Second harmonic restraint start relays (I2ndh>ST-K) g g g g g g

I2ndh> Second harmonic restraint trip relays (I2ndh>TR-K) g g g g g g

74CT CTs monitoring output block relay side H (S(H)<TR-K) g g g g g g

74CT CTs monitoring output block relay side L (S(L)<TR-K) g g g g g g

74TCS(H) Trip relays - side H (74TCS(H)-ST-K) g g g g g g

74TCS(H) Trip relays - side H (74TCS(L)-TR-K) g g g g g g

74TCS(L) Trip relays - side L (74TCS(H)-ST-K) g g g g g g

74TCS(L) Trip relays - side L (74TCS(L)-TR-K) g g g g g g

tB-IPh/IE Elapsed signalling relays (tB-K) g g g g g g

Phase protection output selective block relays (BLK2OUT-Iph-K) g g g g g g

Ground protection output selective block relays (BLK2OUT-IE-K) g g g g g g

Phase and ground protection output selective block relays (BLK2OUT-Iph/IE-K) g g g g g g

BF Start relays - side H (BF(H)-ST-K) g g g g g g

BF trip relays - side H (BF(H)-TR-K) g g g g g g

BF Start relays - side L (BF(L)-ST-K) g g g g g g

BF Trip relays - side L (BF(L)-TR-K) g g g g g g

PLC (PLC-K) g g g g g g

Number of CBH trips diagnostic relays - side H (N.Open(H)-K) g g g g g g

Cumulative CBH tripping currents diagnostic relays - side H (SumI(H)-K) g g g g g g

Cumulative CBH tripping I^2t diagnostic relays - side H (SumI^2t-K) g g g g g g

CBH Circuit breaker opening time diagnostic relays - side H (tbreak-K) g g g g g g

Number of CBL trips diagnostic relays - side L (N.Open(H)-K) g g g g g g

Cumulative CBL tripping currents diagnostic relays - side L (SumI(H)-K) g g g g g g

Cumulative CBL tripping I^2t diagnostic relays - side L (SumI^2t-K) g g g g g g

CBL Circuit breaker opening time diagnostic relays - side L (tbreak-K) g g g g g g

Open CB command relays - side H (CBopen(H)-K) g g g g g g

Close CB command relays - side H (CBclose(H)-K) g g g g g g

Open CB command relays - side L (CBopen(L)-K) g g g g g g

Close CB command relays - side L (CBclose(L)-K) g g g g g g

Remote tripping relays (RemTrip-K) g g g g g g

Not received pulses at BLIN signalling relays (PulseBLIN-K) g g g g g g


LED indicatorsEight LEDs are available.

One green LED “ON”: if turned on it means that the device is properly working, if fl ashing the inter-nal self-test function has detected an anomaly.One yellow LED “START” tagged for START of one or more protective elements.[1]

One red LED “TRIP” tagged for TRIP of one or more protective elements.[1]

Five red LEDs “1...5” for highlight the activation of one or more user defi ned function.Each LED may be programmed with following operating mode:

No-latched: the LED reset at the end of the trip condition.Latched: the LED doesn’t reset at the end of the trip condition; it stays ON until a manual reset com-mand is issued (RESET key, ThySetter or communication command).

Any change to the settings can be affected at any time, also with the relay on duty, separately for each LED by parameters setting inside thee Set \ Led menu.

Free allocation of each LED may be set according to the matrix structure shown in the following page.[2]

Note 1 The START and the TRIP LED are user assignable to any function; other than starting and tripping information can be assigned to them too, just the same for L1...L5

Note 2 All LEDs are unassigned in the default setting.

•

•••

••

LEDsLEDs


FUNCTIONSLEDs

START TRIP 1 2 3 4 5ThALx Alarm relays (ThAL1-L...ThAL8-L) g g g g g g g

ThALx Trip relays (Th>1-L...Th>8-L) g g g g g g g

I< Start - 37 element side H (I(H)< ST-L) g g g g g g g

I< Trip - 37 element side H (I(H)< TR-L) g g g g g g g

I< Start - 37 element side L (I(L)<< ST-L) g g g g g g g

I< Trip - 37 element side L (I(L)<< TR-L) g g g g g g g

I2> Start - 46 first element side H (I2(H)> ST-L) g g g g g g g

I2> Trip - 46 first element side H (I2(H)>TR-L) g g g g g g g

I2> Start - 46 second element side H (I2(H)>> ST-L) g g g g g g g

I2> trip - 46 second element side H (I2(H)>>TR-L) g g g g g g g

I2> Start - 46 first element side L (I2(L)> ST-L) g g g g g g g

I2> Trip - 46 first element side L (I2(L)>TR-L) g g g g g g g

I2> Start - 46 second element side L (I2(L)>> ST-L) g g g g g g g

I2> trip - 46 second element side L (I2(L)>>TR-L) g g g g g g g

I21> Start - negative to positive sequence ratio first element side H (I21(H)> ST-L) g g g g g g g

I21> Trip - negative to positive sequence ratio first element side H (I21(H)>TR-L) g g g g g g g

I21> Start - negative to positive sequence ratio first element side L (I21(L)> ST-L) g g g g g g g

I21> Trip - negative to positive sequence ratio first element side L (I21(L)>TR-L) g g g g g g g

DthAL1 Alarm relays side H (DthAL1(H)-L) g g g g g g g

DthAL2 Alarm relays side H (DthAL2(H)-L) g g g g g g g

Dth> Trip relays side H (Dth(H)>-L) g g g g g g g

DthAL1 Alarm relays side L (DthAL1(L)-L) g g g g g g g

DthAL2 Alarm relays side L (DthAL2(L)-L) g g g g g g g

Dth> Trip relays side L (Dth(L)>-L) g g g g g g g

50/51 I> First element start relays side H (I(H)>ST-L) g g g g g g g

50/51 I> First element trip relays side H (I(H)>TR-L) g g g g g g g

50/51 I> Second element start relays side H (I(H)>>ST-L) g g g g g g g

50/51 I> Second element trip relays side H (I(H)>>TR-L) g g g g g g g

50/51 I> Third element start relays side H (I(H)>>>ST-L) g g g g g g g

50/51 I> Third element trip relays side (I(H)>>>TR-L) g g g g g g g

50/51 I> First element start relays side L (I(L)>ST-L) g g g g g g g

50/51 I> First element trip relays side L (I(L)>TR-L) g g g g g g g

50/51 I> Second element start relays side L (I(L)>>ST-L) g g g g g g g

50/51 I> Second element trip relays side L (I(L)>>TR-L) g g g g g g g

50/51 I> Third element start relays side L (I(L)>>>ST-L) g g g g g g g

50/51 I> Third element trip relays side L (I(L)>>>TR-L) g g g g g g g

50N/51N IE> First element start relays side H (IE(H)>ST-L) g g g g g g g

50N/51N IE> First element trip relays side H (IE(H)>TR-L) g g g g g g g

50N/51N IE>> Second element start relays side H (IE(H)>>ST-L) g g g g g g g

50N/51N IE>> Second element trip relays side H (IE(H)>>TR-L) g g g g g g g

50N/51N IE>> Third element start relays side H (IE(H)>>>ST-L) g g g g g g g

50N/51N IE>>> Third element trip relays side H (IE(H)>>>TR-L) g g g g g g g

50N/51N IE> First element start relays side L (IE(L)>ST-L) g g g g g g g

50N/51N IE> First element trip relays side L (IE(L)>TR-L) g g g g g g g

50N/51N IE>> Second element start relays side L (IE(L)>>ST-L) g g g g g g g

50N/51N IE>> Second element trip relays side lato L (IE(L)>>TR-L) g g g g g g g

50N/51N IE>> Third element start relays side L (IE(L)>>>ST-L) g g g g g g g

50N/51N IE>>> Third element trip relays side L (IE(L)>>>TR-L) g g g g g g g

50N.1/51N.1-87HIZ.1 First element start relays (IE1>ST-L) g g g g g g g

50N.1/51N.1-87HIZ.1 First element trip relays (IE1>TR-L) g g g g g g g

50N.1/51N.1-87HIZ.1 Second element start relays (IE1>>ST-L) g g g g g g g

50N.1/51N.1-87HIZ.1 Second element trip relays (IE1>>TR-L) g g g g g g g

50N.1/51N.1-87HIZ.1 Third element start relays (IE1>>>ST-L) g g g g g g g

50N.1/51N.1-87HIZ.1 Third element trip relays (IE1>>>TR-L) g g g g g g g

50N.2/51N.2-87HIZ.2 First element start relays (IE2>ST-L) g g g g g g g

50N.2/51N.2-87HIZ.2 First element trip relays (IE2>TR-L) g g g g g g g

50N.2/51N.2-87HIZ.2 Second element start relays (IE2>>ST-L) g g g g g g g

50N.2/51N.2-87HIZ.2 Second element trip relays (IE2>>TR-L) g g g g g g g

50N.2/51N.2-87HIZ.2 Third element start relays (IE2>>>ST-L) g g g g g g g

50N.2/51N.2-87HIZ.2 Third element trip relays (IE2>>>TR-L) g g g g g g g

64REF Start relays side H (64REF(H)-ST-L) g g g g g g g

64REF Trip relays side H (64REF(H)-TR-L) g g g g g g g

64REF Start relays side L (64REF(L)-ST-L) g g g g g g g

64REF Trip relays side L (64REF(L)-TR-L) g g g g g g g


FUNZIONILED

START TRIP 1 2 3 4 587T Id> Start - 87T first element Start relays (Id> ST-L) g g g g g g g

87T Id> trip - 87T first element Start relays (Id>TR-L) g g g g g g g

87T Id> Start - 87T second element Start relays (Id>> ST-L) g g g g g g g

87T Id> Start - 87T second element Trip relays (Id>>TR-K) g g g g g g g

I2ndh> Second harmonic restraint start relays (I2ndh>ST-L) g g g g g g g

I2ndh> Second harmonic restraint trip relays (I2ndh>TR-L) g g g g g g g

74CT CTs monitoring output block relay side H (S(H)<TR-L) g g g g g g g

74CT CTs monitoring output block relay side L (S(L)<TR-L) g g g g g g g

74TCS(H) Start relays - side H (74TCS(H)-ST-L) g g g g g g g

74TCS(H) Trip relays - side H (74TCS(L)-TR-L) g g g g g g g

74TCS(L) Start relays - side L (74TCS(H)-ST-L) g g g g g g g

74TCS(L) Trip relays - side L (74TCS(L)-TR-L) g g g g g g g

tB-IPh/IE Elapsed signalling relays (tB-L) g g g g g g g

Phase protection output selective block relays (BLK2OUT-Iph-L) g g g g g g g

Ground protection output selective block relays (BLK2OUT-IE-L) g g g g g g g

Phase and ground protection output selective block relays (BLK2OUT-Iph/IE-L) g g g g g g g

BF Start relays - side H (BF(H)-ST-L) g g g g g g g

BF trip relays - side H (BF(H)-TR-L) g g g g g g g

BF Start relays - side L (BF(L)-ST-L) g g g g g g g

BF Trip relays - side L (BF(L)-TR-L) g g g g g g g

PLC (PLC-L) g g g g g g g

Number of CBH trips diagnostic relays - side H (N.Open(H)-L) g g g g g g g

Cumulative CBH tripping currents diagnostic relays - side H (SumI(H)-L) g g g g g g g

Cumulative CBH tripping I^2t diagnostic relays - side H (SumI^2t-L) g g g g g g g

CBH Circuit breaker opening time diagnostic relays - side H (tbreak-L) g g g g g g g

Number of CBL trips diagnostic relays - side L (N.Open(H)-L) g g g g g g g

Cumulative CBL tripping currents diagnostic relays - side L (SumI(H)-L) g g g g g g g

Cumulative CBL tripping I^2t diagnostic relays - side L (SumI^2t-L) g g g g g g g

CBL Circuit breaker opening time diagnostic relays - side L (tbreak-L) g g g g g g g

Open CB command relays - side H (CBopen(H)-L) g g g g g g g

Close CB command relays - side H (CBclose(H)-L) g g g g g g g

Open CB command relays - side L (CBopen(L)-L) g g g g g g g

Close CB command relays - side L (CBclose(L)-L) g g g g g g g

Remote tripping relays (RemTrip-L) g g g g g g g

Not received pulses at BLIN signalling relays (PulseBLIN-L) g g g g g g g


Communication interfacesSeveral communication ports are provided:

RS232 port on the front side of the NA60 device for local communication (ThySetter).RS485 port on the rear side of the NA60 device for bus communication. Ethernet port on the rear side of the NA60 device for bus communication.

RS232A simple DIN to RJ adapter can be used; the L10041 cable can be supplied.The RS232 port has high priority compared with the Ethernet port.

If RS232 port is not available on Personal Computer, an USB-RS232 converter must be employed.[1]

The serial port is the simplest access for setting by means the ThySetter software.RS485

Several protocol are implemented[2]:ModBus RTU. Modbus is a serial communications protocol. It is a de facto standard communica-tions protocol in industry, and is now the most commonly available means of connecting industrial electronic devices also inside electric utilities and substation. IEC 60870-5. The IEC 60870-5 suite of protocol is used for communications from master station to substation, as well within the substation; the IEC 60870-5-103 (Protection equipment) is available together the Modbus protocol on some version of Pro-n devices (code Nxxx#xxxxC x).

EthernetIt is provided (optionally) a communication board useful for Ethernet communication with ModBus TCP/IP protocol.[3]

Modbus/TCP basically embeds a Modbus frame into a TCP frame in a simple manner. This is a con-nection-oriented transaction which means every query expects a response.This query/response technique fi ts well with the master/slave nature of ModBus, adding to the de-terministic advantage that Switched Ethernet offers industrial users.In the same way as the RS485 base Modbus, every device is identifi ed by a personal address and the communication goes in “client-server” mode with answering request from the recipient.The protective relay can be directly connect to the Ethernet network (no gateway, protocol converter are needed).Two port can be implemented:

100BASE-TX with RJ45 connector (copper).100BASE-FX with FX connector (optical fi ber)[2]

For both modules no hw preset are required.

Two LEDs are on board (RJ45):LINK - (green): The LED lights up if the connection is active.TX - (yellow): The LED lights up when data transmission is active.

Note 1 After installation, the same communication port must be selected to defi ne the Thysetter parameters (typically COM4, COM5,...).

Note 2 The RS485 port is not implemented on the Pro-N devices endowed with Ethernet FX port

Note 3 Information about the ModBus map may be fi nd inside the “Remote programming manual”

•••

•

•

••

••

ser ia l -sch.ai

L10041

TXD

RXD

DTR

GND

4

3

1

2

1

2

3

4

6

7

8

95

Female connector(solder side view )

RJ10 Connector Pin1

ser ia l -sch.ai

L10041

TXD

RXD

DTR

GND

4

3

1

2

1

2

3

4

6

7

8

95

Female connector(solder side view )

RJ10 Connector Pin1

FX Ethernet (no RS485 port)RJ45 Ethernet+RS485 ports

ethernet-sch.ai

RX

TX1 TX+2 TX-3 RX+456 RX-78

RS48

5

F1F2F3F4F5A+

B-

FX Ethernet (no RS485 port)RJ45 Ethernet+RS485 ports

ethernet-sch.ai

RX

TX1 TX+2 TX-3 RX+456 RX-78

RS48

5

F1F2F3F4F5A+

B-


4.4 PROTECTIVE ELEMENTS

Rated valuesInside the Base menu the following parameters can be set:

Relay reference name.Relay nominal currents (phase and residual), to which the regulation are related.Primary nominal values, employed for measures relative to primary values.Measurements reading mode.CLP delay setting (reset delay).[1]

Information for settings:

Relay reference name.Alphanumeric mnemonic string (max 16 characters) useful for identifi cation of protected plant.

Relay nominal frequency fnThis nominal value must be set same as the frequency of the grid.Example: grid frequency fn = 50 HzRelay nominal frequency fn = 50 Hz

Relay phase nominal current - side H and side L (InH and InL)This nominal value must be set by means dip-switch to 1 A or 5 A, same as the secondary CTs nominal current.Dip-switches are located on board of the CPU module; the exhaustive treatment of Dip setup is described in the “6.5 SETTING NOMINAL CURRENTS In AND IEn” paragraph.

Rated primary phase current chosen as reference (Inref)CT’s primary current chosen by relay for amplitude compensation.

Rated primary phase current chosen as reference (RefSide)Choice of the reference side for the phase compensation currents

Number of sides for differential protection (NumSides)Setting the number of sides on which the differential protection operates (fi xed to 2)

Current matching type (MatchType)Setting the current compensation type (INT-internal, EXT-external CTs)

Protected object (ProtObj)Setting the type of protecting object (fi xed to TRANSF)

Relay residual current - side 1 and side 2 (IEn1 and IEn2)This nominal value must be set by means dip-switch to 1 A or 5 A, same as the secondary CT nomi-nal current. Dip-switch is located on board of the CPU module; the exhaustive treatment of Dip setup is de-scribed in the “6.5 SETTING NOMINAL CURRENTS In AND IEn” paragraph.

Phase CT primary currents - side H and side L (InpH and InpL)These parameters affect the measure of the phase currents when the primary measurement read-ing mode is selected. It must be programmed to the same value of the phase CT primary nominal current.

Example

The phase CT primary currents InpH and InpL must be set as: InpH = InpL = 500 A

Note 1 Parameter available at level 1 only

•••••

•

•

•

•

•

•

•

•

•

•

Es-In.ai

KTA = 500A/5A=100

KTA = 500A/5A=100

InH = 5 A

InL = 5 A

NT10

side H

side L

Es-In.ai

KTA = 500A/5A=100

KTA = 500A/5A=100

InH = 5 A

InL = 5 A

NT10

side H

side L


Residual CT primary currents - side 1 and side 2 (IEn1p and IEn2p)[1]

These parameters affect the measure of the residual currents when the primary measurement reading mode is selected. They must be programmed to the same value of the residual CT(s) pri-mary nominal currents.

Example 1

The residual CT primary currents IEn1p and IEn2p must be set as: IEn1p and IEn2p = 100 AExample 2

The residual CT primary currents IEn1p and IEn2p must be set as = 100 A

Measurement reading modeMeasures may be displayed according the following operating modes:

- With RELATIVE setting all measures are related to the nominal value,- With PRIMARY setting all measures are related to the primary value.

Transformer menuTransformer nominal power (Snt) 0.01...1000.00 MVA 0.01...9.99 MVA (step 0.01 MVA) 10...1000 MVA (step 1 MVA)

Transformer nominal voltage side H (VntH) 0.200...500.00 kV 0.200...0.999 kV (step 0.001 kV) 1...500 kV (step 1 kV)Transformer nominal current side H (IntH) [2] - (set by device)Transformer mismatching factor side H (mH)[3] -Transformer base current side H (IBH)[3] - InHTransformer grounding side H (GndH) In/OutTransformer connection side H (ConnH) Y/D/ZTransformer vector group side H (VectGroupH) 0Transformer nominal voltage side L (VntL) 0.200...500.00 kV 0.200...0.999 kV (step 0.001 kV) 1...500 kV (step 1 kV)Transformer nominal current side L (IntL) [3] -Transformer mismatching factor side L (mL)[3] -Transformer base current side L (IBL)[3] - InLTransformer grounding side L (GndL) In/OutTransformer connection side L (ConnL) y/d/zTransformer vector group side L (VectGroupL) 0-1-2-...11

Note 1 The residual current is acquired by means of a traditional CT also on the versions with the phase current inputs from sensors

Nota 2 Calculated by relay

•

•

Es1-IEn.ai

1x KTA = 100 A /1 A

52

IEn1= 1 A

1x KTA = 100 A /1 A IEn2= 1 A

NT10

Es1-IEn.ai

1x KTA = 100 A /1 A

52

IEn1= 1 A

1x KTA = 100 A /1 A IEn2= 1 A

NT10

Es2-IEn.ai

3xKTA = 100A / 5A

52

IEn = 5 A

3xKTA = 100A / 5A

IEn = 5 A

NT10

Es2-IEn.ai

3xKTA = 100A / 5A

52

IEn = 5 A

3xKTA = 100A / 5A

IEn = 5 A

NT10


Thermal protection with RTD thermometric probes - 26Preface

The measure of temperature is acquired by means of Pt100 (RTD Resistive Temperature sensing Devices) probed, connected to the MPT module.[1]

A direct thermal protection element with eight PT100 thermometric probes (RTD Resistive Thermal Device) provides protection against premature ageing or breakdown of the insulating materials through overheating.Thermal protection using thermometric probes offers greater reliability than Thermal overload-based indirect protection, since it is not infl uenced by inaccuracies in the time constant for the thermal model of the machinery and by variations in the surrounding temperature.

For each thermometric probe an alarm (ThALx, where x=1...8 points one of the eight probes) and one trip adjustable threshold is provided (Th>x), with adjustable operating time (tThALx and tTh>x>);if the measured temperature overcomes the threshold, the relative alarm and/or trip is issued when the timer expires.The adjustments are operable in °C.

The Pt100 probes detect the temperature in the range -50 °C...+250 °C (at 0 °C its resistance is 100 ohm); an alarm indicates any interruption or short-circuiting of the probe or related connections to the MPT module; the information is available inside the Read \ PT100 menu:

Ptx probe ON to point a measure inside the rangePtx probe LOW to point a measure lower the range (short circuit of probe and/or wires)Ptx probe HIGH to point a measure higher the range (breaking of probe and/or wires).

Self reset is performed when faults are cleared.

The measure of each probe is updated at 2 s time intervals.

All alarm and/or trip elements can be enabled or disabled by setting ON or OFF the ThALx Enable e Th>x Enable parameters inside the Set \ Profi le A(or B) \ Thermal protection with RTD thermo-metric probes - 26 \ PTx Probe \ ThALx Alarm (ThALx Trip) where x = 1...8.

Each trip threshold (Th>x) may be associated with the breaker failure (BF) function by setting ON the Th>xBF parameters inside the Set \ Profi le A(or B) \ Thermal protection with RTD thermometric probes - 26 \ PTx Probe \ ThALx Trip where x = 1...8.[2]

Note 1 The 26 menu is available when the MPT module is enabled

Note 2 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu.

•••

t - int-F26.ai

T (°C)

t

General operation time characteristic for thermal protection with RTD thermometric probes (26)

Th > x

tTh>x

tThALx

TRIP

t - int-F26.ai

T (°C)

t

General operation time characteristic for thermal protection with RTD thermometric probes (26)

Th > x

tTh>x

tThALx

TRIP

all-F26.aiGeneral logic diagram of the thermal elements - (26)

P t 1 0 0

T h y b u sM P T

A L A R M T R I P

Trip ElementAlarm Element

ThALx enable Th>x enableThALx Th>xt ThALx t Th>x

Th>xBFTrip Th>x &

Th>xBF

all-F26.aiGeneral logic diagram of the thermal elements - (26)

P t 1 0 0

T h y b u sM P T

A L A R M T R I P

Trip ElementAlarm Element

ThALx enable Th>x enableThALx Th>xt ThALx t Th>x

Th>xBFTrip Th>x &

Th>xBF

t - refresh-F26.ai

t

Pt1...8 update

P t 1 P t 2 P t 3 P t 4 P t 5 P t 6 P t 7 P t 8 P t 1

0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s

2 . 0 s

t - refresh-F26.ai

t

Pt1...8 update

P t 1 P t 2 P t 3 P t 4 P t 5 P t 6 P t 7 P t 8 P t 1

0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s 0 . 2 5 s

2 . 0 s


Fun-F26.ai

T° ≤ +2 4 5 . 0 ° CT° > P t x>

Pt xPt1Pt2Pt3Pt4Pt5Pt6Pt7Pt8

0T

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)T° > ThALx

P t1 0 0 - x Tr ip

P t1 0 0 - xAlarm

t Th>x

t ThALx

BF Enable (ON≡Enable)

Pt100 OK

Pt100 FAULT

Th>xBFTOWARDS BF LOGIC Th>x BF_OUT

TOWARDS DIAGNOSTICP t x> Diagnost ic

TRIP&

&

&

T° ≥ - 4 9 . 0 ° C

0TThALx-KThALx-L

Th>x-KTh>x-L

ThALx

Th>x

t ThALx

t Th>x

Logic diagram for thermal protection with RTD thermometric probes (26)

Pro_N

E1

THYB

US

PUTNISUBYHT TUPTUOSUBYHT

MPT

8T1

PT1 PT8MPT1 MPT8

PT7MPT7

PT6MPT6

PT5MPT5

PT2MPT2

PT3MPT3

PT4MPT4

T876

T7

T6

T5

11T212

13

15T316

17

20T4

2122

494847

444342

403938

353433

Pt100 probes (Pt1...Pt8)


Undercurrent - 37 - side H and side LPreface

One operation threshold, adjustable with adjustable delay.The threshold operates with defi nite time characteristic; it works with OR or AND logic and can be temporarily disabled by the keyboard command.

Operation and settingsEach of three currents compared with the setting valu (I(H)<def, for the H side and I(L)<def for the L side).With OR logic, when at least one of the three currents goes down the adjustable threshold the Start goes ON. After expiry of the associated operate timer (t(H)<def, t(H)<def) a trip command is issued; if instead the currents ts drops below the threshold, the element it is restored.With AND logic when all the three currents goes down the adjustable threshold the Start goes ON. After expiry of the associated operate timer a trip command is issued; if instead the currents ts drops below the threshold, the element it is restored.

The element can be enabled or disabled by setting ON or OFF the I< Enable parameter inside the Set \ Profi le A(or B) \ Undecurrent side H - 37 side H \ I(H)< Element \ Defi nite time.

All the parameters may be adjusted independently for both profi les A or B.The following block criteria is available:

Logical block (Block1)If the I<BLK1 enabling parameter is set to ON and a binary input is designed for logical block (I(H)<BLK1 and / or I(L)<BLK1), the protection is blocked off whenever the given input is active.The trip timer is held in reset condition, so the operate time counting starts when the input block goes down.[1] The enabling parameter is available inside the Set \ Profi le A(or B) \ Undercurrent - 37 side H - side H \ I< Element \ I(H)< Element \ Setpoints menu for the H side and the Set \ Profi le A(or B) \ Undercurrent - 37 side L - side L \ I< Element \ I(L)< Element \ Setpoints menu for the L side, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input INx) menus (INx matching).

Note 1 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR-ING section.

II<

t

t<

TRIP

General operation time characteristic curve for the undercurrent element - 37II<

t

t<

TRIP

General operation time characteristic curve for the undercurrent element - 37

all-F37.ai

IL1H, IL2H, IL3H

MMI

I(H)< Element

Disable 37 elements Start I(H)<Trip I(H)<

I< inhibition

t(H)< defI(H)<defState

Block1BLK1I(H)<

&

I(H)<BLK1 Start I(H)<&

General logic diagram of the undercurrent element - 37 all-F37.ai

IL1H, IL2H, IL3H

MMI

I(H)< Element

Disable 37 elements Start I(H)<Trip I(H)<

I< inhibition

t(H)< defI(H)<defState

Block1BLK1I(H)<

&

I(H)<BLK1 Start I(H)<&

General logic diagram of the undercurrent element - 37


Fun-F37_H.ai

RESET

t(H)<def

0T TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

t(H)<def

Star t I (H)<

I (H)<ST-K

Start I (H)<

I (H)<TR-K

I (H)<ST-L

I (H)<TR-L

Tr ip I (H)<

Tr ip I (H)<

BLK1I (H)<&

&&

&



I (H)<BLK1

Block1

Block1

≥1

IL1H

IL2H

IL3H

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


&

State

IL1H ≤ I(H)<def

I(H)<def

37 Inhib i t ion(ON≡ Inh ib i t )by MMI

Logic diagram concerning the I(H)< threshold of the undercurrent element - 37 side H

Fun-F37_L.ai

RESET

t(L)<def

0T TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

t(L)<def

Star t I (L)<

I (L)<ST-K

Start I (H)<

I (L)<TR-K

I (L)<ST-L

I (L)<TR-L

Tr ip I (H)<

Tr ip I (L)<

BLK1I (L)<&

&&

&



I (H)<BLK1

Block1

Block1

≥1

IL1H

IL2H

IL3H

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


&

State

IL1H ≤ I(H)<def

I(L)<def

37 Inhib i t ion(ON≡ Inh ib i t )by MMI

Logic diagram concerning the I(L)< threshold of the undercurrent element - 37 side L


Negative sequence overcurrent - 46 - side H and side L[1]

PrefaceProtection against unbalanced load can be used to protect sensitive to the feeder side of low-inten-sity failure detection (unipolar and bipolar). It is also possible to detect unipolar faults in low voltage side that do not cause a residual current at high voltage side (eg. case of vector group Dyn).Two element for H side and two element for L side are available.The fi rst element is selectable with defi nite or inverse time 60255-3/BS142 according to IEC and ANSI / IEEE, as well as I2t and for coordination with electromechanical relays and BT releases.The second threshold is defi nite time.For each threshold a reset time can be set useful to reduce the clearing time for intermittent faults.The fi rst threshold trip may be inhibited by start of the second threshold.

Operation and settingsThe negative sequence current is computed as:

I2=(IL1+e-j120°·IL2+e+j120°·IL3)/3

where e-j120°=-1/2-j√3/2, ej120°=-1/2+j√3/2.

The negative sequence current is compared with the setting values. Currents above the associated pickup value are detected and a start is issued. After expiry of the associated operate time (t2>, t2>>) a trip command is issued; if instead the current drops below the threshold, the element it is restored.The side H fi rst threshold (I2(H)>) may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t2(H)>inv / [(I2(H)/I2(H)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t2(H)>inv / [(I2(H)/I2(H)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t2(H)>inv / [(I2 (H)/I2(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t2(H)>inv · {0.01 / [(I2(H)/I2(H)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = t2(H)>inv · {3.922 / [(I2(H)/I2(H)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = t2(H)>inv · {5.64 / [(I2(H)/I2(H)>inv)2 - 1] + 0.024}I-squared-t (I 2t = K): t = 16 · t2(H)>inv / (I2(H)/I2(H)>inv)2

Electromechanical (EM): t = t2(H)>inv · {0.28 / [-0236 · (I2(H)/I2(H)>inv)-1 + 0.339]}

Similarly side L the fi rst threshold (I2(L)>)may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT) t = 0.14 · t2(L)>inv / [(I2(L)/I2(L)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t2(L)>inv / [(I2(L)/I2(L)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t2(L)>inv / [(I2 (L)/I2(L)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI) :t = t2(L)>inv · {0.01 / [(I2(L)/I2(L)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI) : t = t2(L)>inv · {3.922 / [(I2(L)/I2(L)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = t2(L)>inv · {5.64 / [(I2(L)/I2(L)>inv)2 - 1] + 0.024}I-squared-t (I 2t = K): t = 16 · t2(L)>inv / (I2(L)/I2(L)>inv)2

Electromechanical (EM): t = t2(L)>inv · {0.28 / [-0236 · (I2(L)/I2(L)>inv)-1 + 0.339]}

Where:t: operate timeI2(x)>inv: threshold setting (I2(H)>inv for side H and I2(L)>inv for side L)t2(x)>inv: operate time setting (t2(H)>inv for side H and t2(L)>inv for side L)I2(x): negative sequence current (I2(H) for side H and I2(L) for side L)The second threshold has a defi nite time characteristic (I2(H)>>def for side H and I2(L)>>def for side L).

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 I2(H)>inv, (I2(L)>inv)Minimum operate time: 0.1 sRange where the equation is valid:[2] 1.1 ≤ I2/I2>inv ≤ 20[3]

Note 1 in the diagrams the variables concerning the H side are identifi ed, the operation of the overcurrent protection of L side is similar to that of the 46 H side element.

Note 2 When the input value is more than 20 times the set point , the operate time is limited to the value corresponding to 20 times the set point


••••••••

••••••••

•••

I2I2>>

t 2>

t 2>>

I2>

t

TRIP

General operation time characteristic curve for the negative sequence overcurrent element - 46

I2I2>>

t 2>

t 2>>

I2>

t

TRIP

General operation time characteristic curve for the negative sequence overcurrent element - 46


For all defi nite time elements the upper limit for measuring is 50 InH, (InL).All overcurrent elements can be enabled or disabled by setting ON or OFF the I2(H)> Enable and/or I2(H)>> Enable (side H) and/or I2>> Enable parameters inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side H \ I2(H)> Element (I2(H)>> Element) \ Setpoints and/or Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side L \ I2(L)> Element (I2(L)>> Element) \ Set-points menus.The fi rst overcurrent element can be programmed with defi nite or inverse time characteristic by set-ting the I2(H)>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, I2t, EM) available inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 - side H \ I2> Element \ Setpoints for H sideand Set \ Profi le A(or B) \ Negative se-quence overcurrent - 46 - side HL \ I2> Element \ Setpoints menu for L side.[1]

The trip of I2(H)> element may be inhibited by the start of the second element (I2(H)>>) by set-ting ON the Disable I2(H)> by start I2(H)>> (I2(H)>disbyI2(H)>>) for side H and Dis-able I2(L)> by start I2(L)>> (I2(L)>disbyI2(L)>>) for side L parameter available inside the Set \ Profi le A(or B) \ Negative sequence overcurrent-46 - side H \ I2(H)>> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Negative sequence overcurrent-46 - side L \ I2(L)>> Element \ Setpoints menu for side L.All the parameters can be set separately for Profi le A and Profi le B.

An adjustable reset time delay is provided for every threshold (t2(H)>RES, t2(H)>>RES for side H and/or t2(L)>RES, t2(L)>>RES for side L).

Breaker failure (BF)Each element can produce the Breaker Failure output if the I2(H)> BF and/or I2(H)>> BF for side H and/or I2(L)> BF and/or I2(L)>> BF for side L parameters are set to ON. The param-eters are available inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 - side H \ I2(H)> Element (I2(H)>> Element) \ Setpoints I2(H)> BF and I2(H)>> BF for side H and/or Set \ Profi le A(or B) \ negative sequence overcurrent - 46 - side L \ I2(L)> Element (I2(L)>> Element) \ Set-points menus for side L.[2]

Second harmonic restraintFor all elements, a block from the second harmonic restraint may be set by setting ON the I2(H)>2ndh-REST, I2(H)>>2ndh-REST for side H and/or I2(L)>2ndh-REST, I2(L)>>2ndh-REST for side L parameters inside the Negative sequence overcurrent - 46 - side H \ I2(H)> Element (I2(H)>> Element) \ Setpoints I2(H)> BF and I2(H)>> BF for side H and/or Set \ Profi le A(or B) \ negative sequence overcurrent - 46 - side L \ I2(L)> Element (I2(L)>> Element) \ Setpoints menus for side Lmenus.

Cold Load Pickup (CLP)If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Element blocking the IECLP> Mode, IECLP>> Mode, IECLP>>> Mode parameters.If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the starting control criterion (circuit breaker closure).The operating mode may be select by setting (I2(H)CLP> Mode, I2(H)CLP>> Mode for side H and/or I2(L)CLP> Mode, I2(L)CLP>> Mode for side L) and CLP activation time (t2(H)CLP>, t2(H)CLP>> for side H and/or t2(L)CLP>, t2(L)CLP>> for side L) parameters, whereas the operating thresholds within the CLP may be adjusted inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side H\ I2(H)> Element,(I2(H)>> Element) \ Defi nite time (Inverse time) for side H and/or et \ Profi le A(or B) \ Negative sequence overcurrent - 46 side L\ I2(L)> Element,(I2(L)>> Element) \ Defi nite time (Inverse time) for side L menus.

Note 1 To enable the fi rst threshold (defi nite or inverse time) the state = ON parameter must be programmed in the corresponding submenu

Note 2 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu

Timers-F46.ai

I2> Start

I2> Trip

t2> t2>

RESET

INPUT

t2>RES t2>RES t2>RES

t

I2> element timers - 46 Timers-F46.ai

I2> Start

I2> Trip

t2> t2>

RESET

INPUT

t2>RES t2>RES t2>RES

t

I2> element timers - 46


For both thresholds the following block criteria are available:Logical block (Block1)

If the I2(H)>BLK1 and/or I2(H)>>BLK1 parameters for side H and/or I2(L)>BLK1 and/or I2(L)>>BLK1 for side L enabling parameters are set to ON and a binary input is designed for logi-cal block (Block1), the concerning element is blocked off whenever the given input is active.[1] The enabling parameters are available inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side H \ I2(H)> Element (I2(H)>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side L \ I2(L)> Element (I2(L)>> Element) \ Setpoints menus for side L, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input INx menus.

Selective block (Block2)All along the protective elements the selective block may be set.The logic selectivity function may be performed by means any combination of the following I/O:

One committed pilot wire input (BLIN1).One or more binary inputs designed for input selective block.One committed pilot wire output (BLOUT1).One or more output relays designed for output selective block.

Only when the committed pilot wire are used the continuity check of the pilot wire link is active.

Note 1 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR-ING section

••••

all-F46.ai

Note: inside all the diagram the H or L index , which identify the variables on the side of H or L,are not indicated

IL1

IL2

IL3

IL1

IL2

IL3

BLK1I2>>

I2>> Element

BLK2OUT

Start I2>>

Start I2>>

Trip I2>>

&

I2> disbyI>>

&

I2>>BLK1

&

I2>>BLK2IN

t2>> def I2CLP>> defI2>> def StateI2CLP>>Mode t2CLP>> t2>>RESI2>> Enable

I2> inhibition

Block1

BLK1I2>

CLPI2>

CLPI2>>

I2> Element

BLK2OUT

BLK2INI2>

BLK2INI>>

Start I2>Trip I2>

&

I2>BLK1

Block2 &

I2>BLK2IN

Start I2ndh> &

I2>2ndh-REST

I2>BLK2OUT

Start I2ndh> &

I2>>2ndh-REST

I2>>BFI2>> Trip &

I2>>BF

I2>BFTrip I2> &

I2>BF

Start I2> &

I2>>BLK2OUT

Start I2>> &

Block1

Block2

t2> def I2CLP> defI2> def State State t2> inv I2CLP> invI2> invI2>Curve I2CLP>Mode t2CLP> t2>RESI2> Enable

Start I2>&

Start I2>>&

Start I2>>&

Start I2>&

General logic diagram of the negative sequence overcurrent elements - 46


Use of committed pilot wire input BLIN1:The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) \ sides H/L \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputs: If the I2(H)>BLK2IN, I2(H)>>BLK2IN for side H and/or I2(L)>>BLK2IN, I2(L)>BLK2IN for side L parameters are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[1] The enable I2(H)>BLK2IN, I2(H)>>BLK2IN for side H and/or I2(L)>BLK2IN, I2(L)>>BLK2IN for side L parameters are available inside the Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side H \ I2(H)> Element (I2(H)>> Ele-ment) \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side L \ I2(L)> Element (I2(L)>> Element) \ Setpoints for side L menus , while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input INx menus (IN1... matching).

Use of committed pilot wire output BLOUT1:The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter (OFF - ON IPh - ON IPh/IE - ON IE) inside Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menus.

Use of output relay (K1...K6):If the I2(H)>BLK2OUT and/or I2(H)>>BLK2OUT for side H and I2(L)>BLK2OUT and/or I2(L)>>BLK2OUT for side L enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (StartI2(H)>, Start I2(H)>> for side H and StartI2(L)>, Start I2(L)>> for side L) becomes active. The enable I2(H)>BLK2OUT and/or I2(H)>>BLK2OUT parameters for side H and I2(L)>BLK2OUT and/or I2(L)>>BLK2OUT for side L (ON or OFF) are available inside the Set \ Profi le A(or B) \ Negative sequence overcur-rent - 46 side H \ I2(H)> Element (I2(H)>> Element) \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence overcurrent - 46 side L \ I2(L)> Element (I2>> Element) \ Setpoints for side L menus, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profi le A(or B) \ Selective block-BLOCK2\ Selective block OUT menu.

Internal selective block (Block4)As well as to send or receiving a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[2]

The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the I2(H)>BLK4, I2(H)>>BLK4, and/or I2(H)>>>BLK4, for side H and I2(L)>BLK4, I2(L)>>BLK4, I2(L)>>>BLK4, for side L parameters (virtual input and output common to all protective thresholds); the following operating modes are available:

IN - the element is enabled to receive the selective block from an internal input.OUT - the element is enabled to send the selective block to an internal output.OFF - the element is disabled to send/receive the internal selective block.

Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided.The internal selective block can work together with an external selective block from other protective relays (Block2).

Note 1 The exhaustive treatment of the selective block (Block 2) function may be found in the “Selective Block” paragraph inside CONTROL AND MONITORING section

Nota 2 The exhaustive treatment of the internal selective block (Block 4) function may be found in the “Internal selective block” paragraph inside CONTROL AND MONITORING section.

•

•

•

•

•••


Fun_50-51S1.ai

I 2

t 2>RES

T0

RESET

t 2 >

0T

≥1

≥1

t 2>def

t 2>inv

t 2>RES

Star t I2>

Tr ip I2>

CB-State

Start I2ndh>

ON≡ Inh ib i t ( f rom I2>> e lement)

ON≡Enable I2> overcurrent e lement

(P ickup wi th in CLP)

(P ickup outs ide CLP)

I2> inh ib i t ion

Block1, Block2, Block4

&

T 0t 2CLP>

&

2nd harmonic restra int enable (ON≡Enable) I2>2ndh-REST

I2CLP>Mode

I 2 C L P >def

t 2 C L P >

I 2 C L P >inv

I 2 ≥ I2>

BF Enable (ON≡Enable) I2>BF

towards BF logic I2> BF&Trip I2>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

I2> Curve

0T

ABC

A =“1”A =“0 or OFF”

Output t 2CLP>

I2> Enable

I2> Negative sequence overcurrent element (46) block diagram

t2CLP>

CB State CB OPEN CB CLOSED CB OPEN

Output t2CLP>

t

0.1 s

HIGH THRESHOLD/BLOCK

LOW THRESHOLD/UNBLOCK


A = ON - Change settingB = OFFC = ON - Element blocking

I2>TR-K I2>TR-L

I2>ST-L I2>ST-K

≥1 CLP I2>

&

State

I2>inv

I 2 ≥ I2>def

I 2 ≥ I2>inv

I2>def

&

State


General logic diagram of the negative sequence overcurrent elements - 46


See function diagram on next page


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I2>BLK1


Pi lot wire input

& I2>BLK2IN

BLK2IN-Iph

Start I 2>

Trip I 2>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

Block2 output

Block4-in-out

tB-KtB-L

FROM GROUND PROTECTIONS


FROM PHASE PROTECTIONS

OFFON IPhON IPh/IEON IE

BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1

Binary input INx (x=1,2)T 0

Logic INx t ON

INx t ON

INx t OFF


BLK1 I2>

BLK4IN I2>

&

&

BLK2IN I2>&

&Enable (ON≡Enable)

Block1

Block1

Block4

Block2

Block1

Block1

≥1 Block1, Block2, Block4


Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the first element (I2>)


&Block2 output(ON≡Enable)

I2>BLK2OUT

Start I2>

Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx

A = OFFB = ON IPhC = ON IPh/IED = ON IE

BLK2OUT-IPh-K BLK2OUT-IPh-L

BLK2OUT-IPh/IE-K BLK2OUT-IPh/IE-L

BLK2OUT-IE-K BLK2OUT-IE-L

I(H)>> Block2 OUTI(H)>>> Block2 OUT

DthAL1(H) Block2 OUTDthAL2(H) Block2 OUT

Dth>(H) Block2 OUTDthAL1(L) Block2 OUTDthAL2(L) Block2 OUT

I(L)> Block2 OUTI(L)>> Block2 OUT

I(L)>>> Block2 OUT87T Block2 OUT

Dth>(L) Block2 OUT

I2(H)> Block2 OUTI2(H)>> Block2 OUT

I21(H)> Block2 OUTI21(L)> Block2 OUT

I2(L)> Block2 OUTI2(L)>> Block2 OUT

≥1Start IE>>>


IE>>>BLK2OUT

IE(H)> Block2 OUTIE(H)>> Block2 OUT

IE1>> Block2 OUTIE1>>> Block2 OUT


64REF(H)> Block2 OUT64REF(L)> Block2 OUT

IE2> Block2 OUT

IE1> Block2 OUT

IE(H)>> Block2 OUTIE(L)> Block2 OUT

IE(L)>> Block2 OUTIE(L)>> Block2 OUT

Block4-in-out-diagramSchema funzionale relativo ai segnali d’uscita del blocco selettivo interno (Block4)

t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4

A = INB = OFFC = OUT


I2>BLK4

Start I2>> CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4

Start IE1>>> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A

I(H)> Block4I(H)>> Block4

I(H)>>> Block4

DthAL1(H) Block4DthAL2(H) Block4

Dth>(H) Block4DthAL1(L) Block4DthAL2(L) Block4

I(L)> Block4I(L)>> Block4

I(L)>>> Block487T Block4

Dth>(L) Block4

I2(H)> Block4I2(H)>> Block4

I21(H)> Block4I21(L)> Block4

I2(L)> Block4I2(L)>> Block4

IE(H)> Block4IE(H)>> Block4

IE1>> Block4IE1>>> Block4


64REF(H)> Block464REF(L)> Block4

IE2> Block4

IE1> Block4

IE(H)>>> Block4IE(L)> Block4

IE(L)>> Block4IE(L)>>> Block4


Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the first element (I2>)


46S2.ai

I 2

t 2>>RES

T0

RESET

t 2>>def

0T

≥1

t 2>>deft 2>>RES

Star t I2>>

Tr ip I2>>

CB-State

Start I2ndh>

ON≡Enable I2>> overcurrent e lement




&

T 0t 2CLP>

&

2nd harmonic restra int enable (ON≡Enable) I2>>2ndh-REST

I2CLP>>Mode

I 2 C L P >>def

t 2 C L P >

I 2 ≥ I2>>

BF Enable (ON≡Enable) I2>>BF

towards BF logic I2>> BF&Trip I2>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

Output t 2CLP>

I2>> Enable

I2>> Negative sequence overcurrent element (46) block diagram

t2CLP>>


Output t2CLP>>

t

0.1 s





I2>>TR-K I2>>TR-L

I2>>ST-L I2>>ST-K

≥1 CLP I2>>

&

State

I 2 ≥ I2>def

I2>>def


General logic diagram of the second element of negative sequence overcurrent protection - 46


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I2>>BLK1


Pi lot wire input

& I2>>BLK2IN

BLK2IN-Iph

Start I 2>>

Trip I 2>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 I2>>

BLK4IN I2>>

&

&

BLK2IN I2>>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the second element (I2>)



I2>>BLK2OUT

Start I2>>

Block2out diagram

Pilot wire outputBLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT



Block4-in-out-diagramInternal selective block (Block4)

t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



I2>>BLK4


“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the second element (I2>)


Negative sequence current / positive sequence current ratio - I2/I1 - side H and side L[1]

PrefaceOne adjustable operation threshold (I21(H) for side H and I21(L)> for side L) with defi nite time adjustable delay.

Operation and settingsThe negative and positive sequence currents are computed as:

I1=(IL1+e+j120°·IL2+e-j120°·IL3)/3I2=(IL1+e-j120°·IL2+e+j120°·IL3)/3

where e-j120°=-1/2-j√3/2, ej120°=-1/2+j√3/2.

The negative sequence-positive sequence currents ratio is compared with the setting value. Ratio above the associated pickup value is detected and a start is issued. After expiry of the associated operate time ((t21(H)>def for side H and t21(L)def> for side L) a trip command is issued; if instead the it drops below the threshold, the element it is restored.

The element can be enabled or disabled by setting ON or OFF the State parameter inside the Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element \ Defi nite time for side H and Set \ Profi le A(or B) \ Negative sequence current/posi-tive sequence current ratio-I2/I1 side L \ I21(L)> Element \ Defi nite time for side L menu.

Breaker failure (BF)The element can produce the Breaker Failure output if the I21(H)> BF for side H and I21(L)> BF for side L parameter is set to ON. The parameter is available inside the Set \ Profi le A(or B) \ Nega-tive sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side L \ I21(L)> Element \ Setpoints for side L menus.[2]

Second harmonic restraintA block from the second harmonic restraint may be set by setting ON the parameter inside the Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side L \ I21(L)> Element \ Setpoints for side L menu.

Cold Load Pickup (CLP)If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure.If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may

Nota 1 Negli schemi sono indicati gli indici H che identifi cano le variabili relative al lato H; il funzionamento della protezione di rapporto corrente inversa/corrente diretta lato L è analogo a quello della funzione I21 lato H.


t - int- I2- I1.aiI2 /I1

t 21>

I21>

t

General operation time characteristic for Negative sequence-positive sequence ratio element - I2/I1

TRIP

Inside all the diagram the H or L index are not indicated

t - int- I2- I1.aiI2 /I1

t 21>

I21>

t

General operation time characteristic for Negative sequence-positive sequence ratio element - I2/I1

TRIP


I2/I1

(I2/I1)> Element

Start I21>

Start I21>

Trip I21>

t21>def I21CLP>Mode t21CLP>ModeI21>def State

Block1

BLK1 I21>&

I21BLK1&

Start I2ndh> &

I21>2ndh-REST

General logic diagram of the negative sequence-positive sequence ratio element - I2/I1


I2/I1

(I2/I1)> Element

Start I21>

Start I21>

Trip I21>

t21>def I21CLP>Mode t21CLP>ModeI21>def State

Block1

BLK1 I21>&

I21BLK1&

Start I2ndh> &

I21>2ndh-REST

General logic diagram of the negative sequence-positive sequence ratio element - I2/I1



be changed for an adjustable time interval, starting from the circuit breaker closure.The operating mode may be select by setting I21(H)CLP> Mode and CLP activation time t21(H)CLP> for side H and I21(L)CLP> Mode, CLP t21(L)CLP> for side L may be adjusted inside the Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element \ Defi nite time for side H and Set \ Profi le A(or B) \ Negative sequence cur-rent/positive sequence current ratio-I2/I1 side L \ I21(L)> Element \ Defi nite time for side L

CTs supervisionThe element may be blocked when the CT supervision function become active to avoid unwanted trips following any faults on CTs an amperometric input circuits;[1]the 74CT(H) Enable for side H and 74CT(L) Enable for side L parameter may be set to ON inside the Set \ CT supervision TA-74CT side H for side H and Set \ CT supervision TA-74CT side L for side L menù.The parameter may be adjusted independently for both profi les A or B.

Logical block (Block1)If the I21(H)>BLK1 for side H and I21(L)>BLK1 for side L enabling parameters are set to ON and a binary input is designed for logical block (Block1), the protection is blocked off whenever the given input is active.The trip timer is held in reset condition, so the operate time counting starts when the input block goes down.[2] The enabling parameters are available inside the Set \ Profi le A(or B) \ Negative se-quence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side L \ I21(L)> Element \ Setpoints for side L menu, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input INx) menus (INx matching).




Use of committed pilot wire input BLIN1:The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) \ sides H/L \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputs: If the I21(H)>BLK2IN, I21(H)>>BLK2IN for side H and/or I21(L)>>BLK2IN, I21(L)>BLK2IN for side L parameters are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[3] The enable I21(H)>BLK2IN, I21(H)>>BLK2IN for side H and/or I21(L)>BLK2IN, I21(L)>>BLK2IN for side L param-eters are available inside the Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element (I21(H)>> Element) \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side L \ I21(L)> Element (I21(L)>> Element) \ Setpoints for side L menus , while the Block2 Iph and Block2 Iph/IE func-tions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input INx menus (IN1... matching).


Use of output relay (K1...K6):If the I21(H)>BLK2OUT and/or I21(H)>>BLK2OUT for side H and I21(L)>BLK2OUT and/or I21(L)>>BLK2OUT for side L enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (StartI21(H)>, Start I21(H)>> for side H and StartI21(L)>, Start I21(L)>> for side L) becomes active. The enable I21(H)>BLK2OUT and/or I21(H)>>BLK2OUT parameters for side H and I21(L)>BLK2OUT and/or I21(L)>>BLK2OUT for side L (ON or OFF) are available inside the Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side H \ I21(H)> Element (I21(H)>> Element) \ Setpoints for side H and Set \ Profi le A(or B) \ Negative sequence current/positive sequence current ratio-I2/I1 side L \ I21(L)> Element (I21>> Element) \ Setpoints for side L menus, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menu.

Note 1 The setting may be found in the “CT supervision ” paragraph inside CONTROL AND MONITORING section

Note 2 The description of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITORING sec-tion


••••

•

•

•

•



The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the I21(H)>BLK4, I21(H)>>BLK4, and/or I21(H)>>>BLK4, for side H and I21(L)>BLK4, I21(L)>>BLK4, I21(L)>>>BLK4, for side L parameters (virtual input and output common to all protective thresholds); the following operating modes are available:




•••

I2-I1S1.ai

( I2 / I1 )

RESET

t 2 >

0T

≥1

t 21>def

Star t I21>

Tr ip I21>

CB-State

Start I2ndh>




T 0t 21CLP>

&

2nd harmonic restra int enable (ON≡Enable) I21>2ndh-REST

I21>CLP>Mode

t 2 1C L P >

BF Enable (ON≡Enable)I21>BF

towards BF logic I21> BF&Trip I21>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

Output t 21CLP>

( I2 / I1 )> element block diagram

t21CLP>


Output t21CLP>

t

0.1 s





I21>TR-K I21>TR-L

I21>ST-K I21)>ST-L

≥1 CLP I21>

( I2 / I1 ) ≥ ( I2 / I1 )> def

I21> def

I21 ≥ I21 C L P > def

I21CLP> def

&

State

Negative sequence-positive sequence ratio element (I2/I1) - Logic diagram



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I21>BLK1


Pi lot wire input

& I21>BLK2IN

BLK2IN-Iph

Start I 21>

Trip I 21>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 I21>

BLK4IN I21>

&

&

BLK2IN I21>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the I21>element



I21>BLK2OUT

Start I21>

Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT



Block4-in-out-diagram

t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



I21>BLK4

Start I21> CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Negative sequence overcurrent (46) - Logic diagram of the blocking signals concerning the I21>element


Thermal image - 49 side H and side L[1]

PrefaceIt is a overload protection with memory capability and three setpoints, used to protect lines and transformers against thermal overload.The phase currents are used into an algorithm reproducing a thermal replica according the IEC 60255-8 standard taking into account the Joule losses and the cooling effect due to the load reduc-tion; in this way the previous history and the overload are taken into account.The thermal protection can be adapted to the different features of motors by setting the thermal heating t+ and cooling t- constants ( the t+ constant refers to motor running condition, while the t- constant, always higher than t+, refers to stop condition).The trip element has an adjustable threshold; with 1.2 DθB setting (ie 1.2 times the overtemperature corresponding to the nominal operation condition) the corresponding tripping current IB is 1.1 since the temperature rise is proportional to the square of the current.The 49 element is provided with two further thresholds DθAL1 and DθAL2, lower than the previous one. These thresholds, both adjustable, provide an alarm signal to draw attention in the event of anoma-lous heating, without disconnect the protected device. One of the above thresholds can be used to prevent refeeding of the system when heating approaches the trip conditions since the additional heating brought on by the inrush currents would cause the protection to operate..

Operation and settingsThe thermal current used for thermal image calculation is:

Ith(H) = max (IL1H, IL2H, IL3H) for the 49 protection side H andIth(L) = max (IL1L, IL2L, IL3L) for the 49 protection side L

If the second harmonic restraint of the differential element or the CLP function with setting threshold change is enabled, for the time when the second harmonic restraint or the CLP function is activated, the thermal current used for thermal image calculation becomes:

Ith(H) = ILMAX(H)/KINR(H) = max (IL1H, IL2H, IL3H) / KINR(H) for side H andIth(L) = ILMAX(L)/KINR(L) = max (IL1L, IL2L, IL3L) / KINR(L) for side L

where KINR(H) and KINR(H) adjustable parameter (1.0...3.0), useful to reduce the thermal current during the transformer energization (inrush). According to a single-body thermal model, the thermal image is based on the differential equation:

dDθ(H)/dt+Dθ(H)/T=(Ith(H)/Int(H))2/T(L) for side H anddDθ(L)/dt+Dθ(L)/T=(Ith(L)/Int(L))2/T(L) for side L

where Dθ(H) e Dθ(L) are the system thermal state as a percentage of base thermal capacity DθB(H) and DθB(L) corresponding to the base current of the protected transformer IB[2] with transformer rated currents Int(H), Int(L) and T(H), T(L) are the thermal time constants (the same for heating and cooling) for side H and side L.When the thermal image Dθ(H) on side H overcomes the threshold Dθ(H) > a trip is issued.Similarly when the thermal image Dθ(L) on side L overcomes the threshold Dθ(L) >.

Note 1 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the protection of thermal imaging side L is similar to that of the 49 side function H.

Note 2 Assuming that the secondary rated current of the line CT’s equals the rated current of the NA20 relay, as usually happens, the IB value is the ratio between the rated current of the protected component (line, transformer,...) and the primary rated current of the CT’s.

I th/Int

p= 0

p=1

10 20

t

General operation time characteristic for the thermal image elements - 49

TRIP

Inside all the diagram the H or L index are not shown

D th> I th/Int

p= 0

p=1

10 20

t

General operation time characteristic for the thermal image elements - 49

TRIP

Inside all the diagram the H or L index are not shown

D th>


The operating characteristic (IEC 60255-8) is:

t = T(H)*ln{[(Ith(H)/Int(H))2-p(H)2)]/[(Ith(H)/Int)2-1.2]} (1) for side H t = T(L)*ln{[(Ith(L)/Int )2-p(L)2)]/[(Ith(L)/Int)2-1.2]} (1) for side L [1]

where t is the operate time, ln is the natural logarithm, p(H) = Ithp(H)/Int(H), p(L) = Ithp(L)/Int(L) is the prior load respectively on side H and side L and with Ithp(H), Ithp(L) the corresponding equivalent thermal current before the overload.The range where the equation is valid is 1.1Int ≤ Ith ≤ 10Int; for 10Int ≤ Ith ≤ 20Int) the operating time is fi xed to a value corresponding to the (1) with Ith=10Int. The upper limit is 20Int.

If the CLP function (Cold Load Pick-up) is enabled for 49 blocking, the thermal image is blocked for an adjustable time interval, starting from the circuit breaker closure.[1] The operating mode parameter may be select by setting ON-Element blocking the DThCLP Mode parameter inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ Common confi guration side H for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ Common confi guration side L for side L menu.

The operating mode parameter may be select by setting ON-Element blocking the DThCLP(H) Mode parameter for side H and the DThCLP(L) Mode parameter for side L inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ Common confi guration menu for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ Common confi guration menu for side L.

If the CLP function (Cold Load Pick-up) is enabled for threshold change, the equivalent thermal current may be decreased by means a KINR(H) factor (side H) or KINR(L) factor (side L) for an ad-justable time interval, starting from the circuit breaker closure.[2] The operating mode parameter may be select by setting ON-Change setting the DThCLP(H) Mode parameter (side H) and DThCLP(L) Mode parameter (side L) inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ Common confi guration menu for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ Common confi guration menu for side L.

All elements can be enabled or disabled by setting ON or OFF the DThetaAL1(H) En-able, DThetaAL2(H) Enable and/or DTheta(H)> Enable parameters for side H and the DThetaAL1(L) Enable, DThetaAL2(L) Enable and/or DTheta(L)> Enable parameters for side L inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ DthAL1(H) Element (DthAL2(H) Element, Dth(H)> Element) menus for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ DthAL1(L) Element (DthAL2(L) Element, Dth(L)> Element) menus for side L.

Note 1 The CLP function (Cold Load Pick-up) with blocking of the 49 element has priority compared with the second harmonic restraint function, so, if the equivalent thermal current is enabled, the latter is not reduced when a second harmonic restraint is active.

Note 2 The CLP function (Cold Load Pick-up) with threshold change of the 49 element has priority compared with the second harmonic restraint func-tion, so, if the equivalent thermal current is enabled, the latter is not reduced when a second harmonic restraint is active.

all-F49.aiGeneral logic diagram of the thermal image elements - 49

KINR T DthIN DthCLP Mode Dth2ndh REST tDthCLP

Common configuration

IthDth> Element

Trip DTh>

DTh> Enable DTh>

Trip DTh>Dth>BF

&

Dth>BF

BLK4OUTDth>BLK4

Start I> &

BLK2OUTDth>BLK2OUT

&Trip Dth>

Trip Dth>BLK2INDth>Block2 &

Dth>BLK2IN

&

DthAL1 Element

DThAL1

DThAL1

DThAL1DThAL1 Enable

Ith

BLK4OUTDthAL1BLK4

&

BLK2OUTDthAL1BLK2OUT

&

Trip Dth>

Block1 BLK1DthAL1&

DthAL1BLK1

&Dth>AL1

DthAL1BLK2INDthAL1Block2 &

DthAL1BLK2IN

&


DthAL2BLK2IN

&

DthAL2 Element

DThAL2

DThAL2DThAL2 Enable

Ith

BLK4OUTDthAL2BLK4

&


&

Block1BLK1DthAL2&

DthAL2BLK1

&

Dth>AL2

Dth>AL2

Dth>AL2Block1 BLK1Dth>&

Dth>BLK1

Trip Dth> &

& 50-51 inh ib i t ion

Dth>disby50-51

all-F49.aiGeneral logic diagram of the thermal image elements - 49

KINR T DthIN DthCLP Mode Dth2ndh REST tDthCLP


IthDth> Element

Trip DTh>

DTh> Enable DTh>

Trip DTh>Dth>BF

&

Dth>BF

BLK4OUTDth>BLK4

Start I> &

BLK2OUTDth>BLK2OUT

&Trip Dth>

Trip Dth>BLK2INDth>Block2 &

Dth>BLK2IN

&

DthAL1 Element

DThAL1

DThAL1

DThAL1DThAL1 Enable

Ith

BLK4OUTDthAL1BLK4

&


&

Trip Dth>

Block1 BLK1DthAL1&

DthAL1BLK1

&Dth>AL1


DthAL1BLK2IN

&


DthAL2BLK2IN

&

DthAL2 Element

DThAL2

DThAL2DThAL2 Enable

Ith

BLK4OUTDthAL2BLK4

&


&

Block1BLK1DthAL2&

DthAL2BLK1

&

Dth>AL2

Dth>AL2

Dth>AL2Block1 BLK1Dth>&

Dth>BLK1

Trip Dth> &

& 50-51 inh ib i t ion

Dth>disby50-51


The trip element (Dth> side H and side L) may be inhibited when a start of at least one of the over-current element (50/51) is active, if the Dth(H)>disby50-51 parameter for side H and/or the Dth(L)>disby50-51 parameter for side L is set ON inside the Set \ Profi le A(or B) \Thermal im-age-49 side H \ Dth(H)> Element menu for side H and Set \ Profi le A(or B) \Thermal image-49 side L \ Dth(L)> Element menu for side L. The DθIN parameter sets a minimum level of previous thermal image Dθp when the protection relay is powered or when a remote (binary input) or local (keyboard or ThySetter) command is issued.The DthIN(H) parameter for side H and DthIN(L) parameter for side L may be adjusted inside the Set \ Profi le A(or B) \ Thermal image-49 side H\ Common confi guration menu for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ Common confi guration menu for side L.To active the DθIN preset value remotely, a binary input must be programmed as Preset DTheta H function for side H and Preset DTheta L function for side L or DTheta H-L for both sides inside the Set \ Inputs \ Binary input IN1, Binary input INx menu.

Breaker failure (BF)The trip element can produce the Breaker Failure output if the Dth> BF parameters is set to ON. The parameter is available inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ Dth(H)> Element menu for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ Dth(L)> Element menu for side L.[1]

For every threshold the following block criteria are available:Logical block (Block1)

If the DthAL1(H)BLK1, DthAL2(H)BLK1 and/or Dth (H)>BLK1 for side H and DthAL1(L)BLK1, DthAL2(L)BLK1 and/or Dth (L)>BLK1 for side L enabling parameters are set to ON and a bi-nary input is designed for logical block (Block1), the concerning element is blocked off whenev-er the given input is active.[2] The enabling parameters are available inside the Set \ Profi le A(or B)\Thermal image-49 side H \ DthAL1(H) Element (DthAL2(H) Element, Dth(H)> Element) menus for side H and Set \ Profi le A(or B)\Thermal image-49 side L \ DthAL1(L) Element (DthAL2(L) Element, Dth(L)> Element) menus for side L, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.




Use of committed pilot wire input BLIN1:The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 sides H/L \ Selective block IN menus.

Use of binary inputs:If the DthAL1(H)BLK2IN, DthAL2(H)BLK2IN and/or Dth(H)>BLK2IN parameter are are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[3] The enable DthAL1(H)BLK2IN, DthAL2(H)BLK2IN and/or Dth(H)>BLK2IN parameters are available inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ DthAL1(H) Element, DthAL2(H) Element, Dth(H)> Element menus for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ DthAL1(L) Element, DthAL2(L) Element, Dth(L)> Element menus for side L, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or IN2 matching).

Use of committed pilot wire output BLOUT1:The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter inside Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block OUT menus.

Use of output relay (K1...K6):If the DthAL1(H)BLK2OUT, DthAL2(H)BLK2OUT and/or Dth(H)>BLK2OUT enable param-eters for side H and DthAL1(L)BLK2OUT, DthAL2(L)BLK2OUT and/or Dth(L)>BLK2OUT en-able parameters for side L are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection ele-ment (BLK2OUT-Iph/IE), whenever the given element (DthAL1, DthAL2 e/o Dth>) becomes active. The DthAL1(H)BLK2OUT, DthAL2(H)BLK2OUT and/or Dth(H)>BLK2OUT enable param-eters for side H and DthAL1(L)BLK2OUT, DthAL2(L)BLK2OUT and/or Dth(L)>BLK2OUT




••••

•

•

•

•


enable parameters for side L are available inside the Set \ Profi le A(or B) \ Thermal image-49 side H \ DthAL1(H) Element (DthAL2(H) Element, Dth(H)> Element) menus for side H and Set \ Profi le A(or B) \ Thermal image-49 side L \ DthAL1(L) Element (DthAL2(L) Element, Dth(L)> Element) menus for side L, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L and/or BLK2OUT-IE-L) must be set inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menus.


The internal selective block of one or more element concerning the thermal image function may be enabled/disabled by means the DthAL1(H)BLK4, DthAL2(H)BLK4, and/or Dth(H)>BLK4 for side H and/or DthAL1(L)BLK4, DthAL2(L)BLK4, and/or Dth(L)>BLK4 for side L parameters (virtual input and output common to all protective thresholds); the following operating modes are available:




•••


Fun_49_AL1.ai


&dDθ/dt + Dθ/T = (Ith/IB)2/T

Init DTheta

Dθ ≥ DthAL1

DthAL1

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


I th

≥1

K INR

DthAL1

CB-State

Start I2ndh>

ON≡Enable e lement



Pickup - CLP set t ing change


T 0t DthCLP

&2nd harmonic restra int enable (ON≡Enable) Dth2ndh-REST

DthCLPMode

t D t h C L P

I th ∙ K INR

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

Output t DthCLP

DthAL1 Enable

DThhAL1 thermal image (49) block diagram

tDthCLP


Output tDthCLP

t

0.1 s





DthAL1-LDthAL1-K

≥1 CLP Dth

T DthIN

Thermal image (49) - Logic diagram of the first alarm threshold



DthAL1BLK1DthAL1

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE


Pi lot wire input

& DthAL1BLK2IN

BLK2IN-Iph

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1DthAL1

BLK4IN DthAL1

&

&

BLK2IN DthAL1&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Thermal image (49) - Logic diagram of the blocking signals concerning the first alarm element


Block2 output


DthAL1BLK2OUT

DthAL1

Pi lot wire outputBLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



DthAL1>BLK4

DthAL1 CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Thermal image (49) - Logic diagram of the blocking signals concerning the first alarm element


Fun_49_AL2.ai



Init DTheta

Dθ ≥ DthAL2

DthAL2

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


I th

≥1

K INR

DthAL2

CB-State

Start I2ndh>






T 0t DthCLP


DthCLPMode

t D t h C L P

I th ∙ K INR

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

Output t DthCLP

DthAL2 Enable


tDthCLP


Output tDthCLP

t

0.1 s





DthAL2-LDthAL2-K

≥1 CLP Dth

T DthIN

Thermal image (49) - Logic diagram of the second alarm threshold



DthAL2BLK1DthAL2

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE


Pi lot wire input

& DthAL2BLK2IN

BLK2IN-Iph

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1DthAL2

BLK4IN DthAL2

&

&

BLK2IN DthAL2&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Thermal image (49) - Logic diagram of the blocking signals concerning the second alarm element


Block2 output


DthAL2BLK2OUT

DthAL2


TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



DthAL2>BLK4

DthAL2 CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Thermal image (49) - Logic diagram of the blocking signals concerning the second alarm element


Fun_49_Dth.ai



Init DTheta

Dθ ≥ DthAL1

Dth>

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


I th

≥1

K INR

Dth>

CB-State

Start I2ndh>






T 0t DthCLP


DthCLPMode

t D t h C L P

I th ∙ K INR

BF Enable (ON≡Enable) Dth>BF

towards BF logic Dth> BF&Trip Dth>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

Output t DthCLP

Dth> Enable


tDthCLP


Output tDthCLP

t

0.1 s





Dth>-LDth>-K

≥1 CLP Dth

f rom 50/51 e lement (ON≡ Inh ib i t ) 50/51 inh ib i t ion

&

50/51block enable (ON≡Enable) Dth>disby50-51

T DthIN

Thermal image (49) - Logic diagram of the trip threshold



Dth>BLK1Dth>

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE


Pi lot wire input

& Dth>BLK2IN

BLK2IN-Iph

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1Dth>

BLK4IN Dth>

&

&

BLK2IN Dth>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Thermal image (49) - Logic diagram of the blocking signals concerning the trip element


Block2 output


Dth>BLK2OUT

Dth>


TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



Dth>BLK4

Dth> CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Thermal image (49) - Logic diagram of the blocking signals concerning the trip element


F_49-1min-Char.ai

11.1

2 3 4 5 6 7 8 9 10 20Ith /IB0.01

0.1

1

10

100

1000

10000

1 .0

p =0 .0

0 .8

0 .6

t [s]

Operating characteristic concerning the thermal image element (49) - T=1 min


F_49-200min-Char.ai

11.1

2 3 4 5 6 7 8 9 10 20Ith /IB

t [s]

0.1

1

10

100

1000

10000

100000

1 .0

p =

0 .0

0 .8

0 .6

Operating characteristic concerning the thermal image element (49) - T = 200 min


Phase overcurrent - 50/51 - side H and side L[1]

PrefaceThree operation thresholds, independently adjustable with adjustable delay.The fi rst one may be programmed with defi nite or inverse time according the IEC and ANSI/IEEE standard, as well as with rectifi er, I2t or EM curve.The second threshold may be programmable with independent or dependent time according to the I2t curve and the third threshold with independent time.For each threshold a reset time can be set useful to reduce the clearing time for intermittent faults.The fi rst threshold trip may be inhibited by start of the second and/or third threshold. Similarly the second threshold trip may be inhibited by start of the third threshold.

Operation and settingsEach phase fundamental frequency current (IL1H, IL2H, IL3H for side H and IL1L, IL2L, IL3L for side L) is compared with the setting value. Currents above the associated pickup value (I(H)>, I(H)>>, I(H)>>> for side H and I(L)>, I(L)>>, I(L)>>> for side L) are detected and a start is issued. After expiry of the associated operate time (t(H)>, t (H)>>, t (H)>>> for side H and t(L)>, t(L)>>, t(L)>>> for side L) a trip command is issued; if instead the current drops below the threshold, the element it is restored. The fi rst threshold (I(H)> for side H and I(L)> for side L) may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t(H)>inv / [(I(H)/I(H)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t(H)>inv / [(I(H)/I (H)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t(H)>inv / [(I(H)/I(H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t(H)>inv · {0.01 / [(I(H)/I(H)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = t(H)>inv · {3.922 / [(I(H)/I(H)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = t(H)>inv · {5.64 / [(I(H)/I(H)>inv)2 - 1] + 0.024}I-squared-t (I 2t = K): t = 16 · t (H)>inv / (I(H)/I(H)>inv)2

Electromechanical (EM): t = t (H)>inv · {0.28 / [-0236 · (I(H)/I(H)>inv)-1 + 0.339]}

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · t(L)>inv / [(I(L)/I(L)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · t(L)>inv / [(I(L)/I (L)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · t(L)>inv / [(I(L)/I(L)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = t(L)>inv · {0.01 / [(I(L)/I(L)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = t(L)>inv · {3.922 / [(I(L)/I(L)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = t(L)>inv · {5.64 / [(I(L)/I(L)>inv)2 - 1] + 0.024}I-squared-t (I 2t = K): t = 16 · t (L)>inv / (I(L)/I(L)>inv)2

Electromechanical (EM): t = t (L)>inv · {0.28 / [-0236 · (I(L)/I(L)>inv)-1 + 0.339]}

Where:t: operate timeI(x) >: threshold setting (I(H)> for side H and I(L)> for side L)t(x) >inv: operate time setting (t(H)>inv for side H and t(L)>inv for side L)I(x): measured phase current (I(H) for side H and I(L) for side lato L)

The second threshold (I>>) may be programmable with defi nite or inverse time according to the I2t curve: t = 16 · t(H)>>inv / (I(H)/I(H)>>inv)2 for side H and t = 16 · t (L)>>inv / (I(L)/I(L)>>inv)2 for side LThe third threshold may be programmable with defi nite time (I (H)>>>def for side H and I(L)>>>def for side L) with defi nite time.

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 I>invMinimum operate time: 0.1 sRange where the equation is valid:[2] 1.1 ≤ I/I>inv ≤ 20

Note 1 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the side L protection is similar to that of the side H.


••••••••

••••••••

•••

II>> I>>>

t>

t>>

t>>>

I>

t

General operation time characteristic for the phase overcurrent elements - 50/51


TRIP


If I>inv pickup ≥ 2.5 In, the upper limit is 50 In

For all defi nite time elements the upper limit for measuring is 50 In.

All overcurrent elements can be enabled or disabled by setting ON or OFF the I(H)> Enable, I(H)>> Enable and/or I(H)>>> Enable parameters inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints menus for side L.

The fi rst overcurrent element can be programmed with defi nite or inverse time characteristic by set-ting the I(H)>Curve parameter and I(L)>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, RECTIFIER, I2t, EM) available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)> Element \ Setpoints menu for side L.The second overcurrent element can be programmed with defi nite or inverse time characteristic by setting the I> Time characteristic I(H)>>Curve (DEFINITE, I2t) parameter and I(H)>>Curve (DEFINITE, I2t) parameter available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 \ I>> Element \ Setpoints menu.The trip of fi rst element may be inhibited by the start of the second and/or third element (I(H)>>, I(H)>>>) by setting ON the Disable I> by start I>>, Disable I>> by start I>>> (I>disbyI>>, I>disbyI>>>) parameters available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)>> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)>> Element \ Setpoints menu for side L.

The trip of I(H)> element and I(L)> element may be inhibited by the start of the second and/or third element (I>>, I>>>) by setting ON the Disable I> by start I>>, Disable I>> by start I>>> (I(H)>disbyI(H)>>, I(H)>disbyI(H)>>>) parameters available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H\ I(H)>> Element (I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)>> Element (I(L)>>> Element) \ Setpoints menus for side L.Similarly the trip of the I(H)>> and I(L)>> element may be inhibited by start of the third element (I(H)>>>) by setting ON the Disable I>> by start I>>> (I(H)>disbyI(H)>>, I(H)>disbyI(H)>>>)) param-eter available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)>>> Element \ Set-points menu for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)>>> Element \ Set-points menu for side L.

All the named parameters can be set separately for Profi le A and Profi le B.

An adjustable reset time delay is provided for every threshold (t(H)>RES, t(H)>>RES, t(H)>>>RES for side H and t(L)>RES, t(L)>>RES, t(L)>>>RES for side L).

Breaker failure (BF)Each overcurrent element can produce the Breaker Failure output if the I(H)> BF, I(H)>> BF and I(H)>>> BF parameter for side H and/or I(L)> BF, I(L)>> BF and I(L)>>> BF for side L are set to ON. The parameters are available inside the Set \ Profi le A(or B) \Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \Phase overcurrent-50/51 side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Set-points menus for side L.[1]

Second harmonic restraintA block from the second harmonic restraint of the differential element (87) may be set by setting ON the I(H)>2ndh-REST, I(H)>>2ndh-REST and I(H)>>2ndh-REST for side H and/or I(L)>2ndh-REST, I(L)>>2ndh-REST and I(L)>>2ndh-REST for side L inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints for side L.


•

Timers-F50-51.ai

I> Start

I> Trip

t> t>

RESET

INPUT

t>RES t>RES t>RES

tI> element phase overcurrent timers - 50/51


all-F50-51.aiGeneral logic diagram of the phase overcurrent elements - 50/51

IL1

IL2

IL3

IL1

IL2

IL3

IL1

IL2

IL3

≥

I>> inhibition

BLK1I>>>

I>>>BF

I>>> Element Start I>>>

Start I>>>

Start I>>>

Trip I>>>

Trip I>>>

&

I>> disbyI>>>

&

I>>>BLK2IN

&

I> disbyI>>>

t>>> def ICLP>>> defI>>> defICLP>>>Mode tCLP>>> t>>>RES

BLK1I>>

I>> Element

BLK2OUT

Start I>>

Start I>>

Trip I>>

&

I> disbyI>>

&

I>>BLK1

&

I>>BLK2IN

t>> def ICLP>> defI>> def t>> inv ICLP>> invI>> invI>>Curve ICLP>>Mode tCLP>> t>>RESI>> Enable

I>>> Enable

I> inhibition

Block1

BLK1I>

CLPI>

CLPI>>

CLPI>>>

I> Element

BLK2OUT

BLK4OUT

BLK4OUT

BLK2INI>

BLK2INI>>

Start I>Trip I>

&

I>BLK1

Block2 &

I>BLK2IN

Start I2ndh> &

I>2ndh-REST

I>BLK2OUT

Start I2ndh> &

I>>2ndh-REST

Start I2ndh> &

I>>>2ndh-REST

&

I>>>BF

I>>BFI>> Trip &

I>>BF

I>BFTrip I> &

I>BF

Start I> &

I>>BLK2OUT

Start I>> &

BLK2OUTI>>>BLK2OUT

Start I>>> &

I>BLK4

Start I> &

I>>BLK4

Start I>> &

BLK4OUTI>>>BLK4

Start I>>> &

Block1

Block2

&

I>>>BLK1

Block1

Block2

t> def ICLP> defI> def t> inv ICLP> invI> invI>Curve ICLP>Mode tCLP> t>RESI> Enable

Start I>&

Start I>>&

Start I>>>&

Start I>>&

BLK2INI>>>Start I>>>

&

Start I>&



Cold Load Pickup (CLP)If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Element blocking the I(H)CLP> Mode, I(H)CLP>> Mode and I(H)CLP>>> Mode parameters for side H and/or I(L)CLP> Mode, I(L)CLP>> Mode and I(L)CLP>>> Mode parameters for side L.If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Change setting the I(H)CLP> Mode, I(H)CLP>> Mode and I(H)CLP>>> Mode parameters for side H and/or I(L)CLP> Mode, I(L)CLP>> Mode and I(L)CLP>>> Mode parameters for side L, whereas the operating thresholds within the CLP (I(H)CLP>def, I(H)CLP>inv,....) parameters may be adjusted inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element,(I(H)>> Element, I(H)>>> Element) \ Defi nite time (Inverse time) menus for side H and Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)> Element,(I(L)>> Element, I(L)>>> Element) \ Defi nite time (Inverse time) menus for side L.For both operating modes the CLP Activation time parameters (t(H)CLP>, t(H)CLP>>, t(H)CLP>>>) parameters for side H and (t(L)CLP>, t(L)CLP>>, t(L)CLP>>> parameters for side L may be adjusted inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Phase over-current-50/51 side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints menus for side L.

For every of the three thresholds the following block criteria are available:

Logical block (Block1)If the I(H)>BLK1, I(H)>>BLK1 and/or I(H)>>>BLK1 enabling parameters for side H and the I(L)>BLK1, I(L)>>BLK1 and/or I(L)>>>BLK1 enabling parameters for side L are set to ON and a binary input is designed for logical block (Block1), the concerning element is blocked off when-ever the given input is active.[1] The enabling parameters are available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and, Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints menus for side L while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.




Use of committed pilot wire input BLIN1:The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputs:If the I(H)>BLK2IN, I(H)>>BLK2IN and/or I(H)>>>BLK2IN for site H and I(L)>BLK2IN, I(L)>>BLK2IN and/or I(L)>>>BLK2IN for site L are set to ON and a binary input is de-signed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[2] The en-able I(H)>BLK2IN, I(H)>>BLK2IN and/or I(H)>>>BLK2IN parameters are available inside the Set \ Profi le A(or B) \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and, Set \ Profi le A(or B) \ Phase overcurrent-50/51 side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints menus for side L, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching).

Use of committed pilot wire output BLOUT1:The information about phase or phase+earth block may be select programming the ModeBLOUT1 parameter (OFF - ON IPh - ON IPh/IE - ON IE) inside Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block OUT menus.

Use of output relay (K1...K6):If the I(H)>BLK2OUT, I(H)>>BLK2OUT and/or I(H)>>>BLK2OUT parameters for side H and I(L)>BLK2OUT, I(L)>>BLK2OUT and/or I(L)>>>BLK2OUT parameters for side L are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenev-er the given element (Start I>, Start I>> e/o Start I>>>) becomes active. The enable d (ON or OFF) by means of the I(H)>BLK2OUT, I(H)>>BLK2OUT and/or I(H)>>>BLK2OUT parameters for side H and I(L)>BLK2OUT, I(L)>>BLK2OUT and/or I(L)>>>BLK2OUT parameters or



••••

•

•

•

•


side L, inside the Set \ Profi le A(or B) side H \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) side H \ Phase overcurrent-50/51 side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side L, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K (relays) and/or BLK2OUT-IE-K) and (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) (LEDs) must be select inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block OUT menu.


The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the I(H)>BLK4, I(H)>>BLK4, and/or I(H)>>>BLK4 parameters for side H and I(L)>BLK4, I(L)>>BLK4, I(L)>>>BLK4 parameters for side L (virtual input and output common to all protective thresholds); the following operating modes are available:




•••


Fun_50-51S1.ai

I L1

I L2

t >RES

T0

RESET

t >

0T

≥1

≥1

≥1

t >def

t >inv

t >RES

Star t I>

Tr ip I>

CB-State

Start I2ndh>

ON≡ Inh ib i t ( f rom I>> and/or I>>> overcurrent e lement)

ON≡Enable I> overcurrent e lement



I> inh ib i t ion


&

T 0t CLP>

&

2nd harmonic restra int enable (ON≡Enable) I>2ndh-REST

ICLP>Mode

I C L P >def

t C L P >

I C L P >inv

I L1 ≥ I>

BF Enable (ON≡Enable) I>BF

towards BF logic I> BF&Trip I>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

I> Curve

0T

ABC

A =“1”A =“0 or OFF”

Output t CLP>

I L3

I> Enable

I> overcurrent element (50/51) block diagram

tCLP>


Output tCLP>

t

0.1 s





I>TR-K I>TR-L

I>ST-L I>ST-K

≥1 CLP I>

&

State

I>inv

I L1 ≥ I>def

I L1 ≥ I>inv

I>def

&

State

Phase overcurrent (50/51) - First element logic diagram (I>)



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I>BLK1


Pi lot wire input

& I>BLK2IN

BLK2IN-Iph

Start I>

Trip I>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 I>

BLK4IN I>

&

&

BLK2IN I>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out

Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the first element (I>)






I>BLK2OUT

Start I>

Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4

A = INB = OFFC = OUT A = IN

B = OFFC = OUT

I>BLK4

Start I> CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the first element (I>)



Fun_50-51S2.ai

t >>RES

T0

RESET

t >>

0T

≥1

t >>def

t >>inv

t >>RES

Star t I>>

Tr ip I>>

CB-State

Start I2ndh>

ON≡ Inh ib i t ( f rom I>>> overcurrent e lement)

ON≡Enable I>> overcurrent e lement

I>> inhib i t ion


I>>TR-K I>>TR-L

I>>ST-L I>>ST-K

T 0t CLP>>

&

&

2nd harmonic restra int enable (ON≡Enable) I>>2ndh-REST

ICLP>>Mode

t C L P >>

BF Enable (ON≡Enable) I>>BF

towards BF logic I>> BF&Trip I>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

I>> Curve

0T

ABC

Output t CLP>>

I>> Enable

I>> overcurrent element (50/51) Block diagram

tCLP>>


Output tCLP>>

t

0.1 s





&(ON≡ Inh ib i t )

Star t I>> I> inh ib i t ion

I> d isby l>>

≥1 CLP I>>

I L1

I L2

≥1

≥1



I C L P >>def I C L P >>inv

I L1 ≥ I>>

A =“1”A =“0 or OFF”

I L3

&

State

I>>inv

I L1 ≥ I>>def

I L1 ≥ I>>inv

I>>def

&

State

Phase overcurrent (50/51) - Second element logic diagram (I>>)



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I>>BLK1


Pi lot wire input

& I>>BLK2IN

BLK2IN-Iph

Start I>>

Trip I>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 I>>

BLK4IN I>>

&

&

BLK2IN I>>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out




Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the second element (I>>)



I>>BLK2OUT

Start I>>

Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



I>>BLK4

Start I> CBA“0”

“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the second element (I>>)


Fun_50-51S3.ai

t >>>RES

T0

RESET

t >>>def

0T

≥1

t >>>deft >>>RES

Star t I>>>

Tr ip I>>>

CB-State

Start I2ndh>

ON≡Enable 3rd overcurrent e lement


&I>>>TR-K I>>>TR-L

I>>>ST-L I>>>ST-K

T 0t CLP>>>

&

2nd harmonic restra int enable (ON≡Enable) I>>>2ndh-REST

ICLP>>>Mode

t C L P >>>

BF Enable (ON≡Enable) I>>>BF

towards BF logic I>>> BF&Trip I>>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

Output t CLP>>>

I>>> Enable

I>>> overcurrent element (50/51) Block diagram

tCLP>>>

Output tCLP>>>


t

0.1 s





&

(ON≡ Inh ib i t )

Star t I>>>

Start I>>>

Start I>>>

(ON≡ Inh ib i t )

I> inh ib i t ion I> d isby l>>>

& I>> inh ib i t ion I>> d isby l>>>

≥1 CLP I>>>

I L1

I L2

≥1



I C L P >>def I C L P >>inv

I L1 ≥ I>>>

A =“1”A =“0 or OFF”

I L3

&

State

I L1 ≥ I>>>def

I>>>def

Phase overcurrent (50/51) - Third element logic diagram (I>>>)

Note: inside all the diagram the H or L index , which identify the variables on the side of H or L, are not indicated


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

I>>>BLK1


Pi lot wire input

& I>>>BLK2IN

BLK2IN-Iph

Start I>>>

Trip I>>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 I>>

BLK4IN I>>

&

&

BLK2IN I>>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out

Note: inside all the diagram the H or L index , which identify the variables on the side of H or L are not indicated

Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the third element (I>>>)





I>>>BLK2OUT

Start I>>>

Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



I>>>BLK4

Start I> CBA“0”

“0” BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Phase overcurrent (50/51) - Logic diagram of the blocking signals concerning the third element (I>>>)



Calculated residual overcurrent - 50N/51N - side H and side L[1]

PrefaceThree operation thresholds, independently adjustable with adjustable delay.The fi rst one may be programmed with defi nite or inverse time according the IEC and ANSI/IEEE standard, as well as with EM curve.The second and third thresholds with defi nite time.For each threshold a reset time can be set useful to reduce the clearing time for intermittent faults.The fi rst threshold trip may be inhibited by start of the second and/or third threshold. Similarly the second threshold trip may be inhibited by start of the third threshold .

Operation and settingsThe residual fundamental frequency residual current, calculated as the sum of instantaneous values of phase currents on each side, (IE(H) for side H, IE(L) for side L) is compared with the setting thresh-olds (. Current above the associated pickup value is detected and a start is issued. After expiry of the associated operate time a trip command is issued; if instead the current drops below the threshold, the element it is restored.The fi rst threshold (IE(H)> for side H) may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE(H)>inv / [(IE(H)/IE(H)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE(H)>inv / [(IE(H)/IE(H)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE(H)>inv / [(IE(H)/IE (H)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE(H)>inv · {0.01 / [(IE(H)/IE(H)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = tE(H)>inv · {3.922 / [(IE(H)/IE(H)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = tE(H)>inv · {5.64 / [(IE(H)/IE(H)>inv)2 - 1] + 0.024}Electromechanical (EM): t = tE(H) >inv · {0.28 / [-0236 · (IE(H)/IE(H)>inv)-1 + 0.339]}

Similarly, the fi rst threshold for side L (IE(L)>) may be programmed with defi nite or inverse time ac-cording the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE(L)>inv / [(IE(L)/IE(L)>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE(L)>inv / [(IE(L)/IE(L)>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT): t = 80 · tE(L)>inv / [(IE(L)/IE (L)>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE(L)>inv · {0.01 / [(IE(L)/IE(L)>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = tE(L)>inv · {3.922 / [(IE(L)/IE(L)>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = tE(L)>inv · {5.64 / [(IE(L)/IE(L)>inv)2 - 1] + 0.024}Electromechanical (EM): t = tE(L) >inv · {0.28 / [-0236 · (IE(L)/IE(L)>inv)-1 + 0.339]}

Where:t: operate timetE(x)>inv: time setting value (tE(H)>inv for side H and tE(L)>inv for side L)IE(x)>: threshold setting value (IE(H)> for side H and IE(L)> for side L)IE(x): calculated residual current (IE(H)> for side H and IE(L)> for side L)

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 IE (x) >Minimum operate time: 0.1 sRange where the equation is valid:[2] 1.1 ≤ IE (x)/IE (x) >inv ≤ 20 If IE (x) >inv pickup ≥ 2.5 In, the upper limit is 10 I (x) n

For all defi nite time elements the upper limit for measuring is 50 In (x).All the elements can be enabled or disabled by setting ON or OFF the IE(H)> Enable, IE(H)>>

Note 1 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the side L protection is similar to that of the side H element


•••••••

•••••••

••••

IEIE>> IE>>>

t E>

t E>>

t E>>>

IE>

t

General operation time characteristic for the calculated residual overcurrent elements - 50N/51N

TRIP



Enable and/or IEH(H)>>> Enable parameters inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ IE(H)> Element (IE(H)>> Element, IE(H)>>> Element) \ Set-points menus for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ IE(L)> Element (IE(L)>> Element, IE(L)>>> Element) \ Setpoints menus for side L.

The fi rst overcurrent element can be programmed with defi nite or inverse time characteristic by setting the IE(H)>Curve parameter and IE(L)>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, RECTIFIER, I2t, EM) available inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ IE(H)> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ IE(L)> Element \ Setpoints menu for side L.

The trip of fi rst element may be inhibited by the start of the second and/or third element (IE(H)>>, IE(H)>>>) by setting ON the Disable IE> by start IE>>, Disable IE>> by start IE>>> (IE>disbyI>>, IE>disbyI>>>) parameters available inside the Set \ Profi le A(or B) \ Calculated residual overcur-rent-50N/51N side H \ IE(H)>> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Calcu-lated residual overcurrent-50N/51N side L \ IE(L)>> Element \ Setpoints menu for side L.

Similarly the trip of the IE(H)>> and IE(L)>> element may be inhibited by start of the third el-ement (IE(H)>>>) by setting ON the Disable IE>> by start E>>> (IE(H)>disbyIE(H)>>, IE(H)>disbyIE(H)>>>)) parameter available inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ IE(H)>>> Element \ Setpoints menu for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ IE(L)>>> Element \ Setpoints menu for side L.

All the named parameters can be set separately for Profi le A and Profi le B.

An adjustable reset time delay is provided for every threshold (tE(H)>RES, tE(H)>>RES, tE(H)>>>RES for side H and tE(L)>RES, tE(L)>>RES, tE(L)>>>RES for side L).

Breaker failure (BF)Each residual overcurrent element can produce the Breaker Failure output if the IE(H)> BF, IE(H)>> BF and/or IE(H)>>> BF parameters for side H and IE(L)> BF, IE(L)>> BF and/or IE(L)>>> BF parameters for side L are set to ON. The parameters are available inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H\ IE(H)> Element (IE(H)>> Ele-ment, IE(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L\ IE(L)> Element (IE(L)>> Element, IE(L)>>> Element) \ Setpoints menus for side L.[1]

Second harmonic restraintA block from the second harmonic restraint of the differential element (87) may be set by setting ON the IE(H)>2ndh-REST, IE(H)>>2ndh-REST and IE(H)>>2ndh-REST parameters for side H and/or IE(L)>2ndh-REST, IE(L)>>2ndh-REST and IE(L)>>2ndh-REST parameters for side L inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ I> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints for side H and Set \ Profi le A(or B) \ Calculated residu-al overcurrent-50N/51N side L \ I> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints for side L.

Cold Load Pickup (CLP)If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Element blocking the IE(H)CLP> Mode, IE(H)CLP>> Mode and IE(H)CLP>>> Mode parameters for side H and/or IE(L)CLP> Mode, IE(L)CLP>> Mode and IE(L)CLP>>> Mode parameters for side L.If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Change setting the IE(H)CLP> Mode, I(H)CLP>> Mode and IE(H)CLP>>> Mode parameters for side H and/or IE(L)CLP> Mode,


IE> Start

IE> Trip

tE> tE>

RESET

INPUT

tE>RES tE>RES tE>RES

tIE> element residual overcurrent (50N/51N) - Timers


IE(L)CLP>> Mode and IE(L)CLP>>> Mode parameters for side L, whereas the operating thresholds within the CLP (IE(H)CLP>def, IE(H)CLP>inv,....) may be adjusted inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ I(H)> Element,(I(H)>> Element, I(H)>>> Element) \ Defi nite time (Inverse time) menus for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ I(L)> Element,(I(L)>> Element, I(L)>>> Element) \ Defi nite time (Inverse time) menus for side L.For both operating modes the CLP Activation time parameters (tE(H)CLP>, tE(H)CLP>>, tE(H)CLP>>>) for side H and (tE(L)CLP>, tE(L)CLP>>, tE(L)CLP>>> for side L parame-ters may be adjusted inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ IE(H)> Element (IE(H)>> Element, IE(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ IE(L)> Element (IE(L)>> Element, IE(L)>>> Element) \ Setpoints menus for side L.

For every of the four thresholds the following block criteria are available:Logical block (Block1)

If the IE(H)>BLK1, IE(H)>>BLK1 and/or IE(H)>>>BLK1 enabling parameters for side H and the IE(L)>BLK1, IE(L)>>BLK1 and/or IE(L)>>>BLK1 enabling parameters for side L are set to ON and a binary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[1] The enabling parameters are available inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and, Set \ Profi le A(or B) \ Calculated residual over-current-50N/51N side L \ I(L)> Element (I(L)>> Element, I(L)>>> Element) \ Setpoints menus for side L while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.




Use of committed pilot wire input BLIN1:The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputs:If the IE(H)>BLK2IN, IE(H)>>BLK2IN and/or IE(H)>>>BLK2IN for site H and IE(L)>BLK2IN, IE(L)>>BLK2IN and/or IE(L)>>>BLK2IN for site L are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase ele-ments (Block2 Iph) or by any protection element (Block2 Iph/IE) according the selectivity block criteria.[2] The enable IE(H)>BLK2IN, IE(H)>>BLK2IN and/or IE(H)>>>BLK2IN param-eters are available inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ IE(H)> Element (IE(H)>> Element, IE(H)>>> Element) \ Setpoints menus for side H and, Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side L \ IE(L)> Element (IE(L)>> Element, IE(L)>>> Element) \ Setpoints menus for side L, while the Block2 Iph and Block2 Iph/IE func-tions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching).


Use of output relay (K1...K6):If the IE(H)>BLK2OUT, IE(H)>>BLK2OUT and/or IE(H)>>>BLK2OUT parameters for side H and IE(L)>BLK2OUT, IE(L)>>BLK2OUT and/or IE(L)>>>BLK2OUT parameters for side L are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start IE>, Start IE>> e/o Start IE>>>) becomes active. The enable d (ON or OFF) by means of the IE(H)>BLK2OUT, IE(H)>>BLK2OUT and/or IE(H)>>>BLK2OUT parameters for side H and IE(L)>BLK2OUT, IE(L)>>BLK2OUT and/or IE(L)>>>BLK2OUT parameters or side L, inside the Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side H and Set \ Profi le A(or B) \ Calculated residual overcurrent-50N/51N side H \ I(H)> Element (I(H)>> Element, I(H)>>> Element) \ Setpoints menus for side L, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K (relays) and/or BLK2OUT-IE-K) and (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) (LEDs) must be select inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block OUT menu.



••••

•

•

•

•



The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the IE(H)>BLK4, IE(H)>>BLK4, and/or IE(H)>>>BLK4 param-eters for side H and IE(L)>BLK4, IE(L)>>BLK4, IE(L)>>>BLK4 parameters for side L (virtual input and output common to all protective thresholds); the following operating modes are available:




•••


IE

IE

IE

tE>> def IECLP>> defIE>> defIECLP>>Mode tECLP>> tE>>RESIE>> Enable

tE>>> def IECLP>>> defIE>>> defIECLP>>>Mode tECLP>>> tE>>>RESIE>>> Enable

tE> def IECLP> defIE> def tE> inv IECLP> invIE> invIE>Curve IECLP>Mode tECLP> tE>RESIE> Enable

all-F50N-51N.ai

≥

IE>> inhibition

BLK1IE>>>

IE>>>BF

IE>>> Element Start IE>>>

Start IE>>>

Start IE>>>

Trip IE>>>

Trip IE>>>

&

IE>> disbyIE>>>

&

IE>>>BLK2IN

&

IE> disbyIE>>>

BLK1IE>>

IE>> Element

BLK2OUT

Start IE>>

Start IE>>

Trip IE>>

&

IE> disbyIE>>

&

IE>>BLK1

&

IE>>BLK2IN

IE> inhibition

Block1

BLK1IE>

CLPIE>

CLPIE>>

CLPIE>>>

IE> Element

BLK2OUT

BLK4OUT

BLK2INIE>

BLK2INIE>>

Start IE>

Trip IE>

&

IE>BLK1

Block2 &

IE>BLK2IN

Start I2ndh> &

IE>2ndh-REST

IE>BLK2OUT

Start I2ndh> &

IE>>2ndh-REST

Start I2ndh> &

IE>>>2ndh-REST

&

IE>>>BF

IE>>BFIE>> Trip &

IE>>BF

IE>BFTrip I> &

IE>BF

Start IE> &

IE>>BLK2OUT

Start IE>> &

BLK2OUTIE>>>BLK2OUT

Start IE>>> &

BLK4OUTIE>BLK4

Start IE> &

IE>>BLK4

Start IE>> &

BLK4OUTIE>>>BLK4

Start IE>>> &

Block1

Block2

&

IE>>>BLK1

Block1

Block2

Start I>&

Start IE>>&

Start IE>>>&

Start IE>>&

BLK2INIE>>>Start IE>>>

&

Start I>&

General logic diagram of the calculatedresidual overcurrent elements - 50N/51N



Fun_50N-51NS1.ai

t >RES

T0

RESET

t E>

0T

≥1

t E>def

t E>inv

t E>RES

Star t IE>

Tr ip IE>

CB-State

Start I2ndh>

ON≡ Inh ib i t( f rom IE>> and/or IE>>> res idual overcurrent e lement)

ON≡Enable IE> res idual overcurrent e lement

IE> inh ib i t ion


&

T 0t ECLP>

&

2nd harmonic restra int enable (ON≡Enable) IE>2ndh-REST

IECLP>Mode

t EC L P >

BF Enable (ON≡Enable) IE>BF

towards BF logic IE> BF&Trip IE>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

IE> Curve

0T

ABC

A =“1”A =“0 or OFF”

Output t ECLP>

IE> Enable

IE> overcurrent element (50N/51N) Block diagram

tECLP>


Output tECLP>

t

0.1 s





IE>TR-K IE>TR-L

IE>ST-L IE>ST-K

≥1 CLP IE>

I E

≥1



I EC L P >def I EC L P >inv

I E ≥ I ECLP>

&

State

IE>inv

I E ≥ IE>def

I E ≥ IE>inv

IE>def

&

State

Calculated residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the first element (IE>)



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>BLK1


Pi lot wire input

& IE>BLK2IN

BLK2IN-Iph

Start IE>

Trip IE>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>

BLK4IN IE>

&

&

BLK2IN IE>&


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out






Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1

Start IE>&Block2 output

(ON≡Enable) IE>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>BLK4

Start IE> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4






Fun_50N-51NS2.ai

t E>>RES

T0

RESET

t E>>

0T

≥1

t E>>deft E>>RES

Star t IE>>

Tr ip IE>>

CB-State

Start I2ndh>

IE>> inhib i t ion


&IE>>TR-K IE>>TR-L

IE>>ST-L IE>>ST-K

T 0t ECLP>>

&

2nd harmonic restra int enable (ON≡Enable) IE>>2ndh-REST

IECLP>>Mode

t E C L P >>

BF Enable (ON≡Enable) IE>>BF

towards BF logic IE>> BF&Trip IE>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

Output t ECLP>>

IE>> Enable

IE>> overcurrent element (50/51) Block diagram

tECLP>>


Output tECLP>>

t

0.1 s






Star t IE>>

Start IE>>

IE> inhib i t ion IE> d isby lE>>

≥1 CLP IE>>

ON≡ Inh ib i t( f rom IE>>> res idual overcurrent e lement)

ON≡Enable IE>> res idual overcurrent e lement

I E>>def

A =“1”A =“0 or OFF”

I E



I EC L P >>def

I E ≥ I ECLP>>def

&

State

I E ≥ IE>>def

Calculated residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the second element (IE>>)



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>>BLK1


Pi lot wire input

& IE>>BLK2IN

BLK2IN-Iph

Start IE>>

Trip IE>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>>

BLK4IN IE>>

&

&

BLK2IN IE>> &


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out






Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1

Start IE>>&Block2 output

(ON≡Enable) IE>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT

IE(H)>>> Block2 OUTIE(L)> Block2 OUT

IE(L)>> Block2 OUTIE(L)>>> Block2 OUT


t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>>BLK4

Start IE>> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4

IE(H)>> Block4IE(L)> Block4

IE(L)>> Block4IE(L)>> Block4




Fun_50N-51NS3.ai

t E>>>RES

T0

RESET

t E>>>def

0T

≥1

t E>>>deft E>>>RES

Star t IE>>>

Tr ip IE>>>

CB-State

Start I2ndh>

ON≡Enable IE>>> res idual overcurrent e lement


&IE>>>TR-K IE>>>TR-L

IE>>>ST-L IE>>>ST-K

T 0t ECLP>>>

&

2nd harmonic restra int enable (ON≡Enable) IE>>>2ndh-REST

IECLP>>>Mode

t EC L P >>>

BF Enable (ON≡Enable) IE>>>BF

towards BF logic IE>>> BF&Trip IE>>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A = ON - Change settingB = OFFC = ON - Element blockingOutput t ECLP>>>

IE>>> Enable

IE>>> residual overcurrent element (50/51) Block diagram

tECLP>>>


Output tECLP>>>

t

0.1 s




&

(ON≡ Inh ib i t )

Star t IE>>>

Start IE>>>

Start IE>>>

(ON≡ Inh ib i t )

IE> inh ib i t ion IE>disbylE>>>

& IE>> inhib i t ion IE>>disbylE>>>

≥1 CLP IE>>>

I E>>>def

A =“1”A =“0 or OFF”

I E



I EC L P >>>def

I E ≥ I ECLP>>>def

&

State

I E ≥ IE>>>def




Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>>>BLK1


Pi lot wire input

& IE>>>BLK2IN

BLK2IN-Iph

Start IE>>>

Trip IE>>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>>>

BLK4IN IE>>>

&

&

BLK2IN IE>>> &


Block1

Block1

Block4

Block2

Block1

Block1


Block2 output

Block4-in-out

Calculated residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the third element (IE>>>)

Note: inside all the diagram the 1 or 2 index , which identify the variables on the side of 1 or 1 are not indicated




Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1

Start IE>>>&Block2 output

(ON≡Enable) IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




Calculated residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the third element (IE>>>)


Residual overcurrent / High impedance restricted ground fault - 50N.1/51N.1-87NHIZ.2/ 50N.1/51N.2-87NHIZ.2[1]

PrefaceThe use of either depends solely on the protection method of connecting its residual current input to measuring CT. If used as a differential protection of high-impedance restricted earth, outside of the relay and in series to the amperometric current residual a stabilization resistor must be provided; if required, an externally a nonlinear METROSIL resistor must be provided for overvoltages limitation in the event of a fault inside the zone of restricted earth fault differential protection. When used as high-impedance restricted differential protection, the CTs of the two sides must have the same transformation ratio.Three operation thresholds, independently adjustable with adjustable delay.The fi rst one may be programmed with defi nite or inverse time according the IEC and ANSI/IEEE standard, as well as with EM curve.The second and third thresholds with independent time.For each threshold a reset time can be set useful to reduce the clearing time for intermittent faults.The fi rst threshold trip may be inhibited by start of the second and/or third threshold. Similarly the second threshold trip may be inhibited by start of the third threshold.

Operation and settingsThe residual fundamental frequency current IE1 or IE2 is compared with the setting values (IE1>, IE1>>, IE1>>> for IE1 input, IE2>, IE2>>, IE2>>> for IE2 input); current above the associated pickup value is detected and a start is issued. After expiry of the associated operate time (tE1>, tE1>>, tE1>>> for IE1 input, tE2>, tE2>>, tE2>>> for IE2 input), a trip command is issued; if instead the current drops below the threshold, the element it is restored. The fi rst threshold (IE1> for IE1 input) may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE1>inv / [(IE1/IE1>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE1>inv / [(IE1/IE1>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT) t = 80 · tE1>inv / [(IE1/IE1>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE1>inv · {0.01 / [(IE1/IE1>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = tE1>inv · {3.922 / [(IE1/IE1>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = tE1>inv · {5.64 / [(IE1/IE1>inv)2 - 1] + 0.024}Electromechanical (EM): t = tE1>inv · {0.28 / [-0236 · (IE1/IE1>inv)-1 + 0.339]}

The fi rst threshold (IE2> for IE2 input) may be programmed with defi nite or inverse time according the following characteristic curves:

Standard Inverse Time (IEC 255-3/BS142 type A or SIT): t = 0.14 · tE1>inv / [(IE2/IE2>inv)0.02 - 1]Very Inverse Time (IEC 255-3/BS142 type B or VIT): t = 13.5 · tE2>inv / [(IE2/IE2>inv) - 1]Extremely Inverse Time (IEC 255-3/BS142 type C or EIT) t = 80 · tE2>inv / [(IE2/IE2>inv)2 - 1] Moderately Inverse (ANSI/IEEE type MI): t = tE2>inv · {0.01 / [(IE2/IE2>inv)0.02 - 1] + 0.023}Very Inverse (ANSI/IEEE type VI): t = tE2>inv · {3.922 / [(IE2/IE2>inv)2 - 1] + 0.098}Extremely Inverse (ANSI/IEEE type EI): t = tE2>inv · {5.64 / [(IE2/IE2>inv)2 - 1] + 0.024}Electromechanical (EM): t = tE2>inv · {0.28 / [-0236 · (IE2/IE2>inv)-1 + 0.339]}

Wheret: operate timeIEx >: pickup value (IE1> for IE1 input and IE2> for IE2 input)tE >inv: operate time setting (tE1> for IE1 input and tE2> for IE2 input)

For all inverse time characteristics, following data applies (x = 1 or 2):Asymptotic reference value (minimum pickup value): 1.1 IEx>Minimum operate time: 0.1 sRange where the equation is valid:[2] 1.1 ≤ IEx/IEx>inv ≤ 20 If IEx>inv pickup ≥ 0.6 IEnx, the upper limit is 12 IEnx

For all defi nite time elements the upper limit for measuring is 12 IEnx.

All residual overcurrent elements can be enabled or disabled by setting ON or OFF the IE1> Note 1 The 1 index that identify the variables related to the 1 side are indicated inside the schematic diagrams; the operation of the side 2 protection is

similar to that of the side 1 element


•••••••

•••••••

••••

General operation time characteristic for the measured residual overcurrent elements - 50N/51NIEIE x>> IE x>>>

t E x>

x = 1 or 2

t E x>>

tE x>>>

IE x>

t

TRIP


Enable, IE1>> Enable e/o IE1>>> Enable parameters inside the Set \ Profi le A(or B) side H /L \ 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1>>> Element) \ Setpoints menu for side IE1 and IE2> Enable, IE2>> Enable and/or IE2>>> Enable parameters inside the Set \ Profi le A(or B) side H /L \ 50N.2/51N.2 - 87NHIZ.2 side H/L \ IE2> Element (IE2>> Element, IE2>>> Element) \ Setpoints menu for side IE2.

The fi rst element can be programmed with defi nite or inverse time characteristic by setting the IE1>Curve parameter (DEFINITE, IEC/BS A, IEC/BS B, IEC/BS C, ANSI/IEE MI, ANSI/IEE VI, ANSI/IEE EI, EM) available inside the Set \ Profi le A(or B) side H /L \ 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE1> Element \ Setpoints menu for side IE1 and IE2> Enable, IE2>> Enable and/or IE2>>> Enable parameters inside the Set \ Profi le A(or B) side H /L \ 50N.2/51N.2 - 87NHIZ.2 side H/L \ IE2> Element \ Setpoints menu for side IE2.

The trip of IE1> element may be inhibited by the start of the second and/or third element (IE1>>, IE1>>>) by setting ON the Disable IE1> by start IE1>>, Disable IE1> by start IE1>>> (IE1>disbyIE1>>, IE1>disbyIE1>>>) parameters available inside the Set \ Profi le A(or B) side H /L \ Residual overcurrent or high impedance differential restricted earth fault 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE1>> Element (IE1>>> Element) \ Setpoints menu for side IE1 and Set \ Profi le A(or B) side H /L \ Residual overcurrent or high impedance differential restricted earth fault 50N.2/51N.2 - 87NHIZ.2 side H/L \ IE2>> Element (IE2>>> Element) \ Setpoints menu for side IE2.Similarly the trip of the IE1>> (IE2>>) element may be inhibited by start of the third element (IE1>>> or IE2>>>) by setting ON the Disable IE1>> by start IE1>>> (IE1>>disbyIE1>>>) parameter avail-able inside the Set \ Profi le A(or B) side H /L \ Residual overcurrent or high impedance differential restricted earth fault 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE1>>> Element \ Setpoints menu for side IE1 and Set \ Profi le A(or B) side H /L \ Residual overcurrent or high impedance differential restricted earth fault 50N.2/51N.2 - 87NHIZ.2 side H/L \ IE2>>> Element \ Setpoints menu for side IE2.All the named parameters can be set separately for Profi le A and Profi le B (Set \ Profi le A(or B).An adjustable reset time delay is provided for every threshold (tE1>RES, tE1>>RES, tE1>>>RES for IE1 input and tE2>RES, tE2>>RES, tE2>>>RES for IE2 input).

Breaker failure (BF)Each residual overcurrent element can produce the Breaker Failure output if the IE1> BF, IE1>> BF and IE1>>> BF for IE1 input and/or IE2> BF, IE2>> BF e IE2>>> BF for IE2 input parameters are set to ON. The parameters are available inside the Set \ Profi le A(or B) side H /L \ 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1>>> Element) \ Setpoints menus for side IE1 and Set \ Profi le A(or B) side H /L \ 50N.1/51N.1 - 87NHIZ.1 side H/L \ IE2> Element (IE2>> Element, IE2>>> Element) \ Setpoints menus for side IE2.[1]

Second harmonic restraintA block from the second harmonic restraint of the differential element (87) may be set by setting ON the E1>2ndh-REST, IE1>>2ndh-REST and IE1>>2ndh-REST parameters for side 1 and/or IE2>2ndh-REST, IE2>>2ndh-REST and IE2>>2ndh-REST parameters for side 1 inside the Set \ Profi le A(or B) side H/L \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1)>>> Element) \ Setpoints and Set \ Profi le A(or B) side H/L \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element (IE2>> Element, IE2)>>> Element) \ Setpoints for side 2.

Cold Load Pickup (CLP)If the CLP function (Cold Load Pick-up) is enabled for element blocking, the selected threshold may be blocked for an adjustable time interval, starting from the circuit breaker closure.This operating mode may be select by setting ON-Element blocking the IE1(H)CLP> Mode, IE1(H)CLP>> Mode and IE1(H)CLP>>> Mode parameters for side 1 and/or IE2(L)CLP> Mode, IE2(L)CLP>> Mode and IE2(L)CLP>>> Mode parameters for side 2.If the CLP function (Cold Load Pick-up) is enabled for threshold change, the selected threshold may be changed for an adjustable time interval, starting from the circuit breaker closure.

This operating mode may be select by setting ON-Change setting the I1E(H)CLP> Mode, Note 1 The common settings concerning the Breaker failure protection are adjustable inside the Breaker Failure - BF menu.

IEx> Start

IEx> Trip

tEx> tEx>

RESET

INPUT

tEx>RES tEx>RES tE>RES

tIEx> element residual overcurrent (50N/51N-87NHIZ) - Timers


I1(H)CLP>> Mode and I1E(H)CLP>>> Mode parameters for side 1 and/or I2E(L)CLP> Mode, I2E(L)CLP>> Mode and I2E(L)CLP>>> Mode parameters for side 2, whereas the operating thresholds within the CLP (I1E(H)CLP>def, I1E(H)CLP>inv,....) may be adjusted inside the Set \ Profi le A(or B) \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element,(IE1>> Element, IE1>>> Element) \ Defi -nite time (Inverse time) menus for side 1 and Set \ Profi le A(or B) \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element, (IE2>> Element, IE2>>> Element) \ Defi nite time (Inverse time) menus for side 2.

For both operating modes the CLP Activation time parameters (tE1(H)CLP>, tE1(H)CLP>>, tE1(H)CLP>>>) for side 1 and (tE2(L)CLP>, tE2(L)CLP>>, tE2(L)CLP>>> for side 2 param-eters may be adjusted inside the Set \ Profi le A(or B) \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1>>> Element) \ Setpoints menus for side 1 and Set \ Profi le A(or B) \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element (IE2>> Element, IE2>>> Element) \ Setpoints menus for side 2.

For every of the four thresholds the following block criteria are available.

Logical block (Block1)If the IE1>BLK1, IE1>>BLK1 and/or IE1>>>BLK1 for IE1 input and/or IE2>BLK1, IE2>BLK1 e/o IE2>>>BLK1 for IE2 input enabling parameters are set to ON and a binary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is ac-tive.[1] The enabling parameters are available inside the Set \ Profi le A(or B) \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element,(IE1>> Element, IE1>>> Element) \ Defi nite time (Inverse time) menus for side 1 and Set \ Profi le A(or B) \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element, (IE2>> Element, IE2>>> Element) \ Defi nite time (Inverse time) menus for side 2, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.




Use of committed pilot wire input BLIN1:

The protection is blocked off according the selectivity block criteria when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputs:If the IE1>BLK2IN, IE1>>BLK2IN and/or IE1>>>BLK2IN for side 1 and IE2>BLK2IN, IE2>>BLK2IN and/or IE2>>>BLK2IN for site 2 are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph) or by any pro-tection element (Block2 Iph/IE) according the selectivity block criteria.[2] The enable IE1>BLK2IN, IE1>>BLK2IN and/or IE1>>>BLK2IN parameters are available inside the Set \ Profi le A(or B) \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1>>> Element) \ Setpoints menus for side 1 and Set \ Profi le A(or B) \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element (IE2>> Element, IE2>>> Element) \ Setpoints menus for side 2, while the Block2 Iph and Block2 Iph/IE functions must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching).


Use of output relay (K1...K6):If the IE1>BLK2OUT, IE1>>BLK2OUT and/or IE1>>>BLK2OUT parameters for side 1 and IE2>BLK2OUT, IE2>>BLK2OUT and/or IE2>>>BLK2OUT parameters for side 2 are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start IEx>, Start IEx>> e/o Start IEx>>>) becomes active. The enable (ON or OFF) by means of the IE1>BLK2OUT, IE1>>BLK2OUT and/or IE1>>>BLK2OUT parameters for side 1 and IE2>BLK2OUT, IE2>>BLK2OUT and/or IE2>>>BLK2OUT parameters or side 2, inside the Set \ Profi le A(or B) \ 50N.1/51N.1-87NHIZ.1 side H/L \ IE1> Element (IE1>> Element, IE1>>> Element) \ Setpoints menus for side 1 and Set \ Profi le A(or B) \ 50N.2/51N.2-87NHIZ.2 side H/L \ IE2> Element (IE2>> Element, IE2>>> Element) \ Setpoints menus for side 2, while the BLK-2OUT-Iph-K, BLK2OUT-Iph/IE-K (relays) and/or BLK2OUT-IE-K) and (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) (LEDs) must be select inside the Set \ Profi le A(or B) sides H/L \ Selective block-BLOCK2 \ Selective block OUT menu.

Internal selective block (Block4)Note 1 The exhaustive treatment of the logical block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITOR-

ING section


••••

•

•

•

•


As well as to send or receiving a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.[1]

The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the IE1>BLK4, IE1>>BLK4, and/or IE1>>>BLK4 parameters for side H and IE2>BLK4, IE2>>BLK4, IE2>>>BLK4 parameters for side L (virtual input and output common to all protective thresholds); the following operating modes are available:




•••


IE

IE

IE

tE>> def IECLP>> defIE>> defIECLP>>Mode tECLP>> tE>>RESIE>> Enable

tE>>> def IECLP>>> defIE>>> defIECLP>>>Mode tECLP>>> tE>>>RESIE>>> Enable

tE> def IECLP> defIE> def tE> inv IECLP> invIE> invIE>Curve IECLP>Mode tECLP> tE>RESIE> Enable

all-F50N12-51N12.ai

≥

IE>> inhibition

BLK1IE>>>

IE>>>BF

IE>>> Element Start IE>>>

Start IE>>>

Start IE>>>

Trip IE>>>

Trip IE>>>

&

IE>> disbyIE>>>

&

IE>>>BLK2IN

&

IE> disbyIE>>>

BLK1IE>>

IE>> Element

BLK2OUT

Start IE>>

Start IE>>

Trip IE>>

&

IE> disbyIE>>

&

IE>>BLK1

&

IE>>BLK2IN

IE> inhibition

Block1

BLK1IE>

CLPIE>

CLPIE>>

CLPIE>>>

IE> Element

BLK2OUT

BLK4OUT

BLK2INIE>

BLK2INIE>>

Start IE>

Trip IE>

&

IE>BLK1

Block2 &

IE>BLK2IN

Start I2ndh> &

IE>2ndh-REST

IE>BLK2OUT

Start I2ndh> &

IE>>2ndh-REST

Start I2ndh> &

IE>>>2ndh-REST

&

IE>>>BF

IE>>BFIE>> Trip &

IE>>BF

IE>BFTrip I> &

IE>BF

Start IE> &

IE>>BLK2OUT

Start IE>> &

BLK2OUTIE>>>BLK2OUT

Start IE>>> &

BLK4OUTIE>BLK4

Start IE> &

IE>>BLK4

Start IE>> &

BLK4OUTIE>>>BLK4

Start IE>>> &

Block1

Block2

&

IE>>>BLK1

Block1

Block2

Start I>&

Start IE>>&

Start IE>>>&

Start IE>>&

BLK2INIE>>>Start IE>>>

&

Start I>&


General logic diagram of the residual overcurrent elements 50N.1/51N.1 and 50N.2/51N.2


Fun_50N12-51N12S1.ai

t >RES

T0

RESET

t E>

0T

≥1

t E>def

t E>inv

t E>RES

Star t IE>

Tr ip IE>

CB-State

Start I2ndh>

ON≡ Inh ib i t( f rom IE>> and/or IE>>> res idual overcurrent e lement)

ON≡Enable IE> res idual overcurrent e lement

IE> inh ib i t ion


&

T 0t ECLP>

&

2nd harmonic restra int enable (ON≡Enable) IE>2ndh-REST

IECLP>Mode

t EC L P >

BF Enable (ON≡Enable) IE>BF

towards BF logic IE> BF&Trip IE>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

IE> Curve

0T

ABC

A =“1”A =“0 or OFF”

Output t ECLP>

IE> Enable

IE> residual overcurrent element (50N/51N) Block diagram

tECLP>


Output tECLP>

t

0.1 s





IE>TR-K IE>TR-L

IE>ST-L IE>ST-K

≥1 CLP IE>

I E

≥1



I EC L P >def I EC L P >inv

I E ≥ I ECLP>

&

State

IE>inv

I E ≥ IE>def

I E ≥ IE>inv

IE>def

&

State

Note: inside all the diagram the H or L index , which identify the variables on the side of 1 or 2 are not indicated

Residual overcurrent (50N/51N) - First element logic diagram 50N.1/51N.1 and 50N.2/51N.2


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>BLK1


Pi lot wire input

& IE>BLK2IN

BLK2IN-Iph

Start IE>

Trip IE>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

Block2 output

Block4-in-out

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>

BLK4IN IE>

&

&

BLK2IN IE>&


Block1

Block1

Block4

Block2

Block1

Block1


Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the first element





Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>


IE>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>BLK4

Start IE> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the first element



Fun_50N12-51N12S2.ai

t E>>RES

T0

RESET

t E>>

0T

≥1

t E>>deft E>>RES

Star t IE>>

Tr ip IE>>

CB-State

Start I2ndh>

IE>> inhib i t ion


&IE>>TR-K IE>>TR-L

IE>>ST-L IE>>ST-K

T 0t ECLP>>

&

2nd harmonic restra int enable (ON≡Enable) IE>>2ndh-REST

IECLP>>Mode

t E C L P >>

BF Enable (ON≡Enable) IE>>BF

towards BF logic IE>> BF&Trip IE>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

Output t ECLP>>

IE>> Enable

IE>> RESIDUAL overcurrent element (50n/51n) Block diagram

tECLP>>


Output tECLP>>

t

0.1 s






Star t IE>>

Start IE>>

IE> inhib i t ion IE> d isby lE>>

≥1 CLP IE>>

ON≡ Inh ib i t( f rom IE>>> res idual overcurrent e lement)

ON≡Enable IE>> res idual overcurrent e lement

I E>>def

A =“1”A =“0 or OFF”

I E



I EC L P >>def

I E ≥ I ECLP>>def

&

State

I E ≥ IE>>def

Nota: nello schema non sono indicati gli indici 1 oppure 2 che identificano le variabili relative all’ingresso IE1 oppure IE2

Measured residual overcurrent (50N.1/51N.1 and 50N.1/51N.1) - Logic diagram of the blocking signals concerning the second element


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>>BLK1


Pi lot wire input

& IE>>BLK2IN

BLK2IN-Iph

Start IE>>

Trip IE>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

Block2 output

Block4-in-out

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>>

BLK4IN IE>>

&

&

BLK2IN IE>>&


Block1

Block1

Block4

Block2

Block1

Block1


Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the second element





Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>&Block2 output

(ON≡Enable) IE>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the second element



t E>>>RES

T0

RESET

t E>>>def

0T

≥1

t E>>>deft E>>>RES

Star t IE>>>

Tr ip IE>>>

CB-State

Start I2ndh>

ON≡Enable IE>>> res idual overcurrent e lement


&IE>>>TR-K IE>>>TR-L

IE>>>ST-L IE>>>ST-K

T 0t ECLP>>>

&

2nd harmonic restra int enable (ON≡Enable) IE>>>2ndh-REST

IECLP>>>Mode

t EC L P >>>

BF Enable (ON≡Enable) IE>>>BF

towards BF logic IE>>> BF&Trip IE>>>

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A = ON - Change settingB = OFFC = ON - Element blockingOutput t ECLP>>>

IE>>> Enable

IE>>> residual overcurrent element Block diagram

tECLP>>>


Output tECLP>>>

t

0.1 s




&

(ON≡ Inh ib i t )

Star t IE>>>

Start IE>>>

Start IE>>>

(ON≡ Inh ib i t )

IE> inh ib i t ion IE>disbylE>>>

& IE>> inhib i t ion IE>>disbylE>>>

≥1 CLP IE>>>

I E>>>def

A =“1”A =“0 or OFF”

I E



I EC L P >>>def

I E ≥ I ECLP>>>def

&

State

I E ≥ IE>>>def

Measured residual overcurrent (50N.1/51N.1 and 50N.1/51N.1) - Logic diagram of the blocking signals concerning the third element



Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

T 0t B-Iph

≥1≥1

≥1

≥1

t B-Iph

t B-IE

&

IE>>>BLK1


Pi lot wire input

& IE>>>BLK2IN

BLK2IN-Iph

Start IE>>>

Trip IE>>>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

Block2 input

Block2 output

Block4-in-out

tB-KtB-L





BLIN1

T 0t B-IE

Block2 IE

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1


Logic INx t ON

INx t ON

INx t OFF


BLK1 IE>>>

BLK4IN IE>>>

&

&

BLK2IN IE>>>&


Block1

Block1

Block4

Block2

Block1

Block1


Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the third element





Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1Start IE>>>


IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


IE>>>BLK4

Start IE>>> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Measured residual overcurrent (50N/51N) - Logic diagram of the blocking signals concerning the third element



Low impedance restricted ground fault- 64REF[1]

PrefaceOne operation threshold with adjustable intentional delay with defi nite time characteristic.

Operation and settings[2]

When there is no earth fault, no starpoint current IE fl ows and the computed residual current (IE(H) = IL1(H) + IL2(H) + IL3(H)) is also zero.iE and iE(H) are conventionally regarded as positive if coming into their respective amperometric clamp reference input (C7 per i E1, C1-C3-C5 per i E (H)), negative if outgoing.For internal fault to the protected area (IL2(H) in the following example), iE1 and iE(H) are thus both positive, ie the phasors IE and IE(H) are in phase (assuming the same system of grounding of the star point and network).

When the fault is outside the protected area iE1 is positive and iE(H) is negative ie phasors IE1 and IE(H) are opposite in phase.

The residual fundamental frequency current, acquired by means of a current transformer installed in the starpoint connection to ground - side H, is compared with the stabilization current defi ned as:

IES(H) = 4 · [|pE1·IE1 - ME(H)·IE(H)| - |pE·IE1 + ME(H)·IE(H)|] if [|pE1·IE1 - ME(H)·IE(H)| - |pE·IE1 + ME(H) ·IE(H)|] > 0orIES(H) = 0 se [|pE1·IE1 - ME(H) · IE(H)| - |pE1·IE1 + ME(H)·IE(H)|] ≤ 0

where:IE1 is the residual current phasor IE1,IE(H) is the calculated residual current (fundamental wave of the phase currents sum) side H,pE is the amperometric polarity of the residual current so that it can be corrected any possible re-versal of polarity; if the amperometric polarity is according the schematic connection diagram the corresponding setting is C7-C8 POL = NORMAL (pE1 = +1), otherwise is INVERSE (pE1 = -1). The C7-C8 POL parameter is available inside the Set \ Polarity menu.ME(H) is an amplitude compensating factor of residual current calculated by the relay as follows from the Inp, In, IEnp, IEn, parameters setting inside the Set \ Base menu Inp(H), InH, IEn1p, IEn1:

ME(H) = (Inp(H) / In(H)) / (IEn1p / IEn1)

The ME(H) factor expresses the value that is multiplied by the residual current calculated by the cur-rent of phase CTs in order to obtain an amplitude equal to that of the residual current measured by CT on grounding the neutral in case of earth fault outside the protected area. The relay also checks that the ME(H) value is ≤ 200 and if this condition is not met, the relay displays a warning and requires the programming of parameters Inp(H), In(H), IEn1p, IEn1 available inside the Set \ Base menu. Being compensated in amplitude the calculated residual current, the threshold setting of the element is always referred to the rated current of the CT on grounding connection of neutral (IE1).

The current iE1 and iE(H) are conventionally regarded as positive if entrants in their respective reference terminal of the current input, whether negative terminals. Internal fault in the protected area, iE1 and iE(H) are thus both positive, and that the phasors are in phase (assuming the same system of earthing of the star and the network), while a fault outside the protected area iE1 is positive and iE(H) negative and that the phasors are in phase opposition.

To understand how the 64REF element does work, to simplify, consider PE1 = +1 and ME(H)=1, , accord-ing to the connection diagram and use of CTs with the same ratio on the grounding neutral-side H.The trip current is the residual current measured directly by the CT on the starpoint grounding con-nection.

Note 1 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the protection of thermal imaging side 2 is similar to that of the side function 1.

Note 2 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the protection of side L is similar to that of the side H function.

•••

•

IL2(H)IE1

IE1 IE(H) = iL1(H) + iL2(H) + iL3(H)

L1L2L3

IE1 IE(H)

IL2(H)IE1

IE1 IE(H) = iL1(H) + iL2(H) + iL3(H)

L1L2L3

IE1 IE(H)


The stabilization current is computed by the relay using the sum and difference method of the cur-rents on the grounding path (direct measurement) and line currents (calculated as sum of phase currents). The current stabilization thus depends on the residual current values as well on the their displacement angle ϕ.

Three operating conditions with ideal and matched measurement CTs (pE1 = +1 and ME(H) =1) are considered:

Earth fault inside the protected zone, powered only from the starpointThe trip current is equal to IE1 while, being IE(H) = 0, the stabilization current is: IES(H) = 4 · (IE1 - IE1) = 0The element trips when the fault current exceeds the minimum threshold set IREF(H)> (maximum sensitivity for internal fault).

Earth fault inside the protected zone, powered from both sidesThe trip current is equal to IE while, assuming that IEC has the same module and is in phase (ϕ = 0 °) with IE1, hence: IES(H) = 4 · (|IE1 - IE1 | - |IE1 + IE1 |) = - 8 · |IE1| < 0 => IES(H) = 0Since IES(H) is zero, so that the element trips when the fault current exceeds the minimum threshold set IREF(H)> (maximum sensitivity for internal earth fault).

Earth fault outside the protected zone (external fault)The trip current is still equal to IE, while being ideally IE(H) = -IE1 (residual current on the starpoint grounding out of phase with the phase side H residual current, i.e ϕ = 180 °), the stabilization cur-rent is: IIES(H) = 4 · (|IE1 + IE1 | - |IE1 - IE1 |) = 8 |IE1|that being positive and equal to eight times the tripping current, determines the stabilization ex-ternal fault protection on increasing to infi nity the trip threshold (maximum stability for external earth fault). If any CT gets saturation, a displacement angle ϕ <180 ° is introduced, weakening the stabilization current.In particular, the maximum stability on external fault is obtained with ϕ ≥ 100 °. For ϕ ≤ 90 ° however, the stabilization current is nothing and protection has, therefore the maximum sensitivity.For ϕ increasing from 90 ° to 100 ° the sensitivity decreases from IREF(H)> to infi nity.

The start of the 64REF side H threshold becomes active when the following condition are contempo-raneously active:

IES(H) ≤ 4 · IREF(H)>IE1 ≥ IES(H) + [IREF(H) >/[1-(IES(H)/4 · IREF(H)>)20] or in normalized form:

[IE1/IREF(H)>] ≥ [IES(H) /IREF(H)>] + [1 /[1-(IES(H) /(4 · IREF(H)>))20]64REF(H) Enable = ON64REF(H)-BLK1 = OFF

where:64REF(H) Enable is the enabling parameter of the 64REF element side HIREF(H)> is the minimum threshold setting (max sensitivity) of the 64REF element side H64REF(H)-BLK1 is the output logic state for the logic block function of the 64REF element. side H.

After expiry of the associated delay time (tREF(H)>) a trip command is issued (TR IREF(H)); if instead the A), B), C) and D) conditions current don’t remain valid, the element it is restored.The restricted ground fault protection is then stabilized against external faults by increasing the threshold of residual current measured at the grounding of the neutral current with increasing stabi-lization in accordance with the following characteristics:

•

•

•

A)B)

C)D)

•••

IE1

ϕ

-IE(H)

IES(H)/4

IE1-IE(H)

IE1+IE(H)

IE(H)


NO TRIPPING

TRIPPING

0

1

2

3

4

5

6

7

8

9

10

IES(H)/IREF>

IE1/IREF(H)>

10.5 21.5 32.5 43.5 54.5

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


&

Enable (ON≡Enable) 64REF-BLK1

Block1

Block1

Block1

RESET

t REF>0T

t REF>

Start 64REF>

Tr ip 64REF>

ON≡Enable

&

64REF-ST-K 64REF-ST-L

64REF-TК-K 64REF-TК-L

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

64REF-Enable Star t 64REF>

I REF>

I ES ≤ 4I REF>

I E ≥ I REF> · I ES + [I REF>/[1-(I ES/4 · I REF>)20]

I E

I EC

Block2 output

Block4-in-out

&Start 64REF>

Trip 64REF>BLK1 64REF>

BLK4IN 64REF>&

&

Block4

Block1

≥1 Block1, Block4

Restricted eart fault (64REF) - Logic diagram





Block2 output

Pi lot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1

Start 64REF>&Block2 output

(ON≡Enable) 64REF>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT



Block4-input-output

t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


64REF>BLK4

Start 64REF> CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Restricted eart fault (64REF) - Logic diagram of the blocking signals concerning the first element



Breaker failure (BF)The element can produce the Breaker Failure side H output if the 64REF(H)-BF, parameter is set to ON. The parameters are available inside the Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side H menu.[1]

Similarly the element can produce the Breaker Failure side L output if the 64REF(L)-BF, param-eter is set to ON. The parameters are available inside the Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side L menu.

The following block criteria are available:Logical block (Block1)

If the 64REF(H)-BLK1 enabling parameter is set to ON and a binary input is designed for logi-cal block (Block1), the element is blocked off whenever the given input is active.[2] The enabling parameters are available inside the menu Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side H menu for side H and/or Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side L menu for side L, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.

Selective block (Block2)For the protective element the output selective block may be set.The logic selectivity function may be performed by means any combination of the following I/O:

One committed pilot wire output (BLOUT1).One or more output relays designed for output selective block.



Use of output relay (K1...K6):If the 64REF(H)-BLK2OUT enable parameter for side H and the 64REF(L)-BLK2OUT enable parameter for side L is set to ON and a output relay is designed for selective block (Block2), the pro-tection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK-2OUT-Iph/IE), whenever the given element (Start 64REF) becomes active. The enable 64REF(H)-BLK2OUT parameter (ON or OFF) for side H and 64REF(L)-BLK2OUT parameter (ON or OFF) for side L is available inside the Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side H menu for side H and/or Set \ Profi le A(or B) \ Low impedance restricted ground fault-64REF side L menu for side L, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menu.


The internal selective block of one or more element concerning the phase overcurrent function may be enabled/disabled by means the 64REF(H)-BLK4 parameter for side H and 64REF(L)-BLK4 parameter for side L (virtual input and output common to all protective thresholds); the following operating modes are available:






••

•

•

•••


Differential protection (87T)Preface

Stabilized Differential NT10 Relay for two-winding power transformers with dual-slope percentage characteristic.

Defi nitionsiL1(H) instantaneous value of L1 phase current on side HiL2(H) instantaneous value of L2 phase current on side HiL3(H) instantaneous value of L3 phase current on side HiL1(L) instantaneous value of L1 phase current on side LiL2(L) instantaneous value of L2 phase current on side LiL3(L) instantaneous value of L3 phase current on side L

These currents are conventionally regarded as positive if incoming in their reference terminal phase current input of the relay, negative if outgoing.

iL1C(H) instantaneous value of L1 compensated phase current on side HiL2C(H) instantaneous value of L2 compensated phase current on side HiL3C(H) instantaneous value of L3 compensated phase current on side HiL1C(L) instantaneous value of L1 compensated phase current on side LiL2C(L) instantaneous value of L2 compensated phase current on side LiL3C(L) instantaneous value of L3 compensated phase current on side L

With compact notation the previous vectors are referred to the iL(w) and iLC(w), where w = H, L is the index of the two sides of the differential protection.

In order to correct any amperometric reversal polarity or phase cyclical sequence, and making equal amplitude and phase currents on the sides of the differential protection and eventually eliminate the element of homopolar sequence, the relay performs the compensation of amplitude, polarity, phase and cyclic sequence and zero sequence currents as follows:iLC(w) = M(w) ∙ P(w) ∙ C(w) ∙ iL(w) whith w = H, L where:M(w) is a compensating factor in the current amplitude of the side w. P(w) is the polarity matrix of the of the amperometric polarities of the side w.C(w) is the phase compensation matrix and cyclic sequence and zero sequence currents of the homopolar sequence of the side w.

••••••

••••••

iL(H) = iL2(H) vector of instantaneous value of phase currents on side H

iL1(H)

iL3(H)

iLc(H) = iL2c(H) vector of instantaneous value of compensated phase currents on s

iL1c(H)

iL3c(H)

iLc(L) = iL2c(L) vector of instantaneous value of compensated phase currents on s

iL1c(L)

iL3c(L)

iL(L) = iL2(L) vector of instantaneous value of phase currents on side L

iL1(L)

iL3(L)


Magnitude matchingM(w) is a compensating factor in the current amplitude of the w side; it expresses the values that are multiplied by the currents of the w side in order to obtain an amplitude equal to that of the currents on one side chosen as a reference.If inside the Set \ Base menu the MatchType=ESTERNAL parameter is set (external compensation with adapter CTs), then:

M(w) = 1

However, if inside the Set \ Base menu the MatchType=INTERNAL parameter is set then M(w) is calculated by the relay as follows:

Calculation of the rated currents of the sides of the transformer from Snt rating (in MVA) and rated voltages VntH, VntL in kV programmed in the Set \ Transformer menu:

IntH = 1000 ∙ Snt / [√3 ∙ VntH] rated current of side H of transformerIntL = 1000 ∙ Snt / [√3 ∙ VntL] rated current of side L of transformer

Calculation of the difference (mismatching) between the CT primary rated current and rated cur-rent of the sides of the transformer, starting from the InpH, InpL, InH, InL programming parameters inside the Set \ Base menu and from the currents calculated in the preceding paragraph:

mH = InpH /IntH mismatching coeffi cient on side H of transformermL = InpL /IntL mismatching coeffi cient on side L of transformer

where: InpH, InpL are the CTs rated current on sides H and L

The relay checks that the values of the mismatching coeffi cients are between 1.0 and 2.5, if the condition is not met, a warning message is issued and a correction of the Snt, VntH, VntL, InpH, InpL parameters is required.

Choosing the transformer side[1] (RefSide) that the current amplitude compensations are taken as a reference: the side reference chosen by the relay is the one with the lowest mismatching coeffi cient. If the two sides have an equal value of the mismatching coeffi cient, the reference is chosen as the side with the index H

If H is the reference side for current amplitude compensation, the current amplitude factors M (w) are calculated as follows:

M(H) = [mH / mH]] / [InH /InH] = 1 M(L) = [mL / mH]] / [InL /InH]

If L is the reference side for current amplitude compensation, the current amplitude factors M (w) are calculated as follows: M(H) = [mH / mL]] / [InH /InL] M(L) = [mL / mL]] / [InL /InL] = 1

Polarity matchingP (w) is the matrix of the amperometric polarity of w side. It allows us to consider each with its own input current phase angle (coeffi cient +1 with NORMAL setting) or with opposite phase angle (with coeffi cient -1 REVERSE setting), allowing correction of any sw current polarity reversals due to connection errors.P(w) is defi ned as:

The coeffi cients of amperometric polarity (C09-C10 POL for pL1(H), C11-C12 POL for pL2(H), C13-C14 POL for pL3(H), C01-C02 POL for pL1(L), C03-C04 POL for pL2(L), C05-C06 POL for pL3(L)) can each take the value +1 (NORMAL) or -1 (REVERSE), based on the programming of the same coeffi cients in the Set \ Polarity menu. If the amperometric polarity correspond to those of the cor-responding wiring diagram programming is +1, otherwise -1.

Note 1 settings of the differential protection are referred to the CT’s rated current on the side chosen by the relay as a reference for amplitude compen-sation in (Inref).

The side chosen as a reference for amplitude compensation (RefSide) and the primary CT rated current of that side (Inref) are displayed in the Set \ Base menu

A)

B)

C)

D)

P(H) = 0 pL2(H) 0

pL1(H) 0 0

0 0 pL3(H)

P(L) = 0 pL2(L) 0

pL1(L) 0 0

0 0 pL3(L)


Phase and ciclic sequenze and zero sequenze matchingC (w) is the matrix of phase compensation and cyclic sequence and zero-sequence currents of the w side. It expresses the compensation which the current displacements are corrected so that they are in-phase (zero phase shift) with currents on the reference side and possibly fi ltered by the zero sequence components.It allows sw correction of the phase currents displacement on the sides of the transformer due to the transformer vector group, any phases reversal of cyclic sequence and the elimination of any zero sequence components that may occur on some sides as a result of connection of the windings of the transformer and its ground against ground faults outside the zone of differential protection.

MatchType=ESTERNALIf inside the Set \ Base menu the MatchType=ESTERNAL parameter is set (compensation with external CTs), then C(w) is the identity matrix:

MatchType=INTERNALIf inside the Set \ Base menu the MatchType=INTERNAL parameter is set then the C(w) matrix is defi ned by relay as:

Calculation of the displacement of phase currents of each side concerning the H-side, from the VectGroup(H) e VectGroup(L) programming parameters in the Set \ Transformer menu:

(H) = VectGroup(H) ∙ 30° = 0 Current displacement on side H(L) = [VectGroup(H) - VectGroup(L)] ∙ 30° Current displacement on side L

Side of reference choice for the current phase compensation programming parameters from Conn(H) and Conn(L) parameters inside the Set \ Transformer menu: the delta winding (D or d programming) or zig-zag (Z or z programming) side is the reference side. If more than one winding is delta connected or zig-zag, or if no winding is connected delta or zig-zag as the reference is chosen to side with the index H.

The relay calculates the angle of compensation phase for each side c(H), c(L) through the reference side for the phase compensation of point B) above, through the current phase shifts calculated in paragraph A) above setting and through the setting of the I-sequenceH parameter for side H and I-sequenceL for side L available inside the Set \ Input sequence menu . The cal-culation is done as shown in the following table.

Reference sidefor phase compensation

Phese Cyclic sequence(I-sequence)

Phase compensation angles c(w)

HI-sequenceH L1, L2, L3 c(H) = (H) - (H) = 0

c(L) = (H) - (L) = 0

I-sequenceH L1, L3, L2 c(H) = (H) - (H) = 0 c(L) = (L) - (H) = 0

LI-sequenceL L1, L2, L3 c(H) = (L) - (H) = 0

c(L) = (L) - (L) = 0

I-sequenceL L1, L3, L2 c(H) = (H) - (L) = 0 c(L) = (L) - (L) = 0

Depending on the compensation angles referred to in paragraph C), on the Gnd(w) parameter setting available inside the Set \ Transformer menu, the relay considers the phase compensation matrix C (w) the cyclic sequence mode and zero-sequence current of side w = H, L as shown in the following tables.

A)

B)

C)

D)

C(H) = 0 1 0

1 0 0

0 0 1

C(L) = 0 1 0

1 0 0

0 0 1


c(w)w = H, L

Gnd(w) = Ou w = H, L

Gnd(w) = Inw = H, L

0

Applied to the reference side w for phase compensation or to the w secondary side of power transformers Yy0, Dd0, Dz0, Zd0 in which the primary side is the reference side for the phase compensation.

C(w) = 0 1 0

1 0 0

0 0 1

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side w. The connection of the

secondary phase of the CT-adapters to the relay inputs is L1-L1, L2-L2, L3-L3, with the same

polarity.

C(w) = -1/3 2/3 -1/3

2/3 -1/3 -1/3

-1/3 -1/3 2/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side w and connected with the tertiary delta closed in short-circuit with transformation ratio 1 / 3

that removes the zero-sequence component from the compensated current for the side w. The connection

of the secondary phase of the CT-adapters to the relay inputs is L1-L1, L2-L2, L3-L3, with the same polarity.

-30

Applied to the w secondary side of power transformers Dy11, Zy11 in which the primary side is the reference side for phase compensation.

C(w) = -1/√3 1/√3 0

1/√3 0 -1/√3

0 -1/√3 1/√3

Same as Yd1 adapter CTs with transformation ratio 1 / 3 on the side w. The connection of the


polarity.

C(w) = -1/√3 1/√3 0

1/√3 0 -1/√3

0 -1/√3 1/√3

Same as Yd1 adapter CTs with transformation ratio 1 / 3 on the side w. The connection of the secondary phase of the CT-adapters to the relay inputs is L1-L1,

L2, L2, L3, L3, with the same polarity.

-60

Applied to the w secondary side of power transformers Dd10, Dz10, Zd10 where the primary side is the reference side for phase compensation.

C(H) = -1 0 0

0 0 -1

0 -1 0


secondary phase of the CT-adapters to the relay inputs is L3-L1, L1-L2, L2-L3, with reverse

polarity.

C(w) = -2/3 1/3 1/3

1/3 1/3 -2/3

1/3 -2/3 1/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side we connected with the tertiary delta closed short-circuit transformation ratio of 1 / 3 that

removes the component from the zero-sequence compensated current for the side w. The connection of the secondary phase of the CT-adapters to the re-lay inputs is L3-L1, L1-L2, L2-L3, with reverse polarity.

-90

Applied to the w secondary side of power transformers Dy9, Zy9 where the primary side is the reference side for phase com-pensation.

C(w) = -1/√3 0 1/√3

0 1/√3 -1/√3

1/√3 -1/√3 0

Same as Yd3 adapter CTs with transformation ratio 1 / 3 on the side w. The connection of the second-ary phase of the CT-adapters to the relay inputs is

L1-L1, L2-L2, L3-L3, with the same polarity.

C(w) = -1/√3 0 1/√3

0 1/√3 -1/√3

1/√3 -1/√3 0



-120


C(w) = 0 0 1

0 1 0

1 0 0

Same as Yy0 adapter CTs with transformation ratio 1/1 on the side w. The connection of the


polarity.

C(w) = -1/3 -1/3 2/3

-1/3 2/3 -1/3

2/3 -1/3 -1/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side we connected with the tertiary delta closed short-circuit transformation ratio of 1 / 3 that removes the component from the zero-sequence compensated current for the side w. The connection of the second-

ary phase of the CT-adapters to the relay inputs is L3-L1, L1-L2, L2-L3, with the same polarity.

-150


C(w) = 0 -1/√3 1/√3

-1/√3 1/√3 0

1/√3 0 -1/√3



C(w) = 0 -1/√3 1/√3

-1/√3 1/√3 0

1/√3 0 -1/√3


L2-L2, L3-L3, with the same polarity.


c(w)w = H, L

Gnd(w) = Outw = H, L

Gnd(w) = Inw = H, L

-180

Applied to the w secondary side of power transformers Yy6, Dd6, Dz6, Zd6 where the primary side is the reference side for phase compensation.

C(w) = 0 -1 0

-1 0 0

0 0 -1


secondary phase of the CT-adapters to the relay inputs is L1-L1, L2-L2, L3-L3, with reverse

polarity.

C(w) = -1/3 2/3 -1/3

2/3 -1/3 -1/3

-1/3 -1/3 2/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side w and connected with the tertiary delta closed in short-circuit with transformation ratio 1 / 3

that removes the zero-sequence component from the compensated current for the side w. The connection

of the secondary phase of the CT-adapters to the relay inputs is L1-L1, L2-L2, L3-L3, with reverse polarity.

-210


C(w) = 1/√3 -1/√3 0

-1/√3 0 1/√3

0 1/√3 -1/√3



polarity.

C(w) = 1/√3 -1/√3 0

-1/√3 0 1/√3

0 1/√3 -1/√3



-240


C(H) = 1 0 0

0 0 1

0 1 0



polarity.

C(w) = 2/3 -1/3 -1/3

-1/3 -1/3 2/3

-1/3 2/3 -1/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side we connected with the tertiary delta closed short-circuit transformation ratio of 1 / 3 that

removes the component from the zero-sequence compensated current for the side w. The connection

of the secondary phase of the CT-adapters to the relay inputs is L3-L1, L1-L2, L2-L3, with the same polarity.

-270


C(w) = 1/√3 0 -1/√3

0 -1/√3 1/√3

-1/√3 1/√3 0



C(w) = 1/√3 0 -1/√3

0 -1/√3 1/√3

-1/√3 1/√3 0



-300


C(w) = 0 0 -1

0 -1 0

-1 0 0

Same as Yy0 adapter CTs with transformation ratio 1/1 on the side w. The connection of the

secondary phase of the CT-adapters to the relay inputs is L2-L1, L3-L2, L1-L3, with reverse polarity.

C(w) = 1/3 1/3 -2/3

1/3 -2/3 1/3

-2/3 1/3 1/3

Same as Yy0 adapter CTs with transformation ratio 1 / 1 on the side we connected with the tertiary delta closed short-circuit transformation ratio of 1 / 3 that removes the component from the zero-sequence compensated current for the side w. The connection of the second-

ary phase of the CT-adapters to the relay inputs is L2-L1, L3-L2, L1-L3, with reverse polarity.

-330


C(w) = 0 1/√3 -1/√3

1/√3 -1/√3 0

-1/√3 0 1/√3


secondary phase of the CT-adapters to the relay inputs is L1-L1, L2-L2, L3-L3, with the same polarity.

C(w) = 0 1/√3 -1/√3

1/√3 -1/√3 0

-1/√3 0 1/√3




Calculation of the differential and stabilizing currentsFollowing calculation is performed by device:

Instantaneous value of stabilization currents:iSL1 = {iL1c(H) + sign[iL1c(L) ∙ iL1c(H)] ∙ iL1c(L)} /2iSL2={iL2c(H)+sign[iL2c(L) ∙ iL2c(H)] ∙ iL2c(L)} /2iSL3={iL3c(H)+sign[iL3c(L) ∙ iL3c(H)] ∙ iL3c(L)} /2where sign [x ∙ y] is the signum function of the product between the instantaneous values x and y, defi ned as:sign[x ∙ y] = +1 se x ∙ y ≥ 0sign[x ∙ y] = -1 se x ∙ y < 0

Instantaneous value of differential current for each phase:idL1 = iL1c(H) + iL1c(L)idL2 = iL2c(H) + iL2c(L)idL3 = iL3c(H) + iL3c(L)

RMS value of fundamental component of the stabilization currents:ISL1 = DFT1[iSL1]ISL2 =DFT1[iSL2]ISL3 =DFT1[iSL3]where DFT1[x] is the calculus of the rms value of fundamental component of the instantaneous val-ues x using DFT (Discrete Fourier Transform).It is noted that the effective values of the fundamental component of the stabilization currents, whose instantaneous values are calculated as in A) equal to the sum, divided by two, of the modules concerning the phasors compensated currents of the two sides:

RMS value of fundamental component of the differential currents:IdL1 = DFT1[IdL1]IdL2 = DFT1[IdL2]IdL3 = DFT1[IdL3]

It is noted that the RMS values of the fundamental component of the differential currents, whose instantaneous values are calculated as in B) equal to the module of vector difference between the compensated current phasors on side H and compensated current phasors on side L:

A)

B)

C)

D)

sign[x ∙ y] = +1 ≡ high stabilization

sign[x ∙ y] = -1 ≡ low stabilization

ISL1 = |IL1c(H) + IL1c(L)| / 2

ISL2 = |IL2c(H) + IL2c(L)| / 2

ISL3 = |IL3c(H) + IL3c(L)| / 2

IdL1 = |IL1c(H) + IL1c(L)|




External fault stabilization by means of operating dual-slope percentage characteristicThe start of the fi rst threshold of the differential protection on L1 phase (ST Id-L1) occurs when all the following conditions are met:

87 Enable = ONIdL1 ≥ Id>IdL1 ≥ K1/100) ∙ ISL1IdL1 ≥ K2/100) ∙ ISL1 - Q87H-REST-L1 = OFF87SatDet-L1 = OFFBLK1 87 = OFF

where:87 enable parameter for both the differential protection thresholds,Id> adjustment of the minimum threshold (or maximum sensitivity) of the differential protection,K1 adjustment as a percentage of the slope of the fi rst segment of the operating characteristic of differential protection,K2 adjustment as a percentage of the slope of the second segment of the operating characteristic of differential protection,Q y-axis intercept of the line of the second segment of the operating characteristic of differential protection,87H-REST-L1 logic state output of the the second and fi fth harmonic restraint for phase L1,87SatDet-L1 logic state output of the CT’s saturation detector for phase L1,BLK1 87 logic state output of the logic block function of the differential protection.

All differential elements can be enabled or disabled by setting ON or OFF the 87T Enable param-eter inside the Set \ Profi le A(or B) side H /L \ Differential 87T \ Common confi guration menu.

The Id>, K1, K2 and Q parameters are available inside the Set \ Profi le A(or B) side H /L \ Differen-tial 87T \ Id> Element \ defi nite time.

Similarly the start of the fi rst threshold of the differential protection on L2 (ST Id>-L2) or L3 (ST Id>-L3) phase occurs when all the following conditions are met:



where 87H-REST-L2 and 87H-REST-L3 are the output state of the second or fi fth harmonic restraint for L2 and L3 phases respectively, 87SatDet-L2 and 87SatDet-L3 are the output state of the saturation detector for L2 and L3 phases.

The start of the fi rst differential protection element (ST Id>) occurs at the instant of occurrence of the threshold start in at least one of the L1, L2, L3 phases.

If the three conditions that led to the start of the fi rst threshold of the differential protection on L1, L2, L3 phases are maintained all for the duration of intentional delay td>, when the time expires the element trips.

The start of the second threshold of the differential protection on L1 phase (ST Id>>-L1) occurs when all the following conditions are met:

87 Enable = ONIdL1 ≥ Id>>BLK1 87 = OFF

where Id>> is the setting threshold of the differential protection element.

Similarly the start of the second threshold of the differential protection on L2 (ST Id>>-L2) or L3 (ST Id>>-L3) phase occurs when all the following conditions are met:



•••••••

•••

•

•

•••

•••••••

•••••••

•••

•••

•••


The operation of the second differential protection threshold (TR Id>>) occurs at the instant when the intervention occurs the threshold in at least one of the L1, L2, L3 phases.

If the three conditions that led to the start of the second threshold of the differential protection on L1, L2, L3 phases are maintained all for the duration of intentional delay td>, when the time expires the element trips.

The Id>> parameter is available inside the Set \ Profi le A(or B) side H /L \ Differential 87T \ Id>> Element \ Defi nite time menu.

Differential protection is thus stabilized against external faults by increasing the threshold current differential with increasing current passing through the protected area, according to the following operating characteristic double slope percentage in the Id-IS plan (where the Id value is the funda-mental component of the differential current in the L1 or L2 or L3 phases and IS is the fundamental component of stabilization current in the L1 or L2 or L3 phases).

Breaker failure (BF)With single enable fl ag for fi rst or second threshold of differential protection the element can pro-duce the Breaker Failure side H and/or side L output if the 87T(H)-BF for side H and/or 87T(L)-BF for side side L, parameter is set to ON. The parameters are available inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Common confi guration.[1]

The following block criteria are available:Logical block (Block1)

If the 87T-BLK1 enabling parameter is set to ON and a binary input is designed for logical block (Block1), the element is blocked off whenever the given input is active.[2] The enabling parameters are available inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Common confi guration menu, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.

Selective block (Block2)With single enable fl ag for fi rst or second threshold of differential protection the element can pro-duce the output block (committed pilot wire or output relay) programmed for logic selectivity of side H and/or side L if the 87T-BLK2OUT parameter is set to ON inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Common confi guration menu.The logic selectivity function may be performed by means any combination of the following I/O:

One committed pilot wire output (BLOUT1).One or more output relays designed for output selective block.



Use of output relay (K1...K6):If the 87T-BLK2OUT enable parameter is set to ON and a output relay is designed for selec-tive block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph) or by any protection element (BLK2OUT-Iph/IE), whenever the given element (Start 87T) becomes active, while the BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays and LEDs (BLK2OUT-Iph-L, BLK2OUT-Iph/IE-L e/o BLK2OUT-IE-L) must be select inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menu.



••

•

•

NO TRIP

TRIP

Is

Id

Id>

Id1=(K2/100) ∙ IS -Q

Id1=(K1/100) ∙ IS

0

-Q

α2α1

Id>>


Internal selective block (Block4)As well as to send a selective block toward other protective relays, each protective element may be enabled for transmit a selective block from/to other internal protective elements.[1]

With single enable fl ag for fi rst or second threshold of differential protection the element can pro-duce the output block (committed pilot wire or output relay) programmed for logic selectivity of side H and/or side L if the 87T-BLK1parameter is set to ON inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Common confi guration menu.

Stabilization at insertion and excitation of the power transformer with the second and fi fth harmonic restraint respectively

The second harmonic restraint of differential protection allows you to block unwanted operation at powering of the transformer.

The fi fth harmonic restraint of differential protection allows you to block unwanted operation at dur-ing the operation of the transformer in over-excitation state.

The relay calculates:

RMS value of the second harmonic component of differential currents:Id2L1=DFT2[IdL1]Id2L2=DFT2[IdL2]Id2L3=DFT2[IdL3]where DFT2[x] is the calculated rms value of the second harmonic component of differential cur-rents concerning the x variable obtained by Discrete Fourier Transform (DFT).

RMS value of the fi fth harmonic component of differential currents:Id5L1=DFT5[IdL1]Id5L2=DFT5[IdL2]Id5L3=DFT5[IdL3]where DFT5[x] is the calculated rms value of the fi fth harmonic component of differential currents concerning the x variable obtained by Discrete Fourier Transform (DFT).

Second harmonic component / fundamental component ratio of differential currents:Id2L1 / IdL1Id2L2 / IdL2Id2L3 / IdL3

Fifth harmonic component / fundamental component ratio of differential currents:Id5L1 / IdL1Id5L2 / IdL2Id5L3 / IdL3

If at least one ratio Id2L1 / IdL1, Id2L2 / IdL2, Id2L3 / IdL3 exceeds the second harmonic restraint setting 2nd-REST> the start of the second harmonic restraint in the corresponding phase goes ON (ST 2nd-REST-L1 or ST 2nd-REST-L2 or ST 2nd-REST-L3).

If at least one ratio Id5L1 / IdL1, Id5L2 / IdL2, Id5L3 / IdL3 exceeds the fi fth harmonic restraint setting 5th-REST> the start of the second harmonic restraint in the corresponding phase goes ON (ST 5th-REST-L1 or ST 5th-REST-L2 or ST 5th-REST-L3).

An intentional reset time delay TH-RES, common for second-fi fth harmonic restraint (with zero ad-justment the second and fi fth harmonic restraint is restored at the moment when the relationship be-tween the effective values of the second or fi fth harmonic and fundamental component of differential current falls below the threshold setting 2nd-REST> or 5th-REST>).

The threshold setting 2ndh-REST> and reset time delay setting tHREST-RES are available inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Harmonic restraint menu.

The start of the element can control an output relay by programming the ST2nd-REST-K parameter available inside the menu Set \ Profi le A(or B) \ Profi le A(or B) sides H/L \ Differential - 87T \ Har-monic restraint menu, similarly for LED (ST2nd-REST-K).

The start of the second harmonic restraint threshold at one phase or the fi fth harmonic restraint threshold at the same phase determines the starting of the harmonic restraint element (ST REST-H-L1, L2 REST-H-ST , ST H-REST-L3) for that phase.

The start of the second harmonic restraint threshold (ST 2nd-REST>) occurs at the instant of occur-rence of the start of threshold in at least one of the L1, L2, L3 phases.

The start of the fi fth harmonic restraint threshold (ST 5th-REST>) occurs at the instant of occurrence of the start of threshold in at least one of the L1, L2, L3 phases.

The start of the harmonics harmonic restraint is produced from start of the second or fi fth harmonic restraint threshold (ST 2nd-REST>or ST 5th-REST>).


A)

B)

C)

D)


CROSS H-REST parameterBy adjusting OFF the CROSS H-REST parameter, the differential protection can be blocked at one phase (L1 or L2 or L3) if the harmonic restraint is started for that phase (ST-H-L1 REST or REST-H-ST H-ST or L2-L3 REST).By adjusting ON the CROSS H-REST parameter, the differential protection can be blocked in all three phases (L1 and L2 and L3) if the harmonic restraint is started in at least one phase (ST H-REST).The CROSS H-REST parameter is available inside the menu Set \ Profi le A (o B) \ Profi le A (o B) sides H/L \ Differential - 87T \ harmonic restraint.

The logic state output of harmonic restraint considered for each phase (87 H-REST-L 1, 87 H-REST-L 2, 87 H-REST-L 3) is only enabled if the operating point in the corresponding phase stays over the fi rst three sections of the operating characteristic and below the second threshold Id>>.

BLOCKBlocking of differential protection by harmonic restraint covers only the fi rst three sections of the double slope percentage tripping characteristic; the second threshold Id>> of the differential protec-tion, which defi nes the fourth section of the tripping characteristic, it is nevertheless locking by har-monic restraint so that to have a back-up protection in case of failure inside the zone of differential protection with CT saturation that activate the second and fi fth harmonic restraint.

Additional stabilization on through current by means of saturation detectorTo stabilize at current loops with long time constants (eg short circuit outside the differential protec-tion of generator starting current of motors with direct start), the differential protection (with the exception of the second threshold Id>>) can be blocked by a CT’s saturation detector as additional security to the double slope percentage operating characteristic.

In the fi rst quarter of power cycle after the zero crossing of the instantaneous values of stabiliza-tion current in a phase, the level of instantaneous values of the differential current at that phase is controlled by the relay.

In the case of internal fault differential current appears along with the stabilization current after the zero crossing, with the differential current instantaneous value of twice the actual value of the stabilization current.

In the case of external fault however, the differential current does not appear until the beginning of the CT saturation.

The saturation condition of in one phase (87SatDet or 87SatDet-L1-L2-L3 or 87SatDet) is detected if all the following conditions are met:

the saturation detector is enabled (SatDet parameter set ON inside the Set \ Profi le A (o B) \ Profi le A (o B) sides H/L \ Differential - 87T \ CT saturation detector menu),the value of the differential current, in absolute value, inside the fi rst quarter of each power cycle after the zero crossing of the stabilization current is, at that phase, less than 1.34 times the ab-solute value of instantaneous value of the stabilization current in (corresponding to 77 % of the operating characteristic for internal fault),the operating point at that phase is above the fi rst three sections of the double slope percent operating characteristic and below the second threshold Id>>.

An adjustable recovery time tSatDet-RES detector saturation is adjustable.The saturation detector does not block the second threshold of the differential protection Id>>.

The saturation detector can be enabled or disabled by selecting ON or OFF the SatDet parameter, available, together with the tSatDet-RES recovery time, within the menu Set \ Profi le A (o B) \ Pro-fi le A (o B) sides H/L \ Differential - 87T \ CT saturation detector menu.

The start of an output relay can be controlled by programming the STSatDet parameter inside the Set \ Profi le A (o B) \ Profi le A (o B) sides H/L \ Differential - 87T \ CT saturation detector menu and similarly the programming state can be viewed on LED (STSatDet-L).

The differential locking at the saturation detector activation is independent for each of the three phases.

1)

2)

3)


Magnitude, polarity, phase and ciclic sequence and zero sequence currents compensation

iL3c(H)

iL2c(H)

iL1c(H)iL1(H)

iL2(H)

iL3(H)

M (H )*P(H )*C (H )SIDE H

MatchTypeInct(H)PhSeqpL1(H)pL2(H)pL3(H)ProtObjNumSidesSn(H)Vn(H)Gnd(H)Conn(H)VectGroup(H)

iL3c(L)

iL2c(L)

iL1c(L)iL1(L)

iL2(L)

iL3(L)

M (H )*P(H )*C (H )SIDE L

MatchTypeInct(L)PhSeqpL1(L)pL2(L)pL3(L)ProtObjNumSidesSn(L)Vn(L)Gnd(L)Conn(L)VectGroup(L)

iLxc(L)

iLxc(H)iLx(H)SIDE H

iLx(L)SIDE L

Magnitude, polarity,phase and ciclic sequenceand zero sequence currentscompensation

all-F87.ai

iLxc(L)

isiLxc(H) isLx

idLx

IsLx

IdLx

iLx(H)SIDE H

iLx(L)SIDE L

Magnitude, polarity,phase and ciclic sequenceand zero sequence currentscompensation

DFT

DFTid

Stabilization anddifferential currentmeasurement

NO TRIP

TRIP

Saturation detector

Harmonic restraint

0 100 200 300

Biased dual slopepercentage characteristic

General logic diagram of the differential elements 87T

Stabilization and differential current measurement

iLxc(L)

isiLxc(H) isLx

idLx

IsLx

IdLx

DFT

DFTid

Stabilization anddifferential currentmeasurement

DFT1

DFT1

DFT1

DFT1

DFT1

DFT1

+iL1c(L) se sign[iL1c(L)∙iL1c(H)]≥0,-iL1c(L) se sign[iL1c(L)∙iL1c(H)]<0

+iL2c(L) se sign[iL2c(L)∙iL2c(H)]≥0,-iL2c(L) se sign[iL2c(L)∙iL2c(H)]<0+iL3c(L) se sign[iL3c(L)∙iL3c(H)]≥0,-iL3c(L) se sign[iL3c(L)∙iL3c(H)]<0

sign[iL1c(L)∙iL1c(H)]



ISL1 =[|IL1c(H)| + |IL1c(L)|]/2

IdL1 =[|IL1c(H)| + |IL1c(L)|]/2

IdL2 =[|IL2c(H)| + |IL2c(L)|]/2

IdL3 =[|IL3c(H)| + |IL3c(L)|]/2

ISL2 =[|IL2c(H)| + |IL2c(L)|]/2

ISL3 =[|IL3c(H)| + |IL3c(L)|]/2+

+

+

+

iSL1

iSL2

iSL3

idL1

idL2

idL3

++

++

++

++

iL3c(H)

iL2c(H)

iL1c(H)

iL3c(L)

iL2c(L)

iL1c(L)

idL1...L3

idL1...L3

ISL1...L3

ISL1...L3


Second e fifth harmonic restraint

0 T

87 H-REST-L3

87 H-REST-L2

87 H-REST-L1

DFT5

DFT5

DFT5

DFT2

B

A

ST H-REST

ST 5th-REST-L1ST 5th-REST

ST 2nd-REST

ST H-REST-L1

ST H-REST-L2

Id5L1/Id1L1≥ 5th-REST>Id5L1/Id1L1

0 T

0 T

ST 5th-REST-L2Id5L2/Id1L2≥ 5th-REST>

Id5L2/Id1L2

ST 5th-REST-L3Id5L3/Id1L3≥ 5th-REST>

Id2L1/Id1L1≥ 2nd-REST>



Id5L3/Id1L3

0 T ST 2nd-REST-L1Id2L1/Id1L1


0 T ST 2nd-REST-L3Id2L3/Id1L3/

Id5L1

Id5L2

Id5L3

Id2L1

DFT2Id2L2

DFT2Id2L3

/

/

/

/

/

5th-REST>

CROSS H-REST2nd-REST>

tHREST-RES

≥1

≥1

≥1

≥1

≥1

ST H-REST-L2≥1

idL1...L3 IdL1...L3

A =“ON”A = OFF”

to biased dual slope percentage characteristic

Harmonic restraint

0 100 200 300

Saturation detector

IdL1 < 1.6∙|iSL1|IdL1

ISL1

1.6∙|iSL1|

idL1...L3 iSL1...L3 from biased dual slopepercentage characteristic

to biased dual slopepercentage characteristic

11

zero crossing detector0 0T

1/4(fn)0 T

tSatDet-RESSatDet=ON

&


ISL2

1.6∙|iSL2|

11


1/4(fn)0 T


&


ISL3

1.6∙|iSL3|

11


1/4(fn)0 T


&

Saturation detector


Id>

K10T

td>

0T

td>

0T

td>

&

≥1

&

&

Biased dual slope percentage characteristic

Logical block

ST Id>>-L1

ST Id>-L1

ST Id>

≥1

≥1

ST Id>>

TR Id>-L1

TR Id>-L2 TR Id>

≥1 TR Id>>

TR Id>-L3

0T

td>>

TR Id>>-L1

0T

td>>

TR Id>>-L2

0T

td>>

TR Id>>-L3

Id1L1 ≥ (K1/100)∙ISL1

Id1L1 ≥ Id>

Id>>

87 Enable=ON

Id1L1 ≥ Id>>

K2 Q

Id1L1 ≥ (K2/100)∙ISL1-Q

IdL1

ISL1

Id>

K1 &&

&ST Id>>-L2

ST Id>-L2

Id1L2 ≥ (K1/100)∙ISL2

Id1L2 ≥ Id>

Id>>

Id1L2 ≥ Id>>

K2 Q

Id1L2 ≥ (K2/100)∙ISL2-Q

IdL2

ISL2

Id>

K1 &&

&ST Id>>-L3

ST Id>-L3

Id1L3 ≥ (K1/100)∙ISL3

Id1L3 ≥ Id>

Id>>

Id1L3 ≥ Id>>

K2 Q

Id1L3 ≥ (K2/100)∙ISL3-Q

IdL3

ISL3

from second e fifth harmonic restraint

87 H-REST-L3

87 H-REST-L2

87 H-REST-L1

NO TRIP

TRIP

Biased dual slopepercentage characteristic

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


&

Enable (ON≡Enable) 87T-BLK1

Block1

Block1

Block1

Block2 output

Block4-in-out

BLK1 87T

BLK4IN 87T

Block4

Block1

≥1 Block1, Block4




Block2out diagram

Pilot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx










Dth>(L) Block2 OUT




≥1

Start 87T&Block2 output

(ON≡Enable)87TBLK2OUT IE(H)> Block2 OUT

IE(H)>> Block2 OUT




IE2> Block2 OUT

IE1> Block2 OUT




t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



BC

“0”“0”


87TBLK4

Start 87T CBA“0”

“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4



Differential protection (87T) - Logic diagram of the blocking


Breaker failure - BFPreface

When the protection issues a trip command but, because an anomaly, the circuit breaker cannot open, the breaker failure protection issues a back-up trip command to trip adjacent circuit breakers.The breaker failure function may be started by internal protective function (if associated with BF) or by external protections.

Operation and settingsThe starting of the timer occurs if both the following conditions are fi lled:

Start and trip of internal protective elements (trip of elements matched with BF protection) or, trip of external protections acquired by means binary input, if enabled;The CB is closed (the CB state may be acquired by means two binary inputs connected to the auxiliary contacts 52a and 52b or the fundamental component of at least one phase current IL1(H), IL2(H), IL3(H) for side H and IL1(L), IL2(L), IL3(L) for side L is greater than the IBF(H)> for side H and IBF(L)> for side L adjustable threshold or the fundamental component of the residual current IE(H) and/or IE(L). If the information concerning the status of the circuit breaker is not available (eg, auxiliary contacts are not accessible or unavailability of free logic inputs on the relay), that control must be disabled.

If both conditions are held along the set operate time tBF(H)> for side H and tBF(L)> for side L, the BF element trips at deadline, vice versa the timer is cleared and the function is restored.To the purpose to restore the BF element as quickly as possible, with start of the same protection (see A condition), additionally to the trip of some internal protections, their starts are required (start reset is faster than trip reset).

The element may be enabled or disabled by setting ON the BF BF(H) Enable parameter available inside the Set \ Profi le A(or B) side H \ Breaker failure-BF side H menu for side H and BF BF(L) Enable parameter available inside the Set \ Profi le A(or B) side L \ Breaker failure-BF side H menu for side L.

All the IBF(H)>, IEBF(H) and tBF(H) parameters for side H and IBF(L)>, IEBF(L) and tBF(L) parameters for side L can be set separately for Profi le A and Profi le B; they are available inside the Set \ Profi le A(or B) side H \ Breaker failure-BF side H menu for side H and Set \ Profi le A(or B) side L \ Breaker failure-BF side L menu for side L.

BF start from Circuit breakerIf the CB(H) Input parameter (BF Start from circuit breaker) for side H and CB(L) Input parameter for side L is set to ON, and two binary inputs are designed for acquire the 52a and 52b auxiliary contacts[1], the control of the CB position is enabled. If the information concerning the CB position is not available, such control must be disabled by setting OFF the CB(H) Input and/or CB(L) Input parameter. The parameter is available inside the Set \ Profi le A(or B) side H \ Breaker failure-BF side H menu for side H and Set \ Profi le A(or B) side L \ Breaker failure-BF side L menu for side L, the 52a and 52b function must be assigned to the selected binary inputs inside Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching). To enable the breaker failure protection to operate with trips coming from external protections, one binary input must be designed to acquire the relative contacts. The TripProtExt function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(2...) menus (IN1 or IN... matching).

Note 1 Both auxiliary contact state 52a and 52b must be acquired (two binary inputs are required) with Fw version previous to 1.60; with later versions, giving up an inconsistency occurs, one logical input for the acquisition of a contact (52nd or 52b ) may suffi ce

1)

2)

all-FBF.ai

B l o c k 1

B L K 1 B F

IL1. . . IL3

IE

5 2 b

5 2 a

Tr i p P r o t E x t

S t a r t B F ( H )Tr i p B F ( H )

Block1 &

BF(H)-BLK1

Note: inside all the diagram the H index are indicated ; similarly for side of L

BF(H) Enable IBF(H)> IEBF(H)> t BF(H)

General logic diagram of the breaker failure element - BF


Logical block (Block1)If the BF(H)-BLK1 for side H and/or IBF(L)-BLK1 for side L parameter is set to ON, and a binary input is designed for logical block (Block1), the breaker failure protection is blocked off whenever the given input is active. The trip timer is held in reset condition, so the operate time counting starts when the input block goes down.[1] The enabling parameter is available inside the Set \ Profi le A(or B) \ Breaker failure-BF side H menu for side H and Set \ Profi le A(or B) \ Breaker failure-BF side Lmenu for side L, while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus (IN1 or INx matching).

Note 1 The exhaustive treatment of the logic block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITORING section

Fun-BF_Pro-n.ai

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Star t BF

Star t IBF>

Tr ip BF

Tr ip in t -prot

&&

&

&


BLK1 BF

Tr ip Int /Ext

B lock1

Start BF

ON≡CB Closed

Start BF

Tr ip BF

Tr ip BF

Trip ProtExt

52a

&

Block1 enable (ON≡Enable) BF-BLK1

Block1

52a

IBF>

Max I L1. . . I L3 ≥ IBF>

I L1I L2I L3

IEBF>

I E ≥ IEBF>I E ≥1

RESET

tBF

0T

t BF

≥1

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


52b

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF

T0n.o.n.c. INx t OFF 52b

Star t IEBF>

“0”

CB Input

CB Input OFF

CB Input ON

Logic diagram concerning the breaker failure element -BF



4.5 CONTROL AND MONITORING

Logical block - BLOCK1To the purpose to block off the trip of one protection element, the logical block function (Block1) may be matched with binary inputs.[1] The binary-matching may be set inside the Inputs submenu; to the purpose the Block1 parameter must be selected for INx matching (x=1, 2)A protective element, where the logical block is enabled, is blocked off whenever the given input is ON.For a given protective element, the logical block state is reading available (ThySetter and communi-cation interfaces); it is ON the following condition are at the same time observed:

Binary input ON,Element start ON,Element Trip OFF.

The logical block it is not liable for any inhibition time-out, so the protective element is disabled for the whole time when the input is ON.[2]

Note 1 In the following treatment, the logical block is defi ned as “Logical block” or “Block1”

Note 2 The Block 1 signal forces a timer reset

•••

Blocco_L.ai

RESET

Operate time

0T

Generic protective element

M e a s u r eInput

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

BLK1xxx

Operate time Threshold

Start

Star t

Tr ip

Tr ip

&&

&



Customized Block1 info

Block1 info ( in ternal s tate)

xxxBLK1

Block1

Block1

Binary input INxT 0

Logic

INx t ON

INx t ON INx t OFF


General logic diagram of the logic block - Block1

Start

Block1 (input)

Block1 (output)

Trip

Operate time

t

Timers-Block1.ai Logic block timers - Block1

Activation of any binary input assigned to logic block (Block1) function effects a block of all theprotective elements where the logic block is enabledCAUTION


Block1_L.ai

Start

Tr ip&

&&


(ON≡element inh ib i t ion)

Customized Block1 info

Reset t imers

Block1 info( internal s tate)

xxxBLK1

Block1

I (H)<BLK1 37 e lement-s ide H

I (L )<BLK1 37 e lement-s ide L

I2 (H)>BLK1 46 e lement-s ide H

I2 (H)>>BLK1 46 e lement-s ide H

I2 (L )>BLK1 46 e lement-s ide L

I2 (L )>>BLK1 46 e lement-s ide L

I2/ I1 e lement-s ide H

I2/ I1 e lement-s ide L

DthAL1(H)BLK1 49 e lement-s ide H

DthAL2(H)BLK1 49 e lement-s ide H

Dth(H)BLK1 49 e lement-s ide H

DthAL1(L)BLK1 49 e lement-s ide L

DthAL2(L)BLK1 49 e lement-s ide L

Dth(L)BLK1 49 e lement-s ide L

I>(H)BLK1 50/51 e lement-s ide H

I>>(H)BLK1 50/51 e lement-s ide H

I>>>(H)BLK1 50/51 e lement-s ide H

I>(L)BLK1 50/51 e lement-s ide L

I>>(L)BLK1 50/51 e lement-s ide L

I>>>(L)BLK1 50/51 e lement-s ide L

IE1>BLK1 50N/51N e lement

IE1>>BLK1 50N/51N e lement

IE1>>>BLK1 50N/51N e lement

IE2>BLK1 50N/51N e lement

IE2>>BLK1 50N/51N e lement

IE2>>>BLK1 50N/51N e lement

IE(H)>BLK1 50N/51N e lement-s ide H

IE(H)>>BLK1 50N/51N e lement-s ide H

IE(H)>>>BLK1 50N/51N e lement-s ide H

IE(L)>BLK1 50N/51N e lement-s ide L

IE(L)>>BLK1 50N/51N e lement-s ide L

IE(L)>>>BLK1 50N/51N e lement-s ide L

64REF(H)-BLK1 64REF e lement-s ide H

64REF(L)-BLK1 64REF e lement-s ide L

87T-BLK1 87T e lement

74TCS(H)-BLK1 74TCS e lement-s ide H

74TCS(L)-BLK1 74TCS e lement-s ide L

BF(H)-BLK1 BF e lement-s ide H

BF(L)-BLK1 BF e lement-s ide L

S(H)<BLK1 74CT e lement-s ide H

S(L)<BLK1 74CT e lement-s ide L

Block1

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


I21(H)>BLK1

I21(L)>BLK1

Logic diagram concerning the logic block element -Block1


Selective block -BLOCK2Preface

The logic selectivity function has been developed to the purpose to reduce the clearing times for faults closes to the source.The output blocking circuits of one or several Pro_N relays, shunted together, must be connected to the input blocking circuit of the protection relay, which is installed upwards in the electric plant. The output circuit works as a simple contact, whose condition is detected by the input circuit of the upwards protection relay.The logic selectivity function can be realized through any combination of the following I/O circuits:

One committed pilot wire input BLIN1...ON Iph, ON...Iph/IE, ON...IE.One committed pilot wire output BLOUT1...ON Iph, ON...Iph/IE, ON...IE.One or more than one independent binary inputs programmed with Block2 Iph, Block2 Iph/IE or Block2 IE.One or more than one independent output relays programmed with BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K or BLK2OUT-IE-K.

In reference to the following schematic diagram, the some protection functions of the relay placed on the feeder may be blocked by downstream protective relays.

Input selective blockUse of committed pilot wire input BLIN1

The input is a polarized wet type powered by internal isolated supply; it must be drive by an output block signal coming from a Pro-N device or by a free voltage contact.

The protection is blocked off according the selectivity block criteria by phase elements (Block2 Iph), by earth elements (Block2 IE) or by any protection element (Block2 Iph/IE) when the input BLIN1 is active. The information about phase or phase+earth block may be select programming the ModeBLIN1 parameter inside the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block IN menus.

Use of binary inputsIf the xxBLK2IN parameters (enable) are set to ON and a binary input is designed for selective block (Block2), the protection is blocked off by phase elements (Block2 Iph), by earth elements (Block2 IE) or by any protection element (Block2 Iph/IE), according the selectivity block criteria, when the input (IN1 and/or INx) is active.The Block2 Iph, Block2 IE and Block2 Iph/IE matching must be assigned to the selected binary inputs inside the Set \ Inputs \ Binary input 1 and Set \ Inputs \ Binary input x menus.When a binary input is programmed for selective block input, the IN1 tON, INx tON, IN1 tOFF and INx tOFF time delays must be reset to zero; the Logic parameters (ON/OFF) must be programmed in the same way of the related output relay connected with-it.

OperationFor any protective element, three main conditions can arise:

Start = OFF: the element is at rest (no trip) regardless of the input/output blocks.Start = ON: the element trips if no selective block input becomes active during the operate time.Start = ON: if the selective block input (BLIN1 and/or binary input) becomes active, the element goes in selective block state wherein the operate timer is forced to reset, so the element cannot trip. After an adjustable time tB-Iph (common for phase protection elements) or tB-IE (common for earth protection elements), the selective block input is disregarded and the operate timer can

•••

•

A)B)C)

NT10

Pro_N

Pro_N

logica_acc.ai

BLIN1

BLK2OUT-Iph-K

INx=Blocco selettivo Iph

BLOUT1

BLOUT1

TRIP

TRIP

TRIP

TRIPAny device

Logic selectivity

Never connect power to the block input circuit; the electronic circuit can be demaged !WARNING


start again. Information about tB-Iph and or tB-IE expired is available for reading (tB timeout data inside Read \ Selective block - BLOCK2 \ Block2 input menu) and can drive an output relay and or a LED (tB-K and or tB-K parameters inside Set \ Profi le A(or B) \ Selective block - BLOCK2 \ Selective block IN submenu)

With a setting other than 0.00 s, the tB-Iph and tB-IE timers may be used to have a backup protection available against pilot wire short circuit.[1]

The tB-Iph and/or tB-IE timers must be adjusted according the following rule (example for tB-Iph):tB-Iph = tFv + εt + εs where tFv is the value of block output timer related to the downstream relay (example tF-Iph), εt is a chronometric selectivity margin to apply in comparison to the tB-Iph time related to the downstream relay (does not take into account if such margin has been considered for the tF-Iph setting), εs is a safety margin. The chronometric selectivity applied among the tB-x times of the relays in accelerated logic system allows to avoid more the contemporary circuit breaker opening after the clearing of a fault in a line of concomitant plant to the short-circuit of the pilot wires concerning the same line.

Note 1 In the absence of suitable provisions, a short circuit on a pilot wire causes the block of the receiving relay, so a possible fault (contemporary or following) inside the protected zone, cannot be cleared that being the case the protective relay blocked.

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Block2 IPh

Block2 IPh/IE

ModeBLIN1

PulseBLIN1

T 0t B-Iph

T 0Pi lot wireDiagnost ic

Pulse BLIN1

Block2-in-diagram.ai

≥1≥1

≥1

≥1

t B-Iph

t B-IE

BLK2IN xx

&

&&

Pi lot wire input

No pulses

Permanent ly “ON”

xxBLK2IN

BLK2IN-Iph

Start xx

Trip xx

BLK2IN I>

&

&Block2 input enable ( I> e lement)

Block2 input enable ( I> , I>> , I>>>, IE>, IE>>, IE>>>, e lements)

(ON≡Enable) & I>BLK2IN

Start I>

Trip I>

Iph Block2

IE Block2

BLK2IN-IE

tB t imeout

FROM EARTH FAULT PROTECTIONS




BLIN1

T 0t B-IE

Block2 IE

Breaked BLIN1

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

≥1

≥1

Shorted BLIN1

Logic diagram concerning the selective block intput - Block2 input


To enable the selectivity logic input for a generic xx element, the xxBLK2IN parameters must be set to ON inside the Set \ Profi le A(or B) \ xxx \ xxx \ Setpoints menus concerning all element where the selective block is available, xxBLK2IN eg I(H)> for side H:I>BLK2IN inside the Set \ Profi le A(or B) side H \ Phase overcurrent-50/51 side H \ I(H)> Element \ Setpoints menu.

Output selective blockUse of output relaysIf the xxBLK2OUT, xxBLK2OUT and/or xxBLK2OUT enable parameters are set to ON and a output relay is designed for selective block (Block2), the protection issues a block output by phase elements (BLK2OUT-Iph), by ground elements (BLK2OUT-IE) or by any protection element (BLK2OUT-Iph/IE), whenever the given start is active.The BLK2OUT-Iph-K, BLK2OUT-Iph/IE-K and/or BLK2OUT-IE-K output relays must be set in-side the Set \ Profi le A(or B) \ Selective block-BLOCK2 \ Selective block OUT menu; the same for ad-dressing the LED indicators (BLK2OUT2-Iph-L, BLK2OUT2-IE-L and BLK2OUT2-Iph/IE_L).When output relays are programmed for selective block output, the tTR time delays must reset to zero; the operation mode must be set with self reset (No-latched inside Set \ Relays submenu) and the Logic parameters (Energized/De-energized) must be programmed in the same way of the related binary input connected with-it.

Use of committed pilot wire output BLOUT1The output is a dry static relay.The information about phase (ON IPh), earth (ON IE), or phase+earth (ON IPh/IE) concerning the sending block out signal may be select by means of the ModeBLOUT1 parameter inside the Set \ Profi le A(or B) \ Profi le A(or B) sides H/L /Selective block-BLOCK2 \ Selective block OUT menu.The parameters can be set separately for A and B profi les.

OperationThe selective block outputs go ON at the same time of the xx element start; they hold steady (even if the start reset to zero) for along the tF-IPh, tF-IE and tF-IPh/IE adjustable times for phase, earth and phase+earth functions.The timers starts when one or more selective block function goes ON; when a timer expires, the selective block outputs are disregarded (even if the start holds steady).

The tF-IPh and tF-IE counters start when the output selective block becomes active. When the coun-ters expire the block selective output is forced off (despite the start xxx remain active).If the tF-IPh, tF-IE e tF-IPh/IE timers are cleared the selective block output state is freeze up to the start xxx remain active.With a setting other than 0.00 s, the tF-IPh, tF-IE e tF-IPh/IE timers may be used to provide a backup protection against breaker failure inside a selectivity logic system, as well as to hold blocked up-stream protective relays up after the fault is cleared with CB opening to provide solution against unwanted trips because of a larger reset time compared with the downstream relay (the selectivity will be lost.

With traditional selective logic systems, in the absence of suitable cares, the event of a circuit breaker failure causes the block of the receiving relays situated upstream the circuit breaker, so the fault cannot be cleared.When using the Pro-N devices inside the selective logic systems, the answer to the circuit breaker failure problem can be solved by means of, (as well as the BF-Breaker Failure element) or by means of a threshold adjusted for time selectivity, through use of the output block reset timer too with the intent that avoid permanently block of all upstream relays by downstream block signals (the only one unblocked relays deals to the fault breaker).

TB-timer.ai t

tB-Iph/tB-IE

BLIN2IN-Iph/BLIN2IN-IE

tB timeout

INPUT BLOCK(binary input and/or BLIN1)

tB timer

TF-timer.ai

ttF-IPh, tF-IE, tF-IPh/IE tF-IPh, tF-IE, tF-IPh/IE

Start xx(protezioni interne)

tF timer (Block2)

BLK2OUT-IphBLK2OUT-IEBLK2OUT-Iph/IE


The tF-IPh, tF-IE, tF-IPh/IE timers must be adjusted according the following rule (Ejemplo for tF-Iph):tF-Iph = t + TAP + trip + εt + εswhere t is the larger phase protection operate time, TAP is the circuit breaker operate time (with arc extinction), trip is the larger reset time of all protective relays inside the selective logic system, εt is an potential selectivity margin relative to the tF-x time of the downstream relays, εs is a safety margin need to include timers errors (tolerances).

DiagnosticTo guarantee maximum fail-safety, the relay performs a run time monitoring for pilot wire continuity and pilot wire shorting.[1]

Exactly the output blocking circuit periodically produces a pulse, having a small enough width in order to be ignored as an effective blocking signal by the input blocking circuit of the upstream protection, but suitable to prove the continuity of the pilot wire.Furthermore a permanent activation (or better, with a duration longer than a preset time) of the blocking signal is identifi ed, as a warning for a possible short circuit in the pilot wire or in the output circuit of the downstream protection.

The periodic pulses that are sent by output circuit may be enabled or disabled by means the Pulse-BLOUT1 parameter available inside the Set \ Pilot wire diagnostic menu; with OFF setting the pulses are disabled.[2]

Note 1 Full diagnostic of pilot wires is only available when committed pilot wire input/outputs are employed

Note 2 When several outputs are parallel linked the pulse emission must be enabled inside one device only, sooner inside the outermost device

Pilot wire output Pilot wire l ink≥1

Pulsegenerator

BLOCK OUT BLOCK IN

T 0Pilot wire

Diagnostic

Pilot wire input

No pulses

Permanent ly “ON”

BLIN1BLOUT1

Breaked BLIN

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Shorted BLIN

Pulse BLIN1

Pulse BLIN1

Pulse BLOUT1Pulse BLOUT1

Block2-diagram.ai

Pi lot wire output

BLOUT1

TRIP

PING

MAT

RIX

(LED

+REL

AYS)

ModeBLOUT1

ABCD

≥1

t F-IPh

t F-IPh/IE

t F-IE

ST-Iph BLK2

ST-IE BLK2


I (H)>BLK2OUT

Start I(H)>

≥1

T 0t F-IPh/IE

T 0t F-IPh

T 0t F-IE

I(H)> Block2 OUT

BLK2OUT-Iph

BLK2OUT-Iph/IE

BLK2OUT-IE

& xxBLK2OUT

Start xx


I (L)>>>BLK2OUT

Start I(L)>>>










Dth>(L) Block2 OUT




≥1

Start IE>>>&Block2 output

(ON≡Enable) IE>>>BLK2OUT





IE2> Block2 OUT

IE1> Block2 OUT



Logic diagram concerning the selective block output - Block2 output


If no pulses are received inside an adjustable time window at the selective block input circuit, a break pilot wire alarm is issued; the information is available for reading (Breaked BLIN1 data inside Read \ Pilot wire diagnostic submenu) and can drive an output relay and or a LED (PulseBLIN-K and or a PulseBLIN-L parameters inside Set \ Pilot wire diagnostic submenu).

Setting exampleIn reference to the above shown schematic diagram, the logic selectivity is performed by means of the dedicated I/O for the short circuit elements of A, B and C protective relays, so that if a fault arises in (2), the open order or circuit breaker CB2 is issued and no trip is issued by A device.A command must be issued for the main circuit breaker CB1 by the A relay with a fault in (1).

A ProtectionI>> element with defi nite time set to 4.5 In with operate time to 0.10 s blocked by start of B and/or C protection.Settings:

I>>def = 4.5 Int>>def = 0.100 sPulseBLOUT1 = OFFPulseBLIN1 = 1 sI>>BLK2IN = ONI>>BLK2OUT = OFFtB-IPh = 0.30 s

B ProtectionI>> element with defi nite time set to 4.0 In with operate time to 0.10 s with emission of block output toward A protection relay.Settings:

I>>def = 4.0 Int>>def = 0.100 sI>>BLK2IN = OFFI>>BLK2OUT = ONPulseBLIN1 = OFFPulseBLOUT1 = 1 s tF-IPh = 0.25 s

C ProtectionI>> element with defi nite time set to 4.0 In with operate time to 0.10 s with emission of block output toward A device and block input from D protection relay.Settings:

I>>def = 4.0 Int>>def = 0.100 sI>>BLK2IN = ONI>>BLK2OUT = ONPulseBLIN1 = 1 sPulseBLOUT1 = OFFtF-IPh = 0.25 stB-IPh = 0.30 s

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•••••••

••••••••

LOAD

Pro_N

Pro_N

Pro_N Pro_N

logica_acc-esempio.aiLogic selectivity

BLIN1 BLOUT1 BLOUT1

BLOUT1

BLIN1BLIN1

TRIPTRIP

TRIP

TRIP

1

2

B

C DA

Logic selectivity 2nd level Logic selectivity 1st level


Internal selective block -BLOCK4As well as to send or transmit a selective block toward other protective relays, each protective element may be enabled for receive or transmit a selective block from/to other internal protective elements.The internal selective block of one or more element may be enabled/disabled by means the Ixxx-BLK4 parameters (virtual input and output common to all protective thresholds); the following oper-ating modes are available:


Transmission and reception for the same element is not allowed, so any stall situation due to wrong setting is avoided.

The internal selective block can work together with an external selective block from other protective relays (Block2 input and Block2 output).

For any element the logic state of the internal output block and the trip state are defi ned by:Start thresholdInternal selective logic block

according to the following table.

START threshold xxx

IxxxBK4=IN IxxxBLK4=OUT xxx TRIP threshold SELECTIVE BLOCK xxx threshold

0 0 0 0 0

0 1 0 0 0

1 0 1 within tFI-Iph 1 after the operate time 0

1 1 1 within tFI-Iph 1 0

If the xxx threshold is started, regardless of the internal input and output, the element is always OFF (no trip).If the xxx threshold start stay ON within the operating time and the internal input is OFF, when the timer expires the trip goes ON.If the xxx threshold is started and the internal input is ON, the xxx threshold is blocked (the operat-ing timer is forced to reset); the element is OFF (no trip).

The internal selective block output goes ON when the threshold is started and stays ON (despite the start goes OFF) along an adjustable time tFI-Iph common for all phase elements 50-51-67 or tFI-IE com-mon for all earth elements 50N-51N-67N.The tFI-IPh and tFI-IE counters start when the output selective block becomes active; when the coun-ters expire the internal block selective output is forced OFF (despite the start xxx remain active)

•••

••

•

•

•

Block4-in-out-diagram.aiLogic diagram concerning the output signals of the internal selective block function - Block4

t FI-Iph

ST-IE BLK4

ST-Iph BLK4

Block4 enable

≥1

≥1

t FI-IE

Block4 OUT

≥1T 0

t FI-Iph

T 0t FI-IE

xx Block4 OUT

Block4



I2>BLK4


“0”

BC

“0”“0”


IE1>>>BLK4


“0”

xxBLK4

Start xx CBA“0”

“0”

xxBLK4

A


I(H)>>> Block4





Dth>(L) Block4








IE2> Block4

IE1> Block4




With a setting of tFI-Iph o tFI-IE di 0.00 s the selective block output state is freeze up to the start xxx remain active.With a setting other than 0.00 s, the tFI-IPh, tFI-IE e tFI-IPh/IE timers may be used to have a backup pro-tection available against breaker failure inside a selectivity logic system, as well as to hold blocked upstream protective relay up to your own reset.As typical application an internal and external selective block can be used for protection of parallel power transformers. On occurrence of a fault inside the transformer T2, the directional phase or ground directional overcurrent element concerning the P2 relay trips to open the CB2. The 50 and 50N elements of both relays should trip if no grading margin is set in order to provide selectivity with the directional elements. Thanks to internal (Block4) and external selective block (Block2) this grad-ing margin can be avoided.

The 50 and 50N element on the P1 relay are blocked by means of external selective block (Block2) coming from P2.The 50 and 50N element on the P2 relay are blocked by means of internal selective block (Block4).

With the following setting for P1 and P2 protection relay:I>>BLK4IN IN (I>> Internal selective block input)IPD>>BLK4IN OUT (IPD>> Internal selective block output)IE>>BLK4IN IN (IE>> Internal selective block input)IED>>BLK4IN OUT (IED>> Internal selective block output)IPD>>BLK2OUT ON (IPD>> External selective block output)IED>>BLK2OUT ON (IED>> External selective block output)I>>BLK2IN (I>> External selective block input)IE>>BLK2IN (IE>> External selective block input)ModeBLIN1 ON Iph/IE (BLIN1 Selective block operating mode)ModeBLOUT1 ON Iph/IE (BLOUT1 Selective block operating mode)

the time diagram of internal (Block4) and external (Block2) selective block concerning the phase and residual overcurrent thresholds (I>> and IE>>) are shown in the following page.

•

•

••••••••••

logica_block1.aiLogic selectivity example (internal and external)

Block4Block4

Block2 Iph/IE BLOUT1BLIN1

BLIN1BLOUT1 Block2 Iph/IE

50N

50

CB1

T1

P1 P2

TRIP

T2

CB2

67N

NA60

67

50N

50

67N

67

NA60


blk4-F50-51.ai

Time diagram of internal (Block4) and external (Block2) selective block concerning phase overcurrent element blocking of the example

Time diagram of internal (Block4) and external (Block2) selective block concerning residual overcurrent element blocking of the example

Start I>> (P2 relay)

Start IPD>> (P2 relay)

Trip IPD>> (P2 relay)

Trip IPD>> (P1 relay)

Trip I>> (P2 relay)

Start I>> (P1 relay)

Start IPD>> (P1 relay)

BLK4OUT (IPD>> internal block output of P2 relay)

BLK4OUT (IPD>> internal block output of P1 relay)

BLK4IN I>> (I>> internal block input of P2 relay)

BLK4IN I>> (I>> internal block input of P1 relay)

tPD>>

tFI-Iph

tTrip I>> (P1 relay)

BLK2OUT-Iph/IE (P2 relay)tF-Iph/IE

BLK2IN-Iph (P1 relay)

tB-Iph

Start IE>> (P2 relay)

Start IED>> (P2 relay)

Trip IED>> (P2 relay)

Trip IED>> (P1 relay)

Trip IE>> (P2 relay)

Start IE>> (P1 relay)

Start IED>> (P1 relay)

BLK4OUT (IED>> internal block output of P2 relay)

BLK4OUT (IED>> internal block output of P1 relay)

BLK4IN IE>> (IE>> internal block input of P2 relay)

BLK4IN IE>> (IE>> internal block input of P1 relay)

tED>>

tFI-IE

tTrip IE>> (P1 relay)

BLK2OUT-Iph/IE (P2 relay)tF-Iph/IE

BLK2IN-IE (P1 relay)

tB-IE


Logi

c bl

ocK

BLK1

Inpu

t sel

ectiv

e bl

ock

BLK2

INOu

tput

sel

ectiv

e bl

ock

BLK2

OUT

Inte

rnal

sel

ectiv

e bl

ock

BLK4

PROTECTION ELEMENTThermal probes - 26Undercurrent (side L and H) - 37 gNegative sequence overcurrent (side L and H) - 46 g g g gNegative to positive sequence current ratio (side L and H) - I2/I1 g g g gThermal image (side L and H) - 49 g g g gPhase overcurrent (side L and H) - 50/51 g g g gCalculated residual current (side L and H) - 50N/51N g g g gMeasured residual current (1 and 2 input) - 50N.1/51N.1, 50N.2/51N.2 g g g gLow impedance restricted earth fault (side L and H) - 64REF g g gDifferential (87T) g g gBreaker failure side L and H (BF) g

CONTROL & MONITORINGCT Monitoring (74CT) gTrip Circuit Supervision (TCS) g

Logic block summary


Remote trippingPreface

Some output relays may be programmed for remote trip function resulting from a command coming from a binary input.If a binary input is designed for remote trip acquisition, an output relay allocated to the same function is triggered when the input (IN1 and/or INx) is active.

Operation and settingsThe Remote trip matching must be assigned to the selected binary inputs inside the Set \ Inputs \Binary input1 or Set \ Inputs \ Binary input x menus.When a binary input is programmed for remote trip acquisition, the IN1 tON, IN2 tON, IN1 tOFF and IN2 tOFF time delays must be reset to zero; the Logic parameters (ON/OFF) must be pro-grammed in the same way of the related circuit connected with-it.The RemTrip-K matching must be assigned to the selected output relays inside the Set \ Remote tripping submenu; the same for addressing the LED indicators (RemTrip-L).When output relays are programmed for remote tripping, the tTR time delays must reset to zero; the operation mode must be set with self reset (No-latched inside Set \ Relays submenu) and the Logic parameters (Energized/De-energized) must be programmed in the same way of the related binary input connected with-it.

All the parameters are common for A and B Profi les.

Fun-Remote-trip.ai

Remote trip

+UAUX

-UAUX

Remote t r ip

Binary input INx

RemTrip-K

RemTrip-LT 0 INx t ON

T0n.o.n.c.


INx t OFF

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Remote t r ip

Remote tripping logic diagram


Frequency trackingWithin the frequency range 45...55 Hz (fn = 50 Hz) or 54...63 Hz (fn = 60 Hz), a frequency tracking al-gorithm adjusts the currents sampling frequency, so as to keep the number of samples in any given period constant.With 16 samples for periods the sampling rate is adjusted from 720 H with f = 45 Hz to 1.008 kHz with f= 63 Hz For a frequency step change the tracking response time is 10 Hz/s.The frequency measure is based on the largest phase current on side H.

If the larger phase input current is lower than 25% InH the sampling frequency is fi xed to fn (50 or 60 Hz).If the measured frequency is outside the locking range, the sampling frequency is fi xed to the lower or upper value (45 or 55 Hz with fn = 50 Hz, 54 or 63 Hz with fn = 63 Hz).

All protective elements are always operative; accuracy is guaranteed inside the locked frequency band.

•

•

IF.ai Frequency tracking

0.25 I nH

0 .25 I n

40 45 6055 f (Hz)

50 Hz (0 Hz)

M ax I L1H...L3H

40 Hz

45 Hz

60 Hz

55 Hz

40 54 7063 f (Hz)

60 Hz (0 Hz)

M ax I L1H...L3H

40 Hz

54 Hz

70 Hz

63Hz

I L1HI L2HI L3H

sampl ing f requencyM a x I L1H...L3H > 0 .25 I n

Displayed value

Locked frequency

Locked frequency (Displayed value)

Displayed value

Locked frequency

Locked frequency (Displayed value)

Nominal frequency f n = 50 Hz

Nominal frequency f n = 60 Hz


Second Harmonic Restraint - 2ndh-RESTPreface

When a power transformer is energized, as well know an inrush current fl ow in the side that have been energized with an amount and duration that depend by many factors which:

Instantaneous value of the supply voltage at the time where the transformer is energizedTransformer design, magnetization characteristic and sizeResidual fl ux

The maximum amount of the inrush current is produced by energizing the transformer at the zero point of the voltage wave, when it increase or decrease with the residual fl ux respectively positive or negative. Moreover the ratio between the maximum amount of the inrush current and the nominal current of the transformer decrease if the size of transformer increase, whereas the duration of the inrush current increase with the size of transformer. In any case, the inrush current contains a second harmonic component of signifi cant value.In addition to allowing you to lock the differential protection 87T trip to prevent the unwanted trip when a power transformer is energized, the second harmonic restraint function can be enabled on each protection element 46 (H), 46 (L), I21 (H) I21 (L), 50N/51N (IE1, IE2, 50N (H) / 51N (H), 50N (L) / 51N (L)) and 50 (H) / 51 (H).E ‘can fi nally activate one or more output relay during the period in which the value of second har-monic exceeds the programmable threshold to block ripping of external protections that do not have this feature.

Operation and settingsEach second harmonic component to fundamental component of phase differential currents(Id2L1 / IdL1, Id2L2 / IdL2, Id2L3 / IdL3) is compared with the I2ndh> adjustable threshold. 2ndh-REST>.When one or more second harmonic currents overcome the setting threshold a start is issued.For the purpose to keep in block state the selected elements, an adjustable t2ndh>RES reset delay is provided.

The second harmonic element may be enabled or disabled; the enabling parameters must be set to ON inside the single menus.

The setting of 2ndh-REST> and tHREST-RES parameters are available inside the Set \ Profi le A(B) \ Profi le A(B) sides H/L \ Differential - 87T \ Second Harmonic Restraint menus.

The output may be assigned to the selected ST2nd-REST-K output relays inside the Set \ Profi le A(B) \ Profi le A(B) sides H/L \ Differential - 87T \ Second Harmonic Restraint menu; the same for ad-dressing the LED indicators (ST2nd-REST-K).

When output relays are programmed for second harmonic element output, the tTR time delays must reset to zero; the operation mode must be set with self reset (No-latched inside Set\Relays sub-menu) and the Logic parameters (Energized/De-energized) must be programmed in the same way of the related binary input connected with-it.

•••

2NDH-REST-diagram.ai

≥1

Star t 2nd-REST

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)Id2L1/Id1L1≥ 2nd-REST>




0 T ST 2nd-REST-L2 ST 2nd-REST ST 2nd-REST-K

ST 2nd-REST-L

Id2L2/Id1L2

0 T ST 2nd-REST-L3Id2L3/Id1L3/

Id2L1

Id2L2

Id2L3

/

/

2nd-REST> tHREST-RES

IdL1...L3

Logic diagram concerning the second harmonic restraint function - 2NDH/REST


Cold Load Pickup - CLPPreface

CLP feature allows selected thresholds of phase and ground overcurrent protections to be changed or blocked for a set time in order to overcome transient overcurrents.The trigger of the CLP feature is the logical condition of circuit breaker closed, that Pro-N relay de-tect by means of two digital inputs connected to the circuit breaker auxiliary contacts 52a and 52b.

When the circuit breaker closure is detected the CLP timer starts to count the duration of the thresh-old is blocked or switched to higher set value (Ixx threshold during CLP). When CLP timer has elapsed, the threshold is unblocked if CLP is set to ON threshold block or the threshold is revert back to the original value if CLP is set to ON threshold change.When the circuit breaker opening is detected the normal threshold / unblocked condition is main-tained for 0.1 s in order to avoid that, because of possible rebound switching on, any unwanted start of the timer occurs.

When the circuit breaker is open, if the CLP function is enabled, the threshold is already modifi ed or blocked to avoid alarms during the closure time, especially in cases of non-simultaneous closure of the three poles or long closing times.If CLP is enabled in block mode of one or more thresholds, the corresponding threshold is blocked for an adjustable time, counted from From the instant of breaker closure.

If CLP is enabled for setting changes of one or more thresholds, the corresponding threshold can be changed to an adjustable time, counted from the instant of circuit breaker closure.

The CLP function can be disabled (OFF), enabled for locking (ON-Element blocking) or enabled for threshold changing (ON-Change setting) by setting the xxCLPx Mode Mode parameter in-side the Set \ Profi le A(B) \ Profi le A(B) \ Profi le A(B) sides H(L) \ xxx - xx \ x Element \ Setpoints menus.

Eg: to change the threshold value of the fi rst-time independent of 50/51 element side H during the CLP for a time of 0.1 s the ICLP(H)> Mode parameter as ON-Change setting should set, the activation time tCLP(H)> should set to the desired value (0.1 s) iside the menu Set \ Parameters confi guration A (or B) \ A-side confi guration parameters H \ Maximum current - 50/51 H side - side H \ Threshold I (H)> \ Parameters, and regularly the threshold value for the active time TCLP (H)> changing the parameter I(H) CLP> def inside the Set \ Profi le A(o B) \ Profi le A side H \ Phase overcurrent- 50/51 side H \ I(H)> Element \ Setpoints menu.

CB position can be acquired by means one or two binary inputs; allocation of 52a and 52b func-tions is available inside the Set \ Inputs \ Binary input1(x) menu.

CLP-diagram.ai

Input

t xxRES

T0

RESET

t xx

0T

≥1

I xx

t xxRES

Star t Ixx

Tr ip Ixx

Start I2ndh>

CB State

(Threshold outs ide CLP)

Gener ic protect ive e lement

Block1, Block2

T 0t CLPxx

&

2nd harmonic restra int enable (ON≡Enable) Ixx2ndh-REST

ICLPxxMode

I C L P xx

t C L P xx

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

ABC

A =“1”A =“0 or OFF”

tCLPxx

CB State CB CLOSED (52a=ON) CB OPEN (52a=OFF)CB OPEN (52a=OFF)

Output tCLPxx

t

0.1 s (default)

TRANSIENT THRESHOLD/ TRANSIENT THRESHOLD/BLOCK

TRANSIENT THRESHOLD

STEADY STATE THRESHOLD/ UNBLOCK

STEADY STATE THRESHOLD

BLOCK


≥1 CLP Ixx

Operate time

Cold Load Pickup logic diagram - CLP


CT supervision - 74CT - side H and side L[1]

PrefaceThe CT monitoring function is employed to issue an alarm when secondary phase CTs and/or phase input of the NT10 relay failure are detected. Interruptions are detected by means of a symmetry criterion of the IL1(H), IL2(H), IL3(H) and IL1(L), IL2(L), IL3(L) input currents.The symmetry factor is calculated comparing the minimum and maximum of the fundamental compo-nents of the three phase currents (ILMIN(H)/ ILMAX(H) for side H and ILMIN(L)/ ILMAX(L) for side L).

Operation and settingsThe starting of the timer occurs if both the following conditions are fi lled:

ILMIN(H) / ILMAX(H)) < S(H)<, that is the symmetry factor is lower than the S(H)< adjustable thresh-old for side H and ILMIN(L) / ILMAX(L)) < S(L)<, that is the symmetry factor is lower than the S(L)< adjustable threshold for side L; ILMAX(H) > I(H)* for side H and/or ILMAX(L) > I(L)* for side L

WhereI(H)*, I(L)*: maximum phase current thresholdS(H)< S(L)<: element pickup valuetS(H)<, tS(L)<: operate time After expiry of the associated operate time (tS(H)< for side H and tS(L)< for side L) a trip command is issued; if instead the current drops below the threshold, the element it is restored.The tripping characteristic is defi nite time. The output may be assigned to the selected S(H)<TR-K output relays inside the Set \ CT supervision-74CT- side H for side H and S(L)<TR-K output relays inside the Set \ CT supervision-74CT- side L for side L menu; the same for addressing the LED indicators S(H)<TR-L and S(L)<TR-L.The elements can be enabled or disabled by setting ON or OFF the 74CT(H) Enable parameter inside the Set \ CT Supervision side H - 74CT side H menu for side H and 74CT(L) Enable param-eter inside the Set \ CT Supervision side L - 74CT side L menu for side L.

If the S(H)<-BLK1 and/or S(L)<-BLK1 parameter is set to ON, and a binary input is designed for logical block (Block1), the CT supervision function is blocked off whenever the given input is active. The trip timer is held in reset condition, so the operate time counting starts when the input block goes down.[2]

All the parameters are common for A and B Profi les

Note 1 The H index that identify the variables related to the H side are indicated inside the schematic diagrams; the operation of the protection of thermal imaging side L is similar to that of the side H.

Note 2 The exhaustive treatment of the logic block (Block 1) function may be found in the “Logic Block” paragraph inside CONTROL AND MONITORING section

A)

B)

char74CT.ai

I(H)*

α

ILMIN(H)

ILMAX(H)

tgα=S(H)<

Current asimmetry monitoring - 74CT - side H

TRIP

NO TRIP

&

0T

ts<

tS<

I LMIN/ I LMAX< S<

S<

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Tr ip S<

Star t I*

BLK1 S<

I LMAX > I*

I*



&

&

S<BLK1

Block1

Block1

Binary input INxT 0

Logic

INx t ON

INx t ON INx t OFF


I L1

I LMAX

I L2

I L3I LMIN I LMIN

I LMAX

S<TR-KS<TR-L

RESET


Trip circuit supervision - 74TCS - side H and side L[1]

PrefaceThe trip circuit can be monitored to signal possible anomalies that would lead to the missing opening of circuit breaker when trip and/or operator command are issued.Circuit interruption as well as missing of auxiliary voltage and/or coil faults are detected.Supervision with one or two binary inputs can be select; depending on association of binary inputs, the corresponding logic is automatically selected.For this purpose the TCS1 side H and TCS2 side H for side H and TCS1 side L and TCS2 side L for side H L (if two binary input are used) matching must be assigned to the selected binary inputs inside the Set \ Ingressi \ Input IN1 and Set \ Ingressi \ Input IN x.When a binary input is programmed for the TCS function, the IN1 tON, INx tON, IN1 tOFF and INx tOFF time delays must be reset to zero and the Logic parameter must be set to Active-ON inside the Set \ Inputs \ Binary input IN1 and Set \ Inputs \ Binary input INx menus.

Operation and settingsThe 74TCS element may be enabled or disabled; to enable it, the 74TCS(H) Enable parameter must be set to ON inside the Set \ Profi le A(B) \ Profi le A(B) side H \ Trip circuit supervision-74TCS for side H and Set \ Profi le A(B) \ Profi le A(B) side L \ Trip circuit supervision-74TCS for side L menu.

Logical block (Block1)If the 74TCS(H)-BLK1 enabling parameters for side H and the 74TCS(L)-BLK1 en-abling parameters for side L are set to ON and a binary input is designed for logical block (Block1), the concerning element is blocked off whenever the given input is active.[2] The enabling parameters are available inside the Set \ Profi le A(or B) \ Profi le A(or B) side H \ I(H)> Trip circuit supervision side H - 74TCS side H \ Setpoints menus for side H and Set \ Profi le A(or B) \ Profi le A(or B) side H \ I(H)> Trip circuit supervision side H - 74TCS side H \ Setpoints menus for side L while the Block1 function must be assigned to the selected binary input inside the Set \ Inputs \ Binary input IN1(x) menus.

Two inputs supervisionWith two binary input all malfunctions are detected (inclusive of mechanics faults).The binary inputs are connected to the trip and to the 52b contacts.The CB auxiliary voltage must be 36 V at least (twice the minimum threshold for every binary input).

The faulty condition is detected occurs if both the following conditions are fi lled:The TRIP contact is closed (external protection relay tripped);The circuit breaker is closed (52a closed and 52b open).

Because such conditions can arise with healthy circuit too (e.g. a trip command is issued by the protection relay but the CB opening time is still in progress), to avoid untimely operations the previ-ous condition are checked every 80 ms and the output is issued after a 2 s delay; outputs are reset to zero if at least the A or B condition become false after 0.6 s delay.[3]



Note 3 Following assumption are considered for the framework: Logic: ON, Timers tON and tOFF: reset to zero TRIP contact of the protection: DE-energized, No latched

A)B)

TCS2s.ai

TRIP

+UAUX

-UAUX

52a 52b52(H)

Pro-N

Binary input IN1

Binary input IN2

TCS1(H)

TCS2(H)

Towards 74TCS logic

Towards 74TCS logic

Trip circuit supervision with two binary inputs - 74TCS - side H


One input supervisionBy means of the right sizing of a resistor, the trip circuit supervision may be performed even with lower control voltage (e.g. when the control voltage is less than 36 V required for driving of two binary inputs, typically UAUX = 24V).The binary input is connected to the trip and an external resistor must be connected the 52b auxiliary contact..The fault condition of the trip circuit is detected by binary input power down.With healthy circuit and TRIP contact closed, the binary input is feed across the 52a path (CB closed) or across the resistor R and 52b path (CB open).When the TRIP contact turns ON, the binary input becomes short-circuited; to avoid untimely opera-tions the previous condition are checked every 80 ms and the output is issued after a 40 s delay in order to allow the fault clearing and the consequent reset of the TRIP protection. Outputs are reset to zero after 6 s from the TRIP contact open.[1]

Note 1 The trip contact (TRIP) of the protection relays must be set with automatic reset (No-latched operating mode).

TCS1.ai

TRIP

R

+UAUX

-UAUX

52a 52b52(H)

Pro-N

Binary input INx

TCS1(H)

Towards 74TCS logic

Trip circuit supervision with one binary inputs - 74TCS - side H

Fun-74TCS2.ai

02 s

T0

0 .6 sT

&

&

Enable (ON≡Enable) 74TCS(H) Enable

RESET

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

Star t 74TCS(H)

Tr ip 74TCS(H)

&&


BLK1 74TCS(H)

Block1

Star t 74TCS(H) 74TCS(H)-ST-K74TCS(H)-ST-L

74TCS(H)-TR-K

74TCS(H)-TR-L

Star t 74TCS(H)

Tr ip 74TCS(H)

Tr ip 74TCS(H)

TCS1(H)

TCS2(H)

&

Enable (ON≡Enable) 74TCS(H)-BLK1

Block1(H)

TBinary input INx

T 0

Logic

INx t ON

INx t OFFINx t ON


TBinary input INx

T 0

Logic

INx t ON

INx t OFFINx t ON


TBinary input INx

T 0

Logic

INx t ON

INx t OFFINx t ON


Trip circuit supervision with two binary inputs - 74TCS - side H


How to calculate resistanceBoth the following conditions must be fi lled:

The circuit breaker coil must no be powered when the CB is open and an open command is is-sued;The binary input is energized when the trip contact open.

If the circuit breaker is just open an unnecessary excitation must be avoided; the most critical event arises when the TRIP contact is closed (e.g. manual or test command), so with minimal series resistance. To avoid an unwanted excitation the series resistance must be higher than a minimum value defi ned as:

Rmin = RTC · (UAUX - UTCmin) / UTCminwhere:

UTCmin: minimum coil excitation voltage UAUX: auxiliary voltage RTC: coil resistance

To energize the binary input circuit when the TRIP contact and CB open, the series resistance must be lowerer than a maximum value defi ned as:

Rmax = [(UAUX - UDIGmin) / IDIG] - RTCwhere: UDIGmin: minimum binary input excitation voltage (18 V) UAUX: auxiliary voltage RTC: coil resistance IDIG: binary input excitation current (0.003 A)

To satisfy the above requirements, the R value must be chosen between the Rmin and Rmax values; typically the normalized value nearest the arithmetic mean:

R = (Rmin + Rmax) / 2

The power dissipated by the R resistor is:

PR = R · I 2 = R · [UAUX / (R + RTC)] 2

ExampleUAUX = 110 Vcc (auxiliary voltage)PTC = 50 W (coil power)RTC = UAUX2 / PTC = 242 Ω (coil resistance)UTCmin = 77 V (minimum coil excitation voltage = 70% UAUX )UDIGmin = 18 V (minimum binary input excitation voltage)IDIG = 0.003 A (binary input excitation current)

Rmin = RTC · (UAUX - UTCmin) / UTCmin = 242 · (110 - 77) / 77 = 103.7 Ω

Rmax = [(UAUX - UDIGmin) / IDIG] - RTC = [(110 - 18) / 0.003] - 242 = 30425 Ω

R = (Rmin + Rmax) / 2 = (103.7 + 30425) / 2 = 15264 Ω ~ 15 k Ω

PR (Power dissipated by the R resistor) = UAUX2 /R = 1102 / 15000 = 0.8 W[1]

Note1 In order to limit the temperature of the resistor it should be oversized (at least double the power - 2 W)

1)

2)

1)

2)

Fun-74TCS1.ai

040 s

T 06 s

T&Enable (ON≡Enable)

74TCS(H) EnableRESET

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

&&

Block1 input (ON≡Block) Block1

Start 74TCS(H)

Star t 74TCS(H)

Tr ip 74TCS

Tr ip 74TCS(H)

TCS1(H)

&


Block1(H)

Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Binary input INxT 0

Logic INx t ON

INx t ON

INx t OFF


Star t 74TCS(H)

Tr ip 74TCS(H)

BLK1 74TCS(H) 74TCS(H)-BLK1

74TCS(H)-ST-K74TCS(H)-ST-L

74TCS(H)-TR-K74TCS(H)-TR-L

Trip circuit supervision with one binary input - 74TCS - side H


Circuit breaker supervision - side H and side L[1]

PrefaceSeveral diagnostic metering and monitoring function are available:

By means 52a and 52b auxiliary contacts, the CB position is acquired. Depending on such information the Open and/or Close commands can be safely issued by user.An adjustable threshold can be set for a wear estimate of the breaker contacts; the current values (ΣI or ΣI2) are summed and compared to a user-adjustable threshold. When the threshold or the number of operations is exceeded the relay can activate an output relay. The function helps to adjust maintenance planning.By means 52a and 52b auxiliary contacts, the opening time is calculated and compared to a user-ad-justable threshold. If the threshold is exceeded the relay can activate an output relay.

Operation and settingsAccording to the conventional contact position

52a is the auxiliary contact that is in the same position as the circuit breaker, (52a open = CB open),52b is the auxiliary contact that is in the opposite position as the circuit breaker, (52a open = CB closed).

To acquire the CB position, the 52a and 52b function must be set inside the Set \ Inputs \ Binary input 1 and Set \ Inputs \ Binary input x menus. The IN1 tON, IN2 tON, IN1 tOFF and IN2 tOFF time delays must be reset to zero and the Logic parameter must be set to Active-ON inside the Set \ Inputs \ Binary input IN1 and Set \ Inputs \ Binary input INx menus.

CIRCUIT BREAKER COMMANDSTwo output relays can be set to command CB opening and closing; the CBopen-K and CBclose-K function must be set inside the Set \ Circuit breaker supervision \ LEDs-relays allocation side H menu for side H and Set \ Circuit breaker supervision \ LEDs-relays allocation side L menu for side L; the CB position can be visualized by means two LEDs (CBHopen-L and CBHclose-L parameters for side H and CBLopen-L and CBLclose-L for side L).All the parameters are common for Profi le A and Profi le B.

CIRCUIT BREAKER DIAGNOSTICFour different criteria can be select.

Number of CB trip mode (CBH ModeN.Open for side H and CBL ModeN.Open for side L). When the number of operations (CBH N.Open for side H and CBL N.Open for side L) is exceeded, an output relay and/or LED can be activated.Cumulative CB currents mode (CBH ModeSumI for side H and CBL ModeSumI for side L). When the per-phase value exceeds the threshold, an output relay and/or LED can be activated.Cumulative CB I2t mode (CBH ModeSumI for side H and CBL ModeSumI for side L). The trip-ping energy I2t is calculated on the base of current measure at the time of the open command on the base of the circuit breaker opening time provided for I2t calculation (CBH tbreak for side H e CBL tbreak for side L). When the per-phase value exceeds the threshold, an output relay and/or LED can be activated.CB operating time mode (CBH Mode-tOpen for side H and CBL Mode-tOpen for side L). The time interval between the trip command and the CB open acquisition is calculated on the base of a programmable relay (Ktrig-break for side H and Ktrig-break for side L). When the time interval (CBH tbreak> for side H and CBL tbreak> for side L) is exceeded, an output relay and/or LED can be activated.

The four criteria can be contemporaneously or separately set. All the named parameters are available inside the Set \ Circuit Breaker supervision \ CB Diagnostic side H


•

•

•

•

•

1)

2)

3)

4)

Fun-CB-position.ai

Towards CB diagnostic

TRIP

PING

MAT

RIX

(L

ED)

52a ON/OFF

t mask

0T

t mask

CB moni tor ing

Opening t ransi t ion

52b ON/OFF

52a52(H)

52b

+UAUX

-UAUX

52a(H)

52b(H)

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

Binary input INxT 0

INx t ON

T0n.o.n.c.


INx t OFF

=1

Logic diagram concerning the circuit breaker diagnostic function - side H


menu for side H and Set \ Circuit Breaker supervision \ CB Diagnostic side L menu for side L.

Fun-CB-diagnostic.ai

From CB position

CBH N.Open-KCBH N.Open-L

CBHSumI-KCBHSumI-L

SumI^2t-KSumI^2t-L

tbreak-Ktbreak-L

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)TR

IPPI

NG M

ATRI

X

(LED

+REL

AYS)

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

State CBH N.Open

C B H t break

State CBH SumI

Opening t ransi t ion≥

C B H N . O p e n C B H M o d e - N . O p e n

&

From CB position Opening t ransi t ion ≥

C B H Mode-tOpen C B H Ktr ig-break

&

From CB position

CBHSumIL3

CBHSumIL2

CBHSumIL1

Opening t ransi t ion ≥ S u m I

C B H S u m I

C B H Mode-SumI

C B H Mode-SumI^2t

&IL2

IL1I

MaxMaxI

IIL3

TRIP

PING

MAT

RIX

(L

ED+R

ELAY

S)

State CBHSumI^2t

State CBH tbreak

From CB position

CBH SumIL3^2t

CBH SumIL2^2t

CBH SumIL1^2t

Opening t ransi t ion ≥ S u m I^2 t

C B H S u m I^2 t

&IL2

IL1I 2 t

I 2 t

I 2 t

MaxMax

IL3

CB Diagnostic - Number of trips - side H

CB Diagnostic - Cumulative tripping currents - side H

CB Diagnostic - Cumulative tripping energy I2t - side H

CB Diagnostic - CB operating time - side H


Demand measuresDemand measures are calculated as:

Fixed demandIL1FIXH, IL2FIXH, IL3FIXH for side H and IL1FIXL, IL2FIXL, IL3FIXL for side L.Every fi xed demand period tFIX an average magnitude is calculated based on samples taken every 1 second. Update is carried out at the end of the same period. The fi xed demand measures may be reset to zero by means the Reset on demand measures command (Thysetter Commands menu).The tFIX parameter (Fixed demand period) is available inside the Set \ Demand measures menu.

Rolling demandIL1ROLH, IL2ROLH, IL3ROLH for side H and IL1ROLL, IL2ROLL, IL3ROLL for side L.The average magnitude is calculated inside a mobile window of N·T length where:

N is the user-defi ned number of cycles and,T is the user-defi ned sub-period.

An average magnitude is calculated based on samples taken every 1 second; update is carried out at the end of the every sub-period. The rolling demand measures may be reset to zero by means the Reset on demand measures command (Thysetter Commands menu).The tROL (Rolling demand period) and N.Rol (Number of cycles for rolling on demand) parameters are available inside the Set \ Demand measures menu.

Peak demandIL1MAXH, IL2MAXH, IL3MAXH for side H and IL1MAXL, IL2MAXL, IL3MAXL for side L.Every sub-period tROL the maximum value of the average magnitude is calculated based on samples taken every 1 second. Update is carried out at the end of the same period. The peak demand measures may be reset to zero by means the Reset on demand measures command (Thysetter Commands menu).The tROL (Rolling demand period) parameter is the same for rolling demand setting.

Minimum demandIL1MINH, IL2MINH, IL3MINH for side H and IL1MINL, IL2MINL, IL3MINL for side L.Every sub-period tROL the minimum value of the average magnitude is calculated based on samples taken every 1 second. Update is carried out at the end of the same period. The peak demand measures may be reset to zero by means the Reset on demand measures command (Thysetter Commands menu).The tROL (Rolling demand period) parameter is the same for rolling demand setting.

Oscillography Trigger Setup

Following parameters, available inside the Set \ Oscillography \ Trigger Setup menu, are user-pro-grammable:Pre-trigger time and Post-trigger time.

Element pickup trigger; the information recording starts when a state transition on any protec-tive element occurs if the parameter is set to ON.Trigger from outputs; the information recording starts when a state transition on the selected output relay occurs if the parameter is set (K1...K6).Binary input trigger; the information recording starts when a state transition on the selected binary input occurs if the parameter is set to ON.Trigger from inputs; the information recording starts when a state transition on the selected binary input occurs if the parameter is set (IN1...INx).80% Buffer alarm; when the 80% of the buffer space is reached an alarm may be issued if the parameter is set to ON.

Set sampled channelsThe desired sampled quantities may be select inside the Set \ Oscillography \ Set sampled channels menu (iL1H, iL2H, iL3H, iL1L, iL2L, iL3L, iE1, iE2, iL1cL, iL2cL, iL3cL, iL1cH, iL2cH, iL3cH, iSL1, iSL2, iSL3, idL1, idL2, idL3).

Set analog channelsThe desired sampled quantities may be select inside the Set \ Oscillography \ Set analog channels menu. Everyone of twelve analog channel may be associated to one of the selected measures (Frequency, IL1H, IL2H, IL3H, IL1L, IL2L, IL3L, IL1cH, IL2cH, IL3cH, IL1cL, IL2cL, IL3cL, ISL1, ISL2, ISL3, IdL1, IdL2, IdL3, Id2L1, Id2L2, Id2L3, Id5L1, Id5L2, Id5L3 IE, ,...etc, T1...T8[1])

Set digital channelsThe desired digital quantities may be select inside the Set \ Oscillography \ Set digital channels menu. Everyone of twelve digital channel may be associated to one of the selected I/O signal (K1... K6, K7...K10, IN1, IN2, IN3...IN42[2]).

Set digital channels from 87G-M-LThe start and trip states (ST Id>-L1,...TRId>-L1,...,TRId>>-L3 ST SatDet) may be select inside the Set \ Oscillography \ Set digital channels from 87G-M-L states menu.

Nota 1 The 26 menu is available when the MPT module is enabled

Nota 2 The output relay K7...K10 and binary input IN3...IN42 states is meaningful when the I/O circuits are present (MRI and MID16 modules)

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trigger.ai Trigger

Trigger

Timepre-trigger post-trigger

176176 NT10 - Manual - 04 - 2011 MEASURES, LOGIC STATES AND COUNTERS

5 M E A S U R E S , L O G I C S T A T E S A N D C O U N T E R S 5 M E A S U R E S , L O G I C S T A T E S A N D C O U N T E R S Measures

DirectFrequency (f )RMS value of fundamental component for phase currents side H (IL1(H), IL2(H), IL3(H))RMS value of fundamental component for phase currents side L (IL1(L), IL2(L), IL3(L))RMS value of fundamental component for residual current 1 and 2 (IE1, IE2)

Phase L1, L2, L3Compensated phase currents side H (IL1cH, IL2cH, IL3cH)Compensated phase currents side L (IL1cL, IL2cL, IL3cL)Stabilization phase currents (ISL1, ISL2, ISL3)Differential phase currents (IdL1, IdL2, IdL3)Second harmonic of differential phase currents (IdL1-2nd, IdL2-2nd, IdL3-2nd)Fifth harmonic of differential phase currents (IdL1-5th, IdL2-5th, IdL3-5th)

CalculatedThermal image side H and side L (DThetaH, DThetaL)Calculated residual current side H and side L (IEH, IEL)Stabilization currents side H and side L (IESH, IESL)Maximum current (side H) between IL1H-IL2H-IL3H (ILmaxH)Maximum current (side L) between IL1L-IL2L-IL3L (ILmaxL) Minimum current (side H) between IL1H-IL2H-IL3H (ILminH)Minimum current (side L) between IL1L-IL2L-IL3L (ILminL)Average current (side H) between IL1H-IL2H-IL3H (ILH)Average current (side L) between IL1L-IL2L-IL3L (ILL)

SequencePositive sequence current side H and side L (I1H, I1L)Negative sequence current side H and side L (I2H, I2L)Negative sequence current/positive sequence current ratio side H and side L (I2H/I1H, I2L/I1L)

Demand phasePhase fi xed currents demand side H (IL1FIXH, IL2FIXH, IL3FIXH)Phase fi xed currents demand side L (IL1FIXL, IL2FIXL, IL3FIXL)Phase rolling currents demand side H (IL1ROLH, IL2ROLH, IL3ROLH)Phase rolling currents demand side L (IL1ROLL, IL2ROLL, IL3ROLL)Phase peak currents demand side H (IL1MA XH, IL2MA XH, IL3MA XH)Phase peak currents demand side L (IL1MA XL, IL2MA XL, IL3MA XL)Phase minimum currents demand side H (IL1MINH, IL2MINH, IL3MINH)Phase minimum currents demand side L (IL1MINL, IL2MINL, IL3MINL)

Protection

For each protection threshold, the following data are available:For each protection threshold, the following data are available:

Start ON/OFFTrip ON/OFFLogic block (Block1) ON/OFFSelective block (Block2) ON/OFFCold Load Pickup ON/OFF

Delayed inputsThe binary input states, acquired downstream the delay timers are available:

IN1 ON/OFFIN2 ON/OFFINx ON/OFF

Internal statesThe state of the functions assigned to binary inputs are available:

Reset LEDs ON/OFFProfi le selection ON/OFFFault trigger ON/OFFIE /IPh Block2 ON/OFFIPh Block2 ON/OFFIE Block2 ON/OFFBlock1 H-L and 87T ON/OFFBlock1 side H ON/OFFBlock1 side L ON/OFFBlock1 87T ON/OFFTcs1 side H ON/OFFTcs1 side L ON/OFFTcs2 side H ON/OFFTcs2 side L ON/OFF External Trip sides H-L ON/OFF

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177NT10 - Manual - 04 - 2011MEASURES, LOGIC STATES AND COUNTERS

External Trip side H ON/OFFExternal Trip side L ON/OFFReset partial counters ON/OFFReset CB monitoring data side H ON/OFFReset CB monitoring data side L ON/OFF52a side H ON/OFF52a side L ON/OFF52b side H ON/OFF52b side L ON/OFFOpen CB side H ON/OFFOpen CB side L ON/OFFClose CB side H ON/OFFClose CB side L ON/OFFThermal image presetting sides H-L ON/OFFThermal image presetting side H ON/OFFThermal image presetting side L ON/OFFRemote trip ON/OFFReset on demand measures ON/OFF

RelaysFor every output relay, the output operating state and diagnostic are available (Read\Relays menu):

K1 State ON/OFFK1 Diagnostic OK/NOT OKK2 State ON/OFFK2 Diagnostic OK/NOT OK......K6 State ON/OFFK6 Diagnostic OK/NOT OK

CountersFor every element two set of counters are available (Partial counters and Total counters); the partial counters can be cleared by the user level, while the Total counter reset can be achieved with pass-word (Session Level 1).Every partial counter is reset to zero when ten thousand count is passed. All partial counters can be cleared by means a single command; for this purpose the Reset partial counters command must be issued (Commands \ Reset submenu).

Counters sides H/LCounters - 50N.1/51N.1 87NHIZ.1 side H/LCounters - 50N.2/51N.2 87NHIZ.2 side H/LCounters - 87T

Counters sides H and LCounters - 37 side HCounters - 37 side LCounters - 46 side HCounters - 46 side LCounters - I21 side HCounters - I21 side LCounters - 49 side HCounters - 49 side LCounters - 50/51 side HCounters - 50/51 side LCounters - 50N/51N side HCounters - 50N/51N side LCounters - 64REF side HCounters - 64REF side LCounters - 74TCS side HCounters - 74TCS side LCounters - CBHCounters - CBLCounters - 74CT side HCounters - 74CT side LCounters - BF side HCounters - BF side L

Partial countersxx Start partial counter (xx = I>, I>>,...) 0...9999xx Trip partial counter (xx = I>, I>>,...) 0...9999xx Block1 partial counter (xx = I>, I>>,...) 0...9999xx Block2 partial counter (xx = I>, I>>,...) 0...9999

Total countersxx Start total counter (xx = I>, I>>,...) 0...9999xx Trip total counter (xx = I>, I>>,...) 0...9999xx Block1 total counter (xx = I>, I>>,...) 0...9999xx Block2 total counter (xx = I>, I>>,...) 0...9999

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Self testLower level diagnostic (MINOR) can be output or ignored; for this purpose the MINOR Fail alarm parameter can be set ON or OFF inside the Set\Self test relay submenu.Following anomalies (MINOR) are not relevant (the protective elements continue to work):

Errors concerning the digital fault recorder.PLC I/O assigned not-matching run-time.Data bus.ME Compensation factorTransformer mismatching coeffi cient (H-L)

The self test information are:Protection and controls ON SERVICE/OUT OF SERVICESystem diagnostic OK/NOT OKDevice diagnostic OK/NOT OKProgram diagnostic OK/NOT OKData-base boot OK/NOT OKData-base runtime OK/NOT OKDSP boot OK/NOT OKDSP run-time OK/NOT OKMemory boot OK/NOT OKMemory run-time OK/NOT OKData Bus heavy OK/NOT OKData Bus minor OK/NOT OKOscillography run-time OK/NOT OKPLC boot OK/NOT OKPLC run-time OK/NOT OKProtection I/O assigned verify startup OK/NOT OKProtection I/O assigned verify run-time major OK/NOT OKProtection I/O assigned verify run-time minor OK/NOT OKTotal protection I/O assigned not-matching 0Protection I/O assigned not-matching PLC I/O assigned not-matching OK/NOT OKPLC I/O assigned not-matching run-time major OK/NOT OKPLC I/O assigned not-matching run-time minor OK/NOT OKTotal PLC I/O assigned not-matching 0PLC I/O assigned not-matchingME Compensation factor (H-L) OK/NOT OKTransformer mismatching coeffi cient (H-L) OK/NOT OK MMI module Boot OK/NOT OKMMI module Run-time OK/NOT OKMRI module Boot OK/NOT OKMRI module Run-time OK/NOT OKMID16-1 module Boot OK/NOT OKMID16-1 module Run-time OK/NOT OKMID16-2 module Boot OK/NOT OKMID16-2 module Run-time OK/NOT OKPT100 module Boot OK/NOT OKPT100 module Run-time OK/NOT OKCurrent loop module Boot OK/NOT OKCurrent loop Run-time OK/NOT OKOscillography run-time OK/NOT OK

The diagnostic alarms can be allocated to an output relay; for this purpose the Self-test relay pa-rameter can be set (K1...K6) inside the Set \ Self-test Relay submenu.

Pilot wire diagnosticDetailed diagnostic information about the pilot wire are available.(Read \ Pilot wire diagnostic).

BLIN1 pilot wire breaking diagnostic state BreakedBLIN1 ON/OFFPilot wire BLIN1 shorted ShortedBLIN1 ON/OFF

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Selective Block - BLOCK2The input and output state concerning the selective block are available (Read \ Selective block- BLOCK2).

Block2 inputPhase protections input selective block state BLK2IN-Iph ON/OFFGround protections input selective block state BLK2IN-IE ON/OFFtB-Iph/IE Elapsed state tB timeout ON/OFF

Block2 outputStarting state of phase protections enabledfor external selective block on output ST-Iph-BLK2 ON/OFFStarting state of ground protections enabledfor external selective block on output ST-IE-BLK2 ON/OFFPhase protections outputselective block state BLK2-OUT-Iph ON/OFFGround protectionsoutput selective block state BLK2-OUT-IE ON/OFFPhase and ground protectionsoutput selective block state BLK2-OUT-Iph/IE ON/OFF

Fault recording - SFRRecording is triggered by one or more causes (up to 8 simultaneous):

Activation (OFF-ON transition) of any relay programmed for trip of protection or control elementExternal trigger (binary input programmed as Fault trigger)

Twenty events are recorded into a circular FIFO (First In, First Out) buffer.[1][2]

Following information are stored in every record:Fault counter[3]

Date and timeFault cause (element trip)Phase currents side H and side L IL1Hr, IL2Hr, IL3Hr, IL1Lr, IL2Lr, IL3LrMeasured residual currents side 1 and side 1 IE1r and IE2rCalculated residual currents IEHr e IELrStabilization current IESHrPositive sequence current side H and side L I1Hr, I1LrNegative sequence current side H and side L I2Hr, I2LrPositive sequence current to lNegative sequence current side H and side L I12Hr, I12LrThermal image side H and side L D theta(H)r, D theta(L)rInputsOutputsFault cause info (faulted phase)

Event recording - SERRecording is triggered by one or more causes:

Start and/or trip of any enabled protection or control elementBinary input activation (OFF-ON or ON-OFF transition)Power-on or power-down (Auxiliary power supply)Setting change.

Three hundred events are recorded into a circular FIFO (First In, First Out) buffer.[2][4]

Following information are stored in every record:Event counter[5]

Date and timeEvent cause (binary input/element trip/setting change).

Note 1 Fault 0 is the newest fault, while the Fault 19 is the oldest fault

Note 2 Data are stored in non volatile memory; they are held in spite of power down

Note 3 Counter is updated at any new record; it may be cleared by means ThySetter

Note 4 Event 0 is the newest event, while the Event 299 is the oldest event

Note 5 Counter is updated at any new record; it may be cleared by means ThySetter

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Oscillography - DFRUpon programmable trigger, the fault records are recorded in COMTRADE format; the sampled mea-sures (16 sample per cycle) are stored in a circular shift memory buffer. The fault record are self-triggered; they are stored in sequential order up the allocated memory is used up after which the oldest memory is overwritten.An operating procedure example for the digital fault recording is illustrated inside the ThySetter section.

Following parameters are user-programmable:Enabling an alarm when the 80% of the size of the buffer is reached. Recordings are automatically generated and stored in sequential order until the available memory is fi lled, the alarm signal is a warning so that you may download the data in RAM[1] memory of the relay and then reset the memory without losing any recordings older who would be overwritten by future recordings,Pre-trigger and post-trigger time setting,

Selected sampled quantities,Analog channels (1...12) allocation,Digital channels (1...12) allocation (output relay and/or binary inputs),Trigger setup; the information storage starts when a state transition on the selected signal occurs. (protective element start and/or trip, output relay and/or binary input switching).

COMTRADERecords are recorded in COMTRADE format; (Common Format for Transient Data); This is a standard for the data exchange for various types of tests or simulation datas, etc, for power system applica-tions.The measurements are recorded in ASCII or BINARY format. COMTRADE fi les always come by pairs:

The “.CFG”-fi le describing the confi guration: number of analog and digital channels, sampling rate, scale factors, etc.The “.DAT”-fi le containing the data

The COMTRADE is part of IEC 60255-24 standard.The recording can be analyzed by mean of ThySetter sw or any other standard compliant viewer.

The record quantity is depending on settings of following parameters:Pre-trigger and post-trigger timesNumber of allocated channels.

By means of the following formula the record quantity may be evaluated:

where:N : record quantityvi: sampled measuresvRMS: analog measures (RMS)nB: logic variablestpre: pre-trigger time intervaltpost: post-trigger time intervalf : frequency

Note 1 Data are stored into volatile memory RAM, they are lost when power goes down

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trigger.ai Oscillographic recorder - trigger

Trigger


trigger.ai Oscillographic recorder - trigger

Trigger


N = int ·16 + 16 vi + 4 vRMS + nB

600(tpre + tpost )(s)

59 s ·f (Hz)50 (Hz)N = int ·

16 + 16 vi + 4 vRMS + nB

600(tpre + tpost )(s)

59 s ·f (Hz)50 (Hz)


Example 1With the following setting:

Pre-trigger: 0.2 sPost-trigger: 0.1 sSampled measures: iL1H, iL2H, iL3H, iE1, iL1L, iL2L, iL3L, iE2Analog measures: IL1H, IL2H, IL3H, IE1, IL1L, IL2L, IL3L, IE2Logic variables: K1, K2, K3, K4, K5, K6, IN1, IN2

up to 640 records can be stored if f = 50 Hz, since

Example 2With following setting:

Pre-trigger: 0.5 sPost-trigger: 0.5 sSampled data: iL1H, iL2H, iL3H, iE1, iL1L, iL2L, iL3L, iE2Analog channels: IL1H, IL2H, IL3H, IE1, IL1L, IL2L, IL3L, IE2Digital channels: K1, K2, K3, K4, K5, K6, IN1, IN2

up to 160 records can be stored if f = 60 Hz, since:

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N = int = 640·16 + 16 · 8 + 4 · 8 + 8

600(0.1 + 0.2 )(s)

59 s ·50 (Hz)50 (Hz)N = int = 640·

16 + 16 · 8 + 4 · 8 + 8600

(0.1 + 0.2 )(s)59 s ·

50 (Hz)50 (Hz)

N = int = 160·16 + 16 · 8 + 4 · 8 + 8

600(0.5 + 0.5 )(s)

59 s ·60 (Hz)50 (Hz)N = int = 160·

16 + 16 · 8 + 4 · 8 + 8600

(0.5 + 0.5 )(s)59 s ·

60 (Hz)50 (Hz)

oscillo-phase.aiPhase-to-phase fault record

182182 NT10 - Manual - 04 - 2011 INSTALLATION

6 I N S T A L L A T I O N6 I N S T A L L A T I O N

6.1 PACKAGING

Packaging consists of a paperboard packaging guaranteeing adequate protection for transport and storage under normal environmental conditions. The Pro-N protection relays must be stored within the required temperature limits; the relative hu-midity should not cause condensation or formation of frost.It is recommended that the devices are stored in their packaging; in the case of long storage, espe-cially in extreme climatic conditions.It is recommended that the packaging not be disposed of into the environment, but kept in case the relay should be moved at some later time.

6.2 MOUNTING

The Pro-N protection relays are housed inside metal cases suitable for various kinds of assembly:Flush mountingProjecting mountingWith separate operator panelRack.

Removability is ensured to facilitate maintenance operations so that the electronic module can be replaced; this provides minimum downtime and maximum protection availability.

Flush mountingThe fi xed case, fi tted with special fastening brackets, is mounted on the front of electric control board, previously drilled as indicated in the drawing.In case of side-by-side mounting of several relays the minimum drilling distance is determined by the front dimensions indicated in the overall dimensions drawing, increased by 3 mm, to ensure an adequate tolerance and gasket space between adjacent relays.The depth dimension, as indicated in the drawing, must be increased by as much as needed to allow room for the wiring.

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149

30

N.4 holes ø 3,5

102.5 ±0.370

161

154

Flush-mount.aiFlush mounting

107

177

ON 41 32 5

TRIP

START

101

171

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

205

149

30

N.4 holes ø 3,5

102.5 ±0.370

161

154

Flush-mount.aiFlush mounting

107

177

ON 41 32 5

TRIP

START

101

171

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

NOTE Separation of fixed and removable parts is NOT required NOTE Separation of fixed and removable parts is NOT required

183NT10 - Manual - 04 - 2011INSTALLATION

Remove the upper tile and open the little door to access the fastening screws.

The fi xed case is fastened by means of four screws onto the panel as indicated in the drawing.

Projecting mountingRemove the ground screw and open the little door to access the fastening screws.Make all connections and join the relay to the framework with front and earth screws.

In case of side-by-side mounting of several relays, the minimum fi xing distance is determined by the dimensions of the mounting plate indicated in the overall dimensions drawing, increased horizontally and vertically by as much as needed to allow room for the wiring and to ensure an adequate toler-ance between devices.

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Remove-t i le.aiRemoving tie to access the fastening screws Remove-t i le.aiRemoving tie to access the fastening screws

Flush-mount1.aiFour screws Flush-mount1.aiFour screws

Projecting.ai

ON 321 54

TRIP

START

120

8031

275

Projecting mounting Projecting.ai

ON 321 54

TRIP

START

120

8031

275

Projecting mounting


Separate operator panelThe solution with projecting assembly and a separate operator panel is particularly suitable for limited in depth installations.Cutout dimension and mounting steps concerning the separate operator panel are the same for the fl ushing mounting (see previous pages.

For the connection between the two modules the shielded cable with a direct connection to RJ45 category 5 (supplied) must be used.

Separate-mount.ai

3051525

212.5

170

107

177

ON 41 32 5

TRIP

START

N.4 holes ø 4,5

128.5110

200

168

20

ø 4.5

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

Separate operator panel Separate-mount.ai

3051525

212.5

170

107

177

ON 41 32 5

TRIP

START

N.4 holes ø 4,5

128.5110

200

168

20

ø 4.5

F1

D1

RX

TX

F2F3F4F5

A1A2

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A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

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19

C

210

311

412

513

614

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Separate operator panel

Separate-mount1.aiSeparate operator panel


Rack mountingFor mounting inside a standardized 19-inch system (EIA 310-D, IEC 60297 and DIN 41494 SC48D), the MAR adapter is required (available on request).

To allow opening of the keyboard door a one unit space must be provided when several rack are overlapping mounted.

Rack-mount.aiRack mounting

177

(4U)

101.

6

482.6465

ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START

Rack-mount.aiRack mounting

177

(4U)

101.

6

482.6465

ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START

Rack-mount1.aiRack mounting Rack-mount1.aiRack mounting


6.3 ELECTRICAL CONNECTIONS

Electrical connections should be made by referring to the connection diagram; in cases where cer-tain of the circuits (communication, block, or others) are not used, the relevant connections must remain open. Examples of connection diagrams are reported on Appendix to this manual.

For the A1...A22 connections, screw terminals with following characteristics are available:Nominal cross section: 0.14...2.5 mm2 (AWG 26...16) for single conductor

da 0.14 a 0.75 mm2 for two conductors with same cross sectionTightening torque: 0.5-0.6 NmStripping length: 8 mm

For the F1...F5 (RS485) connections, screw terminals with following characteristics are available:Nominal cross section: da 0.2 a 2.5 mm2 (AWG 24...12) for single conductor

da 0.2 a 1.5 mm2 for two conductors with same cross sectionTightening torque: 0.5-0.6 NmStripping length: 10 mm

Amperometric inputsThe connections to the current signal inputs C1...C16 can be made by ring lugs suitable for M3 screws.

EarthingA protective ground connection is required, which must be connected to the suitable screw with a separate lead of at least 2.5 mm2 section.

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Devices must be installed by qualified personnel only.No liability is accepted from Thytronic due to improper use.CAUTION Devices must be installed by qualified personnel only.No liability is accepted from Thytronic due to improper use.CAUTION

RS485

RJ45 Thybus

UAUX

A1≅

A2

A6A7A8

K2

A9A10A11

K3

K4

A3A4A5

K1

A12A13A14

K5

K6A15BLOUT-

BLOUT+ A16A17BLIN-

B-

A+

BLIN+ A18A19

IN2

IN1 A20A21A22

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

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RJ45 Ethernet

Current inputs

Connections

RS485

RJ45 Thybus

UAUX

A1≅

A2

A6A7A8

K2

A9A10A11

K3

K4

A3A4A5

K1

A12A13A14

K5

K6A15BLOUT-

BLOUT+ A16A17BLIN-

B-

A+

BLIN+ A18A19

IN2

IN1 A20A21A22

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

RJ45 Ethernet

Current inputs

Connections

rear.aiEarthing

Ground screw


Core balanced CTThe current balance transformer, when used for measuring residual current, must be crossed in the same direction by all active conductors and hence, also by the neutral conductor if distributed, with the exception of the ground connection protective conductor. The drawing below shows cases of assembly of the toroid on unscreened and screened cables; prior to proceeding with assembly, it is necessary to check that there are no screen-to-ground connections upstream of the sensor.

In order to ensure a linear response from the sensor, the cables must be positioned in the centre of the transformer so that the magnetic effect of the three cables is perfectly compensated in the absence of residual current (Fig.2a). Hence, the assembly indicated in the drawing of fi g.2b, in which phase L3 causes local magnetic saturation whereby the vectorial sum of the three currents would be non-null, should be avoided. The same considerations also apply when the sensor is positioned near bends in the cabling. It is recommended that the transformer be placed away from bends in the conductors (fi g. 2c).

Fig. 1a Fig. 1b

Armoring

Load Load

Source Source

Insulated cables

Shielded cables

Armoring

Toroide.ai Current balanced transformerFig. 1a Fig. 1b

Armoring

Load Load

Source Source

Insulated cables

Shielded cables

Armoring

Toroide.ai Current balanced transformer

L1

Fig. 2a Fig. 2b Fig. 2c

L3L2

L1

L3L2

Toroide.ai Current balanced transformer


Amperometric inputsThe amperometric input circuits are assembled inside the fi xed module, so no short circuit on the secondary CT must be provided when the removable module is pulled out. If you replace the relay is essential to provide appropriate external jumper to realize the CTs secondary circuit shorting during installation until secondary wiring is complete.. For security reasons it is advisable to operate in the absence of current on-line.

When making the current connections, attention must be paid to not exceeding the performance of the line current transformers. To be exact, the total load, constituted by the protective relay, any other protective relays or measuring instruments and the resistance of the connections, must not ex-ceed the line CT performance. In particular, consumption of the relay input circuit must not exceed 0.04 VA while the load (expressed in VA) constituted by the conductors is given by:

0.018 × L × In2 / Swhere: L the overall length, expressed in m, of the two conductors in relation to each phase; In nominal current of the line CT expressed in A;S cross sectional area of the current conductors expressed in mm2.It is recommended that cabling of a suitable thickness be used in order to limit wear of the CT sec-ondary circuits.

Binary inputsThe dry input circuits, despite being galvanically isolated, must preferably be supplied with the same auxiliary voltage of the control panel.The inputs are polarity free with wide voltage range.

The optoisolated inputs are immune to transitory interferences, however the following recommenda-tion must be considered in high disturbed environments:

Position input wiring away from high energy sources.Set a debounce timer (tON and/or tOFF) to alloy the transient to decay.Use shielded cables with ground connection on only one end (preferably at the relay side.

Output relaysSix output relays are available.It is advisable to verify that the technical characteristic of the contacts be suitable for the applied load (about current, nominal voltage, make and break current , etc..).Output relay K1 and K2 have one change over contacts (SPDT, type C).Output relay K3 and K4 have one make contact (SPST-NO, type A) and a common reference (A10 terminal).Output relay K5 and K6 have one make contact (SPST-NO, type A for K5), one break contact (SPST-NC, type B for K6) and a common reference (A13 terminal).All contacts are shown in de-energized state for standard reference.

•••

Verify that the shorting device on the CT is properly connected until the CT is ready to be installed.The secondary of the CT must always have a burden (load) connected when not in use.CAUTION: A dangerously high secondary voltage can develop with an open-circiuited sencondary.

CAUTIONVerify that the shorting device on the CT is properly connected until the CT is ready to be installed.The secondary of the CT must always have a burden (load) connected when not in use.CAUTION: A dangerously high secondary voltage can develop with an open-circiuited sencondary.

CAUTION

Binary-sch.aiBinary inputs

+UAUX

-UAUX

A19

A20 IN1

A B

A21

A22 IN2

Binary-sch.aiBinary inputs

+UAUX

-UAUX

A19

A20 IN1

A B

A21

A22 IN2


RS232 portThe link from PC and NA60 serial port must be established by means a L10041 cable.The RS232 port takes priority over other communication links (Ethernet or RS485 port).

When no RS232 port is available on Personal Computer, a suitable USB to RS232 converter must be employed.After installation, the same communication port must be selected to defi ne the Thysetter parameters (typically COM4, COM5,...).

Ethernet portA RJ45 or FX optics fi ber is provided (optional).An Ethernet port may be provided with RJ45 or FX optics fi ber interface.For testing a PC may be directly connect to the NA60 Ethernet port on the rear side.With TX interface a cross cable must be employed, while an Ethernet-optical fi ber converter, suit-able for 100 Mb data rate must be employed if an FX port is implemented.

The link must be enabled by means ThySetter sw and RS232 connection:Set the IP address (Host IP address e IP net mask) in order that the NA60 and PC parameters are matched; the parameters are inside the Communication \ Ethernet submenu.Set to OFF the Autonegotiation parameter of NA60 device (Autonegotiation parameter inside Communication \ Ethernet submenu).

For security reasons, a change of the Ethernet communication parameters become active only after an hw reset.

•

•

serial1-sch.ai

L10041

Female connector(solder side) USB-RS232 converter

(if none RS232 PC port is available)

TXD

RXD

DTR

GND

4

3

1

2

1

2

3

4

6

7

8

95

RJ10 Connector Pin1

serial1-sch.ai

L10041

Female connector(solder side) USB-RS232 converter

(if none RS232 PC port is available)

TXD

RXD

DTR

GND

4

3

1

2

1

2

3

4

6

7

8

95

RJ10 Connector Pin1

ethernet-wir ing.ai

cross cable

Ethernet RJ45

Ethernetoptical fiber

ethernet-wir ing.ai

cross cable

Ethernet RJ45

Ethernetoptical fiber


RS485 portRS485 communication circuit connections must be made using screened twisted pair cable observ-ing the polarities; screening must only be connected to the end terminating at the RS485 interface circuit pertaining to the monitoring unit. It is recommended to terminate the line at the extremities of the same; this must be performed on the RS485 line control unit and on the NA60 device placed at the furthest point connecting the specially provided resistor; termination can be made by means a jumper between the F2-F3 terminals.Termination resistors allow adjusting the impedance of the line, reducing the infl uence of the induc-tive components of the same, which might compromise good communication.

RS485

120 Ω

SUPERVISION UNIT

OUTP

UT R

ELAY

S

UAUXA1 ≅

A2

A9

A10

A11A12

A13

A14

E1

THYB

US

D1

ETHE

RNET

A3A4A5A6A7A8

K2

K3

K4

K5

K6

K1

RS48

5

F1F2F3F4F5A+

A+

B-

B-

BLOC

K OU

T

BLOC

K IN A15BLOUT-

BLOUT+ A16

BIN

ARY

INPU

TSA19

A18A17

IN1

IN2

A20A21A22

C1IL1

IL2

IL3

IE

CURR

ENT

INPU

TS

C2C3

C4C5

C6

C7

C8

RS48

5

F1F2F3F4F5A+

B-

Pro-NPro-N

RS23

2

FRONT PANEL

RS485

RS485

120 Ω

SUPERVISION UNIT

OUTP

UT R

ELAY

S

UAUXA1 ≅

A2

A9

A10

A11A12

A13

A14

E1

THYB

US

D1

ETHE

RNET

A3A4A5A6A7A8

K2

K3

K4

K5

K6

K1

RS48

5

F1F2F3F4F5A+

A+

B-

B-

BLOC

K OU

T

BLOC

K IN A15BLOUT-

BLOUT+ A16

BIN

ARY

INPU

TSA19

A18A17

IN1

IN2

A20A21A22

C1IL1

IL2

IL3

IE

CURR

ENT

INPU

TS

C2C3

C4C5

C6

C7

C8

RS48

5

F1F2F3F4F5A+

B-

Pro-NPro-N

RS23

2

FRONT PANEL

RS485


Thybus portIn order to extend I/O capability, the Pro_N relays can be customized through external auxiliary mod-ules; moreover 4...20 mA converter and temperature measuring modules are provided.The modules do not need external auxiliary supply. It is fed directly by Thybus port.

THYBUS OUTPUTTHYBUS INTPUT

MRI

BIN

ARY

INPU

TS

OUTP

UT R

ELAY

S

52IN1

5150

IN24948

IN347

IN4

IN5

4342

IN6

4140

IN7

353433323130

3

IN8

567

K1

111213

K2

161514

K3

222120

K4

THYBUS OUTPUTTHYBUS INTPUT

MID16

BIN

ARY

INPU

TS52

IN15150

IN24948

IN347

IN4

IN5

4342

IN6

4140

IN7

353433323130

3

IN8

5IN9

67

IN10811

IN1112

IN12

IN13

1314

IN14

1516

IN15

202122232425

IN16

Pro_N

E1

THYB

US

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

MODULO INGRESSI REMOTI

INPUTOUTPUT ON

RUNBUS

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

MID-16

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726


INPUTOUTPUT ON

RUNBUS

MID-16

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

MID8MODULO INGRESSI REMOTI

INPUTOUTPUT ON

RUNBUS

OUTPUT

ON

BU

S

RU

N

1 2 3 4 5MODULO 4 RELE’ + 8 INGRESSI DIGITALI4 RELAYS + 8 BINARY INPUTS MODULE

INPUT

MRI

PT1 MPT1

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

OUTPUT

MPT

ON

BU

S

RU

N

MODULO PT100PT100 MODULE

INPUT

PT2 MPT2 PT3 MPT3 PT4 MPT4

PT8 MPT8 PT7 MPT7 PT6 MPT6 PT5 MPT5

PUTNISUBYHT TUPTUOSUBYHT

MPT

8T1

PT1 PT8MPT1 MPT8

PT7MPT7

PT6MPT6

PT5MPT5

PT2MPT2

PT3MPT3

PT4MPT4

T876

T7

T6

T5

11T212

13

15T316

17

20T4

2122

494847

444342

403938

353433

THYBUS INPUT THYBUS OUTPUT

MCI

47

48

11NCMIS-1 -

+1213

# / ∩

14NCMIS-2 -

+1516

# / ∩

20NCMIS-3 -

+2122

# / ∩

23NCMIS-4 -

+2425

# / ∩

UAUX≅

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

OUTPUT

MCI

ON

BU

S

RU

N

1 2 3 4 5MODULO CORRENTE IMPRESSACURRENT LOOP OUTPUT MODULE

INPUT

Thybus


The Thybus link must be carried out by means category 5 shielded cable with RJ45 connectors.The maximum length of the Pro-N device - module link is:

2 m for MRI module (max one module)20 m for MMOS-4 module (max one MMI module)30 m for MID16 and MPT modules2 m for MPT module (max one Pt100 module)2 m for MCI module (max one current converter module)

For upgrading, that may be operated at any time with in service devices too, the following operations must be performed:

Turn OFF power supplyConnect the auxiliary modules to the Thybus port in daisy chain mode following the INPUT-OUTPUT sequence.[1] If two MID16 (binary inputs) are installed, the hardware address must be set to avoid communica-tion collisions on the Thybus; for this purpose the default address must be changed on one module, by means of dip-switch on the top circuit board (front plate must be removed).

Turn on powerGo on to the sw setting (see SETTING section of instruction manual).

Note 1 The insertion order is free. One MRI module, two MID16 modules, one MPT module, one MCI module and one MMI module (separate operator panel) can be connect at the

same time to the Thybus port (maximum expansion).

•••••

••

•

••

S1

18OFF

ON S1

18OFF

ON

default address modified address (2nd MID16 module)

DIP-MID16.aiMID16 hardware address setting

S1

18OFF

ON S1

18OFF

ON

default address modified address (2nd MID16 module)

DIP-MID16.aiMID16 hardware address setting


Block circuits

Block circuits may be connected to equipment located in a different switchboard: For the aim of reliability, it is recommended to use conductors having a cross sectional thickness of at least 1 mm2 and to not exceed 5 km in length. For connections that are particularly critical in terms of electro-magnetic pollution, it is recommended to use BFO adaptor modules with fi bre optic connection.

When devices without committed pilot wire circuits must be embedded (devices other than Pro_N), or in the event that further I/O circuits are need, output relays and binary inputs can be customized to work in the logic selectivity system together with the committed pilot wire circuits.

Block-sch.aiLogic selectivity with BFO

BLIN1

BLIN1

BLIN1

Block2 IPh

BLOUT1

BLOUT1

TRIP I>>TRIP I>>

TRIP I>>

TRIP I>>Any device

Block-sch.aiLogic selectivity with BFO

BLIN1

BLIN1

BLIN1

Block2 IPh

BLOUT1

BLOUT1

TRIP I>>TRIP I>>

TRIP I>>

TRIP I>>Any device

Block-misto.ai

BLIN

1

BLOU

T1Uaux

BIN

ARY

INPU

TSA19A20A21A22

BLOC

K OU

T

BLOC

K INA17 A15BLOUT-

BLOUT+ A16A18

TRIP I>>TRIP I>>

START I>>

TRIP I>>Pro_N

S1

S2 S3Pro_N

BIN

ARY

INPU

TSA19A20

A21A22

BLOC

K OU

T

BLOC

K INA17

A15BLOUT-

BLOUT+ A16A18

Example for accelerated protection system with joint use of binary input and pilot wire links Block-misto.ai

BLIN

1

BLOU

T1Uaux

BIN

ARY

INPU

TSA19A20A21A22

BLOC

K OU

T

BLOC

K INA17 A15BLOUT-

BLOUT+ A16A18

TRIP I>>TRIP I>>

START I>>

TRIP I>>Pro_N

S1

S2 S3Pro_N

BIN

ARY

INPU

TSA19A20

A21A22

BLOC

K OU

T

BLOC

K INA17

A15BLOUT-

BLOUT+ A16A18

Example for accelerated protection system with joint use of binary input and pilot wire links


6.4 NOMINAL CURRENT In AND IEn SETTING

Factory default settings: Nominal phase current In: 5 ANominal residual current IEn: 1 A

To modify settings the plug-in module must be extracted from the case.

The following operations must be performed:Remove the auxiliary supplyUnplug the RS485 and RJ45 cables - Ethernet and/or Thybus (RJ45 E1)

Remove the upper tile and open the little door to access the fastening screws.

••

••

•

Turn off power supply before extracting or re-inserting the relay.If an attempting is made to insert a relay into an un-matching case, a mechanical code will preventfull insertion. Demage can result if excessive force is applied.

CAUTIONTurn off power supply before extracting or re-inserting the relay.If an attempting is made to insert a relay into an un-matching case, a mechanical code will preventfull insertion. Demage can result if excessive force is applied.

CAUTION

Disconnect.aiUnplug the RS485 (F1...F5) and RJ45 connectors Disconnect.aiUnplug the RS485 (F1...F5) and RJ45 connectors

Remove-t i le.aiRemoving tie to access the fastening screws Remove-t i le.aiRemoving tie to access the fastening screws


Unscrew gradually back to back the four fastening screw in order avoid loss of the internal washer.Un-mounting of the case from the switchboard is not needed.

Remove the front panel and release the connection on (MMI versions for fl ush mounting with dis-play), or the fi xing plate (versions with separate operator panel).

•

•

set- in.aiUnmounting set- in.aiUnmounting

Spl i t -MMI.aiSplit MMI module from fixed module Spl i t -MMI.aiSplit MMI module from fixed module


Pull out the removable module grabbing the metal handles.

Lean out the module on the grounded surface[1],

Note 1 There are components present which are sensitive to electrostatic discharge. When the module is removed, it is important to pay particular attention to avoid any accidental contact with the internal components. In order to avoid the static electricity accumulated in the human body from causing damage, it is recommended to observe the following precautions: - eliminate any potential differences between the human body and the device by touching the metallic case, - avoid touching the printed circuit and connections (tracks, component terminals), - avoid handing the device to others, - set the programming DIPs by using antistatic tools.

•

•

extract .a iPull-out the module from the case extract .a iPull-out the module from the case


Set the dip-switches on the right-hand circuit board in accordance with the drawing shown be-low:

Amperometric inputs 1/5 A

Move dip-switches according the following layout

Reassemble all parts with the previous operations in reverse order. Reconnect the RS485 and RJ45 cables (Ethernet and/or Thybus).

•

•

••

Dip-switch localization concerning the nominal current setting inside the CPU boardDip-switch localization concerning the nominal current setting inside the CPU board

Default settings:- InH = InL = 5 A- IEn1 = IEn2 = 1 A

Setting:- InH = InL = 5 A- IEn1 = IEn2 = 5 A



Dip-switch localization concerning the nominal current setting inside the CPU board

ETHERNET

THYBUS

485

1 A

5 A

S51 2 3 4

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE2

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS6

1 2 3 4

IL1

IL2

IL3

IE1

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 A

SIDE L SIDE H

S6

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS6

1 2 3 4

IL1

IL2

IL3

IE

S61 2 3 4

Default settings:- InH = InL = 5 A- IEn1 = IEn2 = 1 A




Dip-switch localization concerning the nominal current setting inside the CPU board

ETHERNET

THYBUS

485

1 A

5 A

S51 2 3 4

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE2

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS6

1 2 3 4

IL1

IL2

IL3

IE1

1 A

5 AS5

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 A

SIDE L SIDE H

S6

1 2 3 4

IL1

IL2

IL3

IE

1 A

5 AS6

1 2 3 4

IL1

IL2

IL3

IE

S61 2 3 4


6.5 LED ALLOCATION

Following indicator LEDs are available on the front panel:

LED ON (green): if no diagnostic anomalies are detected, the green LED is turned ON while any fault is highlighted by fl ashing.LEDs 1...5 (red) are freely assignable from the user to any protective and/or control functions.LED START (yellow) committed for start information of any protective functions.LED TRIP (red) committed for trip information of any protective functions.

6.6 FINAL OPERATIONS

Before energizing the electric board, it is advisable to check that:The auxiliary voltage in the panel falls within the operative range of Pro_N relays.The rated current (1 A or 5 A) of the line CT’s corresponds to the setting of Pro_N relays.All wirings are correct.All screws are tightly screwed.

•

•••

••••

Label_LEDLEDs

ON & DiagnosticStartTrip

LED 1...5user-programmable

Label_LEDLEDs

ON & DiagnosticStartTrip

LED 1...5user-programmable

199NT10 - Manual - 04 - 2011SETTING AND COMMISSIONING

7 P R O G R A M M I N G A N D S E T T I N G S7 P R O G R A M M I N G A N D S E T T I N G S

All relay programming and adjustment operations may be performed through MMI (keyboard and display) or using a Personal Computer with the aid of the ThySetter software.

7.1 SW ThySetter

The ThySetter sw is a “browser” of data (setting, measure, etc..); it implements an engine that is afford to rebuild the menu set up and the relationships to data concerning all Thytronic protective relays by means of XML fi les.

ThySetter installation

The latest release of ThySetter can be downloaded free of charge from the www.thytronic.it (Prod-uct / Software / ThySetter - Download area).

ThySetter usePlease refer to ThySetter user manual for detailed instructions.The document is available on www.thytronic.it (Product / Sotware / ThySetter - Download area).

WARNINGFor safety reasons, a change of the following parameters become active only after an hw reset:- Relay nominal frequency (fn) and nominal voltages (Un, UEn)- Ethernet communication parameters (IP host address, IP net mask, Autonegotiation)

WARNINGFor safety reasons, a change of the following parameters become active only after an hw reset:- Relay nominal frequency (fn) and nominal voltages (Un, UEn)- Ethernet communication parameters (IP host address, IP net mask, Autonegotiation)



200200 NT10 - Manual - 04 - 2011 SETTING AND COMMISSIONING

7.2 MMI (Man Machine Interface)

On the front panel there are eight buttons which allow the user to perform all the settings, reading and modifi cation operations.[1]

The adjustment of the settings and the operation mode of the output relays must be performed while the unit is electrically powered; the alphanumeric display shows the necessary information with reference to the operations performed through the keyboard. One minute after the keyboard is not more in use, the display backlight switches automatically to OFF.All preset values are permanently stored in the nonvolatile memory.The buttons take the following operations:

- (Up) move the cursor upwards to the preceding menu options

- (Down) move the cursor downwards to the subsequent menu options

- (Left(Left) move the cursor upwards to the preceding menu options

- (Right) move the cursor downwards to the subsequent menu options

- (Enter) access to the selected menu with the option of modifying any given parameter

- (Reset) abort the current changes and/or accessing the previous menu

- Circuit breaker Open command

- Circuit breaker Close command

At power-up, the display shows the text:“THYTRONICPRO-NT10-xxx-x serial numberdate and time: (01/01/2000 00:00”The ON green Led points out the auxiliary power supply voltage (permanent lighted) and possible faults (blink lighted).The display backlight is automatically activated when any key switch is set.

By means of the (Up) or (Down) buttons, it is possible to cyclically browse through the menu options: READ, SET, COMMUNICATION, TEST

Having identifi ed the sub-menu of interest, it is possible to gain access by using the (Right) button

and then analogously, run through the relevant options by using the (Up) or (Down) buttons. The full menu tree and some examples are showed in the following pages (numerical values and settings are pointed out as examples and does not agree with real situations.

Reading variables (READ)All data (measure, settings, parameters, etc...) can be displayed; they are arranged in functional group submenus:“SERIAL NUMBER >>”“INFO >>”“MEASURES >>”“ACTIVE PROFILE >>”“PROTECTIONS >>”“PLC >>”“CIRCUIT BREAKER SUPERVISION >>”“DELAYED INPUTS >>”“INTERNAL STATES >>”“RELAYS >>”“PARTIAL COUNTERS >>”“TOTAL COUNTERS >>”“SELF-TEST >>”“PILOT WIRE DIAGNOSTIC >>”“SELECTIVE BLOCK BLOCK2 >>”“INTERNAL SELECTIVE BLOCK BLOCK4>>”

Note 1 Setting changes are enabled when the Enabling setting by MMI parameter is set

OPEN CB

LEDs

CLOSE CB

OPEN CB

LEDs

CLOSE CB


“FAULT RECORDING >>”“EVENTS RECORDING >>”

Setting modifying (SET)All changes in the setting parameters are carried out through MMI only if the Enable setting by MMI parameter is ON. (ENABLE SETTING BY MMI submenu inside the SET menu).To effect a change, having identifi ed the parameter intended for change, the following procedure must be performed:

Select the parameter going through the menus by means the , and keys.Press the (Enter) button for a few seconds; the modifi cation in progress status is highlighted by fl ashing of the START and TRIP LEDs and by appearance of the pointer on the bottom.

Move the cursor over the parameter intended for change using the (Enter) button,

Change the parameters by means the (increment) or (decrement) buttons,

Press the (Enter) button to move the cursor over the last parameter in the display,

Press the (Enter) button once again; the cursor and the LED TRIP turn off (the LED START keeps fl ashing),Press the (Enter) button for a few seconds; new message appears: “Confi rm settings?”Answer to the message ENTER: YES to confi rm changes or RESET: NO to abort.

The end of the START LED blinking points out the end of procedure; the changes become right now active.The abort command may be used to abandon changes (prior to use of the ENTER: YES); the same effect is achieved by removing the auxiliary power supply to the NA60 relay.

As example, to set the operating mode of the K1 output relay as ENERGIZED, LATCHED, the following procedure must be issued:

By means (Down) button select the Set menu “SET >>”,Press the (Right) button to enter; the following submenu title i displayed: “BASE >>”Scroll menus by means (Down) button

“TRANSFORMER >>”“INPUT SEQUENCE >>”“POLARITY >>”“INPUTS >>”“RELAYS >>”“LEDS >>”“SELF-TEST RELAY >>”“MMI >>”“PROFILE SELECTION >>”“PROFILE A >>”“PROFILE B >>”“PLC >>”“CIRCUIT BREAKER SUPERVISION SIDE H >>”“CIRCUIT BREAKER SUPERVISION SIDE L >>”“CT SUPERVISION 74CT SIDE H >>”“CT SUPERVISION 74CT SIDE L >>”“REMOTE TRIPPING >>”“PILOT WIRE DIAGNOSTIC >>”“DEMAND MEASURES >>”

Select the Set menu “RELAYS >>”, the “K1 relay Setpoints >>” message is displayed,Press the (Right) button to enter; the following messages are displayed:

“Logic DE-ENERGIZED Mode NO LATCHED”Press the (Enter) button for a few seconds; the modifi cation in progress status is highlighted by the both START and TRIP fl ashing. Move the cursor over the parameter intended for change using the (Enter) button, (in our case on the message “Logic DE-ENERGIZED”,Change the parameters by means the (increment) or (decrement) buttons, “Logic ENER-GIZED”,Press the (Enter) button to move the cursor over the last parameter in the display, “Mode NO LATCHED”,Change the parameters by means the (increment) or (decrement) buttons, “Mode LATCHED”,Press the (Enter) button once again; the cursor and the LED TRIP turn off (the LED START keeps fl ashing),Press the (Enter) button for a few seconds; new message appears: “Confi rm settings?”Answer to the message ENTER: YES to confi rm changes or RESET: NO to abort.

The end of the LED blinking points out the end of procedure.

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TESTThe operational tests with command of the selected output relays may be activated.

By means of (Up) or (Down) buttons it is possible to browse the main menu till the “TEST”

message; to enter you must press the (Right) button.[1]

The display message “Test state: OFF” shows the test state (OFF or test in progress).Test K2Test K3Test K4Test K5Test K6

As example, to start the test of K1, the following procedure must be issued:Select the Start test menu “Start test >>”.

Press the (Right) button to start; the test in progress status is highlighted by activation of all LEDs,

Come back by pressing the (Left) button and select the relay to be tested by means the or

buttons until the message “Test K1 >>” is displayed.

Press the (Right) button to start the test.

To terminate the test, it is necessary to select the “Stop test >>” message and press the (Right) button to end the test. In any case the test will be automatically terminated after a delay of one minute.

CommunicationInside the COMMUNICATION menu it is possible to read/modify the setting data of the RS485 Proto-col and Ethernet parameters.

By means of (Up) or (Down) buttons it is possible to browse the main menu till the “RS485

Protocol >>” or “Ethernet parameters >>” message; to enter you must press the (Right) button.As example, to select the address 12 for the ModBus protocol, the following procedure must be issued:

Select the Communication menu “COMMUNICATION >>”.

By means (Down) button select the “RS485 Protocol >>”.

Press the (Right) button to enter; the following message is displayed:“Protocol MODBUS”“Address 1”“9600 baud”

Start the procedure to effect a change explained in the Setting modifying (SET) paragraph:Press the (Enter) button for a few seconds; the modifi cation in progress status is highlighted by the both START and TRIP fl ashing. Move the cursor over the parameter intended for change using the (Enter) button, (in the ex-ample on the 1 address),Change the parameters by means the (increment) button (up to 12 address),Press the (Enter) button to move the cursor over the last parameter in the display, Press the (Enter) button once again; the cursor and the LED TRIP turn off (the LED START keeps fl ashing),Press the (Enter) button for a few seconds; new message appears: “Confi rm settings?”Answer to the message ENTER: YES to confi rm changes or RESET: NO to abort.The end of the LED blinking points out the end of procedure.

Circuit breaker commandsBy means of the (Open) and (Close) keys, the circuit breaker commands may be issued.The committed output relays must be enabled inside the Circuit Breaker supervision \ LEDs-relays allocation menu.

Note 1 Instantly all the relays are switched in rest state, including relays programmed as “normally energized”

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7.3 MENU TREE

INFO

READ

DSP fw Rel 1.20Ver.sw 1.51Code NT10-C00-f

Profile AACTIVE PROFILE

PROCEED READ MENU’

SERIAL NUMBER 0

Serial number

PROTECTIONS

50/51 side H50/51 side L

50N/51N side L50N/51N side H

49 side H49 side L

50N.1/51N.1/87N.150N.2/51N.2/87N.2

46 side H46 side L

I2/I1 side HI2/I1 side L

37 side H37 side L

Trip I2(H)> OFFCLP I2(H)> OFFBLK1 I2(H)> OFFBLK2IN I2(H)> OFFBLK4IN I2(H)> OFF

Start I2(H)> OFF

Trip I2(H)>> OFFCLP I2(H)>> OFFBLK1 I2(H)>> OFFBLK2IN I2(H)>> OFFBLK4IN I2(H)>> OFF

Start I2(H)>> OFF

Trip I2(L)> OFFCLP I2(L)> OFFBLK1 I2(L)> OFFBLK2IN I2(L)> OFFBLK4IN I2(L)> OFF

Start I2(L)> OFF

Trip I2(L)>> OFFCLP I2(L)>> OFFBLK1 I2(L)>> OFFBLK2IN I2(L)>> OFFBLK4IN I2(L)>> OFF

Start I2(L)>> OFF

Trip I(H)> OFFCLP I(H)> OFFBLK1 I(H)> OFFBLK2IN I(H)> OFFBLK4IN I(H)> OFF

Start I(H)> OFF

Trip I(H)>> OFFCLP I(H)>> OFFBLK1 I(H)>> OFFBLK2IN I(H)>> OFFBLK4IN I(H)>> OFF

Start I(H)> OFF

Trip I(H)>>> OFFCLP I(H)>>> OFFBLK1 I(H)>>> OFFBLK2IN I(H)>>> OFFBLK4IN I(H)>>> OFF

Start I(H)>>> OFF

Trip IH< OFFBLK1 IH< OFF

Start IH< OFF

Trip IL< OFFBLK1 IL< OFF

Start IL< OFF

BLK1 DThAL1(H)OFFBLK2IN DThAL1(H)OFF

Alarm DThAL1(H)OFF

BLK4IN DThAL1(H)OFF

BLK1 DThAL2(H)OFFBLK2IN DThAL2(H)OFF

Alarm DThAL2(H)OFF

BLK4IN DThAL2(H)OFF

BLK1 DTh>(H) OFFBLK2IN DTh>(H) OFF

Trip DTh>(H) OFF

BLK4IN DTh>(H) OFFCLP DTh(H) OFF

BLK1 DThAL1(L)OFFBLK2IN DThAL1(L)OFF

Alarm DThAL1(L)OFF

BLK4IN DThAL1(L)OFF

BLK1 DThAL2(L)OFFBLK2IN DThAL2(L)OFF

Alarm DThAL2(L)OFF

BLK4IN DThAL2(L)OFF

BLK1 DTh>(L) OFFBLK2IN DTh>(L) OFF

Trip DTh>(L) OFF

BLK4IN DTh>(L) OFFCLP DTh(H) OFF

Trip I(L)> OFFCLP I(L)> OFFBLK1 I(L)> OFFBLK2IN I(L)> OFFBLK4IN I(L)> OFF

Start I(L)> OFF

Trip I(L)>> OFFCLP I(L)>> OFFBLK1 I(L)>> OFFBLK2IN I(L)>> OFFBLK4IN I(L)>> OFF

Start I(L)> OFF

Trip I(L)>>> OFFCLP I(L)>>> OFFBLK1 I(L)>>> OFFBLK2IN I(L)>>> OFFBLK4IN I(L)>>> OFF

Start I(L)>>> OFF

<< No Yes >>Reset 37 ?

DISABLE37 FUNCTIONBY OPERATOR >>

MODULES MRI module OFFMMI module ON

CLOCK ADJUST MONTH:YEAR:<< Confirm >>

DAY:

PASSWORD Password >>ENTER PASSWORD

MEASURES

IDL1-2nd 0.000 InrefIDL1-5th 0.000 InrefIL2cH 0.000 InrefIL2cL 0.000 InrefISL2 0.000 InrefIDL2 0.000 InrefIDL2-2nd 0.000 InrefIDL2-5th 0.000 InrefIL3cH 0.000 InrefIL3cL 0.000 InrefISL3 0.000 InrefIDL3 0.000 InrefIDL3-2nd 0.000 InrefIDL3-5th 0.000 Inref

IL1cH 0.000 InrefIL1cL 0.000 InrefISL1 0.000 InrefIDL1 0.000 Inref

IL1H 0.000 InIL2H 0.000 InIL3H 0.000 In

IL1L 0.000 InIL2L 0.000 InIL3L 0.000 In

IE1 0.000 IEn1IEH 0.000 InHIESH 0.000 IEn1

DThetaH 0 DThtB(H)DThetaL 0 DThtB(L)

IL1FIXH 0.000 InHIL2FIXH 0.000 InHIL3FIXH 0.000 InHIL1FIXL 0.000 InLIL2FIXL 0.000 InLIL3FIXL 0.000 InL

IL1MAXH 0.000 InHIL2MAXH 0.000 InHIL3MAXH 0.000 InHIL1MAXL 0.000 InLIL2MAXL 0.000 InLIL3MAXL 0.000 InL

IL1MINH 0.000 InHIL2MINH 0.000 InHIL3MINH 0.000 InHIL1MINL 0.000 InLIL2MINL 0.000 InLIL3MINL 0.000 InL

IL1ROLH 0.000 InHIL2ROLH 0.000 InHIL3ROLH 0.000 InHIL1ROLL 0.000 InLIL2ROLL 0.000 InLIL3ROLL 0.000 InL

IE2 0.000 IEn1IEL 0.000 InLIESL 0.000 IEnL

I1H 0.000 InHI2H 0.000 InHI1H/I2H 0.000I1L 0.000 InLI2L 0.000 InLI1L/I2L 0.000

f 50.000 Hz

ILmaxL 0.000 InLILminL 0.000 InLILL 0.000 InL

PROCEED/

THYTRONICPRO-NT10-C00-fDATE: 01/08/2010TIME: 17:29:59

Trip I21(H)> OFFCLP I21(H)> OFF

Start I21(H)> OFF

BLK2IN I21(H)> OFFBLK4IN I21(H)> OFF

BLK1 I21(H)> OFF

Trip I21(H)> OFFCLP I21(H)> OFF

Start I21(H)> OFF

BLK2IN I21(H)> OFFBLK4IN I21(H)> OFF

BLK1 I21(H)> OFF

Trip IE(H)> OFFCLP IE(H)> OFFBLK1 IE(H)> OFFBLK2IN IE(H)> OFFBLK4IN IE(H)> OFF

Start IE(H)> OFF

Trip IE(H)>> OFFCLP IE(H)>> OFFBLK1 IE(H)>> OFFBLK2IN IE(H)>> OFFBLK4IN IE(H)>> OFF

Start IE(H)>> OFF

Trip IE(H)>>>OFFCLP IE(H)>>>OFFBLK1 IE(H)>>>OFFBLK2IN IE(H)>>>OFFBLK4IN IE(H)>>>OFF

Start IE(H)>>>OFF

Trip IE(L)> OFFCLP IE(L)> OFFBLK1 IE(L)> OFFBLK2IN IE(L)> OFFBLK4IN IE(L)> OFF

Start IE(L)> OFF

Trip IE(L)>> OFFCLP IE(L)>> OFFBLK1 IE(L)>> OFFBLK2IN IE(L)>> OFFBLK4IN IE(L)>> OFF

Start IE(L)>> OFF

Trip IE(L)>>>OFFCLP IE(L)>>>OFFBLK1 IE(L)>>>OFFBLK2IN IE(L)>>>OFFBLK4IN IE(L)>>>OFF

Start IE(L)>>>OFF

Trip IE1> OFFCLP IE1> OFFBLK1 IE1> OFFBLK2IN IE1> OFFBLK4IN IE1> OFF

Start IE1> OFF

Trip IE1>> OFFCLP IE1>> OFFBLK1 IE1>> OFFBLK2IN IE1>> OFFBLK4IN IE1)>> OFF

Start IE1>> OFF

Trip IE1>>> OFFCLP IE1>>> OFFBLK1 IE1>>> OFFBLK2IN IE1>>> OFFBLK4IN IE1>>> OFF

Start IE1>>> OFF

Trip IE2> OFFCLP IE2> OFFBLK1 IE2> OFFBLK2IN IE2> OFFBLK4IN IE2> OFF

Start IE2> OFF

Trip IE2>> OFFCLP IE2>> OFFBLK1 IE2>> OFFBLK2IN IE2>> OFFBLK4IN IE2>> OFF

Start IE2>> OFF

Trip IE2>>> OFFCLP IE2>>> OFFBLK1 IE2>>> OFFBLK2IN IE2>>> OFFBLK4IN IE2>>> OFF

Start IE2>>> OFF


READ

PLC

PREVIOUS READ MENU’ PREVIOUSREAD/PROTECTIONS MENU’

ST Id>-L1 OFFTR Id>-L1 OFFST Id>-L2 OFFTR Id>-L2 OFFST Id>-L3 OFFTR Id>-L3 OFFStart Id> OFFTrip Id> OFFBLK1 Id> OFFST Id>>-L1 OFFTR Id>>-L1 OFFST Id>>-L2 OFFTR Id>>-L2 OFFST Id>>-L3 OFFTR Id>>-L3 OFFStart Id>> OFFTrip Id>> OFFBLK1 Id>> OFF

87T

Start 64REF(H) OFFTrip 64REF(H) OFFBLK1 64REF(H) OFF

Start 64REF(H) OFFTrip 64REF(H) OFFBLK1 64REF(H) OFF

64REF side H

64REF side L

Start 74TCS(H) OFFTrip 74TCS(H) OFFBLK1 74TCS(H) OFF

74TCS side H

Start I(H)* OFFTrip S(H)< OFFBLK1 S(H)< OFF

74CT side H

Start I(L)* OFFTrip S(L)< OFFBLK1 S(L)< OFF

74CT side L

Start 74TCS(L) OFFTrip 74TCS(L) OFFBLK1 74TCS(L) OFF

74TCS side L

Trip Int/Ext(H)OFFStart IBF(H)> OFFStart IEBF(H)> OFFStart BF(H)> OFFTrip BF(H)> OFFBLK1 BF(H)> OFF

BF side H

Trip Int/Ext(L)OFFStart IBF(L)> OFFStart IEBF(L)> OFFStart BF(L)> OFFTrip BF(L)> OFFBLK1 BF(L)> OFF

BF side L

NT10_menu1a.aiPROCEED READ MENU’

PLC State 1: 0PLC State 2: 0PLC State x: 0PLC State 32: 0

PLC state: RESETPLC version: 01.01

PLC STATES

Error: noneWarning: none

User SW name: xxxDATE: 01/08/2007

Binary IN1 OFFBinary IN2 OFFDELAYED INPUTS

CBH State N.Open OFFCBH State SumI OFFCBH State SumI^2tOFFCBH State tbreak OFFCBH SumIL1 0 InHCBH SumIL2 0 InHCBH SumIL3 0 InHCBH SumIL1^2t 0In^2sCBH SumIL2^2t 0In^2sCBH SumIL3^2t 0In^2s

CIRCUIT BREAKER SUPERVISION

SIDE H

CBH COMMANDS SIDE HCBH POSITION SIDE HCBH DIAGNOSTIC SIDE H

CBH-OPEN Cmd OFFCBH-CLOSE Cmd OFF

CBH state ?

CBL State N.Open OFFCBL State SumI OFFCBL State SumI^2tOFFCBL State tbreak OFFCBL SumIL1 0 InHCBL SumIL2 0 InHCBL SumIL3 0 InHCBL SumIL1^2t 0In^2sCBL SumIL2^2t 0In^2sCBL SumIL3^2t 0In^2s

CIRCUIT BREAKER SUPERVISION

SIDE L

CBH COMMANDS SIDE LCBH POSITION SIDE LCBH DIAGNOSTIC SIDE L

CBL-OPEN Cmd OFFCBL-CLOSE Cmd OFF

CBL state ?

PROTECTIONS


READ

RELAYS

K1 coil OKK1 relay OFF






PREVIOUS READ MENU’

NT10_menu2.ai

PARTIAL COUNTERS

37 Side H Counters37 Side L Counters


I2/I1 Side H CountersI2/I1 Side L Counters

50/51 side H Counters50/51 side L Counters

49 side H Counters49 side H Counters

50N/51N side HCounters50N/51N side LCounters

ParBk1I(L)>cnt 0

ParTrI(L)>>cnt 0

ParStI(L)>>>cnt 0

ParStI(L)>cnt 0ParTrI(L)>cnt 0

ParBk2I(L)>cnt 0ParStI(L)>>cnt 0

ParBk1I(L)>>cnt 0ParBk2I(L)>>cnt 0

ParTrI(L)>>>cnt 0ParBk1I(L)>>>cnt 0ParBk2I(L)>>>cnt 0

ParBk1I(H)>cnt 0

ParTrI(H)>>cnt 0

ParStI(H)>>>cnt 0

ParStI(H)>cnt 0ParTrI(H)>cnt 0

ParBk2I(H)>cnt 0ParStI(H)>>cnt 0

ParBk1I(H)>>cnt 0ParBk2I(H)>>cnt 0

ParTrI(H)>>>cnt 0ParBk1I(H)>>>cnt 0ParBk2I(H)>>>cnt 0

ParBk1I(H)<cnt 0

ParStI(H)<cnt 0ParTrI(H)<cnt 0

LEDs reset OFFProf. switch OFFBlock1:Side H/L 87T OFFSide H OFFSide L OFFSide 87T OFFBlock2:Generic OFFBlock 50 OFFBlock 50N OFF

CB OPEN H OFFCB CLOSE H OFF

TCS1 H OFFTCS2 H OFFTCS1 L OFFTCS2 L OFF

Ext.trip BF:Side H/L OFFSide H OFFSide L OFF

52a side H OFF52b side H OFF

CB Monitor H OFF

Reset count. OFFFault trig OFF

Thermal imageinit H-L OFFinit H OFFinit L OFF

CB Monitor L OFF

CB OPEN L OFFCB CLOSE L OFF

52a side L OFF52b side L OFF

Remote trip OFFReset Demand OFF

INTERNAL STATES

ParBk1I(L)<cnt 0

ParStI(L)<cnt 0ParTrI(L)<cnt 0

ParBk2DthAL1Hcnt 0

ParBk2DthAL2Hcnt 0

ParAlDthAL1Hcnt 0ParBk1DthAL1Hcnt 0

ParAlDthAL2Hcnt 0ParBk1DthAL2Hcnt 0

ParBk2DthH>cnt 0

ParTrDthH>cnt 0ParBk1DthH>cnt 0

ParBk2DthAL1Lcnt 0

ParBk2DthAL2Lcnt 0

ParAlDthAL1Lcnt 0ParBk1DthAL1Lcnt 0

ParAlDthAL2Lcnt 0ParBk1DthAL2Lcnt 0

ParBk2DthH>cnt 0

ParTrDthL>cnt 0ParBk1DthL>cnt 0

ParBk1IEH>cnt 0

ParTrIEH>>cnt 0

ParStIEH>>>cnt 0

ParStIEH>cnt 0ParTrIEH>cnt 0

ParBk2IEH>cnt 0ParStIEH>>cnt 0

ParBk1IEH>>cnt 0ParBk2IEH>>cnt 0

ParTrIEH>>>cnt 0ParBk1IEH>>>cnt 0ParBk2IEH>>>cnt 0

ParBk1IEL>cnt 0

ParTrIEL>>cnt 0

ParStIEL>>>cnt 0

ParStIEL>cnt 0ParTrIEL>cnt 0

ParBk2IEL>cnt 0ParStIEL>>cnt 0

ParBk1IEL>>cnt 0ParBk2IEL>>cnt 0

ParTrIEL>>>cnt 0ParBk1IEL>>>cnt 0ParBk2IEH>>>cnt 0

ParBk1I2(H)>cnt 0

ParTrI2(H)>>cnt 0

ParStI2(H)>cnt 0ParTrI2(H)>cnt 0

ParBk2I2(H)>cnt 0ParStI2(H)>>cnt 0

ParBk1I2(H)>>cnt 0ParBk2I2(H)>>cnt 0

ParBk1I21(H)>cnt 0


ParBk2I21(H)>cnt 0

ParBk1I21(H)>cnt 0


ParBk2I21(H)>cnt 0

ParBk1I2(L)>cnt 0

ParTrI2(L)>>cnt 0

ParStI2(L)>cnt 0ParTrI2(L)>cnt 0

ParBk2I2(L)>cnt 0ParStI2(L)>>cnt 0

ParBk1I2(L)>>cnt 0ParBk2I2(L)>>cnt 0

CB side H Counters

BF side H CountersBF side L Counters

74CT side H Counters74CT side L Counters

ParBk1BF(H)cnt 0

ParStBF(H)cnt 0ParTrBF(H)cnt 0

ParBk1BF(L)cnt 0

ParStBF(L)cnt 0ParTrBF(L)cnt 0

ParBk1-74CTHcnt 0ParTr74CTHcnt 0

ParBk1-74CTHcnt 0ParTr74CTHcnt 0

CBH N.OpenCBcnt 0CB side L Counters CBL N.OpenCBcnt 0

74TCS side H Counters ParBk1-74TCSHcnt 0ParTr74TCSHcnt 0

74TCS side L Counters ParBk1-74TCSLcnt 0ParTr74TCSLcnt 0


87T Counters

50N.1/51N.1 87NHIZ.1Counters50N.1/51N.2 87NHIZ.2Counters

ParBk1IE2>cnt 0

ParTrIE2>>cnt 0

ParStIE2>>>cnt 0

ParStIE2>cnt 0ParTrIE2>cnt 0

ParBk2IE2>cnt 0ParStIE2>>cnt 0

ParBk1IE2>>cnt 0ParBk2IE2>>cnt 0

ParTrIE2>>>cnt 0ParBk1IE2>>>cnt 0ParBk2IE2>>>cnt 0

ParBk1Id>cnt 0

ParBk1Id>>cnt 0

ParStId>cnt 0ParTrId>cnt 0

ParTrId>>cnt 0ParStId>>cnt 0

ParSt2ndRESTcnt 0ParSt5thRESTcnt 0

64REF side H Counters

ParBk1-64REFHcnt 0

ParSt-64REFHcnt 0ParTr-64REFHcnt 0

64REF side L Counters

ParBk1-64REFLcnt 0

ParSt-64REFLcnt 0ParTr-64REFLcnt 0

ParBk1IE1>cnt 0

ParTrIE1>>cnt 0

ParStIE1>>>cnt 0

ParStIE1>cnt 0ParTrIE1>cnt 0

ParBk2IE1>cnt 0ParStIE1>>cnt 0

ParBk1IE1>>cnt 0ParBk2IE1>>cnt 0

ParTrIE1>>>cnt 0ParBk1IE1>>>cnt 0ParBk2IE1>>>cnt 0


READ

SELF-TEST

Protections ON SERVICEGlobal self-test OKSystem OKData-base:boot OKrun-time OK

Program OK

Data BUS:heavy OKminor OK

DSP:state RUNboot OKrun-time RUN

I/O verify:boot OKmajor OKminor OK

I/O verify PLC:boot OKmajor OKminor OK64REF:Compensationfactor OKTRAFO:Coefficient ofmismatching OK

Ram:boot OKrun-time OK

PLC:boot OKrun-time OK MMI-board:

boot OKrun-time OK

Oscillography:run-time OK


NT10_menu2a.ai

TOTAL COUNTERS



I2/I1 Side H CountersI2/I1 Side L Counters

50/51 side H Counters50/51 side L Counters

49 side H Counters49 side H Counters

50N/51N side HCounters50N/51N side LCounters

TotBk1I(L)>cnt 0

TotTrI(L)>>cnt 0

TotStI(L)>>>cnt 0

TotStI(L)>cnt 0TotTrI(L)>cnt 0

TotBk2I(L)>cnt 0TotStI(L)>>cnt 0

TotBk1I(L)>>cnt 0TotBk2I(L)>>cnt 0

TotTrI(L)>>>cnt 0TotBk1I(L)>>>cnt 0TotBk2I(L)>>>cnt 0

TotBk1I(H)>cnt 0

TotTrI(H)>>cnt 0

TotStI(H)>>>cnt 0

TotStI(H)>cnt 0TotTrI(H)>cnt 0

TotBk2I(H)>cnt 0TotStI(H)>>cnt 0

TotBk1I(H)>>cnt 0TotBk2I(H)>>cnt 0

TotTrI(H)>>>cnt 0TotBk1I(H)>>>cnt 0TotBk2I(H)>>>cnt 0

TotBk1I(H)<cnt 0

TotStI(H)<cnt 0TotTrI(H)<cnt 0

TotBk1I(L)<cnt 0

TotStI(L)<cnt 0TotTrI(L)<cnt 0

TotBk2DthAL1Hcnt 0

TotBk2DthAL2Hcnt 0

TotAlDthAL1Hcnt 0TotBk1DthAL1Hcnt 0

TotAlDthAL2Hcnt 0TotBk1DthAL2Hcnt 0

TotBk2DthH>cnt 0

TotTrDthH>cnt 0TotBk1DthH>cnt 0

TotBk2DthAL1Lcnt 0

TotBk2DthAL2Lcnt 0

TotAlDthAL1Lcnt 0TotBk1DthAL1Lcnt 0

TotAlDthAL2Lcnt 0TotBk1DthAL2Lcnt 0

TotBk2DthH>cnt 0

TotTrDthL>cnt 0TotBk1DthL>cnt 0

TotBk1IEH>cnt 0

TotTrIEH>>cnt 0

TotStIEH>>>cnt 0

TotStIEH>cnt 0TotTrIEH>cnt 0

TotBk2IEH>cnt 0TotStIEH>>cnt 0

TotBk1IEH>>cnt 0TotBk2IEH>>cnt 0

TotTrIEH>>>cnt 0TotBk1IEH>>>cnt 0TotBk2IEH>>>cnt 0

TotBk1IEL>cnt 0

TotTrIEL>>cnt 0

TotStIEL>>>cnt 0

TotStIEL>cnt 0TotTrIEL>cnt 0

TotBk2IEL>cnt 0TotStIEL>>cnt 0

TotBk1IEL>>cnt 0TotBk2IEL>>cnt 0

TotTrIEL>>>cnt 0TotBk1IEL>>>cnt 0TotBk2IEH>>>cnt 0

TotBk1I2(H)>cnt 0

TotTrI2(H)>>cnt 0

TotStI2(H)>cnt 0TotTrI2(H)>cnt 0

TotBk2I2(H)>cnt 0TotStI2(H)>>cnt 0

TotBk1I2(H)>>cnt 0TotBk2I2(H)>>cnt 0

TotBk1I21(H)>cnt 0


TotBk2I21(H)>cnt 0

TotBk1I21(H)>cnt 0


TotBk2I21(H)>cnt 0

TotBk1I2(L)>cnt 0

TotTrI2(L)>>cnt 0

TotStI2(L)>cnt 0TotTrI2(L)>cnt 0

TotBk2I2(L)>cnt 0TotStI2(L)>>cnt 0

TotBk1I2(L)>>cnt 0TotBk2I2(L)>>cnt 0

CB side H Counters

BF side H CountersBF side L Counters

74CT side H Counters74CT side L Counters

TotBk1BF(H)cnt 0

TotStBF(H)cnt 0TotTrBF(H)cnt 0

TotBk1BF(L)cnt 0

TotStBF(L)cnt 0TotTrBF(L)cnt 0

TotBk1-74CTHcnt 0TotTr74CTHcnt 0

TotBk1-74CTHcnt 0TotTr74CTHcnt 0

CBH N.OpenCBcnt 0CB side L Counters CBL N.OpenCBcnt 0

74TCS side H Counters TotBk1-74TCSHcnt 0TotTr74TCSHcnt 0

74TCS side L Counters TotBk1-74TCSLcnt 0TotTr74TCSLcnt 0


87T Counters

50N.1/51N.1 87NHIZ.1Counters50N.1/51N.2 87NHIZ.2Counters

TotBk1IE2>cnt 0

TotTrIE2>>cnt 0

TotStIE2>>>cnt 0

TotStIE2>cnt 0TotTrIE2>cnt 0

TotBk2IE2>cnt 0TotStIE2>>cnt 0

TotBk1IE2>>cnt 0TotBk2IE2>>cnt 0

TotTrIE2>>>cnt 0TotBk1IE2>>>cnt 0TotBk2IE2>>>cnt 0

TotBk1Id>cnt 0

TotBk1Id>>cnt 0

TotStId>cnt 0TotTrId>cnt 0

TotTrId>>cnt 0TotStId>>cnt 0

TotSt2ndRESTcnt 0TotSt5thRESTcnt 0

64REF side H Counters

TotBk1-64REFHcnt 0

TotSt-64REFHcnt 0TotTr-64REFHcnt 0

64REF side L Counters

TotBk1-64REFLcnt 0

TotSt-64REFLcnt 0TotTr-64REFLcnt 0

TotBk1IE1>cnt 0

TotTrIE1>>cnt 0

TotStIE1>>>cnt 0

TotStIE1>cnt 0TotTrIE1>cnt 0

TotBk2IE1>cnt 0TotStIE1>>cnt 0

TotBk1IE1>>cnt 0TotBk2IE1>>cnt 0

TotTrIE1>>>cnt 0TotBk1IE1>>>cnt 0TotBk2IE1>>>cnt 0


NT10_menu3.ai

PILOT WIREDIAGNOSTIC

BreakedBLIN1 OFFShortedBLIN1 OFF BLOCK2IN-IPh OFF

BLOCK2IN-IE OFFtB timeout OFF ST-IE-BLK2 OFF

BLK2OUT-IPh OFF

BLK2OUT-IPh/IE OFF

ST-IPh-BLK2 OFF

BLK2OUT-IE OFF

SELECTIVE BLOCK BLOCK2

BLOCK2 INPUT BLOCK2 OUTPUT

INTERNALSELECTIVE BLOCK

BLOCK4

ST-IPh-BLK4 OFFST-IE-BLK4 OFFBLK4OUT OFF

No faultsOperating phase:

Time:

IL2r: 0 InIL1r: 0 In

Fault 0 Cause:

Date:

IEr: 0 IEn

IL3r: 0 In

UL2r: 0 EnUL1r: 0 En

UL3r: 0 En

U23r: 0 UnU12r: 0 Un

U31r: 0 Un

UEr: 0 UEnUECr: 0 UEn

Alpha1r: 0 gr

PhiL2r: 0 grPhiL1r: 0 gr

PhiL3r: 0 gr

Alpha2r: 0 grAlpha3r: 0 grPhiEr: 0 grPhiECr: 0 grDTheta-r: 0 DThetaBBinary IN:Relay OUT:

Relay OUT:

No faultsOperating phase:

Time:

Fault .. cause:

Date:

.....:

.....:

FAULT RECORDING

Fault 0 (last)Fault 1Fault 2Fault ...Fault 299

DateIN1 onEvent0 (last):

Time

DateIN1 onEvent1:

Time

DateSettingsEventxx:

Time

DateSettingsEvent19:

Time

EVENTS RECORDING

PROCEED SET MENU’



SET

NT10_menuset1.ai

MMIParam. settingenable ON

Active Profle A

PROCEED SET MENU’

BASE

InH 5 AInpH 1000 AInL 5 AInpL 1000 A

IEn2 1 AIE2np 100 A

IEn1 1 AIE1np 100 A

Inref 6 ANumsides 2Refside HMatchType INTERNALNOMINAL SETTINGSME(H) 0ME(L) 0fn 50 HzLANGUAGE English

Reading RELATIVE

Plant.................

TRANSFORMER

VntH 8 kVIntH 500 AmH 1.99GndH Out

VntL 8 kVIntL 500 A

ConnH DVectGroup 0

mL 1.99GndL OutRefside yVectGroup 0

Snt 6.93 MVA

PROFILE A

PROCEED PROFILE A MENU’

Min. pulse widthtTR1 150 ms

Mode No-latchedLogic De-energized

K1 relayK2 relayK3 relayK4 relayK5 relay

Min. pulse widthtTR6 150 ms

Mode No-latchedLogic De-energized

Kx relay

RELAYS

LEDs

Start LED logic No-latchedTrip LED logic No-latchedLED 1 logic No-latchedLED 2 logic No-latchedLED 3 logic No-latchedLED 4 logic No-latchedLED x logic No-latched

SELF-TEST RELAYSelf-test relay -

Minor failurealarm YES

OFF DelaytIN1OFF 0 sIN1 matching None

ON DelaytIN1ON 0 s

Logic Active-ON

OFF DelaytIN2OFF 0 sIN2 matching None

ON DelaytIN2ON 0 s

Logic Active-ON

INPUTS Binary input IN2

Binary input INx

Binary input IN1

37 side H I(H)< Element

37 side L I(L)< Element

Logic37(H) ORI(H)<def Enable OFFI(H)<def 0.50 InHt(H)<def 1.00 sI(H)<BLK1 OFFRelays I(H)<

I(H)<TR-K -I(H)<ST-K -

I(H)<ST-L -I(H)<TR-L -

LEDs I(H)<

Logic37(L) ORI(L)<def Enable OFFI(L)<def 0.50 InHt(L)<def 1.00 sI(L)<BLK1 OFFRelays I(L)<

I(L)<TR-K -I(L)<ST-K -

I(L)<ST-L -I(L)<TR-L -

LEDs I(L)<

46 side HI2(H)> ElementI2(H)>> Element

t2(H)CLP> 0.1 st2(H)>RES 0 sType Characteristic:

I2(H)>def enable OFF

I2(H)CLP>def 2.00 InH

I2(H)CLP>inv 2.00 In

I2(H)> Enable OFFI2(H)CLP> Mode OFF

t2(H)>def 1.00 s

I2(H)>def 1.00 InH

I2(H)>inv enable OFF

t2(H)>inv 10.0 s

I2(H)>inv 1.00 InH

I2(H)>BLK1 OFF

I2(H)>BLK2OUT OFFI2(H)>BLK2IN OFF

I2(H)>BLK4 OFF

I2(H)>BF OFF

I2(H)>Curve DEFINITE

Relays I2(H)>

I2(H)>TR-K -I2(H)>ST-K -

I2(H)>ST-L -I2(H)>TR-L -

LEDs I2(H)>

I2(H)>2ndh-REST OFF

t2(H)CLP>> 0.1 st2(H)>>RES 0 sI2(H)>>def enable OFF

I2(H)CLP>>def 2.00 InH

I2(H)>> Enable OFFI2(H)CLP>> Mode OFF

t2(H)>>def 1.00 s

I2(H)>>def 1.00 InH

I2(H)>>BLK1 OFF

I2(H)>>BLK2OUT OFFI2(H)>>BLK2IN OFF

I2(H)>>BLK4 OFF

I2(H)>>BF OFFI2(H)>disbyI2(H>> OFFRelays I2(H)>>

I2(H)>>TR-K -I2(H)>>ST-K -

I2(H)>>ST-L -I2(H)>>TR-L -

LEDs I2(H)>>

I2(H)>>2ndh-REST OFF

46 side LI2(H)> ElementI2(L)>> Element

t2(L)CLP> 0.1 st2(L)>RES 0 sType Characteristic:

I2(L)>def enable OFF

I2(L)CLP>def 2.00 InH

I2(L)CLP>inv 2.00 In

I2(L)> Enable OFFI2(L)CLP> Mode OFF

t2(L)>def 1.00 s

I2(L)>def 1.00 InH

I2(L)>inv enable OFF

t2(L)>inv 10.0 s

I2(L)>inv 1.00 InH

I2(L)>BLK1 OFF

I2(L)>BLK2OUT OFFI2(L)>BLK2IN OFF

I2(L)>BLK4 OFF

I2(L)>BF OFF

I2(L)>Curve DEFINITE

Relays I2(L)>

I2(L)>TR-K -I2(L)>ST-K -

I2(L)>ST-L -I2(L)>TR-L -

LEDs I2(L)>

I2(L)>2ndh-REST OFF

t2(H)CLP>> 0.1 st2(H)>>RES 0 sI2(H)>>def enable OFF

I2(H)CLP>>def 2.00 InH

I2(H)>> Enable OFFI2(H)CLP>> Mode OFF

t2(H)>>def 1.00 s

I2(H)>>def 1.00 InH

I2(H)>>BLK1 OFF

I2(H)>>BLK2OUT OFFI2(H)>>BLK2IN OFF

I2(H)>>BLK4 OFF

I2(H)>>BF OFFI2(H)>disbyI2(H>> OFFRelays I2(H)>>

I2(H)>>TR-K -I2(H)>>ST-K -

I2(H)>>ST-L -I2(H)>>TR-L -

LEDs I2(H)>>

I2(H)>>2ndh-REST OFF



SET

NT10_menuset1a.ai

PROCEED SET MENU’

PROFILE A

PROCEED PROFILE A MENU’

49 side H DthAL1(H) ElementCommon(H)

DthAL2(H)ElementDth(H)> Element

DthIN(H)0.0 DThB(H)KINR(H) 2.0T(H) 10 minDthCLP(H) Mode OFFtDthCLP(H) 0.10 sDth(H)2ndh-REST OFF

DthAL1(H)Enable OFFDthAL1(H) 0.5 DthB(H)DthAL1(H)BLK1 OFFDthAL1(H)BLK2IN OFFDthAL1(H)BLK2OUT OFFDthAL1(H)BLK4 OFFRelays DthAL1(H)DthAL1(H)-K -

DthAL1(H)-L -LEDs DthAL1(H)

DthAL2(H)Enable OFFDthAL2(H) 0.5 DthB(H)DthAL2(H)BLK1 OFFDthAL2(H)BLK2IN OFFDthAL2(H)BLK2OUT OFFDthAL2(H)BLK4 OFFRelays DthAL2(H)DthAL2(H)-K -

DthAL2(H)-L -LEDs DthAL2(H)

Dth(H)> Enable OFFDth(H)> 1.2 DthetaBDth(H)>BLK1 OFFDth(H)>BLK2IN OFFDth(H)>BLK2OUT OFFDth(H)>BLK4 OFFDth(H)>BF OFFDth(H)>disby50-51 OFFRelays Dth(H)>Dth(H)>-K -

Dth(H)>-L -LEDs Dth(H)>

49 side L DthAL1(L) ElementCommon(L)

DthAL2(L)ElementDth(L)> Element

DthIN(L)0.0 DThB(H)KINR(L) 2.0T(L) 10 minDthCLP(L) Mode OFFtDthCLP(L) 0.10 sDth(L)2ndh-REST OFF

DthAL1(L)Enable OFFDthAL1(L) 0.5 DthB(H)DthAL1(L)BLK1 OFFDthAL1(L)BLK2IN OFFDthAL1(L)BLK2OUT OFFDthAL1(L)BLK4 OFFRelays DthAL1(L)DthAL1(L)-K -

DthAL1(L)-L -LEDs DthAL1(L)

DthAL2(L)Enable OFFDthAL2(L) 0.5 DthB(H)DthAL2(L)BLK1 OFFDthAL2(L)BLK2IN OFFDthAL2(L)BLK2OUT OFFDthAL2(L)BLK4 OFFRelays DthAL2(L)DthAL2(L)-K -

DthAL2(L)-L -LEDs DthAL2(L)

Dth(L)> Enable OFFDth(L)> 1.2 DthetaBDth(L)>BLK1 OFFDth(L)>BLK2IN OFFDth(L)>BLK2OUT OFFDth(L)>BLK4 OFFDth(L)>BF OFFDth(L)>disby50-51 OFFRelays Dth(L)>Dth(L)>-K -

Dth(L)>-L -LEDs Dth(L)>

I2/I1 side H I21(H)> Element

t21(H)CLP> 0.10 sI21(H)>def enable OFF

I21(H)CLP>def 1.00

I21(H)CLP> Mode OFF

t21(H)>def 1 s

I21(H)>def 0.50

I21(H)>BLK1 OFFI21(H)>BLK2IN OFFI21(H)>BLK2OUT OFFI21(H)>BLK4 OFFI21(H)>2ndh-REST OFFI21(H)>BF OFFRelays I21(H)>

I21(H)>TR-K -I21(H)>ST-K -

I21(H)>ST-L -I21(H)>TR-L -

LEDs I21(H)>

I2/I1 side L I21(L)> Elementt21(L)CLP> 0.10 sI21(L)>def enable OFF

I21(L)CLP>def 1.00

I21(L)CLP> Mode OFF

t21(L)>def 1 s

I21(L)>def 0.50

I21(L)>BLK1 OFFI21(L)>BLK2IN OFFI21(L)>BLK2OUT OFFI21(L)>BLK4 OFFI21(L)>2ndh-REST OFFI21(L)>BF OFFRelays I21(L)>

I21(L)>TR-K -I21(L)>ST-K -

I21(L)>ST-L -I21(L)>TR-L -

LEDs I21(L)>

PREVIOUS SET MENU’


NT10_menuset2.ai


PREVIOUS PROFILE A MENU’

SET

50/51 side H

t(H)CLP> 0.1 st(H)>RES 0 sType Characteristic:

I(H)>def enable OFF

I(H)CLP>def 2.00 InH

I(H)CLP>inv 2.00 InH

I(H)> Enable OFFI(H)CLP> Mode OFF

t(H)>def 1.00 s

I(H)>def 1.00 InH

I(H)>inv enable OFF

t(H)>inv 10.0 s

I(H)>inv 1.00 InH

I(H)>BLK1 OFF

I(H)>BLK2OUT OFFI(H)>BLK4 OFF

I(H)>BLK2IN OFF

I(H)>2ndh-REST OFFI(H)>BF OFF

I(H)>Curve DEFINITE

I(H)> ElementI(H)>> ElementI(H)>>> Element

Relays I(H)>

I(H)>TR-K -I(H)>ST-K -

I(H)>ST-L -I(H)>TR-L -

LEDs I(H)>

t(H)CLP>> 0.1 st(H)>>RES 0 sType Characteristic:

I(H)>>def enable OFF

I(H)CLP>>def 2.00 InH

I(H)CLP>>inv 2.00 InH

I(H)>> Enable OFFI(H)CLP>> Mode OFF

t(H)>>def 1.00 s

I(H)>>def 1.00 InH

I(H)>>inv enable OFF

t(H)>>inv 10.0 s

I(H)>>inv 1.00 InH

I(H)>>BLK1 OFF

I(H)>>BLK2OUT OFFI(H)>>BLK4 OFF

I(H)>>BLK2IN OFF

I(H)>>2ndh-REST OFFI(H)>>BF OFFI(H)>disbyI(H)>> OFF

I(H)>>Curve DEFINITE

Relays I(H)>>

I(H)>>TR-K -I(H)>>ST-K -

I(H)>>ST-L -I(H)>>TR-L -

LEDs I(H)>>

t(H)CLP>>> 0.1 st(H)>>>RES 0 sI(H)>>>def enable OFF

I(H)CLP>>>def 2.00 InH

I(H)>>> Enable OFFI(H)CLP>>> Mode OFF

t(H)>>>def 1.00 s

I(H)>>>def 1.00 InH

I(H)>>>BLK1 OFF

I(H)>>>BLK2OUT OFFI(H)>>>BLK4 OFF

I(H)>>>BLK2IN OFF

I(H)>>>2ndh-REST OFFI(H)>>>BF OFFI(H)>disbyI(H)>>> OFFI(H)>disbyI(H)>>> OFFRelays I(H)>>>

I(H)>>>TR-K -I(H)>>>ST-K -

I(H)>>>ST-L -I(H)>>>TR-L -

LEDs I(H)>>>

50/51 side L

t(L)CLP> 0.1 st(L)>RES 0 sType Characteristic:

I(L)>def enable OFF

I(L)CLP>def 2.00 InH

I(L)CLP>inv 2.00 InH

I(L)> Enable OFFI(L)CLP> Mode OFF

t(L)>def 1.00 s

I(L)>def 1.00 InH

I(L)>inv enable OFF

t(L)>inv 10.0 s

I(L)>inv 1.00 InH

I(L)>BLK1 OFF

I(L)>BLK2OUT OFFI(L)>BLK4 OFF

I(L)>BLK2IN OFF

I(L)>2ndh-REST OFFI(L)>BF OFF

I(L)>Curve DEFINITE

I(L)> ElementI(L)>> ElementI(L)>>> Element

Relays I(L)>

I(L)>TR-K -I(L)>ST-K -

I(L)>ST-L -I(L)>TR-L -

LEDs I(L)>

t(L)CLP>> 0.1 st(L)>>RES 0 sType Characteristic:

I(L)>>def enable OFF

I(L)CLP>>def 2.00 InH

I(L)CLP>>inv 2.00 InH

I(L)>> Enable OFFI(L)CLP>> Mode OFF

t(L)>>def 1.00 s

I(L)>>def 1.00 InH

I(L)>>inv enable OFF

t(L)>>inv 10.0 s

I(L)>>inv 1.00 InH

I(L)>>BLK1 OFF

I(L)>>BLK2OUT OFFI(L)>>BLK4 OFF

I(L)>>BLK2IN OFF

I(L)>>2ndh-REST OFFI(L)>>BF OFFI(L)>disbyI(H)>> OFF

I(L)>>Curve DEFINITE

Relays I(L)>>

I(L)>>TR-K -I(L)>>ST-K -

I(L)>>ST-L -I(L)>>TR-L -

LEDs I(H)>>

t(L)CLP>>> 0.1 st(L)>>>RES 0 sI(L)>>>def enable OFF

I(L)CLP>>>def 2.00 InH

I(L)>>> Enable OFFI(L)CLP>>> Mode OFF

t(L)>>>def 1.00 s

I(L)>>>def 1.00 InH

I(L)>>>BLK1 OFF

I(L)>>>BLK2OUT OFFI(L)>>>BLK4 OFF

I(L)>>>BLK2IN OFF

I(L)>>>2ndh-REST OFFI(L)>>>BF OFFI(L)>disbyI(L)>>> OFFI(L)>disbyI(L)>>> OFFRelays I(L)>>>

I(H)>>>TR-K -I(L)>>>ST-K -

I(L)>>>ST-L -I(L)>>>TR-L -

LEDs I(L)>>>

PROCEED SET MENU’ PROCEED PROFILE A MENU’


NT10_menuset2a.ai



SET

50N/51N side H

tE(H)CLP> 0.10 stE(H)>RES 0.00 sType Characteristic:

IE(H)>def enable OFF

IE(H)CLP>def 2.00 InH

IE(H)CLP>inv 2.00 InH

IE(H)> Enable OFFIE(H)CLP> Mode OFF

tE(H)>def 1.00 s

IE(H)>def 1.00 InH

IE(H)>inv enable OFF

tE(H)>inv 10.0 s

IE(H)>inv 1.00 InH

IE(H)>BLK1 OFF

IE(H)>BLK2OUT OFFIE(H)>BLK4 OFF

IE(H)>BLK2IN OFF

IE(H)>2ndh-REST OFFIE(H)>BF OFF

IE(H)>Curve DEFINITE

IE(H)> ElementIE(H)>> ElementIE(H)>>> Element

Relays IE(H)>

IE(H)>TR-K -IE(H)>ST-K -

IE(H)>ST-L -IE(H)>TR-L -

LEDs IE(H)>

tE(H)CLP>> 0.1 stE(H)>>RES 0 sIE(H)>>def enable OFF

IE(H)CLP>>def 2.00InH

IE(H)>> Enable OFFIECLP(H)>> Mode OFF

tE(H)>>def 1.00 s

IE(H)>>def 1.00 InH

IE(H)>>BLK1 OFF

IE(H)>>BLK2OUT OFFIE(H)>>BLK4 OFF

IE(H)>>BLK2IN OFF

IE(H)>>2ndh-REST OFFIE(H)>>BF OFFIE(H)>disbyIE(H)>> OFFRelays IE(H)>>

IE(H)>>TR-K -IE(H)>>ST-K -

IE(H)>>ST-L -IE(H)>>TR-L -

LEDs IE(H)>>

tE(H)CLP>>> 0.1 stE(H)>>>RES 0 sIE(H)>>>def enable OFF

IE(H)CLP>>>def 2.00InH

IE(H)>>> Enable OFFIECLP(H)>>> Mode OFF

tE(H)>>>def 1.00 s

IE(H)>>>def 1.00 InH

IE(H)>>>BLK1 OFF

IE(H)>>>BLK2OUT OFFIE(H)>>>BLK4 OFF

IE(H)>>>BLK2IN OFF

IE(H)>>>2ndh-REST OFFIE(H)>>>BF OFFIE(H)>disbyIE(H)>>> OFFIE(H)>>disbyIE(H)>>> OFFRelays IE(H)>>>

IE(H)>>>TR-K -IE(H)>>>ST-K -

IE(H)>>>ST-L -IE(H)>>>TR-L -

LEDs IE(H)>>>

tE(L)CLP>>> 0.1 stE(L)>>>RES 0 sIE(L)>>>def enable OFF

IE(L)CLP>>>def 2.00InH

IE(L)>>> Enable OFFIECLP(L)>>> Mode OFF

tE(L)>>>def 1.00 s

IE(L)>>>def 1.00 InH

IE(L)>>>BLK1 OFF

IE(L)>>>BLK2OUT OFFIE(L)>>>BLK4 OFF

IE(L)>>>BLK2IN OFF

IE(L)>>>2ndh-REST OFFIE(L)>>>BF OFFIE(L)>disbyIE(H)>>> OFFIE(L)>>disbyIE(H)>>> OFFRelays IE(L)>>>

IE(L)>>>TR-K -IE(L)>>>ST-K -

IE(L)>>>ST-L -IE(L)>>>TR-L -

LEDs IE(L)>>>

50N/51N side L

tE(L)CLP> 0.10 stE(L)>RES 0.00 sType Characteristic:

IE(L)>def enable OFF

IE(L)CLP>def 2.00 InH

IE(L)CLP>inv 2.00 InH

IE(L)> Enable OFFIE(L)CLP> Mode OFF

tE(L)>def 1.00 s

IE(L)>def 1.00 InH

IE(L)>inv enable OFF

tE(L)>inv 10.0 s

IE(L)>inv 1.00 InH

IE(L)>BLK1 OFF

IE(L)>BLK2OUT OFFIE(L)>BLK4 OFF

IE(L)>BLK2IN OFF

IE(L)>2ndh-REST OFFIE(L)>BF OFF

IE(L)>Curve DEFINITE

IE(L)> ElementIE(L)>> ElementIE(L)>>> Element

Relays IE(L)>

IE(L)>TR-K -IE(L)>ST-K -

IE(L)>ST-L -IE(L)>TR-L -

LEDs IE(H)>

tE(L)CLP>> 0.1 stE(L)>>RES 0 sIE(L)>>def enable OFF

IE(L)CLP>>def 2.00InH

IE(L)>> Enable OFFIECLP(L)>> Mode OFF

tE(L)>>def 1.00 s

IE(L)>>def 1.00 InH

IE(L)>>BLK1 OFF

IE(L)>>BLK2OUT OFFIE(L)>>BLK4 OFF

IE(L)>>BLK2IN OFF

IE(L)>>2ndh-REST OFFIE(L)>>BF OFFIE(L)>disbyIE(H)>> OFFRelays IE(L)>>

IE(L)>>TR-K -IE(L)>>ST-K -

IE(L)>>ST-L -IE(L)>>TR-L -

LEDs IE(L)>>



NT10_menuset2b.ai



SET

50N.1/51N.1 87NHIZ.1

tE1CLP> 0.10 stE1>RES 0.00 sType Characteristic:

IE1>def enable OFF

IE1CLP>def 2.00 IEn1

IE1CLP>inv 2.00 IEn1

IE1> Enable OFFIE1CLP> Mode OFF

tE1>def 1.00 s

IE1)>def 1.00 IEn1

IE1>inv enable OFF

tE1>inv 10.0 s

IE1>inv 1.00 IEn1

IE1>BLK1 OFF

IE1>BLK2OUT OFFIE1>BLK4 OFF

IE1>BLK2IN OFF

IE1>2ndh-REST OFFIE1>BF OFF

IE1>Curve DEFINITE

IE1> ElementIE1>> ElementIE1>>> Element

Relays IE1>

IE1>TR-K -IE1>ST-K -

IE1>ST-L -IE1>TR-L -

LEDs IE1>

tE1CLP>> 0.1 stE1>>RES 0 sIE1>>def enable OFF

IE1CLP>>def 2.00IEn1

IE1>> Enable OFFIE1CLP>> Mode OFF

tE1>>def 1.00 s

IE1>>def 1.00 IEn1

IE1>>BLK1 OFF

IE1>>BLK2OUT OFFIE1>>BLK4 OFF

IE1>>BLK2IN OFF

IE1>>2ndh-REST OFFIE1>>BF OFFIE1>disbyIE1>> OFFRelays IE1>>

IE1>>TR-K -IE1>>ST-K -

IE1>>ST-L -IE1>>TR-L -

LEDs IE1>>

tE1CLP>>> 0.1 stE1>>>RES 0 sIE1>>>def enable OFF

IE1CLP>>>def 2.00IEn1

IE1>>> Enable OFFIECLP1>>> Mode OFF

tE1>>>def 1.00 s

IE1>>>def 1.00 IEn1

IE1>>>BLK1 OFF

IE1>>>BLK2OUT OFFIE1>>>BLK4 OFF

IE1>>>BLK2IN OFF

IE1>>>2ndh-REST OFFIE1>>>BF OFFIE1>disbyIE(H)>>> OFFIE1>>disbyIE(H)>>> OFFRelays IE1>>>

IE1>>>TR-K -IE1>>>ST-K -

IE1>>>ST-L -IE1>>>TR-L -

LEDs IE1>>>

50N.2/51N.2 87NHIZ.2

tE2CLP> 0.10 stE2>RES 0.00 sType Characteristic:

IE2>def enable OFF

IE2CLP>def 2.00 IEn2

IE2CLP>inv 2.00 IEn2

IE2> Enable OFFIE2CLP> Mode OFF

tE2>def 1.00 s

IE2>def 1.00 IEn2

IE2>inv enable OFF

tE2>inv 10.0 s

IE2>inv 1.00 IEn2

IE2>BLK1 OFF

IE2>BLK2OUT OFFIE2>BLK4 OFF

IE2>BLK2IN OFF

IE2>2ndh-REST OFFIE2>BF OFF

IE2>Curve DEFINITE

IE2> ElementIE2>> ElementIE2>>> Element

Relays IE2>

IE2>TR-K -IE2>ST-K -

IE2>ST-L -IE2>TR-L -

LEDs IE2>

tE2CLP>> 0.1 stE2>>RES 0 sIE2>>def enable OFF

IE2CLP>>def 2.00IEn1

IE2>> Enable OFFIE2CLP>> Mode OFF

tE2>>def 1.00 s

IE2>>def 1.00 IEn1

IE2>>BLK1 OFF

IE2>>BLK2OUT OFFIE2>>BLK4 OFF

IE2>>BLK2IN OFF

IE2>>2ndh-REST OFFIE2>>BF OFFIE2>disbyIE2>> OFFRelays IE2>>

IE2>>TR-K -IE2>>ST-K -

IE2>>ST-L -IE2>>TR-L -

LEDs IE2>>

tE2CLP>>> 0.1 stE1>>>RES 0 sIE2>>>def enable OFF

IE2CLP>>>def 2.00IEn1

IE2>>> Enable OFFIECLP2>>> Mode OFF

tE2>>>def 1.00 s

IE2>>>def 1.00 IEn1

IE2>>>BLK1 OFF

IE2>>>BLK2OUT OFFIE2>>>BLK4 OFF

IE2>>>BLK2IN OFF

IE2>>>2ndh-REST OFFIE2>>>BF OFFIE2>disbyIE(H)>>> OFFIE2>>disbyIE(H)>>> OFFRelays IE2>>>

IE2>>>TR-K -IE2>>>ST-K -

IE2>>>ST-L -IE2>>>TR-L -

LEDs IE2>>>



NA10_menuset3.ai



SET

87T

tHREST-RES 0.10 sCROSS H-REST OFFST2nd-REST-K -

2nd-REST> 50%Id5th-REST> 50%Id

87T-BLK2OUT OFF87T-BLK4 OFF87T(H)BF OFF87T(L)BF OFF

87T Enable OFF87T-BLK1 OFF

ST2nd-REST-K -ST2nd-REST-L -ST2nd-REST-L -Harmonic restraint

Common

CTs saturationdetectorId> ElementId>> Element

64REF side H

SatDet OFFtSatDet-RES 0.10 s

Q2 50 %Q 0.05 Inreftd> 0.04 s

Id> 0.10 InrefK1 20 %

Relays Id>

Id>TR-K -Id>ST-K -

Id>ST-L -Id>TR-L -

LEDs Id>

Id>> 0.10 Inreftd> 0.03 sRelays Id>>

Id>>TR-K -Id>>ST-K -

Id>>ST-L -Id>>TR-L -

LEDs Id>>

PROCEED SET MENU’

64REF(H)-TR-K -64REF(H)-ST-K -

64REF(H)-TR-L -64REF(H)-ST-L -

tREF(H)> 1.00 s64REF(H)-BLK1 OFF64REF(H)-BLK2OUT OFF64REF(H)-BLK4 OFF64REF(H)-BF OFF

IREF(H)> 1.00 IEn164REF(H)Enable OFF

64REF side L

64REF(L)-TR-K -64REF(L)-ST-K -

64REF(L)-TR-L -64REF(L)-ST-L -

tREF(L)> 1.00 s64REF(L)-BLK1 OFF64REF(L)-BLK2OUT OFF64REF(L)-BLK4 OFF64REF(L)-BF OFF

IREF(L)> 1.00 IEn164REF(L)Enable OFF

74TCS side H

74TCS(H) Enable OFF 74TCS(H)-BLK1 OFF 74TCS(H)-ST-K - 74TCS(H)-TR-K - 74TCS(H)-ST-L - 74TCS(H)-TR-L -

74TCS side H 74TCS(H) Enable OFF 74TCS(H)-BLK1 OFF 74TCS(H)-ST-K - 74TCS(H)-TR-K - 74TCS(H)-ST-L - 74TCS(H)-TR-L -

BLOCK2

BLOCK2 INPUT

BLOCK2 OUTPUT

Relays BLOCK2INtB-K -

ModeBLIN1 OFF

LEDs BLOCK2INtB-L -

tB-IPh 2.00 stB-IE 2.00 s

Relays BLOCK2OUTBLK2OUT-IPh-K -BLK2OUT-IE-K -BLK2OUT-IPh/IE-K-

ModeBLOUT1 OFF

LEDs BLOCK2OUTBLK2OUT-IPh-L -BLK2OUT-IE-L -BLK2OUT-IPh/IE-L-

tF-IPh 1.00 stF-IE 1.00 stF-Iph/IE 1.00 s

BLOCK4 tFI-IPh 1.00 stFI-IE 1.00 s

BF side H

IEBF(H)> 0.50 InH

IBF(H)> 0.10 InH IBF(H)> enable ON

IEBF(H)> enable ON

BF(H) Enable OFF

CB(H) Input ON BF(H)-BLK1 OFF tBF(H) 1.00 s

BF(H)-ST-K - BF(H)-TR-K -

BF(H)-ST-L - BF(H)-TR-L -

Relays BF(H)

LEDs BF(H)

BF side L

IEBF(L)> 0.50 InH

IBF(L)> 0.10 InH IBF(L)> enable ON

IEBF(L)> enable ON

BF(L) Enable OFF

CB(L) Input ON BF(L)-BLK1 OFF tBF(L) 1.00 s

BF(L)-ST-K - BF(L)-TR-K -

BF(L)-ST-L - BF(L)-TR-L -

Relays BF(L)

LEDs BF(L)

PROFILE B SAME FOR PROFILE A


NT10_menuset4.ai



RS485Protocol

EthernetParameters

COMMUNICATION

Protocol MODBUSAddress 1 9600 baud

IP Address 200.1.2.222SubNet Mask 255.255.255.0Autonegotiation ONNTP Synch. OFF

TEST

Test state: OFFStop test? >>Start test? >>Test K1 ? >>Test K2 ? >>Test K3 ? >>Test K4 ? >>Test K5 ? >>Test K6 ? >>

SET

I(H)* 0.10 InHI(H)*enable ON

S(H)<BLK1 OFF tS(H)< 1.00 s

S(H)< 0.50 74CT(H) Enable OFF

S(H)<TR-K - S(H)<TR-L -

CT SUPERVISION74CT side H

I(L)* 0.10 InLI(L)*enable ON

S(L)<BLK1 OFF tS(L)< 1.00 s

S(L)< 0.50 74CT(L) Enable OFF

S(L)<TR-K - S(L)<TR-L -

CT SUPERVISION74CT side L

RemTrip-K - Relays

RemTrip - LEDs

REMOTE TRIPPING

PulseBLIN1-K - Relays

PulseBLIN1-L - LEDs

PILOT WIRE DIAGNOSTIC

PulseBLOUT1 OFF PulseBLIN1 OFF

N.ROL 12 tRoll 5 min

DEMAND MEASURES

Periods tFix 15 min

CB Diagnostic

SumI-2t-L - tbreak-L -

CIRCUIT BREAKERSUPERVISION SIDE H

LEDs-Relays allocationside H

CB Diagnostic side H

CBHopen-K - CBHclose-K - CBHopen-L - CBHclose-L -

CBH ModeN.Open OFF CBH N.Open 10000

CBH Mode-tOpen OFF CBH Ktrig-break -

CBH ModeSumI OFF CBH SumI 5000 InCBH ModeSumI^2t OFFCBH tbreak 0.05 sCBH SumI^2t 5000In^2s

CBH Relays N.Open-K -

CBH tbreak 1 s

SumI-K - SumI-2t-K - tbreak-K - CBH LEDs N.Open-L - SumI-L -

SumI-2t-L - tbreak-L -

CIRCUIT BREAKERSUPERVISION SIDE L

LEDs-Relays allocationside L

CB Diagnostic side L

CBLopen-K - CBLclose-K - CBLopen-L - CBLclose-L -

CBL ModeN.Open OFF CBL N.Open 10000

CBL Mode-tOpen OFF CBL Ktrig-break -

CBL ModeSumI OFF CBL SumI 5000 InCBL ModeSumI^2t OFFCBL tbreak 0.05 sCBL SumI^2t 5000In^2s

CBL Relays N.Open-K -

CBL tbreak 1 s

SumI-K - SumI-2t-K - tbreak-K - CBL LEDs N.Open-L - SumI-L -

Relays - LEDS -

plc Enable ON

PLCPLC SWITCHESPLC TIMERS

Switch 1: 0Switch 2: 0Switch x: 0Switch 32: 0

PLC Timer 1: 0.00 sPLC Timer 2: 0.00 sPLC Timer x: 0.00 sPLC Timer 24: 0.00 s


7.4 MAINTENANCE

The Pro-N relays do not require any particular maintenance; all circuits use high quality static com-ponents, the subassembly products undergo dynamic checks on their functioning before the fi nal assembling of the complete equipment. The dedicated circuits and the fi rmware for the self-test function continuously check the relay operation; the continuously operating auto-zeroing function dynamically corrects the measuring errors due to offset, heat dependent drifts, aging of components, etc.The microprocessor is equipped with a watch-dog circuit which restores the correct operation of the fi rmware in case of fault.The possibility of reading the value of the signals measured on the display (the NA60 relay used as an ammeter) allows one to check both the system parameters and the operation of the protection relays at any time. The NA60 relay can be preset as well to show the current values referred to the nominal current of the current transformers, as directly in primary amperes (according to the preset value of CT’s nominal primary current); the same is done for the input voltages.If connected to the central control unit, all data available on the display can be checked and pro-cessed thus performing a continuous check and maintenance.

7.5 REPAIR

No repair of possible faults by the client is foreseen; if following to any irregularity of operation, the above tests confi rm the presence of a fault, it will be necessary to send the relay to the factory for the repair and the consequent settings and checks.

7.6 PACKAGING

The Pro-N devices must be stored within the required temperature limits; the relative humidity should not cause condensation or formation of frost.It is recommended that the devices are stored in their packaging; in the case of long storage, espe-cially in extreme climatic conditions, it is recommended that the device is supplied with power for some hours before the commissioning, in order to bring the circuits to the rating conditions and to stabilize the operation of the components.

216216 NT10 - Manual - 04 - 2011 APPENDIX

8 A P P E N D I X8 A P P E N D I X

8.1 APPENDIX A1 - Inverse time IEC curves

Mathematical formulaThe mathematical formula, according the IEC 60255-3/BS142 standards is:[1]

Where:t = operate time (in seconds)tI>inv = setting time multiplier (in seconds)I = input currentI>inv = threshold setting

K = coeffi cient:K = 0.14 for IEC-A curve (Normal inverse)K = 13.5 for IEC-B curve (Very inverse)K = 80 for IEC-C curve (Extremely inverse)

α = curve shape constant:α = 0.02 for IEC-A curve (Normal inverse)α = 1 for IEC-B curve (Very inverse)α = 2 for IEC-C curve (Extremely inverse)

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 I>invMinimum operate time: 0.1 sRange where the equation is valid:[2][3] 1.1 ≤ I /I>inv ≤ 20 If I> pickup ≥ 2.5 In, the upper limit is 50 In

Note 1 Symbols are concerning the overcurrent element. The comprehensive overview of the inverse time characteristics concerning the 50/51 and 50N/51N elements is dealt within the PROTECTIVE ELEMENTS section


Nota 3 With setting more than 2.5 In for the 50/51 elements and 0.5 IEn for the 50N/51N elements, the upper limit of the measuring range is limited to 50 In and 10 IEn respectively.

••••

•••

•••

••••

t = t>inv · [(I/I>inv)α-1]

Kt = t>inv · [(I/I>inv)α-1]

K

217NT10 - Manual - 04 - 2011APPENDIX

Negative sequence overcurrent 46 - Standard inverse time curve side H and side L - (IEC 60255-3/BS142 type A)

F_46-IECA-Char.ai

1.12 3 4 5 6 7 8 9 10 20 I2(x) /I2(x)>inv

0.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv = 10 s

t2(x)>inv = 60 s

t2(x)>inv = 5 s

t2(x)>inv = 1 s

t2(x)>inv = 0.5 s

t2(x)>inv = 0.2 s

t2(x)>inv = 0.1 s

t2(x)>inv = 0.02 s

t = t2(x)>inv · [(I2(x)/I2(x)>inv)0.02-1]

0.14

x = H for side H, L for side L

Note: match of operating and setting time takes occurs when I2(H)/I2(H)>inv or I2(L)/I2(L)>inv = 700


Negative sequence overcurrent 46 - Very inverse time curve side H and side L - (IEC 60255-3/BS142 type B)

F_46-IECB-Char.ai

1.1 2 3 4 5 6 7 8 9 10 200.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv = 10 s

t2(x)>inv = 60 s

t2(x)>inv = 5 s

t2(x)>inv = 1 s

t2(x)>inv = 0.5 s

t2(x)>inv = 0.2 s

t2(x)>inv= 0.02 s

t2(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when I2(H) /I2(H)>inv or I2(L) /I2(L)>inv = 14.5

t =t2(x)>inv · [(I2(x)/I2(x)>inv)-1]

13.5

I2(x) /I2(x)>inv



Negative sequence overcurrent 46 - Extremely inverse time curve side H and side L - (IEC 60255-3/BS142 type C)

F_51-IECC-Char.ai

1.1 2 3 4 5 6 7 8 9 10 200.01

0.1

1

10

100

1000

10000

100000t [s]

t2(x)>inv = 10 s

t2(x)>inv = 60 s

t2(x)>inv = 5 s

t2(x)>inv = 1 s

t2(x)>inv = 0.5 st2(x)>inv = 0.2 st2(x)>inv = 0.02 s t2(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when I2(H)/I2(H)>inv or I2(L)/I2(L)>inv = 9

t = t2(x)>inv · [(I2(x)/I2(x)>inv)2-1]

80

I2(x) /I2(x)>inv



Phase overcurrent 50/51 - Standard inverse time curve side H and side L (IEC 60255-3/BS142 type A)

F_51-IECA-Char.ai

1.12 3 4 5 6 7 8 9 10 20 I(x) /I(x)>inv

0.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.5 s

t(x)>inv = 0.2 s

t(x)>inv = 0.1 s

t(x)>inv = 0.02 s

t = t(x)>inv · [(I(x)/I(x)>inv)0.02-1]

0.14

Note: match of operating and setting time takes occurs when I(H)/I(H)>inv or I(L)/I(L)>inv = 700



Phase overcurrent 50/51 - Very inverse time curve side H and side L (IEC 60255-3/BS142 type B

F_51-IECB-Char.ai

1.1 2 3 4 5 6 7 8 9 10 200.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.5 s

t(x)>inv = 0.2 s

t(x)>inv= 0.02 s

t(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when I(H) /I(H)>inv or I(L) /I(L)>inv = 14.5

t = t(x)>inv · [(I(x)/I(x)>inv)-1]

13.5

I(x) /I(x)>inv



Phase overcurrent 50/51 - Extremely inverse time curve side H and side L (IEC 60255-3/BS142 type C)

F_51-IECC-Char.ai

1.1 2 3 4 5 6 7 8 9 10 200.01

0.1

1

10

100

1000

10000

100000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.5 st(x)>inv = 0.2 st(x)>inv = 0.02 s t(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when I(H)/I(H)>inv or I(L)/I(L)>inv = 9

t = t(x)>inv · [(I(x)/I(x)>inv)2-1]

80

I(x) /I(x)>inv



Calculated residual overcurrent 50N/51N - Standard inverse time curve side H and side L (IEC 60255-3/BS142 type A)

F_51-IECA-Char.ai

1.12 3 4 5 6 7 8 9 10 20

IE(x) /IE(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s

t = tE(x)>inv · [(IE(x)/IE(x)>inv)0.02-1]

0.14

Note: match of operating and setting time takes occurs when IE(H)/IE(H)>inv or IE(L)/IE(L)>inv = 700



Calculated residual overcurrent 50N/51N - Very inverse time curve side H and side L (IEC 60255-3/BS142 type B)

F_51N-IECB-Char.ai

1.121 3 4 5 6 7 8 9 10 20

I E(x)/IE(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.02 s

tE(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when IE(H)/IE(H)>inv or IE(L)/IE(L)>inv = 14.5

t = tE(x)>inv · [(IE(x)/IE(x)>inv)-1]

13.5



Calculated residual overcurrent 50N/51N - Extremely inverse time curve side H and side L (IEC 60255-3/BS142 type C)

F_51-IECC-Char.ai

1.121 3 4 5 6 7 8 9 10 20


0.1

1

10

100

1000

10000

100000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 stE(x)>inv = 0.2 s

tE(x)>inv = 0.02 s

tE(x)>inv = 0.1 s

t = tE(x)>inv · [(IE(x)/IE(x)>inv)2-1]

80




Measures residual overcurrent 50N/51N - Standard inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type A)

F_51N12-IECA-Char.ai

1.12 3 4 5 6 7 8 9 10 20


0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s

t = tE(x)>inv · [(IE(x)/IE(x)>inv)0.02-1]

0.14

Note: match of operating and setting time takes occurs when IE(1)/IE(1)>inv or IE(2)/IE(2)>inv = 700

x = 1, 2


Measures residual overcurrent 50N/51N - Very inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type B)

F_51N12-IECB-Char.ai

1.121 3 4 5 6 7 8 9 10 20

I E(x)/IE(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.02 s

tE(x)>inv = 0.1 s

Note: match of operating and setting time takes occurs when IE(1)/IE(1)>inv or IE(2)/IE(2)>inv = 14.5

t = tE(x)>inv · [(IE(x)/IE(x)>inv)-1]

13.5

x = 1, 2


Measures residual overcurrent 50N/51N - Extremely inverse time curve side 1 and side 2 (IEC 60255-3/BS142 type C)

F_5112-IECC-Char.ai

1.121 3 4 5 6 7 8 9 10 20


0.1

1

10

100

1000

10000

100000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s


tE(x)>inv = 0.02 s

tE(x)>inv = 0.1 s

t = tE(x)>inv · [(IE(x)/IE(x)>inv)2-1]

80


x = 1, 2


8.2 APPENDIX A2 - Inverse time ANSI/IEEE curves

Mathematical formulaThe mathematical formula, according the ANSI/IEEE standards is:[1]

Where:t = operate time (in seconds)tI>inv = setting time multiplier (in seconds)I = input currentI>inv = threshold setting

K = coeffi cient:K = 0.01 for ANSI/IEEE Moderately inverse curveK = 3.922 for ANSI/IEEE Very inverse curveK = 5.64 for ANSI/IEEE Extremely inverse curve

α = curve shape constant:α = 0.02 for ANSI/IEEE Moderately inverse curveα = 2 for ANSI/IEEE Very inverse curveα = 2 for ANSI/IEEE Extremely inverse curve

L = coeffi cient:L = 0.023 for ANSI/IEEE Moderately inverse curveL = 0.098 for ANSI/IEEE Very inverse curveL = 0.024 for ANSI/IEEE Extremely inverse curve

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 I>invMinimum operate time: 0.1 sRange where the equation is valid:[2][3] 1.1 ≤ I /I>inv ≤ 20 If I> pickup ≥ 2.5 In, the upper limit is 50 In




••••

•••

•••

•••

••••

t = t>inv · [(I/I>inv)α-1]

K + Lt = t>inv · [(I/I>inv)α-1]

K + L


Negative sequence overcurrent 46 - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L

F_46-ANSIMI-Char.ai

1.121 3 4 5 6 7 8 9 10 20

0.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv = 0.02 s

t2(x)>inv = 0.2 s

t2(x)>inv = 0.1 st2(x)>inv = 0.5 s

t =t2(x) · [(I2(x)/I2(x)>inv)0.02 -1]

0.01 + 0.023


I2(x) /I2(x)>inv

t2(x)>inv = 60 s

t2(x)>inv = 10 s

t2(x)>inv = 5 s

t2(x)>inv = 1 s



Negative sequence overcurrent 46 - Very inverse time curve (ANSI/IEEE type VI) side H and side L

t2(x)>inv = 60 s

t2(x)>inv = 10 s

t2(x)>inv = 5 s

t2(x)>inv = 1 s

I2(x) /I2(x)>inv

F_46-ANSIVI-Char.ai

1.121 3 4 5 6 7 8 9 10 20

0.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv= 0.5 s

t2(x)>inv = 0.2 s

t2(x)>inv = 0.1 s

t2(x)>inv = 0.02 s

t =t2(x)>inv · [(I2(x)/I2(x)>inv)2 -1]

3.922 + 0.092




Negative sequence overcurrent 46 - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L

F_51-ANSIEI-Char.ai

1.121 3 4 5 6 7 8 9 10 20

0.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv = 0.5 s

t2(x)>inv = 1 s

t2(x)>inv = 0.2 s

t2(x)>inv = 0.1 s

t2(x)>inv = 0.02 s

t =t2(x)>inv · [(I2(x)/I2(x)>inv)2 -1]

5.64 + 0.024


t2(x)>inv = 60 s

t2(x)>inv = 10 s

t2(x)>inv = 5 s

I2(x) /I2(x)>inv



Phase overcurrent 50/51 - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L

F_51-ANSIMI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 I(x)/I(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.02 s

t(x)>inv = 0.2 s

t(x)>inv = 0.1 st(x)>inv = 0.5 s


t =t(x) · [(I(x)/I(x)>inv)0.02 -1]

0.01 + 0.023



Phase overcurrent 50/51 - very inverse time curve (ANSI/IEEE type VI) side H and side L

F_51-ANSIVI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 I(x) /I(x)>inv

0.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.5 s

t(x)>inv = 0.2 s

t(x)>inv = 0.1 s

t(x)>inv = 0.02 s


t =t(x)>inv · [(I(x)/I(x)>inv)2 -1]

3.922 + 0.092



Phase overcurrent 50/51 - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L

F_51-ANSIEI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 I(x) /I(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 10 s

t(x)>inv = 60 s

t(x)>inv = 5 st(x)>inv = 0.5 s

t(x)>inv = 1 s

t(x)>inv = 0.2 s

t(x)>inv = 0.1 s

t(x)>inv = 0.02 s

Note: match of operating and setting time takes occurs when I(H) /I(H)>inv or I(L) /I(L)>inv 2.789

t =t(x)>inv · [(I(x)/I(x)>inv)2 -1]

5.64 + 0.024



Calculated residual overcurrent 50N/51N - Moderately inverse time curve (ANSI/IEEE type MI) side H and side L

F_51N-ANSIMI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE(x)/IE(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.02 s

tE(x)>inv = 0.2 s


Note: match of operating and setting time takes occurs when IE(H) /IE(H)>inv or IE(L) /IE(L)>inv = 1.664

t =tE(x) · [(IE(x)/IE(x)>inv)0.02 -1]

0.01 + 0.023



Calculated residual overcurrent 50N/51N - Very inverse time curve (ANSI/IEEE type VI) side H and side L

F_51N-ANSIVI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE/IE>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s

t = tE(x)>inv · [(IE(x)/IE(x)>inv)2 -1]

3.922 + 0.092

Note: match of operating and setting time takes occurs when IE(H) /IE(H)>inv or IE(L) /IE(L)>inv = 2.306



Calculated residual overcurrent 50N/51N - Extremely inverse time curve (ANSI/IEEE type EI) side H and side L

F_51N-ANSIEI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE(X)/IE(X)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 stE(x)>inv = 0.5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s


5.64 + 0.024

Note: match of operating and setting time takes occurs when IE(H)/IE(H)>inv or IE(L)/IE(L)>inv= 2.789



Measured residual overcurrent 50N/51N - Moderately inverse time curve (ANSI/IEEE type MI) side 1 and side 2

F_51N-ANSIMI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE(x)/IE(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.02 s

tE(x)>inv = 0.2 s


Note: match of operating and setting time takes occurs when IE(1) /IE(1)>inv or IE(2) /IE(2)>inv = 1.664

t =tE(x) · [(IE(x)/IE(x)>inv)0.02 -1]

0.01 + 0.023

x = 1, 2


Measured residual overcurrent 50N/51N - Very inverse time curve (ANSI/IEEE type VI) side 1 and side 2

F_51N-ANSIVI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE/IE>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s


3.922 + 0.092

Note: match of operating and setting time takes occurs when IE(1) /IE(1)>inv or IE(2) /IE(2)>inv = 2.306

x = 1, 2


Measured residual overcurrent 50N/51N - Extremely inverse time curve (ANSI/IEEE type EI) side 1 and side 2

F_51N-ANSIEI-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE(X)/IE(X)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 10 s

tE(x)>inv = 60 s

tE(x)>inv = 5 stE(x)>inv = 0.5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.2 s

tE(x)>inv = 0.1 s

tE(x)>inv = 0.02 s


5.64 + 0.024

Note: match of operating and setting time takes occurs when IE(1)/IE(1)>inv or IE(2)/IE(2)>inv= 2.789

x = 1, 2


8.3 APPENDIX A3 - Inverse time - RECTIFIER, I2t and EM curves

Mathematical formulaThe mathematical formula for RECTIFIER, I-squared-t (I2t) and Electromechanical curves (EM) is:[1]

Where:

t = operate time (in seconds)tI>inv = setting time multiplier (in seconds)I = input currentI>inv = threshold setting

K = coeffi cient:K = 2351 for RECTIFIER curve (RI)K = 16 for I2t curveK = 0.28 for Electromechanical curve (EM)

α = curve shape constant:α = 5.6 for RECTIFIER curve (RI)α = 2 for I-squared-t (I2t) curveα = -1 for Electromechanical curve (EM)

A = coeffi cient:A = 1 for RECTIFIER curve (RI)A = 1 for I-squared-t (I2t) curveA = -0.236 for Electromechanical curve (EM)

B = coeffi cient:B = 1 for RECTIFIER curve (RI)B = 0 for I-squared-t (I2t) curveB = -0.339 for Electromechanical curve (EM)

For all inverse time characteristics, following data applies:Asymptotic reference value (minimum pickup value): 1.1 I>invMinimum operate time: 0.1 sRange where the equation is valid:[2][3] 1.1 ≤ I/I>inv ≤ 20 If I> pickup ≥ 2.5 In, the upper limit is 50 In




••••

•••

•••

•••

•••

••••

t = t>inv · A·(I/I>inv)α-B]

Kt = t>inv · A·(I/I>inv)α-B]

K


Phase overcurrent 50/51 - Rectifi er curves side H and side L

F_51-RI-Char.ai

0.01

0.1

1

100

10

1000

10 000

100 000

1000 000

t [s]

1.121 3 4 5 6 7 8 9 10 20 I (H)/I(H) >inv

t(x)>inv = 60 s

t(x)>inv = 10 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.1 s

t(x)>inv = 0.5 s

t(x)>inv = 0.02 s

t(x)>inv = 0.1 s

t = t(x)>inv · [(I(x)/I(x)>inv)5.6 -1]

2351

Note: match of operating and setting time takes occurs when I(H) /I(H)>inv or I(L) /I(L)>inv = 4



Negative sequence overcurrent 46 - I2t inverse curves (I2t=K) side H and side L

F_46-I2t-Char.ai

1.121 3 4 5 6 7 8 9 10 20

0.01

0.1

1

10

100

1000

10000t [s]

t2(x)>inv = 1 s

t2(x)>inv = 0.5 s

t2(x)>inv = 0.2 s

t2(x)>inv = 0.1 s

t2(x)>inv = 0.02 s

t = t2(x)>inv · [(I2(x)/I2(x)>inv)2]

16

Note: match of operating and setting time takes occurs when I2(H) /I2(H)>inv or I2(L) /I2(L)>inv = 4

I (x)/I(x) >inv

t2(x)>inv = 60 s

t2(x)>inv = 10 s

t2(x)>inv = 5 s



Phase overcurrent 50/51 - I2t inverse curves (I2t=K) side H and side L

t = t(x)>inv · [(I(x)/I(x)>inv)2]

16

t = t(x)>>inv · [(I(x)/I(x)>>inv)2]

16

t(x)>inv = 60 st(x)>>inv = 60 s

F_67-I2t-Char.ai

1.121 3 4 5 6 7 8 9 10 20

0.01

0.1

1

10

100

1000

10000t [s]

I(x)/I(x)>invI(x)/I(x)>>inv

t(x)>inv = 1 st(x)>>inv = 1 s

t(x)>inv = 0.5 st(x)>>inv = 0.5 s

t(x)>inv = 0.2 st(x)>>inv = 0.2 s

t(x)>inv = 0.1 st(x)>>inv = 0.1 s

t(x)>inv = 0.02 st(x)>>inv = 0.02 s

t(x)>inv = 10 st(x)>>inv = 10 s

t(x)>inv = 5 st(x)>>inv = 5 s

Note: match of operating and setting time takes occurs when I(H) /I(H)>inv or I(L) /I(L)>inv = 4



Phase overcurrent 50/51 - Electromechanical inverse curves (EM) side H and side L

F_51-EM-Char.ai

1.121 3 4 5 6 7 8 9 10 20

I(x) /I(x)>inv0.01

0.1

1

10

100

1000

10000t [s]

t(x)>inv = 60 s

t(x)>inv = 10 s

t(x)>inv = 5 s

t(x)>inv = 1 s

t(x)>inv = 0.5 s

t(x)>inv = 0.2 st(x)>inv = 0.1 s

t(x)>inv = 0.02 s

Note: match of operating and setting time takes occurs when I(H) /I(H)>inv or I(L) /I(L)>inv= 4

t = t(x)>inv · -0.236 · [(I(x)/I(x)>inv)-1 -0.339]

0.28



Calculated residual overcurrent 50N/51N - Electromechanical inverse curves (EM) side H and side L

F_51N-EM-Char.ai

1.121 3 4 5 6 7 8 9 10 20 IE(X)/IE(X)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 60 s

tE(x)>inv = 10 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s


tE(x)>inv = 0.02 s


t = tE(X)>inv · -0.236 · [(IE(X)/IE(X)>inv)-1 - 0.339]

0.28



Measured residual overcurrent 50N/51N - Electromechanical inverse curves (EM) side 1 and side 2

F_51N-EM-Char.ai

1.121 3 4 5 6 7 8 9 10 20

IE(X)/IE(X)>inv0.01

0.1

1

10

100

1000

10000t [s]

tE(x)>inv = 60 s

tE(x)>inv = 10 s

tE(x)>inv = 5 s

tE(x)>inv = 1 s

tE(x)>inv = 0.5 s


tE(x)>inv = 0.02 s


t = tE(X)>inv · -0.236 · [(IE(X)/IE(X)>inv)-1 - 0.339]

0.28

x = 1, 2


8.4 APPENDIX B1 - I/O Diagram

NT10-I-O.aiCircuiti di ingresso uscita

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

NT10

E1

THYB

US

D1

ETHE

RNET

RS23

2

FRONT PANEL

OUTP

UT R

ELAY

S

A9

A10

A11

A12

A13

A14

A3A4A5

A6A7A8

K2

K3

K4

K5

K6

K1

RS48

5

F1F2F3F4F5A+

B-

SIDE

HSI

DE L

CURR

ENT

INPU

TS

UAUXA1 ≅

A2

BLOC

K INA17

A18

BLOC

K OU

T

A15BLOUT-

BLOUT+ A16

C10

C9

C11

C12C13

C14

IL1L

IL2L

IL3L

C2

C1

C3

C4C5

C6

IL1H

IL2H

IL3H

IE2

C15

C16 IE1

C7

C8

BIN

ARY

INPU

TSA19IN1

IN2

A20A21A22


8.5 APPENDIX B2 - Interfaces

Interfaces.ai

RS23

2 FRONT PANEL

D1

ETHE

RNET

HUB

N.8 Pt100

E1

N.16 binary inputs

N.8 binary inputs+ 4 output relay

RS48

5

F1F2F3F4F5A+

B- Supervision unit

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

OUTPUT

MPT

ON

BU

S

RU

N

MODULO PT100PT100 MODULE

INPUT

OUTPUT

MID16

ON

BU

S

RU

N


INPUT

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

3436 35 303233 31 2829434445 394042 41 38 375254 53 485051 49 4647

1 2 3 4 5 6 7 8 9 181716151413121110 212019 252322 24 2726

MID8MODULO INGRESSI REMOTI

INPUTOUTPUT ON

RUNBUS

OUTPUT

ON

BU

S

RU

N

1 2 3 4 5MODULO 4 RELE’ + 8 INGRESSI DIGITALI4 RELAYS + 8 BINARY INPUTS MODULE

INPUT

MRI

THYB

US


8.6 APPENDIX B3- Connection diagramsNote: Some typical connection diagram are shown. All diagram must be considered just as example; they cannot be comprehensive for real applications. For all diagrams the output contacts are shown in de-energized state for standard reference.

Transformer differential protection

NOTE- To current with incoming direction in the protected component must match incoming current in the reference terminals of of the relay current inputs , while to current having a outgoing direction from the protected component must match output current in the reference terminals of the current inputs of the relay.- The input current in the reference terminals of of the relay current inputs of the are considered positive, negative for outgoing ones.- This Convention applies: the CTs polarity P1 to the protected component.

87T

BIN

ARY

INPU

TS

CB position

CB position

CB position

NT10

SIDE

H

SIDE H

SIDE L

BF

SIDE H or SIDE LSI

DE L

CURR

ENT

INPU

TS

L1 L2 L3

P1S1S2

P2

C10

C9

C11

C12C13

C14

P1S1S2

P2

IL1L

IL2L

IL3L

C2

C1

C3

C4C5

C6

P1

S1S2

P2

IL1H

IL2H

IL3H

IE2

C15

C16 IE1

P1

S1S2

P2

C7

C8

50N/51N

50N.1/51N.1

BF

74CT 4637 49 50/51I2/I1

SIDE H or SIDE L

50N/51N64REF

50N.2/51N.2

BF

74CT

87NHIZ.2

4637 49 50/51I2/I1

* Note Functions available in alternative

*

*


87T

BIN

ARY

INPU

TS

CB position

CB position

NT10

SIDE

H

SIDE H

SIDE L

BF

SIDE

LCU

RREN

T IN

PUTS

L1 L2 L3

C10

C9

C11

C12C13

C14

P1S1S2

P2

IL1L

IL2L

IL3L

C2

C1

C3

C4C5

C6

P1

S1S2

P2

IL1H

IL2H

IL3H

P1S1S2

P2

IE2

C7

C8

50N/51N

C15

C16 IE1

P1

S1S2

P2

50N.1/51N.1

BF

74CT 4637 49 50/51I2/I1

50N/51N

50N.2/51N.2

74CT 4637 49

50/51

I2/I1

G

Differential protection for Transformer-Generator system



87T

BIN

ARY

INPU

TS

CB position

CB position

CB position

NT10

SIDE

H

SIDE H

SIDE L

BF

SIDE

LCU

RREN

T IN

PUTS

L1 L2 L3

P1S1S2

P2

P1S1S2

P2

C10

C9

C11

C12C13

C14

P1S1S2

P2

IL1L

IL2L

IL3L

C2

C1

C3

C4C5

C6

P1

S1S2

P2

IL1H

IL2H

IL3H

IE2

C15

C16 IE1

C7

C8

50N/51N64REF

50N.1/51N.1

BF

74CT

87NHIZ.1

4637 49 50/51I2/I1

50N/51N64REF

50N.2/51N.2

BF

74CT

87NHIZ.2

50N.x/51N.x

87NHIZ.x

4637 49 50/51I2/I1

SIDE H or SIDE L

SIDE H or SIDE L

Transformer differential protection


Alternative functions


8.7 APPENDIX C - Dimensions

120 101

171

8031

128.5110

200

168

20

149

305218 30

107

177

ø 4.5

102.5 ±0.370

161

154

ø 4.5

ø 4.5

225.525 15

170

275

177

(4U)

101.

6

482.6465

MONTAGGIO RACK MOUNTING FLUSH MOUNTING CUTOUT

SIDE VIEWS

FRONT VIEWS

ON 41 32 5

TRIP

START

ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START

ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START ON 41 32 5

TRIP

START

REAR VIEWS

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

F1

D1

RX

TX

F2F3F4F5

A1A2

A3A4A5

A6A7A8

A9A10A11

A12A13A14

A15A16

A17A18

A19A20

A21A22

B1B2B3B4B5B6B7B8

E1

19

C

210

311

412

513

614

715

816

FLUSH MOUNTING PROJECTING MOUNTING FLUSH MOUNTING PROJECTING MOUNTING(Separate operator panel)

FLUSH MOUNTING SEPARATEOPERATOR PANEL

PROJECTING MOUNTINGPROJECTING MOUNTING(Stand alone)(Separate operator panel)

N.4 holes ø 3.5


8.8 APPENDIX D - Setting tableNote The 26 element, the output relay and LEDs K7...K10, L6...L10 and the binary input IN3...IN42 settings are available only when the concerning I/O

circuits are implemented (MPT, MRI and MID16 modules on Thybus)

Description Parameter Unit Setting range

Set

Base

Relay reference name

Relay nominal frequency - fn Hz 50 ... 60 step = 10

Relay phase nominal current side H - InH 1 A | 5 A

Phase CT primary nominal current side H - InpH A

1 ... 499 step = 1500 ... 4990 step = 105000 ... 20000 step = 100

Relay phase nominal current side L - InL 1 A | 5 A

Phase CT primary nominal current side L - InpL A

1 ... 499 step = 1500 ... 4990 step = 105000 ... 20000 step = 100

Relay residual current 1 - IEn1 1 A | 5 A

Residual CT primary nominal current 1 - IEn1p A

1 ... 499 step = 1500 ... 4990 step = 105000 ... 20000 step = 100

Relay residual current 2 - IEn2 1 A | 5 A

Residual CT primary nominal current 2 - IEn2p A

1 ... 499 step = 1500 ... 4990 step = 105000 ... 20000 step = 100

Primary mominal current choise as reference - Inref A 0 ... 0 step = 0

Side reference for compensation - RefSide H | L | T

Current matching type - MatchType INTERNAL | EXTERNAL

Measurements reading mode RELATIVE | PRIMARY

Language English

Transformer

Tranformer nominal power - Snt MVA 0.01 ... 1000.00 step = 0.01

Transformer nominal voltage side H - VntH kV 0.200 ... 0.999 step = 0.0011.00 ... 500.00 step = 0.01

Transformer nominal current side H - IntH A 0 ... 0 step = 0

Transformer mismatching factor side H - mH 0 ... 0 step = 0

Transformer base current side H - IBH InH 0 ... 0 step = 0

Transformer grounding side H - GndH Out | In

Transformer connection side H - ConnH Y | D | Z

Transformer nominal voltage side L - VntL kV 0.200 ... 0.999 step = 0.0011.00 ... 500.00 step = 0.01

Transformer nominal current side L - IntL A 0 ... 0 step = 0

Transformer mismatching factor side L - mL 0 ... 0 step = 0

Transformer base current side L - IBL InL 0 ... 0 step = 0

Transformer grounding side L - GndL Out | In

Transformer connection side L - ConnL y | d | z

Transformer vector group side L - VectGroupL 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11

Input sequence

Polarity

Inputs

Binary input IN1

IN1

Logic Active-ON | Active-OFF


Description Parameter Unit Setting range IN1 tON

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IN1 tOFF

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IN1 matching

Reset LEDs | Set profi le | Fault trigger | Block2 IPh/IE | Block2 IPh | Block2 IE | H-L-87T Block1 | H Block1 | L Block1 | 87T Block1 | TCS1 H | TCS2 H | TCS1 L | TCS2 L | Trip ProtExt H-L | Trip ProtExt H | Trip ProtExt L | Reset counters | Reset CBH Monitor | 52a H | 52b H | Open CBH | Close CBH | Reset CBL Monitor | 52a L | 52b L | Open CBL | Close CBL | Preset DTheta H-L | Preset DTheta H | Preset DTheta L | Remote trip | Reset on demand measures | None

Binary input IN2

IN2

Logic Active-ON | Active-OFF

IN2 tON

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IN2 tOFF

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IN2 matching

Reset LEDs | Set profi le | Fault trigger | Block2 IPh/IE | Block2 IPh | Block2 IE | H-L-87T Block1 | H Block1 | L Block1 | 87T Block1 | TCS1 H | TCS2 H | TCS1 L | TCS2 L | Trip ProtExt H-L | Trip ProtExt H | Trip ProtExt L | Reset counters | Reset CBH Monitor | 52a H | 52b H | Open CBH | Close CBH | Reset CBL Monitor | 52a L | 52b L | Open CBL | Close CBL | Preset DTheta H-L | Preset DTheta H | Preset DTheta L | Remote trip | Reset on demand measures | None

Relays

K1

Logic De-energized | Energized

Operation MODE No-latched | Pulse | Latched

Minimum pulse width ms 0 ... 500 step = 5

K2




K3




K4




K5




Description Parameter Unit Setting range Minimum pulse width ms 0 ... 500 step = 5

K6




LEDs

START

Type No-latched | Latched

TRIP


L1


L2


L3


L4


L5


L6


Analog outputs

Current loop 1

Loop 1 Measure assigned

Loop1-Mis

Frequency | IL1H | IL2H | IL3H | IE1 | IEH | IESH | ILH | I1H | I2H | IL1L | IL2L | IL3L | IE2 | IEL | IESL | ILL | I1L | I2L | ISL1 | ISL2 | ISL3 | IDL1 | IDL2 | IDL3 | PLC | None

Loop 1 Output range Loop1-Range 0-5 mA | 0-20 mA | 4-20 mA

Loop 1 Output type Loop1-Type Unipolar | Bipolar

Loop 1 Nominal multiplier Loop1-M 0.01 ... 100.00 step = 0.01

Loop 1 Terminals polarity Loop1-Polarity Normal | Reverse

Current loop 2


Loop2-Mis






Current loop 3


Loop3-Mis






Current loop 4


Description Parameter Unit Setting range Loop 4 Measure assigned

Loop4-Mis






Self-test Relay

MINOR Fail alarm NO | YES

Self-test relay K1 | K2 | K3 | K4 | K5 | K6 |

MMI

Display modules Assigned modules | All modules

Profi le selection

Active profi le A | B | By INPUT

Profi le A

Profi le A sides H/L

Thermal protection with RTD thermometric probes - 26

PT1 Probe

ThAL1 Alarm

ThAL1 Enable ThAL1 Enable OFF | ON

26 PT1 Alarm threshold ThAL1 ̂ C 0 ... 200 step = 1

ThAL1 Operating time

Value s 0 ... 100 step = 1

ThAL1 Alarm relays ThAL1-K K1 | K2 | K3 | K4 | K5 | K6 |

ThAL1 Alarm LEDs ThAL1-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Th>1 Trip

Th>1 Enable Th>1 Enable OFF | ON

26 PT1 Trip threshold Th>1 ̂ C 0 ... 200 step = 1

Th>1 Operating time

Value s 0 ... 100 step = 1

Th>1 Breaker failure Th>1BF OFF | ON

Th>1 Trip relays Th>1-K K1 | K2 | K3 | K4 | K5 | K6 |

Th>1 Trip LEDs Th>1-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

PT2 Probe

ThAL2 Alarm




Value s 0 ... 100 step = 1



Th>2 Trip



Th>2 Operating time

Value s 0 ... 100 step = 1





Description Parameter Unit Setting range PT3 Probe

ThAL3 Alarm




Value s 0 ... 100 step = 1



Th>3 Trip



Th>3 Operating time

Value s 0 ... 100 step = 1




PT4 Probe

ThAL4 Alarm




Value s 0 ... 100 step = 1



Th>4 Trip



Th>4 Operating time

Value s 0 ... 100 step = 1




PT5 Probe

ThAL5 Alarm




Value s 0 ... 100 step = 1



Th>5 Trip



Th>5 Operating time

Value s 0 ... 100 step = 1




PT6 Probe

ThAL6 Alarm


Description Parameter Unit Setting range ThAL6 Enable ThAL6 Enable OFF | ON



Value s 0 ... 100 step = 1



Th>6 Trip



Th>6 Operating time

Value s 0 ... 100 step = 1




PT7 Probe

ThAL7 Alarm




Value s 0 ... 100 step = 1



Th>7 Trip



Th>7 Operating time

Value s 0 ... 100 step = 1




PT8 Probe

ThAL8 Alarm




Value s 0 ... 100 step = 1



Th>8 Trip



Th>8 Operating time

Value s 0 ... 100 step = 1




Diagnostic

PT100 probe diagnostic relays PT100Diag-K K1 | K2 | K3 | K4 | K5 | K6 |

PT100 probe diagnostic LEDs PT100Diag-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

50N.1/51N.1-87NHIZ.1 side H/L


Description Parameter Unit Setting range IE1> Element

Setpoints

IE1> Enable IE1> Enable OFF | ON

IE1> Curve type IE1>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | EM | DEFINITE

IE1CLP> Mode IE1CLP> Mode OFF | ON - Element blocking | ON - Change setting

IE1CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1> Logical block IE1>BLK1 OFF | ON

IE1> Input selective block IE1>BLK2IN OFF | ON

IE1> Output selective block IE1>BLK2OUT OFF | ON

IE1> Internal selective block IE1>BLK4 OFF | OUT | IN

IE1> Second harmonic restraint IE1>2ndh-REST OFF | ON

IE1> Breaker failure IE1>BF OFF | ON

IE1> Start relays IE1>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1> Trip relays IE1>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1> Start LEDs IE1>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE1> Trip LEDs IE1>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N.1/51N.1-87NHIZ.1 fi rst threshold defi nite time

State OFF | ON

Pickup value IEn1 0.005 ... 0.999 step = 0.001

1.00 ... 10.00 step = 0.01

IE1CLP>def within CLP IE1CLP>def IEn1 0.005 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

IE1>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50N.1/51N.1-87NHIZ.1 fi rst threshold inverse time

State OFF | ON


1.00 ... 2.00 step = 0.01

IE1CLP>inv within CLP IE1CLP>inv IEn1 0.005 ... 0.999 step = 0.0011.00 ... 2.00 step = 0.01

IE1>inv Operating time tE1>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

IE1>> Element

Setpoints

IE1>> Enable IE1>> Enable OFF | ON

IE1CLP>> Mode IE1CLP>> Mode OFF | ON - Element blocking | ON - Change setting

IE1CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1>> Logical block IE1>>BLK1 OFF | ON


Description Parameter Unit Setting range IE1>> Input selective block IE1>>BLK2IN OFF | ON

IE1>> Output selective block IE1>>BLK2OUT OFF | ON

IE1>> Internal selective block IE1>>BLK4 OFF | OUT | IN

IE1>> Second harmonic restraint IE1>>2ndh-REST OFF | ON

IE1>> Breaker failure IE1>>BF OFF | ON

IE1> Disabling by IE1>> start IE1>disbyIE1>> OFF | ON

IE1>> Start relays IE1>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1>> Trip relays IE1>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1>> Start LEDs IE1>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE1>> Trip LEDs IE1>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N.1/51N.1-87NHIZ.1 second threshold defi nite time

State OFF | ON


1.00 ... 10.00 step = 0.01

IE1CLP>>def within CLP IE1CLP>>def IEn1 0.005 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

IE1>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

IE1>>> Element

Setpoints

IE1>>> Enable IE1>>> Enable OFF | ON

IE1CLP>>> Mode IE1CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

IE1CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE1>>> Logical block IE1>>>BLK1 OFF | ON

IE1>>> Input selective block IE1>>>BLK2IN OFF | ON

IE1>>> Output selective block IE1>>>BLK2OUT OFF | ON

IE1>>> Internal selective block IE1>>>BLK4 OFF | OUT | IN

IE1>>> Second harmonic restraint IE1>>>2ndh-REST OFF | ON

IE1>>> Breaker failure IE1>>>BF OFF | ON

IE1> Disabling by IE1>>> start IE1>disbyIE1>>> OFF | ON

IE1>> Disabling by IE1>>> start IE1>>disbyIE1>>> OFF | ON

IE1>>> Start relays IE1>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1>>> Trip relays IE1>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE1>>> Start LEDs IE1>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE1>>> Trip LEDs IE1>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N.1/51N.1-87NHIZ.1 third threshold defi nite time

State OFF | ON


1.00 ... 10.00 step = 0.01

IE1CLP>>>def within CLP IE1CLP>>>def IEn1 0.005 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

IE1>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01



Description Parameter Unit Setting range IE2> Element

Setpoints





Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time


State OFF | ON


1.00 ... 2.00 step = 0.01



IE2>> Element

Setpoints




Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1



Description Parameter Unit Setting range IE2>> Input selective block IE2>>BLK2IN OFF | ON










Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01

IE2>>> Element

Setpoints




Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1













Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01

Differential - 87T


Description Parameter Unit Setting range Common confi guration

87T Enable 87T Enable OFF | ON

87T Logical block 87T-BLK1 OFF | ON

87T Output selective block 87T-BLK2OUT OFF | ON

87T Internal selective block 87T-BLK4 OFF | OUT

87T(H) Breker failure 87T(H)BF OFF | ON

87T(L) Breker failure 87T(L)BF OFF | ON

Harmonic restraint

87T Second harmonic restraint threshold 2nd-REST> %Id 10 ... 80 step = 1

87T Fifth harmonic restraint threshold 5th-REST> %Id 10 ... 80 step = 1

87T Harmonic restraint intentional reset time delay tHREST-RES s 0.00 ... 10.00 step = 0.01

87T cross-phase harmonic restraint enable CROSS H-REST OFF | ON

2nd-REST Start relays ST2nd-REST-K K1 | K2 | K3 | K4 | K5 | K6 |

5th-REST Start relays ST5th-REST-K K1 | K2 | K3 | K4 | K5 | K6 |

2nd-REST Start LEDs ST2nd-REST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

5th-REST Start LEDs ST5th-REST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CT saturation detector

87T Saturation detector enable SatDet OFF | ON

87T Saturation detector intentional reset time delay tSatDet-RES s 0.00 ... 0.50 step = 0.01

SatDet Start relays STSatDet-K K1 | K2 | K3 | K4 | K5 | K6 |

SatDet Start LEDs STSatDet-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Id> Element

Setpoints

Id> Start relays Id>-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

Id> Trip relays Id>-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

Id> Start LEDs Id>-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Id> Trip LEDs Id>-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

87T First threshold Id> Inref 0.05 ... 2.00 step = 0.01

87T First stretch slope percentage K1 % 10 ... 50 step = 1

87T Second stretch slope percentage K2 % 25 ... 100 step = 1

87T Second stretch intersection with verical axis Q Inref 0.00 ... 3.00 step = 0.01

Id>> Element

Setpoints

Id>> Start relays Id>>-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

Id>> Trip relays Id>>-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

Id>> Start LEDs Id>>-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Id>> Trip LEDs Id>>-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

87T Second threshold Id>> Inref 0.50 ... 30.00 step = 0.01

Selective block - BLOCK2

Selective block IN

BLIN1 Selective block operating mode ModeBLIN1 OFF | ON IPh/IE | ON IPh | ON IE

BLIN maximum activation time for phase protections

Value s 0.10 ... 10.00 step = 0.01

BLIN maximum activation time for ground protections

Value s 0.10 ... 10.00 step = 0.01

tB-Iph/IE Elapsed signalling relays tB-K K1 | K2 | K3 | K4 | K5 | K6 |

tB-Iph/IE Elapsed signalling LEDs tB-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Selective block OUT


Description Parameter Unit Setting range BLOUT Dropout time for phase protections

Value s 0.00 ... 1.00 step = 0.01

BLOUT Dropout time for ground protections

Value s 0.00 ... 1.00 step = 0.01

BLOUT Dropout time for ground and phase protections

Value s 0.00 ... 1.00 step = 0.01

BLOUT1 Selective block operating mode ModeBLOUT1 OFF | ON IPh/IE | ON IPh | ON IE

Phase protections output selective block relays BLK2OUT-Iph-K K1 | K2 | K3 | K4 | K5 | K6 |

Ground protections output selective block relays BLK2OUT-IE-K K1 | K2 | K3 | K4 | K5 | K6 |

Phase and ground protections output selective block relays

BLK2OUT-Iph/IE-K

K1 | K2 | K3 | K4 | K5 | K6 |

Phase protections output selective block LEDs BLK2OUT-Iph-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Ground protections output selective block LEDs BLK2OUT-IE-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase and ground protections output selective block LEDs BLK2OUT-Iph/IE-L

START | TRIP | L1 | L2 | L3 | L4 | L5 |

Internal selective block - BLOCK4

Output internal selective block dropout time for phase protections

Value s 0.00 ... 10.00 step = 0.01

Output internal selective block dropout time for ground protections

Value s 0.00 ... 10.00 step = 0.01

Profi le A side H

Undercurrent lato H - 37 side H

I(H)< Element

Setpoints

37(H) Operating logic Logic37(H) OR | AND

I(H)< Logical block I(H)<BLK1 OFF | ON

I(H)< Start relays I(H)<ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)< Trip relays I(H)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)< Start LEDs I(H)<ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)< Trip LEDs I(H)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

37 side H fi rst threshold defi nite time

State OFF | ON

Pickup value InH 0.10 ... 1.00 step = 0.01

I(H)<def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Negative sequence overcurrent side H - 46 side H

I2(H)> Element

Setpoints

I2(H)> Enable I2(H)> Enable OFF | ON

I2(H)> Curve type I2(H)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | I2t | EM | DEFINITE

I2(H)CLP> Mode I2(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I2(H)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Description Parameter Unit Setting range I2(H)> Logical block I2(H)>BLK1 OFF | ON

I2(H)> Input selective block I2(H)>BLK2IN OFF | ON

I2(H)> Output selective block I2(H)>BLK2OUT OFF | ON

I2(H)> Internal selective block I2(H)>BLK4 OFF | OUT | IN

I2(H)> Second harmonic restraint I2(H)>2ndh-REST OFF | ON

I2(H)> Breaker failure I2(H)>BF OFF | ON

I2(H)> Start relays I2(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)> Trip relays I2(H)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)> Start LEDs I2(H)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(H)> Trip LEDs I2(H)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01

I2(H)>def within CLP I2(H)CLP>def InH 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(H)>def Operating time

Value s

0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

46 side H fi rst threshold inverse time

State OFF | ON


1.00 ... 10.00 step = 0.01

I2(H)>inv within CLP I2(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(H)>inv Operating time t2(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I2(H)>> Element

Setpoints

I2(H)>> Enable I2(H)>> Enable OFF | ON

I2(H)CLP>> Mode I2(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I2(H)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)>> Logical block I2(H)>>BLK1 OFF | ON

I2(H)>> Input selective block I2(H)>>BLK2IN OFF | ON

I2(H)>>BLK2OUT I2(H)>> Output selective block OFF | ON

I2(H)>> Internal selective block I2(H)>>BLK4 OFF | OUT | IN

I2(H)>> Second harmonic restraint I2(H)>>2ndh-REST OFF | ON

I2(H)>> Breaker failure I2(H)>>BF OFF | ON

I2(H)> Disabling by I2(H)>> OFF | ON

I2(H)>> Start relays I2(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)>> Trip relays I2(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)>> Start LEDs I2(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(H)>> Trip LEDs I2(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |


Description Parameter Unit Setting range Defi nite time

46 side H second threshold defi nite time

State OFF | ON


1.00 ... 40.00 step = 0.01

I2(H)>>def within CLP I2(H)CLP>>def InH 0.100 ... 0.999 step = 0.0011.00 ... 40.00 step = 0.01

I2(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Negative / Positive sequence current ratio side H - I2/I1 side H

I21(H)> Element

Setpoints

I21(H)> Mode I21(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I21(H)> Logical block I21(H)>BLK1 OFF | ON










Defi nite time

I2/I1 side H fi rst threshold defi nite time

State OFF | ON

Pickup value 0.10 ... 1.00 step = 0.01

I21(H)>def within CLP I21(H)CLP>def 0.10 ... 1.00 step = 0.01


Value s 0.04 ... 0.99 step = 0.01

1 ... 15000 step = 1

Thermal image side H - 49 side H

Common confi guration side H

Initial thermal image side H DthIN(H) DThB(H) 0.0 ... 1.0 step = 0.1

Reduction factor at inrush side H KINR(H) 1.0 ... 3.0 step = 0.1

Thermal time costant side H T(H) min 1 ... 200 step = 1

DthCLP(H) Operating mode DthCLP(H) Mode OFF | ON - Element blocking | ON - Change setting

DthCLP(H) Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

49(H) Second harmonic restraint Dth(H)2ndh-REST OFF | ON

DthAL1(H) Element

DthAL1(H) Enable DthAL1(H) Enable OFF | ON

49(H) First alarm threshold DthAL1(H) DThB(H) 0.3 ... 1.0 step = 0.1

DthAL1(H) Logical block DthAL1(H)BLK1 OFF | ON

DthAL1(H) Input selective block DthAL1(H)BLK2IN OFF | ON

DthAL1(H) Output selective block OFF | ON


Description Parameter Unit Setting range DthAL1(H) Internal selective block DthAL1(H)BLK4 OFF | IN

DthAL1(H) Alarm relays DthAL1(H)-K K1 | K2 | K3 | K4 | K5 | K6 |

DthAL1(H) Alarm LEDs DthAL1(H)-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

DthAL2(H) Element


49(H) Second alarm threshold DthAL2(H) DThB(H) 0.5 ... 1.2 step = 0.1




DthAL2(H) Internal selective block DthAL2(H)BLK4 OFF | IN



Dth(H)> Element

Dth(H)> Enable Dth(H)> Enable OFF | ON

49(H) Trip threshold Dth(H)> DThB(H) 1.100 ... 1.300 step = 0.001

Dth(H)> Logical block Dth(H)>BLK1 OFF | ON

Dth(H)> Input selective block Dth(H)>BLK2IN OFF | ON

Dth(H)> Output selective block Dth(H)>BLK2OUT OFF | ON

Dth(H)> Internal selective block Dth(H)>BLK4 OFF | IN

Dth(H)> Breaker failure Dth(H)>BF OFF | ON

Disabling Dth(H)> by 50-51(H) start Dth(H)>disby50-51(H) OFF | ON

Dth(H)> Trip relays Dth(H)>-K K1 | K2 | K3 | K4 | K5 | K6 |

Dth(H)> Trip LEDs Dth(H)>-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase overcurrente side H - 50/51 side H

I(H)> Element

Setpoints

I(H)> Enable I(H)> Enable OFF | ON

I(H)> Curve type I(H)>Curve

IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | RECTIFIER | I2t | EM | DEFINITE

I(H)CLP> Mode I(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)> Logical block I(H)>BLK1 OFF | ON

I(H)> Input selective block I(H)>BLK2IN OFF | ON

I(H)> Output selective block I(H)>BLK2OUT OFF | ON

I(H)> Internal selective block I(H)>BLK4 OFF | OUT | IN

I(H)> Second harmonic restraint I(H)>2ndh-REST OFF | ON

I(H)> Breaker failure I(H)>BF OFF | ON

I(H)> Start relays I(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)> Trip relays I(H)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)> Start LEDs I(H)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)> Trip LEDs I(H)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H fi rst threshold defi nite time

State OFF | ON


Description Parameter Unit Setting range Pickup value

InH 0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>def within CLP I(H)CLP>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50/51 side H fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(H)>inv within CLP I(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(H)>inv Operating time t(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I(H)>> Element

Setpoints

I(H)>> Enable I(H)>> Enable OFF | ON

I(H)>> Curve type I(H)>>Curve I2t | DEFINITE

I(H)CLP>> Mode I(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>> Logical block I(H)>>BLK1 OFF | ON

I(H)>> Input selective block I(H)>>BLK2IN OFF | ON

I(H)>> Output selective block I(H)>>BLK2OUT OFF | ON

I(H)>> Internal selective block I(H)>>BLK4 OFF | OUT | IN

I(H)>> Second harmonic restraint I(H)>>2ndh-REST OFF | ON

I(H)>> Breaker failure I(H)>>BF OFF | ON

I(H)> Disabling by I(H)>> start I(H)>disbyI(H)>> OFF | ON

I(H)>> Start relays I(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>> Trip relays I(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>> Start LEDs I(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)>> Trip LEDs I(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H second threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>def within CLP I(H)CLP>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Inverse time


Description Parameter Unit Setting range 50/51 side H second threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(H)>>inv within CLP I(H)CLP>>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(H)>>inv Operating time t(H)>>inv s 0.02 ... 10.00 step = 0.01

I(H)>>> Element

Setpoints

I(H)>>> Enable I(H)>>> Enable OFF | ON

I(H)CLP>>> Mode I(H)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>>> Logical block I(H)>>>BLK1 OFF | ON

I(H)>>> Input selective block I(H)>>>BLK2IN OFF | ON

I(H)>>> Output selective block I(H)>>>BLK2OUT OFF | ON

I(H)>>> Internal selective block I(H)>>>BLK4 OFF | OUT | IN

I(H)>>> Second harmonic restraint I(H)>>>2ndh-REST OFF | ON

I(H)>>> Breaker failure I(H)>>>BF OFF | ON

I(H)> Disabling by I(H)>>> start I(H)>disbyI(H)>>> OFF | ON

I(H)>> Disabling by I(H)>>> start OFF | ON

I(H)>>> Start relays I(H)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>>> Trip relays I(H)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>>> Start LEDs I(H)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)>>> Trip LEDs I(H)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H third threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>>def within CLP I(H)CLP>>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Calculated residual overcurrent side H - 50N/51N side H

IE(H)> Element

Setpoints

IE(H)> Enable IE(H)> Enable OFF | ON

IE(H)> Curve type IE(H)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | EM | DEFINITE

IE(H)CLP> Mode IE(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)> Reset time delay


Description Parameter Unit Setting range Value

s 0.00 ... 9.99 step = 0.0110.0 ... 100.0 step = 0.1

IE(H)> Logical block IE(H)>BLK1 OFF | ON

IE(H)> Input selective block IE(H)>BLK2IN OFF | ON

IE(H)> Output selective block IE(H)>BLK2OUT OFF | ON

IE(H)> Internal selective block IE(H)>BLK4 OFF | OUT | IN

IE(H)> Second harmonic restraint IE(H)>2ndh-REST OFF | ON

IE(H)> Breaker failure IE(H)>BF OFF | ON

IE(H)> Start relays IE(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)> Trip relays IE(H)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)> Start LEDs IE(H)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)> Trip LEDs IE(H)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H fi rst threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>def within CLP IE(H)CLP>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50N/51N side H fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

IE(H)>inv within CLP IE(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

IE(H)>inv Operating time tE(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

IE(H)>> Element

Setpoints

IE(H)>> Enable IE(H)>> Enable OFF | ON

IE(H)CLP>> Mode IE(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>> Logical block IE(H)>>BLK1 OFF | ON

IE(H)>> Input selective block IE(H)>>BLK2IN OFF | ON

IE(H)>> Output selective block IE(H)>>BLK2OUT OFF | ON

IE(H)>> Internal selective block IE(H)>>BLK4 OFF | OUT | IN

IE(H)>> Second harmonic restraint IE(H)>>2ndh-REST OFF | ON

IE(H)>> Breaker failure IE(H)>>BF OFF | ON

IE(H)> Disabling by IE(H)>> OFF | ON

IE(H)>> Start relays IE(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |


Description Parameter Unit Setting range IE(H)>> Trip relays IE(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>> Start LEDs IE(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)>> Trip LEDs IE(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H second threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>def within CLP IE(H)CLP>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

IE(H)>>> Element

Setpoints

IE(H)>>> Enable IE(H)>>> Enable OFF | ON

IE(H)CLP>>> Mode IE(H)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>>> Logical block IE(H)>>>BLK1 OFF | ON

IE(H)>>> Input selective block IE(H)>>>BLK2IN OFF | ON

IE(H)>>> Output selective block OFF | ON

IE(H)>>> Internal selective block IE(H)>>>BLK4 OFF | OUT | IN

IE(H)>>> Second harmonic restraint IE(H)>>>2ndh-REST OFF | ON

IE(H)>>> Breaker failure IE(H)>>>BF OFF | ON

IE(H)> Disabling by IE(H)>>> OFF | ON

IE(H)>> Disabling by IE(H)>>> OFF | ON

IE(H)>>> Start relays IE(H)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>>> Trip relays IE(H)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>>> Start LEDs IE(H)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)>>> Trip LEDs IE(H)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H third threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>>def within CLP IE(H)CLP>>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Low impedence restricted ground fault side H - 64REF side H

64REF(H) Enable 64REF(H) Enable OFF | ON

64REF(H) Minimum threshold IREF(H)> IEn1 0.05 ... 2.00 step = 0.01

64REF(H) Intentional delay


Description Parameter Unit Setting range Value s 0.03 ... 60.00 step = 0.01

64REF(H) Logical block 64REF(H)-BLK1 OFF | ON

64REF(H) Output selective block 64REF(H)-BLK2OUT OFF | ON

64REF(H) Internal selectibe block 64REF(H)-BLK4 OFF | OUT

64REF(H) Breaker failure 64REF(H)-BF OFF | ON

64REF(H) Start relays 64REF(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(H) Trip relays 64REF(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(H) Start LEDs 64REF(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

64REF(H) Trip LEDs 64REF(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Trip circuit supervision side H - 74TCS side H

74TCS(H) Enable 74TCS(H) Enable OFF | ON

74TCS(H) Logical block 74TCS(H)-BLK1 OFF | ON

74TCS(H) Start relays 74TCS(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(H) Trip relays 74TCS(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(H) Start LEDs 74TCS(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

74TCS(H) Trip LEDs 74TCS(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Breaker failure - BF side H

BF(H) Enable BF(H) Enable OFF | ON

BF(H) Phase current threshold

State OFF | ON


BF(H) Residual current threshold

State OFF | ON


BF(H) Operating time

Value s 0.06 ... 10.00 step = 0.01

BF(H) Logical block BF(H)-BLK1 OFF | ON

BF(H) Start from circuit breaker CB(H) Input OFF | ON

BF(H) Start relays BF(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(H) Trip relays BF(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(H) Start LEDs BF(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

BF(H) Trip LEDs BF(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Profi le A side L

Undercurrent lato L - 37 side L

I(L)< Element

Setpoints

37(L) Operating logic Logic37(L) OR | AND

I(L)< Logical block I(L)<BLK1 OFF | ON

I(L)< Start relays I(L)<ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)< Trip relays I(L)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)< Start LEDs I(L)<ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)< Trip LEDs I(L)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

37 side L fi rst threshold defi nite time

State OFF | ON

Pickup value InL 0.10 ... 1.00 step = 0.01

I(L)<def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1


Description Parameter Unit Setting range Negative sequence overcurrent side L - 46 side L

I2(L)> Element

Setpoints

I2(L)> Enable I2(L)> Enable OFF | ON

I2(L)> Curve type I2(L)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | I2t | EM | DEFINITE

I2(L)CLP> Mode I2(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I2(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)> Logical block I2(L)>BLK1 OFF | ON

I2(L)> Input selective block I2(L)>BLK2IN OFF | ON

I2(L)> Output selective block I2(L)>BLK2OUT OFF | ON

I2(L)> Internal selective block I2(L)>BLK4 OFF | OUT | IN

I2(L)> Second harmonic restraint I2(L)>2ndh-REST OFF | ON

I2(L)> Breaker failure I2(L)>BF OFF | ON

I2(L)> Start relays I2(L)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)> Trip relays I2(L)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)> Start LEDs I2(L)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(L)> Trip LEDs I2(L)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01

I2(L)>def within CLP I2(L)CLP>def InL 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(L)>def Operating time

Value s

0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

46 side L fi rst threshold inverse time

State OFF | ON


1.00 ... 10.00 step = 0.01

I2(L)>inv within CLP I2(L)CLP>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(L)>inv Operating time t2(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I2(L)>> Element

Setpoints

I2(L)>> Enable I2(L)>> Enable OFF | ON

I2(L)CLP>> Mode I2(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I2(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Description Parameter Unit Setting range I2(L)>> Logical block I2(L)>>BLK1 OFF | ON

I2(L)>> Input selective block I2(L)>>BLK2IN OFF | ON

I2(L)>>BLK2OUT I2(L)>> Output selective block OFF | ON

I2(L)>> Internal selective block I2(L)>>BLK4 OFF | OUT | IN

I2(L)>> Second harmonic restraint I2(L)>>2ndh-REST OFF | ON

I2(L)>> Breaker failure I2(L)>>BF OFF | ON

I2(L)> Disabling by I2(L)>> I2(L)>disbyI2(L)>> OFF | ON

I2(L)>> Start relays I2(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)>> Trip relays I2(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)>> Start LEDs I2(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(L)>> Trip LEDs I2(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

46 side L second threshold defi nite time

State OFF | ON


1.00 ... 40.00 step = 0.01

I2(L)>>def within CLP I2(L)CLP>>def InL 0.100 ... 0.999 step = 0.0011.00 ... 40.00 step = 0.01

I2(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Negative / Positive sequence current ratio side L - I2/I1 side L

I21(L)> Element

Setpoints

I21(L)> Mode I21(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time

I2/I1 side L fi rst threshold defi nite time

State OFF | ON


I21(L)>def within CLP I21(L)CLP>def 0.10 ... 1.00 step = 0.01


Value s 0.04 ... 0.99 step = 0.01

1 ... 15000 step = 1

Thermal image side L - 49 side L

Common confi guration side L

Initial thermal image side L DthIN(L) DThB(L) 0.0 ... 1.0 step = 0.1

Reduction factor at inrush side L KINR(L) 1.0 ... 3.0 step = 0.1

Thermal time costant side L T(L) min 1 ... 200 step = 1

DthCLP(L) Operating mode DthCLP(L) Mode OFF | ON - Element blocking | ON - Change setting


Description Parameter Unit Setting range DthCLP(L) Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

49(L) Second harmonic restraint Dth(L)2ndh-REST OFF | ON

DthAL1(L) Element

DthAL1(L) Enable DthAL1(L) Enable OFF | ON

49(L) First alarm threshold DthAL1(L) DThB(L) 0.3 ... 1.0 step = 0.1

DthAL1(L) Logical block DthAL1(L)BLK1 OFF | ON

DthAL1(L) Input selective block DthAL1(L)BLK2IN OFF | ON

DthAL1(L) Output selective block OFF | ON

DthAL1(L) Internal selective block DthAL1(L)BLK4 OFF | IN

DthAL1(L) Alarm relays DthAL1(L)-K K1 | K2 | K3 | K4 | K5 | K6 |

DthAL1(L) Alarm LEDs DthAL1(L)-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

DthAL1(L) Element


49(L) Second alarm threshold DthAL2(L) DThB(L) 0.5 ... 1.2 step = 0.1







Dth(L) Element

Dth(L)> Enable Dth(L)> Enable OFF | ON

49(L) Trip threshold Dth(L)> DThB(L) 1.100 ... 1.300 step = 0.001

Dth(L)> Logical block Dth(L)>BLK1 OFF | ON

Dth(L)> Input selective block Dth(L)>BLK2IN OFF | ON

Dth(L)> Output selective block Dth(L)>BLK2OUT OFF | ON

Dth(L)> Internal selective block Dth(L)>BLK4 OFF | IN

Dth(L)> Breaker failure Dth(L)>BF OFF | ON

Disabling Dth(L)> by 50-51(L) start Dth(L)>disby50-51(L) OFF | ON

Dth(L)> Trip relays Dth(L)>-K K1 | K2 | K3 | K4 | K5 | K6 |

Dth(L)> Trip LEDs Dth(L)>-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase overcurrente side L - 50/51 side L

I(L)> Element

Setpoints

I(L)> Enable I(L)> Enable OFF | ON

I(L)> Curve type I(L)>Curve


I(L)CLP> Mode I(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)> Logical block I(L)>BLK1 OFF | ON

I(L)> Input selective block I(L)>BLK2IN OFF | ON

I(L)> Output selective block I(L)>BLK2OUT OFF | ON


Description Parameter Unit Setting range I(L)> Internal selective block I(L)>BLK4 OFF | OUT | IN

I(L)> Second harmonic restraint I(L)>2ndh-REST OFF | ON

I(L)> Breaker failure I(L)>BF OFF | ON

I(L)> Start relays I(L)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)> Trip relays I(L)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)> Start LEDs I(L)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)> Trip LEDs I(L)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side L fi rst threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>def within CLP I(L)CLP>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50/51 side L fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(L)>inv within CLP I(L)CLP>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(L)>inv Operating time t(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I(L)>> Element

Setpoints

I(L)>> Enable I(L)>> Enable OFF | ON

I(L)>> Curve type I(L)>>Curve I2t | DEFINITE

I(L)CLP>> Mode I(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>> Logical block I(L)>>BLK1 OFF | ON

I(L)>> Input selective block I(L)>>BLK2IN OFF | ON

I(L)>> Output selective block I(L)>>BLK2OUT OFF | ON

I(L)>> Internal selective block I(L)>>BLK4 OFF | OUT | IN

I(L)>> Second harmonic restraint I(L)>>2ndh-REST OFF | ON

I(L)>> Breaker failure I(L)>>BF OFF | ON

I(L)> Disabling by I(L)>> start I(L)>disbyI(L)>> OFF | ON

I(L)>> Start relays I(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>> Trip relays I(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>> Start LEDs I(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)>> Trip LEDs I(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time


Description Parameter Unit Setting range 50/51 side L second threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>def within CLP I(L)CLP>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Inverse time

50/51 side L second threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(L)>>inv within CLP I(L)CLP>>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(L)>>inv Operating time t(L)>>inv s 0.02 ... 10.00 step = 0.01

I(L)>>> Element

Setpoints

I(L)>>> Enable I(L)>>> Enable OFF | ON

I(L)CLP>>> Mode I(L)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>>> Logical block I(L)>>>BLK1 OFF | ON

I(L)>>> Input selective block I(L)>>>BLK2IN OFF | ON

I(L)>>> Output selective block I(L)>>>BLK2OUT OFF | ON

I(L)>>> Internal selective block I(L)>>>BLK4 OFF | OUT | IN

I(L)>>> Second harmonic restraint I(L)>>>2ndh-REST OFF | ON

I(L)>>> Breaker failure I(L)>>>BF OFF | ON

I(L)> Disabling by I(L)>>> start I(L)>disbyI(L)>>> OFF | ON

I(L)>> Disabling by I(L)>>> start I(L)>>disbyI(L)>>> OFF | ON

I(L)>>> Start relays I(L)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>>> Trip relays I(L)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>>> Start LEDs I(L)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)>>> Trip LEDs I(L)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side L third threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>>def within CLP I(L)CLP>>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Calculated residual overcurrent side L - 50N/51N side L

IE(L)> Element


Description Parameter Unit Setting range Setpoints

IE(L)> Enable IE(L)> Enable OFF | ON

IE(L)> Curve type IE(L)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | EM | DEFINITE

IE(L)CLP> Mode IE(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)> Logical block IE(L)>BLK1 OFF | ON

IE(L)> Input selective block IE(L)>BLK2IN OFF | ON

IE(L)> Output selective block IE(L)>BLK2OUT OFF | ON

IE(L)> Internal selective block IE(L)>BLK4 OFF | OUT | IN

IE(L)> Second harmonic restraint IE(L)>2ndh-REST OFF | ON

IE(L)> Breaker failure IE(L)>BF OFF | ON

IE(L)> Start relays IE(L)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)> Trip relays IE(L)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)> Start LEDs IE(L)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)> Trip LEDs IE(L)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L fi rst threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>def within CLP IE(L)CLP>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50N/51N side L fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

IE(L)>inv within CLP IE(L)CLP>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

IE(L)>inv Operating time tE(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

IE(L)>> Element

Setpoints

IE(L)>> Enable IE(L)>> Enable OFF | ON

IE(L)CLP>> Mode IE(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Description Parameter Unit Setting range IE(L)>> Logical block IE(L)>>BLK1 OFF | ON

IE(L)>> Input selective block IE(L)>>BLK2IN OFF | ON

IE(L)>> Output selective block IE(L)>>BLK2OUT OFF | ON

IE(L)>> Internal selective block IE(L)>>BLK4 OFF | OUT | IN

IE(L)>> Second harmonic restraint IE(L)>>2ndh-REST OFF | ON

IE(L)>> Breaker failure IE(L)>>BF OFF | ON

IE(L)> Disabling by IE(L)>> IE(L)>disbyIE(L)>> OFF | ON

IE(L)>> Start relays IE(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>> Trip relays IE(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>> Start LEDs IE(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)>> Trip LEDs IE(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L second threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>def within CLP IE(L)CLP>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

IE(L)>>> Element

Setpoints

IE(L)>>> Enable IE(L)>>> Enable OFF | ON

IE(L)CLP>>> Mode IE(L)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>>> Logical block IE(L)>>>BLK1 OFF | ON

IE(L)>>> Input selective block IE(L)>>>BLK2IN OFF | ON

IE(L)>>> Output selective block IE(L)>>>BLK2OUT OFF | ON

IE(L)>>> Internal selective block IE(L)>>>BLK4 OFF | OUT | IN

IE(L)>>> Second harmonic restraint IE(L)>>>2ndh-REST OFF | ON

IE(L)>>> Breaker failure IE(L)>>>BF OFF | ON

IE(L)> Disabling by IE(L)>>> OFF | ON

IE(L)>> Disabling by IE(L)>>> OFF | ON

IE(L)>>> Start relays IE(L)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>>> Trip relays IE(L)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>>> Start LEDs IE(L)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)>>> Trip LEDs IE(L)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L third threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1


Description Parameter Unit Setting range IE(L)>>>def within CLP

IE(L)CLP>>>def InL 0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Low impedence restricted ground fault side L - 64REF side L

64REF(L) Enable 64REF(L) Enable OFF | ON

64REF(L) Minimum threshold IREF(L)> IEn2 0.05 ... 2.00 step = 0.01

64REF(L) Intentional delay

Value s 0.03 ... 60.00 step = 0.01

64REF(L) Logical block 64REF(L)-BLK1 OFF | ON

64REF(L) Output selective block 64REF(L)-BLK2OUT OFF | ON

64REF(L) Internal selectibe block 64REF(L)-BLK4 OFF | OUT

64REF(L) Breaker failure 64REF(L)-BF OFF | ON

64REF(L) Start relays 64REF(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(L) Trip relays 64REF(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(L) Start LEDs 64REF(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

64REF(L) Trip LEDs 64REF(L)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Trip circuit supervision side L - 74TCS side L

74TCS(L) Enable 74TCS(L) Enable OFF | ON

74TCS(L) Logical block 74TCS(L)-BLK1 OFF | ON

74TCS(L) Start relays 74TCS(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(L) Trip relays 74TCS(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(L) Start LEDs 74TCS(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

74TCS(L) Trip LEDs 74TCS(L)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Breaker failure - BF side L

BF(L) Enable BF(L) Enable OFF | ON

BF(L) Phase current threshold

State OFF | ON


BF(L) Residual current threshold

State OFF | ON


BF(L) Operating time

Value s 0.06 ... 10.00 step = 0.01

BF(L) Logical block BF(L)-BLK1 OFF | ON

BF(L) Start from circuit breaker CB(L) Input OFF | ON

BF(L) Start relays BF(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(L) Trip relays BF(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(L) Start LEDs BF(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

BF(L) Trip LEDs BF(L)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Profi le B

Profi le B sides H/L

Thermal protection with RTD thermometric probes - 26

PT1 Probe

ThAL1 Alarm




Value s 0 ... 100 step = 1


Description Parameter Unit Setting range ThAL1 Alarm relays ThAL1-K K1 | K2 | K3 | K4 | K5 | K6 |


Th>1 Trip



Th>1 Operating time

Value s 0 ... 100 step = 1




PT2 Probe

ThAL2 Alarm




Value s 0 ... 100 step = 1



Th>2 Trip



Th>2 Operating time

Value s 0 ... 100 step = 1




PT3 Probe

ThAL3 Alarm




Value s 0 ... 100 step = 1



Th>3 Trip



Th>3 Operating time

Value s 0 ... 100 step = 1




PT4 Probe

ThAL4 Alarm




Value s 0 ... 100 step = 1




Description Parameter Unit Setting range Th>4 Trip



Th>4 Operating time

Value s 0 ... 100 step = 1




PT5 Probe

ThAL5 Alarm




Value s 0 ... 100 step = 1



Th>5 Trip



Th>5 Operating time

Value s 0 ... 100 step = 1




PT6 Probe

ThAL6 Alarm




Value s 0 ... 100 step = 1



Th>6 Trip



Th>6 Operating time

Value s 0 ... 100 step = 1




PT7 Probe

ThAL7 Alarm




Value s 0 ... 100 step = 1



Th>7 Trip



Description Parameter Unit Setting range 26 PT7 Trip threshold Th>7 ̂ C 0 ... 200 step = 1

Th>7 Operating time

Value s 0 ... 100 step = 1




PT8 Probe

ThAL8 Alarm




Value s 0 ... 100 step = 1



Th>8 Trip



Th>8 Operating time

Value s 0 ... 100 step = 1




Diagnostic

PT100 probe diagnostic relays PT100Diag-K K1 | K2 | K3 | K4 | K5 | K6 |

PT100 probe diagnostic LEDs PT100Diag-L START | TRIP | L1 | L2 | L3 | L4 | L5 |


IE1> Element

Setpoints





Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time



Description Parameter Unit Setting range State OFF | ON


1.00 ... 10.00 step = 0.01



Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time


State OFF | ON


1.00 ... 2.00 step = 0.01



IE1>> Element

Setpoints




Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


IE1>> Input selective block IE1>>BLK2IN OFF | ON










Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01

IE1>>> Element

Setpoints




Description Parameter Unit Setting range IE1CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1













Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01


IE2> Element

Setpoints





Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time


Description Parameter Unit Setting range 50N.2/51N.2-87NHIZ.2 fi rst threshold defi nite time

State OFF | ON


1.00 ... 10.00 step = 0.01



Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time


State OFF | ON


1.00 ... 2.00 step = 0.01



IE2>> Element

Setpoints




Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


IE2>> Input selective block IE2>>BLK2IN OFF | ON










Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01

IE2>>> Element

Setpoints



Description Parameter Unit Setting range IE2CLP>>> Mode IE2CLP>>> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1













Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01



Value s 0.03 ... 10.00 step = 0.01

Differential - 87T

Common confi guration

87T Enable 87T Enable OFF | ON

87T Logical block 87T-BLK1 OFF | ON

87T Output selective block 87T-BLK2OUT OFF | ON

87T Internal selective block 87T-BLK4 OFF | OUT



Harmonic restraint

87T Second harmonic restraint threshold 2nd-REST> %Id 10 ... 80 step = 1

87T Fifth harmonic restraint threshold 5th-REST> %Id 10 ... 80 step = 1

87T Harmonic restraint intentional reset time delay tHREST-RES s 0.00 ... 10.00 step = 0.01

87T cross-phase harmonic restraint enable CROSS H-REST OFF | ON

2nd-REST Start relays ST2nd-REST-K K1 | K2 | K3 | K4 | K5 | K6 |

5th-REST Start relays ST5th-REST-K K1 | K2 | K3 | K4 | K5 | K6 |

2nd-REST Start LEDs ST2nd-REST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

5th-REST Start LEDs ST5th-REST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CT saturation detector

87T Saturation detector enable SatDet OFF | ON

87T Saturation detector intentional reset time delay tSatDet-RES s 0.00 ... 0.50 step = 0.01

SatDet Start relays STSatDet-K K1 | K2 | K3 | K4 | K5 | K6 |

SatDet Start LEDs STSatDet-L START | TRIP | L1 | L2 | L3 | L4 | L5 |


Description Parameter Unit Setting range Id> Element

Setpoints

Id> Start relays Id>-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

Id> Trip relays Id>-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

Id> Start LEDs Id>-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Id> Trip LEDs Id>-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

87T First threshold Id> Inref 0.05 ... 2.00 step = 0.01

87T First stretch slope percentage K1 % 10 ... 50 step = 1

87T Second stretch slope percentage K2 % 25 ... 100 step = 1

87T Second stretch intersection with verical axis Q Inref 0.00 ... 3.00 step = 0.01

Id>> Element

Setpoints

Id>> Start relays Id>>-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

Id>> Trip relays Id>>-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

Id>> Start LEDs Id>>-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Id>> Trip LEDs Id>>-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

87T Second threshold Id>> Inref 0.50 ... 30.00 step = 0.01

Selective block - BLOCK2

Selective block IN

BLIN1 Selective block operating mode ModeBLIN1 OFF | ON IPh/IE | ON IPh | ON IE

BLIN maximum activation time for phase protections

Value s 0.10 ... 10.00 step = 0.01

BLIN maximum activation time for ground protections

Value s 0.10 ... 10.00 step = 0.01

tB-Iph/IE Elapsed signalling relays tB-K K1 | K2 | K3 | K4 | K5 | K6 |

tB-Iph/IE Elapsed signalling LEDs tB-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Selective block OUT

BLOUT1 Selective block operating mode ModeBLOUT1 OFF | ON IPh/IE | ON IPh | ON IE

BLOUT Dropout time for phase protections

Value s 0.00 ... 1.00 step = 0.01

BLOUT Dropout time for ground protections

Value s 0.00 ... 1.00 step = 0.01

BLOUT Dropout time for ground and phase protections

Value s 0.00 ... 1.00 step = 0.01

Phase protections output selective block relays BLK2OUT-Iph-K K1 | K2 | K3 | K4 | K5 | K6 |

Ground protections output selective block relays BLK2OUT-IE-K K1 | K2 | K3 | K4 | K5 | K6 |

Phase and ground protections output selective block relays

BLK2OUT-Iph/IE-K

K1 | K2 | K3 | K4 | K5 | K6 |

Phase protections output selective block LEDs BLK2OUT-Iph-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Ground protections output selective block LEDs BLK2OUT-IE-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase and ground protections output selective block LEDs BLK2OUT-Iph/IE-L

START | TRIP | L1 | L2 | L3 | L4 | L5 |

Internal selective block - BLOCK4

Output internal selective block dropout time for phase protections

Value s 0.00 ... 10.00 step = 0.01

Output internal selective block dropout time for ground protections

Value s 0.00 ... 10.00 step = 0.01

Profi le B side H


Description Parameter Unit Setting range Undercurrent lato H - 37 side H

I(H)< Element

Setpoints

37(H) Operating logic Logic37(H) OR | AND

I(H)< Logical block I(H)<BLK1 OFF | ON

I(H)< Start relays I(H)<ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)< Trip relays I(H)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)< Start LEDs I(H)<ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)< Trip LEDs I(H)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time


State OFF | ON


I(H)<def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Negative sequence overcurrent side H - 46 side H

I2(H)> Element

Setpoints

I2(H)> Enable I2(H)> Enable OFF | ON

I2(H)> Curve type I2(H)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | I2t | EM | DEFINITE

I2(H)CLP> Mode I2(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time


State OFF | ON


1.00 ... 10.00 step = 0.01

I2(H)>def within CLP I2(H)CLP>def InH 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01


Value s

0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time


Description Parameter Unit Setting range 46 side H fi rst threshold inverse time

State OFF | ON


1.00 ... 10.00 step = 0.01

I2(H)>inv within CLP I2(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(H)>inv Operating time t2(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I2(H)>> Element

Setpoints

I2(H)>> Enable I2(H)>> Enable OFF | ON

I2(H)CLP>> Mode I2(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I2(H)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(H)>> Logical block I2(H)>>BLK1 OFF | ON

I2(H)>> Input selective block I2(H)>>BLK2IN OFF | ON

I2(H)>>BLK2OUT I2(H)>> Output selective block OFF | ON

I2(H)>> Internal selective block I2(H)>>BLK4 OFF | OUT | IN

I2(H)>> Second harmonic restraint I2(H)>>2ndh-REST OFF | ON

I2(H)>> Breaker failure I2(H)>>BF OFF | ON

I2(H)> Disabling by I2(H)>> OFF | ON

I2(H)>> Start relays I2(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)>> Trip relays I2(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(H)>> Start LEDs I2(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(H)>> Trip LEDs I2(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

46 side H second threshold defi nite time

State OFF | ON


1.00 ... 40.00 step = 0.01

I2(H)>>def within CLP I2(H)CLP>>def InH 0.100 ... 0.999 step = 0.0011.00 ... 40.00 step = 0.01

I2(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Negative / Positive sequence current ratio side H - I2/I1 side H

I21(H)> Element

Setpoints

I21(H)> Mode I21(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1








Description Parameter Unit Setting range I21(H)> Start relays I21(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |




Defi nite time

I2/I1 side H fi rst threshold defi nite time

State OFF | ON


I21(H)>def within CLP I21(H)CLP>def 0.10 ... 1.00 step = 0.01


Value s 0.04 ... 0.99 step = 0.01

1 ... 15000 step = 1

Thermal image side H - 49 side H

Common confi guration side H

Initial thermal image side H DthIN(H) DThB(H) 0.0 ... 1.0 step = 0.1

Reduction factor at inrush side H KINR(H) 1.0 ... 3.0 step = 0.1

Thermal time costant side H T(H) min 1 ... 200 step = 1

DthCLP(H) Operating mode DthCLP(H) Mode OFF | ON - Element blocking | ON - Change setting

DthCLP(H) Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

49(H) Second harmonic restraint Dth(H)2ndh-REST OFF | ON

DthAL1(H) Element


49(H) First alarm threshold DthAL1(H) DThB(H) 0.3 ... 1.0 step = 0.1







DthAL2(H) Element


49(H) Second alarm threshold DthAL2(H) DThB(H) 0.5 ... 1.2 step = 0.1







Dth(H)> Element

Dth(H)> Enable Dth(H)> Enable OFF | ON

49(H) Trip threshold Dth(H)> DThB(H) 1.100 ... 1.300 step = 0.001

Dth(H)> Logical block Dth(H)>BLK1 OFF | ON

Dth(H)> Input selective block Dth(H)>BLK2IN OFF | ON

Dth(H)> Output selective block Dth(H)>BLK2OUT OFF | ON

Dth(H)> Internal selective block Dth(H)>BLK4 OFF | IN

Dth(H)> Breaker failure Dth(H)>BF OFF | ON

Disabling Dth(H)> by 50-51(H) start Dth(H)>disby50-51(H) OFF | ON

Dth(H)> Trip relays Dth(H)>-K K1 | K2 | K3 | K4 | K5 | K6 |


Description Parameter Unit Setting range Dth(H)> Trip LEDs Dth(H)>-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase overcurrente side H - 50/51 side H

I(H)> Element

Setpoints

I(H)> Enable I(H)> Enable OFF | ON

I(H)> Curve type I(H)>Curve


I(H)CLP> Mode I(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)> Logical block I(H)>BLK1 OFF | ON

I(H)> Input selective block I(H)>BLK2IN OFF | ON

I(H)> Output selective block I(H)>BLK2OUT OFF | ON

I(H)> Internal selective block I(H)>BLK4 OFF | OUT | IN

I(H)> Second harmonic restraint I(H)>2ndh-REST OFF | ON

I(H)> Breaker failure I(H)>BF OFF | ON

I(H)> Start relays I(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)> Trip relays I(H)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)> Start LEDs I(H)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)> Trip LEDs I(H)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H fi rst threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>def within CLP I(H)CLP>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50/51 side H fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(H)>inv within CLP I(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(H)>inv Operating time t(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I(H)>> Element

Setpoints

I(H)>> Enable I(H)>> Enable OFF | ON

I(H)>> Curve type I(H)>>Curve I2t | DEFINITE

I(H)CLP>> Mode I(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP>> Activation time



s 0.00 ... 9.99 step = 0.0110.0 ... 100.0 step = 0.1

I(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>> Logical block I(H)>>BLK1 OFF | ON

I(H)>> Input selective block I(H)>>BLK2IN OFF | ON

I(H)>> Output selective block I(H)>>BLK2OUT OFF | ON

I(H)>> Internal selective block I(H)>>BLK4 OFF | OUT | IN

I(H)>> Second harmonic restraint I(H)>>2ndh-REST OFF | ON

I(H)>> Breaker failure I(H)>>BF OFF | ON

I(H)> Disabling by I(H)>> start I(H)>disbyI(H)>> OFF | ON

I(H)>> Start relays I(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>> Trip relays I(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>> Start LEDs I(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)>> Trip LEDs I(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H second threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>def within CLP I(H)CLP>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Inverse time

50/51 side H second threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(H)>>inv within CLP I(H)CLP>>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(H)>>inv Operating time t(H)>>inv s 0.02 ... 10.00 step = 0.01

I(H)>>> Element

Setpoints

I(H)>>> Enable I(H)>>> Enable OFF | ON

I(H)CLP>>> Mode I(H)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

I(H)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(H)>>> Logical block I(H)>>>BLK1 OFF | ON

I(H)>>> Input selective block I(H)>>>BLK2IN OFF | ON

I(H)>>> Output selective block I(H)>>>BLK2OUT OFF | ON

I(H)>>> Internal selective block I(H)>>>BLK4 OFF | OUT | IN

I(H)>>> Second harmonic restraint I(H)>>>2ndh-REST OFF | ON

I(H)>>> Breaker failure I(H)>>>BF OFF | ON

I(H)> Disabling by I(H)>>> start I(H)>disbyI(H)>>> OFF | ON


Description Parameter Unit Setting range I(H)>> Disabling by I(H)>>> start OFF | ON

I(H)>>> Start relays I(H)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>>> Trip relays I(H)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(H)>>> Start LEDs I(H)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(H)>>> Trip LEDs I(H)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side H third threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>>def within CLP I(H)CLP>>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(H)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Calculated residual overcurrent side H - 50N/51N side H

IE(H)> Element

Setpoints

IE(H)> Enable IE(H)> Enable OFF | ON

IE(H)> Curve type IE(H)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | EM | DEFINITE

IE(H)CLP> Mode IE(H)CLP> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)> Logical block IE(H)>BLK1 OFF | ON

IE(H)> Input selective block IE(H)>BLK2IN OFF | ON

IE(H)> Output selective block IE(H)>BLK2OUT OFF | ON

IE(H)> Internal selective block IE(H)>BLK4 OFF | OUT | IN

IE(H)> Second harmonic restraint IE(H)>2ndh-REST OFF | ON

IE(H)> Breaker failure IE(H)>BF OFF | ON

IE(H)> Start relays IE(H)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)> Trip relays IE(H)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)> Start LEDs IE(H)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)> Trip LEDs IE(H)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H fi rst threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>def within CLP IE(H)CLP>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time


Description Parameter Unit Setting range 50N/51N side H fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

IE(H)>inv within CLP IE(H)CLP>inv InH 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

IE(H)>inv Operating time tE(H)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

IE(H)>> Element

Setpoints

IE(H)>> Enable IE(H)>> Enable OFF | ON

IE(H)CLP>> Mode IE(H)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>> Logical block IE(H)>>BLK1 OFF | ON

IE(H)>> Input selective block IE(H)>>BLK2IN OFF | ON

IE(H)>> Output selective block IE(H)>>BLK2OUT OFF | ON

IE(H)>> Internal selective block IE(H)>>BLK4 OFF | OUT | IN

IE(H)>> Second harmonic restraint IE(H)>>2ndh-REST OFF | ON

IE(H)>> Breaker failure IE(H)>>BF OFF | ON

IE(H)> Disabling by IE(H)>> OFF | ON

IE(H)>> Start relays IE(H)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>> Trip relays IE(H)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>> Start LEDs IE(H)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)>> Trip LEDs IE(H)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H second threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>def within CLP IE(H)CLP>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

IE(H)>>> Element

Setpoints

IE(H)>>> Enable IE(H)>>> Enable OFF | ON

IE(H)CLP>>> Mode IE(H)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

IE(H)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(H)>>> Logical block IE(H)>>>BLK1 OFF | ON


Description Parameter Unit Setting range IE(H)>>> Input selective block IE(H)>>>BLK2IN OFF | ON

IE(H)>>> Output selective block OFF | ON

IE(H)>>> Internal selective block IE(H)>>>BLK4 OFF | OUT | IN

IE(H)>>> Second harmonic restraint IE(H)>>>2ndh-REST OFF | ON

IE(H)>>> Breaker failure IE(H)>>>BF OFF | ON

IE(H)> Disabling by IE(H)>>> OFF | ON

IE(H)>> Disabling by IE(H)>>> OFF | ON

IE(H)>>> Start relays IE(H)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>>> Trip relays IE(H)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(H)>>> Start LEDs IE(H)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(H)>>> Trip LEDs IE(H)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side H third threshold defi nite time

State OFF | ON

Pickup value InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>>def within CLP IE(H)CLP>>>def InH

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(H)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Low impedence restricted ground fault side H - 64REF side H

64REF(H) Enable 64REF(H) Enable OFF | ON

64REF(H) Minimum threshold IREF(H)> IEn1 0.05 ... 2.00 step = 0.01

64REF(H) Intentional delay

Value s 0.03 ... 60.00 step = 0.01

64REF(H) Logical block 64REF(H)-BLK1 OFF | ON

64REF(H) Output selective block 64REF(H)-BLK2OUT OFF | ON

64REF(H) Internal selectibe block 64REF(H)-BLK4 OFF | OUT

64REF(H) Breaker failure 64REF(H)-BF OFF | ON

64REF(H) Start relays 64REF(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(H) Trip relays 64REF(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(H) Start LEDs 64REF(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

64REF(H) Trip LEDs 64REF(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Trip circuit supervision side H - 74TCS side H

74TCS(H) Enable 74TCS(H) Enable OFF | ON

74TCS(H) Logical block 74TCS(H)-BLK1 OFF | ON

74TCS(H) Start relays 74TCS(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(H) Trip relays 74TCS(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(H) Start LEDs 74TCS(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

74TCS(H) Trip LEDs 74TCS(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Breaker failure - BF side H

BF(H) Enable BF(H) Enable OFF | ON

BF(H) Phase current threshold

State OFF | ON


BF(H) Residual current threshold

State OFF | ON



Description Parameter Unit Setting range BF(H) Operating time

Value s 0.06 ... 10.00 step = 0.01

BF(H) Logical block BF(H)-BLK1 OFF | ON

BF(H) Start from circuit breaker CB(H) Input OFF | ON

BF(H) Start relays BF(H)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(H) Trip relays BF(H)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(H) Start LEDs BF(H)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

BF(H) Trip LEDs BF(H)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Profi le B side L

Undercurrent lato L - 37 side L

I(L)< Element

Setpoints

37(L) Operating logic Logic37(L) OR | AND

I(L)< Logical block I(L)<BLK1 OFF | ON

I(L)< Start relays I(L)<ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)< Trip relays I(L)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)< Start LEDs I(L)<ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)< Trip LEDs I(L)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time


State OFF | ON


I(L)<def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Negative sequence overcurrent side L - 46 side L

I2(L)> Element

Setpoints

I2(L)> Enable I2(L)> Enable OFF | ON

I2(L)> Curve type I2(L)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | I2t | EM | DEFINITE

I2(L)CLP> Mode I2(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time



Description Parameter Unit Setting range State OFF | ON


1.00 ... 10.00 step = 0.01

I2(L)>def within CLP I2(L)CLP>def InL 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01


Value s

0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

46 side L fi rst threshold inverse time

State OFF | ON


1.00 ... 10.00 step = 0.01

I2(L)>inv within CLP I2(L)CLP>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 10.00 step = 0.01

I2(L)>inv Operating time t2(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I2(L)>> Element

Setpoints

I2(L)>> Enable I2(L)>> Enable OFF | ON

I2(L)CLP>> Mode I2(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I2(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I2(L)>> Logical block I2(L)>>BLK1 OFF | ON

I2(L)>> Input selective block I2(L)>>BLK2IN OFF | ON

I2(L)>>BLK2OUT I2(L)>> Output selective block OFF | ON

I2(L)>> Internal selective block I2(L)>>BLK4 OFF | OUT | IN

I2(L)>> Second harmonic restraint I2(L)>>2ndh-REST OFF | ON

I2(L)>> Breaker failure I2(L)>>BF OFF | ON

I2(L)> Disabling by I2(L)>> I2(L)>disbyI2(L)>> OFF | ON

I2(L)>> Start relays I2(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)>> Trip relays I2(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I2(L)>> Start LEDs I2(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I2(L)>> Trip LEDs I2(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

46 side L second threshold defi nite time

State OFF | ON


1.00 ... 40.00 step = 0.01

I2(L)>>def within CLP I2(L)CLP>>def InL 0.100 ... 0.999 step = 0.0011.00 ... 40.00 step = 0.01

I2(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Negative / Positive sequence current ratio side L - I2/I1 side L

I21(L)> Element

Setpoints

I21(L)> Mode I21(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting


Description Parameter Unit Setting range I21(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1











Defi nite time

I2/I1 side L fi rst threshold defi nite time

State OFF | ON


I21(L)>def within CLP I21(L)CLP>def 0.10 ... 1.00 step = 0.01


Value s 0.04 ... 0.99 step = 0.01

1 ... 15000 step = 1

Thermal image side L - 49 side L

Common confi guration side L

Initial thermal image side L DthIN(L) DThB(L) 0.0 ... 1.0 step = 0.1

Reduction factor at inrush side L KINR(L) 1.0 ... 3.0 step = 0.1

Thermal time costant side L T(L) min 1 ... 200 step = 1

DthCLP(L) Operating mode DthCLP(L) Mode OFF | ON - Element blocking | ON - Change setting

DthCLP(L) Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

49(L) Second harmonic restraint Dth(L)2ndh-REST OFF | ON

DthAL1(L) Element


49(L) First alarm threshold DthAL1(L) DThB(L) 0.3 ... 1.0 step = 0.1







DthAL1(L) Element


49(L) Second alarm threshold DthAL2(L) DThB(L) 0.5 ... 1.2 step = 0.1







Dth(L) Element


Description Parameter Unit Setting range Dth(L)> Enable Dth(L)> Enable OFF | ON

49(L) Trip threshold Dth(L)> DThB(L) 1.100 ... 1.300 step = 0.001

Dth(L)> Logical block Dth(L)>BLK1 OFF | ON

Dth(L)> Input selective block Dth(L)>BLK2IN OFF | ON

Dth(L)> Output selective block Dth(L)>BLK2OUT OFF | ON

Dth(L)> Internal selective block Dth(L)>BLK4 OFF | IN

Dth(L)> Breaker failure Dth(L)>BF OFF | ON

Disabling Dth(L)> by 50-51(L) start Dth(L)>disby50-51(L) OFF | ON

Dth(L)> Trip relays Dth(L)>-K K1 | K2 | K3 | K4 | K5 | K6 |

Dth(L)> Trip LEDs Dth(L)>-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Phase overcurrente side L - 50/51 side L

I(L)> Element

Setpoints

I(L)> Enable I(L)> Enable OFF | ON

I(L)> Curve type I(L)>Curve


I(L)CLP> Mode I(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)> Logical block I(L)>BLK1 OFF | ON

I(L)> Input selective block I(L)>BLK2IN OFF | ON

I(L)> Output selective block I(L)>BLK2OUT OFF | ON

I(L)> Internal selective block I(L)>BLK4 OFF | OUT | IN

I(L)> Second harmonic restraint I(L)>2ndh-REST OFF | ON

I(L)> Breaker failure I(L)>BF OFF | ON

I(L)> Start relays I(L)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)> Trip relays I(L)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)> Start LEDs I(L)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)> Trip LEDs I(L)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side L fi rst threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>def within CLP I(L)CLP>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50/51 side L fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01


Description Parameter Unit Setting range I(L)>inv within CLP I(L)CLP>inv InL 0.100 ... 0.999 step = 0.001

1.00 ... 20.00 step = 0.01

I(L)>inv Operating time t(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

I(L)>> Element

Setpoints

I(L)>> Enable I(L)>> Enable OFF | ON

I(L)>> Curve type I(L)>>Curve I2t | DEFINITE

I(L)CLP>> Mode I(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>> Logical block I(L)>>BLK1 OFF | ON

I(L)>> Input selective block I(L)>>BLK2IN OFF | ON

I(L)>> Output selective block I(L)>>BLK2OUT OFF | ON

I(L)>> Internal selective block I(L)>>BLK4 OFF | OUT | IN

I(L)>> Second harmonic restraint I(L)>>2ndh-REST OFF | ON

I(L)>> Breaker failure I(L)>>BF OFF | ON

I(L)> Disabling by I(L)>> start I(L)>disbyI(L)>> OFF | ON

I(L)>> Start relays I(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>> Trip relays I(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>> Start LEDs I(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)>> Trip LEDs I(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side L second threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>def within CLP I(L)CLP>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Inverse time

50/51 side L second threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

I(L)>>inv within CLP I(L)CLP>>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

I(L)>>inv Operating time t(L)>>inv s 0.02 ... 10.00 step = 0.01

I(L)>>> Element

Setpoints

I(L)>>> Enable I(L)>>> Enable OFF | ON

I(L)CLP>>> Mode I(L)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

I(L)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1


Description Parameter Unit Setting range I(L)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

I(L)>>> Logical block I(L)>>>BLK1 OFF | ON

I(L)>>> Input selective block I(L)>>>BLK2IN OFF | ON

I(L)>>> Output selective block I(L)>>>BLK2OUT OFF | ON

I(L)>>> Internal selective block I(L)>>>BLK4 OFF | OUT | IN

I(L)>>> Second harmonic restraint I(L)>>>2ndh-REST OFF | ON

I(L)>>> Breaker failure I(L)>>>BF OFF | ON

I(L)> Disabling by I(L)>>> start I(L)>disbyI(L)>>> OFF | ON

I(L)>> Disabling by I(L)>>> start I(L)>>disbyI(L)>>> OFF | ON

I(L)>>> Start relays I(L)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>>> Trip relays I(L)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

I(L)>>> Start LEDs I(L)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

I(L)>>> Trip LEDs I(L)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50/51 side L third threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>>def within CLP I(L)CLP>>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

I(L)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Calculated residual overcurrent side L - 50N/51N side L

IE(L)> Element

Setpoints

IE(L)> Enable IE(L)> Enable OFF | ON

IE(L)> Curve type IE(L)>Curve IEC/BS A | IEC/BS B | IEC/BS C | ANSI/IEEE MI | ANSI/IEEE VI | ANSI/IEEE EI | EM | DEFINITE

IE(L)CLP> Mode IE(L)CLP> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)> Logical block IE(L)>BLK1 OFF | ON

IE(L)> Input selective block IE(L)>BLK2IN OFF | ON

IE(L)> Output selective block IE(L)>BLK2OUT OFF | ON

IE(L)> Internal selective block IE(L)>BLK4 OFF | OUT | IN

IE(L)> Second harmonic restraint IE(L)>2ndh-REST OFF | ON

IE(L)> Breaker failure IE(L)>BF OFF | ON

IE(L)> Start relays IE(L)>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)> Trip relays IE(L)>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)> Start LEDs IE(L)>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)> Trip LEDs IE(L)>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L fi rst threshold defi nite time

State OFF | ON


Description Parameter Unit Setting range Pickup value

InL 0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>def within CLP IE(L)CLP>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>def Operating time

Value s

0.04 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

Inverse time

50N/51N side L fi rst threshold inverse time

State OFF | ON


1.00 ... 20.00 step = 0.01

IE(L)>inv within CLP IE(L)CLP>inv InL 0.100 ... 0.999 step = 0.0011.00 ... 20.00 step = 0.01

IE(L)>inv Operating time tE(L)>inv s 0.02 ... 9.99 step = 0.0110.0 ... 60.0 step = 0.1

IE(L)>> Element

Setpoints

IE(L)>> Enable IE(L)>> Enable OFF | ON

IE(L)CLP>> Mode IE(L)CLP>> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>> Logical block IE(L)>>BLK1 OFF | ON

IE(L)>> Input selective block IE(L)>>BLK2IN OFF | ON

IE(L)>> Output selective block IE(L)>>BLK2OUT OFF | ON

IE(L)>> Internal selective block IE(L)>>BLK4 OFF | OUT | IN

IE(L)>> Second harmonic restraint IE(L)>>2ndh-REST OFF | ON

IE(L)>> Breaker failure IE(L)>>BF OFF | ON

IE(L)> Disabling by IE(L)>> IE(L)>disbyIE(L)>> OFF | ON

IE(L)>> Start relays IE(L)>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>> Trip relays IE(L)>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>> Start LEDs IE(L)>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)>> Trip LEDs IE(L)>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L second threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>def within CLP IE(L)CLP>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

IE(L)>>> Element

Setpoints


Description Parameter Unit Setting range IE(L)>>> Enable IE(L)>>> Enable OFF | ON

IE(L)CLP>>> Mode IE(L)CLP>>> Mode OFF | ON - Element blocking | ON - Change setting

IE(L)CLP>>> Activation time

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>>> Reset time delay

Value s 0.00 ... 9.99 step = 0.01

10.0 ... 100.0 step = 0.1

IE(L)>>> Logical block IE(L)>>>BLK1 OFF | ON

IE(L)>>> Input selective block IE(L)>>>BLK2IN OFF | ON

IE(L)>>> Output selective block IE(L)>>>BLK2OUT OFF | ON

IE(L)>>> Internal selective block IE(L)>>>BLK4 OFF | OUT | IN

IE(L)>>> Second harmonic restraint IE(L)>>>2ndh-REST OFF | ON

IE(L)>>> Breaker failure IE(L)>>>BF OFF | ON

IE(L)> Disabling by IE(L)>>> OFF | ON

IE(L)>> Disabling by IE(L)>>> OFF | ON

IE(L)>>> Start relays IE(L)>>>ST-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>>> Trip relays IE(L)>>>TR-K K1 | K2 | K3 | K4 | K5 | K6 |

IE(L)>>> Start LEDs IE(L)>>>ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

IE(L)>>> Trip LEDs IE(L)>>>TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Defi nite time

50N/51N side L third threshold defi nite time

State OFF | ON

Pickup value InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>>def within CLP IE(L)CLP>>>def InL

0.100 ... 0.999 step = 0.0011.00 ... 9.99 step = 0.0110.0 ... 40.0 step = 0.1

IE(L)>>>def Operating time

Value s 0.03 ... 10.00 step = 0.01

Low impedence restricted ground fault side L - 64REF side L

64REF(L) Enable 64REF(L) Enable OFF | ON

64REF(L) Minimum threshold IREF(L)> IEn2 0.05 ... 2.00 step = 0.01

64REF(L) Intentional delay

Value s 0.03 ... 60.00 step = 0.01

64REF(L) Logical block 64REF(L)-BLK1 OFF | ON

64REF(L) Output selective block 64REF(L)-BLK2OUT OFF | ON

64REF(L) Internal selectibe block 64REF(L)-BLK4 OFF | OUT

64REF(L) Breaker failure 64REF(L)-BF OFF | ON

64REF(L) Start relays 64REF(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(L) Trip relays 64REF(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

64REF(L) Start LEDs 64REF(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

64REF(L) Trip LEDs 64REF(L)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Trip circuit supervision side L - 74TCS side L

74TCS(L) Enable 74TCS(L) Enable OFF | ON

74TCS(L) Logical block 74TCS(L)-BLK1 OFF | ON

74TCS(L) Start relays 74TCS(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

74TCS(L) Trip relays 74TCS(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |


Description Parameter Unit Setting range 74TCS(L) Start LEDs 74TCS(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

74TCS(L) Trip LEDs 74TCS(L)-TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Breaker failure - BF side L

BF(L) Enable BF(L) Enable OFF | ON

BF(L) Phase current threshold

State OFF | ON


BF(L) Residual current threshold

State OFF | ON


BF(L) Operating time

Value s 0.06 ... 10.00 step = 0.01

BF(L) Logical block BF(L)-BLK1 OFF | ON

BF(L) Start from circuit breaker CB(L) Input OFF | ON

BF(L) Start relays BF(L)-ST-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(L) Trip relays BF(L)-TR-K K1 | K2 | K3 | K4 | K5 | K6 |

BF(L) Start LEDs BF(L)-ST-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

PLC

Setpoints

Enable PLC Enable OFF | ON

Relays PLC-K K1 | K2 | K3 | K4 | K5 | K6 |

LEDs PLC-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Switches

Switch 1 0 | 1

Switch 2 0 | 1

Switch 3 0 | 1

Switch 4 0 | 1

Switch 5 0 | 1

Switch 6 0 | 1

Switch 7 0 | 1

Switch 8 0 | 1

Switch 9 0 | 1

Switch 10 0 | 1

Switch 11 0 | 1

Switch 12 0 | 1

Switch 13 0 | 1 | 2

Switch 14 0 | 1 | 2

Switch 15 0 | 1 | 2

Switch 16 0 | 1 | 2

Switch 17 0 | 1 | 2

Switch 18 0 | 1 | 2

Switch 19 0 | 1 | 2

Switch 20 0 | 1 | 2

Switch 21 0 | 1 | 2 | 3

Switch 22 0 | 1 | 2 | 3

Switch 23 0 | 1 | 2 | 3

Switch 24 0 | 1 | 2 | 3

Switch 25 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9

Switch 26 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9

Switch 27 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9


Description Parameter Unit Setting range Switch 28 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9

Switch 29

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99

Switch 30

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99

Switch 31

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99

Switch 32

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99

Timers

Timer 1 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 2 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 3 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 4 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 5 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 6 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 7 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 8 s 0.00 ... 0.99 step = 0.01

1.0 ... 60.0 step = 0.1

Timer 9 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 10 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10


Description Parameter Unit Setting range Timer 11

s 0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 12 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 13 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 14 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 15 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 16 s

0.0 ... 59.9 step = 0.160 ... 299 step = 1300 ... 3600 step = 10

Timer 17 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 18 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 19 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 20 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 21 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 22 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 23 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Timer 24 s

0 ... 59 step = 160 ... 3540 step = 603600 ... 86400 step = 600

Circuit Breaker supervision

LEDs-relays allocation side H

Open CBH command relays CBHopen-K K1 | K2 | K3 | K4 | K5 | K6 |

Close CBH command relays CBHclose-K K1 | K2 | K3 | K4 | K5 | K6 |

CBH Closed LEDs CBHclose-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBH Open LEDs CBHopen-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBH State diagnostic relays CBHdiag-K K1 | K2 | K3 | K4 | K5 | K6 |

CB Diagnostic side H

Number of CBH trips mode CBH ModeN.Open OFF | ON

Number of CBH trips threshold CBH N.Open 0 ... 10000 step = 1

Cumulative CBH tripping currents mode CBH ModeSumI OFF | ON

Cumulative CBH tripping currents threshold CBH SumI InH 0 ... 5000 step = 1

Cumulative CBH tripping I^2t mode CBH ModeSumI^2t OFF | ON

CBH opening time for I^2t calculation CBH tbreak s 0.05 ... 1.00 step = 0.01


Description Parameter Unit Setting range Cumulative CBH tripping I^2t threshold CBH SumI^2t InH^2s 0 ... 5000 step = 1

CBH operating time mode CBH Mode-tOpen OFF | ON

Trigger relay for CBH opening time trigger measurement CBH Ktrig-break K1 | K2 | K3 | K4 | K5 | K6 |

CBH maximum allowed opening time

Value s 0.05 ... 1.00 step = 0.01

Number of CBH trips diagnostic relays CBH N.Open-K K1 | K2 | K3 | K4 | K5 | K6 |

Cumulative CBH tripping currents diagnostic relays CBH SumI-K K1 | K2 | K3 | K4 | K5 | K6 |

Cumulative CBH tripping I^2t diagnostic relays CBH SumI^2t-K K1 | K2 | K3 | K4 | K5 | K6 |

CBH opening time diagnostic relays CBH tbreak-K K1 | K2 | K3 | K4 | K5 | K6 |

Number of CBH trips diagnostic LEDs CBH N.Open-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Cumulative CBH tripping currents diagnostic LEDs CBH SumI-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Cumulative CBH tripping I^2t diagnostic LEDs CBH SumI^2t-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBH opening time diagnostic LEDs CBH tbreak-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

LEDs-relays allocation side L

Open CBL command relays CBLopen-K K1 | K2 | K3 | K4 | K5 | K6 |

Close CBL command relays CBLclose-K K1 | K2 | K3 | K4 | K5 | K6 |

CBL Closed LEDs CBLclose-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBL Open LEDs CBLopen-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBL State diagnostic relays CBLdiag-K K1 | K2 | K3 | K4 | K5 | K6 |

CB Diagnostic side L

Number of CBL trips mode CBL ModeN.Open OFF | ON

Number of CBL trips threshold CBL N.Open 0 ... 10000 step = 1

Cumulative CBL tripping currents mode CBL ModeSumI OFF | ON

Cumulative CBL tripping currents threshold CBL SumI InL 0 ... 5000 step = 1

Cumulative CBL tripping I^2t mode CBL ModeSumI^2t OFF | ON

CBL opening time for I^2t calculation CBL tbreak s 0.05 ... 1.00 step = 0.01

Cumulative CBL tripping I^2t threshold CBL SumI^2t InL^2s 0 ... 5000 step = 1

CBL operating time mode CBL Mode-tOpen OFF | ON

Trigger relay for CBL opening time trigger measurement CBL Ktrig-break K1 | K2 | K3 | K4 | K5 | K6 |

CBL maximum allowed opening time

Value s 0.05 ... 1.00 step = 0.01

Number of CBL trips diagnostic relays CBL N.Open-K K1 | K2 | K3 | K4 | K5 | K6 |

Cumulative CBL tripping currents diagnostic relays CBL SumI-K K1 | K2 | K3 | K4 | K5 | K6 |

Cumulative CBL tripping I^2t diagnostic relays CBL SumI^2t-K K1 | K2 | K3 | K4 | K5 | K6 |

CBL opening time diagnostic relays CBL tbreak-K K1 | K2 | K3 | K4 | K5 | K6 |

Number of CBL trips diagnostic LEDs CBL N.Open-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Cumulative CBL tripping currents diagnostic LEDs CBL SumI-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Cumulative CBL tripping I^2t diagnostic LEDs CBL SumI^2t-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CBL opening time diagnostic LEDs CBL tbreak-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CT supervision - 74CT

CT supervision side H - 74CT side H

74CT(H) Enable 74CT(H) Enable OFF | ON

74CT(H) Threshold S(H)< 0.10 ... 0.95 step = 0.01

74CT(H) Overcurrent threshold

State OFF | ON


S(H)< Operating time



s 0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

S(H)< Logical block S(H)<BLK1 OFF | ON

S(H)< Trip relays S(H)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

S(H)< Trip LEDs S(H)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

CT supervision side L - 74CT side L

74CT(L) Enable 74CT(L) Enable OFF | ON

74CT(L) Threshold S(L)< 0.10 ... 0.95 step = 0.01

74CT(L) Overcurrent threshold

State OFF | ON


S(L)< Operating time

Value s

0.03 ... 9.99 step = 0.0110.0 ... 99.9 step = 0.1100 ... 200 step = 1

S(L)< Logical block S(L)<BLK1 OFF | ON

S(L)< Trip relays S(L)<TR-K K1 | K2 | K3 | K4 | K5 | K6 |

S(L)< Trip LEDs S(L)<TR-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Remote tripping

Remote tripping relays RemTrip-K K1 | K2 | K3 | K4 | K5 | K6 |

Remote tripping LEDs RemTrip-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Pilot wire diagnostic

BLOUT1 Diagnostic pulses period PulseBLOUT1 OFF | 100ms | 1s | 5s | 10s | 60s | 120s

BLIN1 Diagnostic pulses control time interval PulseBLIN1 OFF | 100ms | 1s | 5s | 10s | 60s | 120s

Not received pulses at BLIN signalling relays PulseBLIN-K K1 | K2 | K3 | K4 | K5 | K6 |

Not received pulses at BLIN signalling LEDs PulseBLIN-L START | TRIP | L1 | L2 | L3 | L4 | L5 |

Demand measures

Fixed demand period tFIX min 1 ... 60 step = 1

Rolling demand period tROL min 1 ... 60 step = 1

Number of cycles for rolling on demand N.ROL 1 ... 24 step = 1



Oscillography Readings

State Initialization | Start recording | Acquire | Trigger | Stopped | Wait | Fail | Off

Records 0 ... 0 step = 0

Buffer storage % 0 ... 0 step = 0 Trigger Setup

Pre-trigger time s 0.05 ... 1.00 step = 0.01

Post-trigger time s 0.05 ... 60.00 step = 0.05

Element pickup trigger ON | OFF

Trigger from outputs K1 | K2 | K3 | K4 | K5 | K6 | K7 | K8 | K9 | K10

Trigger from 87T states

Id>-L1 ST | Id>-L2 ST | Id>-L3 ST | Id>-L1 TR | Id>-L2 TR | Id>-L3 TR | Id>>-L1 ST | Id>>-L2 ST | Id>>-L3 ST | Id>>-L1 TR | Id>>-L2 TR | Id>>-L3 TR | 2nd-REST ST | 5th-REST ST | H-REST-L1 ST | H-REST-L2 ST | H-REST-L3 ST | SatDet ST

Binary input trigger ON | OFF

Trigger from inputs IN1-IN32

IN1 | IN2 | IN3 | IN4 | IN5 | IN6 | IN7 | IN8 | IN9 | IN10 | IN11 | IN12 | IN13 | IN14 | IN15 | IN16 | IN17 | IN18 | IN19 | IN20 | IN21 | IN22 | IN23 | IN24 | IN25 | IN26 | IN27 | IN28 | IN29 | IN30 | IN31 | IN32

Trigger from inputs IN33-IN42 IN33 | IN34 | IN35 | IN36 | IN37 | IN38 | IN39 | IN40 | IN41 | IN42

80% Buffer alarm OFF | ON Set sample channels

iL1L On | Off

iL1H On | Off

iL2L On | Off

iL2H On | Off

iL3L On | Off

iL3H On | Off

iE2 On | Off

iE1 On | Off

iL1cL On | Off

iL1cH On | Off

iSL1 On | Off

iDL1 On | Off

iL2cL On | Off

iL2cH On | Off

iSL2 On | Off

iDL2 On | Off

iL3cL On | Off

iL3cH On | Off

iSL3 On | Off

iDL3 On | Off Set analog channels

Analog 1

Frequency | IL1L | IL2L | IL3L | IL1H | IL2H | IL3H | IL1cL | IL2cL | IL3cL | IL1cH | IL2cH | IL3cH | ISL1 | ISL2 | ISL3 | IDL1 | IDL2 | IDL3 | ID2L1 | ID2L2 | ID2L3 | ID5L1 | ID5L2 | ID5L3 | DThetaL | DThetaH | I1L | I1H | I2L | I2H | I2L/I1L | I2H/I1H | IEL | IEH | IE2 | IE1 | IESL | IESH | T1 | T2 | T3 | T4 | T5 | T6 | T7 | T8 | Off



Analog 2


Analog 3


Analog 4


Analog 5


Analog 6


Analog 7


Analog 8


Analog 9


Analog 10


Analog 11




Analog 12


Set digital channels Binary 1 K1 | K2 | K3 | K4 | K5 | K6 | Off

Binary 2 K1 | K2 | K3 | K4 | K5 | K6 | Off














Binary 16 K1 | K2 | K3 | K4 | K5 | K6 | Off Set digital channels from 87T states

Binary 17

Id>-L1 ST | Id>-L2 ST | Id>-L3 ST | Id>-L1 TR | Id>-L2 TR | Id>-L3 TR | Id>>-L1 ST | Id>>-L2 ST | Id>>-L3 ST | Id>>-L1 TR | Id>>-L2 TR | Id>>-L3 TR | 2nd-REST ST | 5th-REST ST | H-REST-L1 ST | H-REST-L2 ST | H-REST-L3 ST | SatDet ST | Off

Binary 18


Binary 19


Binary 20


Binary 21


Binary 22


Binary 23




Binary 24


Binary 25


Binary 26


Binary 27


Binary 28


Binary 29


Binary 30


Binary 31


Binary 32


Communication RS485

Protocol MODBUS

Address 1 ... 254 step = 1

Baudrate RS485 1200 baud | 2400 baud | 4800 baud | 9600 baud | 19200 baud | 38400 baud | 57600 baud

Ethernet IP host address IP net mask IP gateway Autonegotiation OFF | ON

NTP Enable OFF | ON

Type Local Network | Internet | User

NTP Server Zurich(Europe) | Berlin(Europe) | Italy(Europe) | Fukuoka1(Japan) | Fukuoka2(Japan) | Pushchino(Russia) | Lagos(Nigeria) | South Africa

NTP Server address



Time Zone

(UTC+0) - Greenwich Dublin Edinburgh Lisbon London | (UTC+1) - Amsterdam Berlin Bern Rome Stockholm Vienna | (UTC+2) - Athens Bucharest Cairo Instanbul | (UTC+3) - Addis Abeba Baghdad Moscow Nairobi S.Petersburg | (UTC+4) - Baku Dubai Mauritius Samara Tbilisi | (UTC+5) - Karachi Maldives Tashkent Yekaterinburg | (UTC+6) - Almaty Dhaka Omsk | (UTC-1) - Azores CapoVerde | (UTC-2) - Mid Atlantic | (UTC-3) - Brasilia BuenosAires Georgetown Greenland | (UTC-4) - AtlanticTime LaPaz Manuas Santiago | (UTC-5) - EasternTime (US Canada) Indiana | (UTC-6) - CentralTime (US Canada) CentralAmerica

Daylight saving time Disable | Europe | Russia | Jordan | Syria | Egypt

NTP sychronization LED None | START | TRIP | L1 | L2 | L3 | L4 | L5 Network management

Enable OFF | ON

Type Multicast | Broadcast

Multicast address Broadcast address Rx port 0 ... 20000 step = 1

Tx port 0 ... 20000 step = 1

TimeToLive(Multicast) 0 ... 20 step = 1 Commands

Reset Default settings Circuit breaker side H Circuit breaker side L Real Time Clock


8.9 APPENDIX E - Revisions history

DSPFirmwareRelease

CPUFirmwareRelease

Documentation Communication Date Description

1.001.00

1.001.00

2.302.01

2.012.01

NT10-Manual-10-2010NT10-Manual-01-2011

NT10-Manual-01-2011NT10-Manual-01-2011

ThySetter 3.6.0ThySetter 3.6.1

ThySetter 3.6.2ThySetter 3.6.2

--

-18.03.2013

First editionCorrection cap 3 (step setting ranges)Correction cap 4 (compensation factor formula, low impedance restricted earth fault),Cap 8 (added schematic diagram for differential protection of transformer-generator system)Corrections on BF logic diagram pag. 153Use of an alarm threshold (49 element) to prevent refeeding

Headquarters: 20139 Milano - Piazza Mistral, 7 - Tel. +39 02 574 957 01 ra - Fax +39 02 574 037 63Factory: 35127 Padova - Z.I. Sud - Via dell’Artigianato, 48 - Tel. +39 049 894 770 1 ra - Fax +39 049 870 139 0

www.thytronic.it www.thytronic.com [email protected]

8.10 APPENDIX F - EC Declaration of conformity

Manufacturer: THYTRONIC S.p.A.

Address: Piazza Mistral 7 - 20139 MILANO

The undersigned manufacturer herewith declares that the product

Protection relay - type NT10

is in conformity with the previsions of the following EC directives (including all applicable amendments) when installed in accordance with the installation instructions:

Reference n° title

2006/95/EC2004/108/EC

Low Voltage DirectiveEMC Directive 2006/95/EC

Reference of standards and/or technical specifi cations applied for this declaration of conformity or parts thereof:

- harmonized standards:

nr issue title

EN 61010-1

EN 50263

EN 61000-6-4 (EN 50081-2)

EN 61000-6-2 (EN 50082-2)

11.2001

08.2000

10.2002

12.2005

Safety requirements for electrical equipment for measurement, control and laboratory use

Electromagnetic compatibility (EMC)Product standard for measuring relays and protection equipments

Electromagnetic compatibility (EMC)Emission standard for industrial environments

Electromagnetic compatibility (EMC)Immunity standard for industrial environments

- other standards and/or technical specifi cations:

nr issue title

EN 61810-1

EN 60255-6 (CEI 95-1)

IEC 60255

02-2004

05-1998

Electromechanical elementary relaysGeneral and safety requirements

Electrical relaysPart 6: General requirements for measuring relays and protection equipment

Electrical relays

Year of CE marking: 2010

Signature ............................................. Name FIORE Ing. GIOACCHINO Title Managing director Date 09-2010

Documents

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