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OPERATION MANUAL COE-29 6576 x 4384 Global Shutter CCD v 1.1

OPERATION MANUAL COE-29frame grabber on one Camera Link channel (Tap). 1 Path at 40Mhz 1 Path at 40Mhz Link 1 Tap Data Path Dual Tap Configure the tap configuration as two Taps, Interleaved

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Page 1: OPERATION MANUAL COE-29frame grabber on one Camera Link channel (Tap). 1 Path at 40Mhz 1 Path at 40Mhz Link 1 Tap Data Path Dual Tap Configure the tap configuration as two Taps, Interleaved

OPERATION MANUAL

COE-29 6576 x 4384 Global Shutter CCD

v 1.1

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Page 2

V 1.1

Rev Date Modification

A 2/27/18 COE-29 Original Document

Revis

ions

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V 1.1

COE-29 Precautions

Do not drop, damage, disassemble, immerse, repair or alter the camera.

Applying incorrect power may damage the camera electronics.

The warranty is void if the camera is opened or modified in any way.

Care must be taken in handling as not to create static dis- charge that may permanently damage the device.

Camera Link is a DC based interface. The camera and capture device must share the same electrical ground. Failure to do so will damage the Camera Link interface chips and/or camera and capture card.

The maximum Camera Link data rate is 85Mhz. This limits the maximum pixel clock speed to 42.5Mhz, which is provided as an overclock mode. Operation is guaranteed at 30Mhz pixel clock and below.

PoCL cables are compatible with the COE-29 camera. PoCL camera power is not supported.

Absolute Maximum Ratings Input Voltage: 10 to 16V DC Storage Temperature: -40C to +70C

Recommended Maximum Ratings Input Voltage: 11 to 14V DC Operating Temperature: -20C to +60C Most Opto Engineering cameras operate beyond these temperature limits, please contact Opto Engineering for details.

Recommended Operating Conditions Input Voltage: 12V DC Operating Temperature: -5C to 54C Relative humidity should not exceed 80% non-condensing.

Specifications subject to change without notice.

Pre

ca

utions

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Table of Contents Page

Getting Started - Camera Link 5

Getting Started - USB3 20

Camera Overview 30

Hardware Overview 45

Serial Communication 48

Serial Commands 52

Exposure Modes 69

Analog to Digital Conversion 87

Pixel Row and Column Defects 91

Lookup Tables 92

Digital Gain and Offset 94

Temperature Detector 95

Conte

nts

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V 1.1

Camera Power 6-12V DC Power to the Hirose 6 pin connector. Mating Connector: Hirose HR10A-7P-6P

View from Camera Back

Capture Card Any Base Mode Camera Link capture card Such as: Teledyne Dalsa Xtium-CL MX4 OR-Y4CO-XMX00.

Imaging SDK Available from your capture card supplier.

Camera Link Cables One cables (SDR to SDR) must be rated at 85Mhz or more (two cables for Medium Format).

The following 5M cable configurations have been tested: Standard MDR to HDR/SDR MVC-1-1-1-5M Available from Components Express.

http://www.componentsexpress.com/Configurator.aspx?cnfi=1

Camera Communication Software Opto Engineering Camera Serial Communication Software (GUI) Download at: https://www.opto-engineering.com/products/coe-area-scan#Downloads G

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V 1.1

To start imaging with the COE-29 CL:

Install the capture card and software per the capture card manufacturers instructions.

Connect the COE-29 Camera Link cables paying attention to the base and medium connections

VSYNC = GREEN

TRIGMODE =ORANGE LED's INTERNAL ERROR = RED

POWER = GREEN

LED Status Conditions

RED ORANGE GREEN Status

off off blinking Normal, no errors

on off blinking Brownout reset

on on blinking Watch Dog Timeout

on on blinking JTAG reset

on off on VSYNC timeout

on on off Invalid EEPROM Gettin

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V 1.1

Installing the Opto Engineering Camera Serial Communication Software:

Download and install the Opto Engineering Camera Serial

Communication Software (GUI) from

https://www.opto-engineering.com/products/coe-area-scan#Downloads

Background: Per the Camera Link standard, all serial communication is via the .dll clallserial.dll, which dynamically loads the serial communication .dll(s) specific to the frame grabber being used. Opto Engineering installs Clallserial .dll in its application directory.

clallserial.dll examines the registry to see where the capture card specific communication dll's have been installed. The naming convention for the capture card specific communication dll's is clser***.dll where *** is the manufacturer specific dll name. The files MUST be in the form clser***.dll in order to be recognized. Some capture card manufacturers will append something like clser***x64.dll for the 64 bit version of the .dll. This file name must be changed to clser***.dll in order to be recognized by clallserial.dll.

clallserial.dll

clserxxx.dll clseryyy.dll clserzzz.dll

OE camera control app

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V 1.1

The registry:

When clallserial.dll is loaded by the Opto Engineering serial communication application, it looks at the Registry entry:

HKEY_LOCAL_MACHINE\SOFTWARE\Cameralink CLSERIALPATH.

The location pointed to by CLSERIALPATH is typically C:\Cameralink\Serial, but could be any path that a capture card install might create. It is important to note that the capture card communication dll(s), clser***.dll must be at this path location. clallserial.dll should NOT be in this location.

If the capture card communication dll is spec 1.1 compliant, the user will find this directory already created.

The Opto Engineering control app installs clallserial.dll for the appropriate operating system in the application folder. Depending on the application version, some documentation may be installed in the application folder as well.

If the registry entry above does not exist, create it as well as the directory C:\CameraLink\Serial

In either case, copy-paste the clser***.dll files to C:\CameraLink\Serial

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V 1.1

Installing prerequisite software:

The status of these items can be checked in the Control Panel -> Programs and Features listing. If necessary download and install the following prerequisites.

1. .NET Framework 4.5 to be installed from:

https://www.microsoft.com/en-us/download/details.aspx?id=30653

2. Visual C++ 2010 Redistributable from:

https://www.microsoft.com/en-us/download/details.aspx?id=14632

3. Visual C++ 2013 Redistributable from:

https://www.microsoft.com/en-us/download/details.aspx?id=40784

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Install the Camera Serial Communication Software:

Launch the installer

Select the installation folder...

Confirm...

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Install complete…

Note: A shortcut to the program will be placed on the desktop.

Power up the camera and run the Opto Engineering Camera Serial Communication Software.

If there are multiple clserxxx.dll’s for multiple cards installed, a choice of possible connections will be presented.

If there is only a single capture board present and one clserxxx.dll, the application will simply connect to that card/port.

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V 1.1

Opto Engineering Camera Serial Communication Software Main Window:

Disabled Menus

By default, sensitive menu items are disabled to pre- vent inadvertent changes to the camera state. To enable them, a new shortcut has to be created on the desktop.

First, delete the desktop shortcut created by the installer.

Creating a new shortcut for program options:

Create a new Shortcut

Navigate to the program install directory and right click on the file with the OE icon and extension .exe. Choose -> Send to -> Desktop. This creates a new desktop shortcut icon.

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V 1.1

Adding options to the shortcut command line:

Right click on the newly created desktop icon and select Properties.

Add a space and the word expert after the close quote on the Target: line of the dialog box: .exe” expert

Choose OK. When the program is launched, all menus will be enabled. NOTE: Use care with all menus enabled as some changes cannot be undone and may require the camera be returned to the factory for remedy.

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Exposure / Readout:

Start with this dialog box.

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Camera Control Application Details:

Main Dialog

The main dialog box provides access to the various functions of the camera. Menus are used to access sub-dialogs. A generic camera register read/write feature is pro- vided.

In addition, a history of communication is also provided in this dialog box.

Modes->Exposure and Readout

This dialog box is used to set the Readout Mode, Free Run, or Trigger, as well as the bit depth and exposure of the camera. In addition, the user can set the Camera Link mode, test patterns, digital gain and offset, and histogram equalization.

Pre-defined windowing modes can be selected. A reset (Enable TG) is availa- ble.

Trigger and Strobe Setup

This dialog box is used to set the trigger source and polarity. The strobe output is only available in the Trigger Exposure Mode.

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V 1.1

Camera Control Application Details:

Mode

The mode dialog indicates the current mode that the camera is in.

Firmware Loader

The firmware loader dialog is used to load FPGA and Micropro- cessor code as well as the EEPROM configuration data.

A useful feature of this dialog is the ability to save and re- store the camera to and from a file. If there are problems with the camera, the camera state may be saved to a file and then emailed to Opto Engineering for support.

Defect Corrector Editor

The defect corrector editor dialog pro- videos editing of the defect corrector tables.

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V 1.1

General Comments:

The control application is for communication with the camera until the user application takes over these functions. All buttons and sliders show the com- mand that is being executed in the application main window.

In the main window, there is a generic read and write section allowing any command that can be found in the manual to be sent to the camera and see its response.

NOTE: If a camera mode is changed, the corresponding change in the capture environment will have to be made as they are independent.

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Capture Card Setup Single Tap

Configure the tap configuration as one Tap, Left to Right

If the COE-29 is set to a one tap readout, the camera output is one tap on one channel of the Camera Link bus. Shown in the diagram below is a one tap readout. One image path from the CCD at 40Mhz is processed and sent to the frame grabber on one Camera Link channel (Tap).

1 Path at

40Mhz 1 Path at 40Mhz

1 Tap Data Path

Dual Tap

Configure the tap configuration as two Taps, Interleaved.

If the COE-29 is set to a two tap readout, the camera outputs the two taps on two channels of the Camera Link bus. Shown in the diagram below is a two tap readout. Two image paths from the CCD at 40Mhz is processed and sent to the frame grabber on two Camera Link channels (Taps).

2 Paths at

40Mhz 2 Paths at 40Mhz

2 Tap Data Path

CCD

Camera Electronics

Frame Grabber

CCD

Frame Grabber

Camera Electronics

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Quad Tap

Configure the tap configuration as one Tap, Left to Right

If the COE-29 is set to a four tap readout, the capture card is configured as shown

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Page 20 V 1.0

Camera Power 6-12V DC Power to the Hirose 6 pin connector. Mating Connector: Hirose HR10A-7P-6P

View from Camera Back

USB3 Port The USB camera connection requires a USB 3.0 compliant hardware port. The camera will not function connected to a USB 2.0 hardware port.

Imaging SDK Opto Engineering cameras utilize Pleora embedded USB3 hardware inside the camera. The imaging application/SDK are available to download from:

https://supportcenter.pleora.com/s/topic/0TO340000004X6dGAE/ebus

sdk?tabset-25adb=81d66&tabset-0c866=2

Go to downloads to select and download the current viewer for your environment.

USB3 Cables Opto Engineering recommends CBUSB3001 cables. https://www.opto-engineering.com/products/CBUSB3001

Camera Communication Software Opto Engineering Camera Serial Communication Software (GUI) Download at:

https://www.opto-engineering.com/products/coe-area-scan#Downloads

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To start imaging with the COE-29 USB3:

Install eBus SDK software.

Connect the COE-29 USB3 cable to the camera and PC.

Connect the power cable to the camera and apply power.

LED's

VSYNC = GREEN TRIGMODE =ORANGE

INTERNAL ERROR = RED POWER = GREEN

LED Status Conditions

RED ORANGE GREEN Status

off off blinking Normal, no errors

on off blinking Brownout reset

on on blinking Watch Dog Timeout

on on blinking JTAG reset

on off on VSYNC timeout

on on off Invalid EEPROM

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To start imaging with the COE-29:

Install eBus SDK software

Additional SDK documentation and resources are available from: https://supportcenter.pleora.com/s/topic/0TO340000004X6dGAE/ebus-sdk? tabset-25adb=d1819&tabset-0c866=2&tabset-3b862=2

Additional eBus Player documentation and resources are available from: https://supportcenter.pleora.com/s/topic/0TO34000000PW53GAG/ebus- player?tabset-25adb=70906&tabset-ec78c=2

Install the Opto Engineering Camera Serial Communication Software. Follow the installation instructions beginning on page 7 of this manual, then return here prior to running the camera control application.

To begin imaging, launch the eBus player.

Press Select/Connect.

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Select the camera and press OK

eBus Player is ready to image.

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Configure the player:

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Select Device Control

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Set the Device Control parameters

Set the raster to Width = 6576, Height = 4384

Turn the TestPattern = off

Set the

SensorDigitationTaps = Two or Four Set the PixelFormat = Mono8 or Mono12Packed

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From the Tools Menu on the viewer, choose Serial Communication Bridge.

Choose Camera Link DLL - THEN LEAVE THIS WINDOW OPEN!

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Run the Camera Serial Communication Software that was installed previously:

Choose the BULK0 Interface.

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From the Modes menu choose Exposure/Readout.

Choose the same settings that were set in the Player Device Control earlier.

For the COE-29 the following rates apply

Select Base Mode 20Mhz and Data format = 12Bits or 8Bits Select Medium Mode 30Mhz and Data format = 8Bits for 3fps Select Medium Mode 40Mhz and Data format = 8Bits for 4.2fps

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General Comments:

The control application is for communication with the camera until the user application takes over these functions. All buttons and sliders show the command that is being executed in the application main window.

See the Getting Started Camera Link section for more camera control application dialog box documentation.

In the main window, there is a generic read and write section allowing any command that can be found in the manual to be sent to the camera and see its response.

NOTE: If a camera mode is changed, the corresponding change in the eBus Player will have to be made as they are independent.

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COE-29 Specifications:

Item COE-29

Active Image 6576 x 4384

Sensor Type On Semi KAI-29050

Pixel Size 5.5µm x 5.5µm

Sensor Output 4 taps

Video Output 8/10/12 bits

Output Format Mono or Bayer

Camera Interface Base Format Camera Link, USB3

Electronic Shutter Global Electronic Shutter

CL Data rate (1, 2, 4 tap) 1, 2, 4 fps (Base CL)

USB3 Data rate 2 FPS

Pixel Clock 40 Mhz

Full Well 20ke

Black Level Adjustable

Analog Gain 1X ~40X

Digital Gain 1X-16X (1/4096 step)

Exposure Modes Program Exposure, Pulse Width, Double Exposure, Overlap Exposure, Overlap Exposure, Free Run, Free Run Synchronized

External Trigger 3.3-5.0V TTL

Software Trigger Per Camera API

Dynamic Range 64dB

Defect Correction Pixel + Column + Row + Hot Pixel

Flat Field Correction Column Gain, Tap offset

Lens Mount OEM/M58, Nikon F

Power - varies with mode and data interface

6-14V DC, Max 7W

Environmental Operating 0C to 60C, Storage –40C to +85C

Vibration/Shock 10G (20-200Hz) XYZ 70G 10ms

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COE-29 Sensor Specifications:

The COE-29 Digital Camera incorporates the On Semiconductor KAI-29050 sensor.

The sensors can be used with either the single, dual, or four tap readout modes.

The 4 tap sensor layout is shown below as displayed by the frame grabber. When the camera is in single tap mode, all sensor data is clocked out at tap A. Sensor data is clocked out of taps A and B in dual tap mode. In four tap mode the data is clocked out on each tap.

Sensor Specifications

• Full well charge: = 20ke. • Sensitivity: 34uV/e • Dark Current: 7e-/s Photodiode, 140 e-/s VCCD • Conversion factor: ~63uv/e. • Dynamic range: 64dB. • Charge Transfer Efficiency: 0.9999 • Read Noise: 12e- RMS • Smear: -100dB • Outputs: 1,2,4

Taps A and C Taps B and D

Right Black Left Black

Right Buffer

Left Buffer

ea

Left Dummy

Active Imaging Ar

Bottom Black Rows

Bottom Buffer Rows

Tap D Tap C

Tap B Tap A

Top Buffer Rows

Top Black Rows

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COE-29 Sensor Pixel Response:

Color (Bayer RGB) with Microlens and Coated Cover Glass

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COE-29 Sensor Microlens Angular Response:

COE-29 IR/UV Filter response:

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COE-29 Skylight Filter response:

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COE-29 Sensor Pixel Defects :

Defects are corrected in the camera hardware as part of the manufacturing process.

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COE-29 Camera Link output block diagram:

4 Paths at 40Mhz

2 Paths at 80Mhz

The sensor output data is 8 analog taps. Each tap is digitized with an analog to digital converter (ADC) with 14 bit precision. Each ADC is programmable in gain, offset, data phase, and sensing phase. Typically, the user never has to adjust the ADC.

The FPGA reorders the tap data into two paths of pixels (odd and even) and outputs the pixels onto a Camera Link bus. The output data can be formatted to Camera Link Base Mode (2 (12 bit) pixels per clock). The Camera Link in- terface includes trigger and serial communications.

In addition, an external trigger and strobe are provided on the power connector.

The on-board microprocessor controls the sensor and FPGA operation, as well as monitors the various sensors within the camera.

Note in the case of USB3, the FPGA data is output directly to the USB3 interface board.

uProc

Power and Bias

EEPROM

Temp Sensor

LED’s

CL Base

FPGA

On Semi KAI-

29050

6576 x 4382 CCD Sensor

4 Analog outputs driving 4 (12bit)

ADC’s

External Trigger and

Strobe

CLK’s

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Camera Link

Camera Link is a communication interface for visual applications that use digital imaging. The Camera Link (CL) interface is built upon the National semiconductor Channel Link technology and specifies how image data is formatted and transferred. Channel Link consists of a driver and a receiver pair. The driver accepts 28 single ended data signals and a single ended clock. The data is serialized 7:1 and the four data streams and a dedicated clock are transmitted over five LVDS pairs. The receiver accepts the four data streams and the clock, decodes the data, and drives the 28 bits of data to the capture circuit.

Image data and image enables are transmitted on the Camera Link bus. The four Enable signals are:

FVAL: Frame Valid is defined HIGH for valid lines. LVAL: Line Valid is defined HIGH for valid pixels. DVAL: Data Valid is defined HIGH for valid data. SPARE: undefined, for future use.

Four LVDS pairs are reserved for general purpose camera control. They are defined as camera inputs and frame grabber outputs. The signals are CC1, CC2, CC3, CC4. The COE-29 uses CC1 as the trigger source.

The Camera Link interface has three configurations:

Base: Single Channel Link chip, single cable connector. Medium: Two Channel Link chips, two cable connectors. Full: Three Channel Link chips, two cable connectors.

Note: COE-29 operates in a Base Cameral Link configuration.

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COE-29 Performance Camera Link:

The COE-29 is user selectable in Base and Medium Format Camera Link outputs:

Base Mode is limited to 2 channels of data at 85Mhz = 170Mpix/s. Medium Mode outputs 4 channels of data at 85Mhz = 340Mpix/s.

Medium Mode can be selected to run at manufactures specified speed of 30Mhz per tap giving a clock rate of 60Mhz and a full frame rate of ~3 fps.

Medium Mode can also be selected to run at an overclocked speed of 42.5 Mhz per tap giving a clock rate of 85Mhz and a full frame rate of ~4 fps.

All data rates can be output as 8, 10, or 12 bits per pixel.

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Camera Link

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Pixel Format

The COE-29 camera samples the sensor with 14 bit precision and processes the data throughout the FPGA at 12 bits.

During the data format stage, the 12 bit image data can be down sampled to 10 or 8 bits. In addition, the bottom 8 bit data can be output as the top 8 (msb) of the 12 bit image sample.

Sensor ADC pixel sample to Camera Link mapping

ADC bits 12 bit CL 10 bit CL 8 bit CL

11 11>11 11>9 11>7

10 10>10 10>8 10>6

9 9>9 9>7 9>5

8 8>8 8>6 8>4

7 7>7 7>5 7>3

6 6>6 6>4 6>2

5 5>5 5>3 5>1

4 4>4 4>2 4>0

3 3>3 3>1

2 2>2 2>0

1 1>1

0 0>0

Channel Format

The COE-29 image data is output to a Base Mode Camera Link chipset. The image data can be formatted in 8, 10, 12 bit pixels on one or two channels. The maximum data rate is 80 Mpixels/sec. This allows the COE-29 to easily interface with any video capture card or custom circuit.

Target Index Command R/W Description

04 0d Bit Width W 0x0000 = 12 bit mode 0x0001 = 10 bit mode 0x0002 = 8 bit mode 0x0003 = Bottom 8 bits (as Msb)

See the section 'Serial Communication' for the use of these commands

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Camera Link Valids

The COE-29 camera samples and processes the entire area of the image sensor. In the standard operating mode, only the active image area is output on the Camera Link as valid data. The LVAL/FVAL signals, which define the valid pixel data, can be programmed to output any part of the image, including the optical black clamping areas. FVAL start/stop are specified in lines. LVAL start is in pixels plus the overhead of the CCD vertical clocks. LVAL stop is specified as the same as LVAL start with the exception of its maximum value of 1. VALID start and stop changes are not stored on system save and must be reprogrammed each time they are needed.

LVAL

FVAL Start

FVAL Stop

Target Index Command R/W Description

0x04 0x1b System Registers R 0x0008 = LVAL Start 0x0009 = LVAL Stop 0x000a = FVAL Start 0x000b = FVAL Stop

0x04 0x27 System Registers W 0x0008 = LVAL Start 0x0009 = LVAL Stop 0x000a = FVAL Start 0x000b = FVAL Stop

See the section 'Serial Communication' for the use of these commands

Active Area

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Camera Detectors

Cameras similar to the COE-29 are very complex and can generate many different raster formats. To document all possible combinations of binning and triggering is next to impossible. Therefore, to alleviate this issue, the COE-29 incorporates a set of raster detectors that measure the video image raster as sent to the capture device. These measured values can be used to set the capture parameters. In addition to the raster size, an exposure detector is included. The exposure detector measures the exposure of the CCD sensor in units of the master pixel clock rate. The frame CRC is used in the built in test functions of the camera.

Active pixels per line

FVAL Start

FVAL Stop

Target Index Command R/W Description

04 1b System Registers R 0x0000 = Pixels per line 0x0001 = Active pixels per line 0x0002 = Lines per frame 0x0003 = Active lines per frame 0x0012 = Exposure counter low word 0x0013 = Exposure counter high word 0x0014 = Frame CRC

See the section 'Serial Communication' for the use of these commands

Pixels per line

Active Area

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Overscan Mode

A special mode is available that allows all of the pixels of the sensor to be out- put in an Over Scan Mode. This mode allows the user to capture the special performance by measuring the optical black pixels from the sensor. In Over Scan Mode, the LVAL and FVAL are modified to allow the capture device to sample the extra pixels.

FVAL Start

FVAL Stop

Target Index Command R/W Description

04 08 Over Scan Mode W 0x0000 = Disable Over Scan Mode 0x0001 = Enable Over Scan Mode

See the section 'Serial Communication' for the use of these commands

Active area

Over scan area

Active Area

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Channel Format

The Camera Link base mode, used on the COE-29 camera, can transfer pixel data in 8, 10, 12 bit depths and in one or two channels. Two Channel Mode allows for a transfer clock frequency 1/2 of the Single Channel Mode. Because the Two Channel Mode out- puts two pixels per clock, the DVAL signal cannot correctly specify valid data in all modes.

For example, when binning the image, the DVAL signal is used to validate the summed pixel data. In Two Channel Mode, the DVAL signal cannot specify which of the two channels has valid or invalid data; therefore, a Single Channel Mode is preferred.

Target Index Command R/W Description

04 01 Channels W 0x0000 = Single channel output 0x0001 = Dual channel output 0x0002 = Normal order dual channel 0x0003 = “Swapped” order dual channel

See the section 'Serial Communication' for the use of these commands

NOTES ►Do not confuse Single/Dual Channel with Single/Dual CCD Tap Modes. ►Single channel output requires a pixel clock of twice the frequency of the dual channel mode. ►Some PCI Camera Link cards have a maximum pixel clock frequency of 66Mhz. With a COE-29 camera, operating in two tap mode at 40Mhz the pixel rate is 80Mhz, this is greater

than what the card can handle. The camera must be operated in dual channel mode with these cards.

►DVAL = Data VALid: This Camera Link signal indicates when pixel data is valid with a clock. ►LVAL = Line VALid: This Camera Link signal indicates when pixel data is valid with a line. ►FVAL = Frame VALid: This Camera Link signal indicates when line data is valid with a frame. ►In Two Channel Mode the two channels can be interchangeable or “swapped”. This feature

allows the camera to adapt to the capture device.

A Single or

B Dual channel

Pixel Sample to Camera Link data path

Single channel output

Dual channel output

CCD Sensor

Tap Reorder

Camera Link

Format

Image Process

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Drawings and CAD Models:

The COE-29 case dimensions are available on the Opto Engineering web site under the camera and interface of interest. See the web page for the most current mechanical drawings.

CAD Models are available at https://www.opto-engineering.com.

USB3

Lens Interfaces:

The COE-29 base configuration for all data interfaces is an M58/OEM mount. Optional mounts include Nikon F.

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Camera Link

Tripod Adapter

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12V Universal Power Supply

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The COE-29 serial interface was developed for high reliability applications. The interface incorporates error checking and a handshake protocol, which responds with either a positive or negative acknowledge signal. The communication path from frame grabber to the COE-29 is through the Camera Link cable. The Camera Link committee has specified that devices connected must first communicate at 9600 baud, but the COE-29 has a selectable baud rate for faster communication speeds.

The COE-29 microprocessor is a flash programmable device with many features vital to the operation of the camera. Some of these features include:

• Hardware UART used for serial communications.

• A watchdog timer used to monitor communication errors and system faults.

• Onboard RAM and EEPROM for saving camera settings.

• Parallel data bus for high speed interfaces to the FPGA and NAND FLASH memories.

• Brown out detection and reset.

SERIAL INTERFACE PROTOCOL

Implementation Camera communication is accomplished via asynchronous serial communication accord- ing to EIA Standard RS 232 C through the Camera Link cable.

Data rate: Full Duplex, 9600 baud.

• 1 START bit.

• 8 DATA bits – The LSB (D0) is transfered first.

• 1 STOP bit.

• No parity.

Protocol The COE-29 camera is controlled through command packets. The COE-29 camera is considered a slave device and never generates data without a read request. The data packet formatting is described in detail below. Note: the checksum is calculated only on the 4 ascii characters comprising the Data.

Data Packets Data packets are of either ‘read’ or ‘write’ types. For example: to read the camera serial number, the packet sent to the camera would be {r07000002fe}. The camera would respond by issuing an acknowledge character ! followed by the response {r0700sssscc}, where ssss is the camera serial number and cc is the checksum calculated in hex as 0x0100 – ( ss (high byte hex) + ss (low byte).

Packet Format

1 Char 2 Char 2 Char 2 Char 4 Char 2 Char 1 Char 1 Char

Start Command Target Index Data Checksum End Ack/ Nack

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Start: Indicates the Start of the frame Size = 1 ascii character Value = 123 Decimal (ascii { )

Command: Command descriptor Size = 1 ascii character Value = 114 Decimal (ascii r ) for Read Value = 119 Decimal (ascii w ) for Write

Target: Command descriptor Size = 2 ascii characters

Index:

Data:

Command descriptor Size = 2 ascii characters

The data transferred Size = 4 ascii characters

Checksum of Data Size = 2 ascii characters - Intel-Standard - two’s compliment of sum of data.

Example 1: Data = 2002, checksum = lower byte of (0x100 – (0x20 + 0x02)) = 0xde Example 2: Data = 0000, checksum = lower byte of (0x100 – (0x00 + 0x00)) = 0x00 Example 3: Data = fef0, checksum = lower byte of (0x100 – (0xfe + 0xf0)) = 0x12

End: Indicates the End of the frame Size = 1 ascii character Value = 125 Decimal (ascii } )

Ack/Nack: Positive Acknowledge - Negative acknowledge Size = 1 ascii character Ack Value = 33 Decimal (ascii ! ) Nack Value = 63 Decimal (ascii ? )

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COMMAND DESCRIPTIONS

Read Command Structure The COE-29 camera parses the sequence byte by byte. An invalid read command, target, or index will cause the camera to issue a NACK. The Host (the user) will generate dummy data with a valid checksum then an end. The camera will respond with an ACK and re-send the command with valid data and checksum. If the Host detects an error, it will re-issue the command.

Host {r tt ii 0 0 0 0 cc}, camera issues ! Camera issues {r tt ii data data data data cc} (NOTE no ACK).

Write Command Structure The COE-29 camera parses the sequence byte by byte. An invalid write command, target, index, or checksum will cause the camera to issue a NACK; otherwise, the write sequence will complete and the camera will issue an ACK after the command has been executed. The camera receives the checksum from the Host.

Host {w tt ii data data data data cc} camera issues !

Error Checking The COE-29 camera parser is character by character and will respond with an immediate NACK if any unrecognized command, target, index, or checksum occurs.

Communication Timeouts The COE-29 camera micro-controller uses a hardware watchdog timer that will time out if the time between bytes are longer than 500ms. When sending command frames to the camera, the host must not have significant delays between bytes sent.

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Camera Control

Target Index Description Read Write

Modes

04 00 Sensor Taps Write 0x0000 = One Tap 0x0001 = Two Tap 0x0003 = Four Tap

04 03 Readout Mode Select Write 0x0000 = Free Run 0x0001 = Trigger Program Exposure 0x0002 = Trigger Manual Exposure 0x0003 = Trigger Double Exposure 0x0004 = Reserved (Do Not Used) 0x0005 = Async Reset Enabled 0x0006 = Async Reset Disabled 0x0007 = Enable Runs Valids 0x0008 = Disable Runs Valids 0x0009 = Trigger Source CC1 on CL Cable 0x000a = Trigger Source External (OEM) 0x000b = Trigger Overlap Exposure Enable 0x000c = Trigger Overlap Exposure Disable 0x000d = Double Trig, Double Expos (OEM)

04 04 Mode Register

write lines to 0428 and 0429 prior to binning

M = 0 Common – both Trigger and Free Run M = 8 Free Run Only M = 4 Trigger Only

Write 0xM000 = Bin enable 0xM001 = TBD 0xM002 = Disable Bin 0xM005 = Enable Digital Gain and Offset 0xM006 = Disable Digital Gain and Offset 0xM007 = Enable LUT 0xM008 = Disable LUT 0xM009 = Enable PDC enables once loaded (call 041c000b first which leaves PDC on in common mode) 0xM00a = Disable PDC 0x000F = Enable Bayer Bin 0x0010 = Disable Bayer Bin 0x0011 = Enable FFC (OEM Only) 0x0012 = Disable FFC (OEM Only)

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Target Index Description Read Write

Modes

04 06 Test Pattern Write 0x0000 = Normal Video 0x0001 = Input (CCD) Test Pattern 0x0002 = Output Test Pattern

04 07 Camera Temperature Read

04 08 Over Scan Mode Write 0x0000 = Disable Over Scan Mode 0x0001 = Enable Over Scan Mode

04 09 Baud Rate Write 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 D2 Set Camera Link Boot Baud Rate (Requires reboot)

R/W 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 D3 External Serial Boot Baud Rate (Requires reboot)

R/W 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 0c Micro BIT initiate Write 0x0000 = Clear Bit Status Reg- ister 0x0001 = PBIT 0x0002 = IBIT

04 0d Bit Depth Write 0x0000 = 12 bit mode 0x0001 = 10 bit mode 0x0002 = 8 bit mode 0x0003 = Enable bottom 8 bits 0x0004 = Disable bottom 8 bits

04 0e Strobe Control Write 0x0000 = negative strobe po- larity 0x0001 = positive strobe polar- ity

04 11 OSD lines Write 0x0000 disable 0x0001 line plot 0x0002 column 0x0008 line display 0x0009 filled display 0x000a enable color mode 0x000b disable color mode

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Target Index Description Read

Write Modes

04 18 LUT Load W Loads LUT based on mode (OEM Only)

04 45 LUT Load Mode R/W 0x0000 = load from com port (OEM Only) 0x0001 = load from com port (OEM Only) and save to EEPROM 0x0002 = load from EEPROM (OEM Only)

04 46 Load Gamma LUT Write Data is a 0-100 = gamma * 100

04 1b System Registers R 0x0005 = TRO Left Start 0x0006 = TRO Right Start 0x0007 = TRO Size

04 1c Pixel Defect Write 0x0000 = Disable Column Mode 0x0001 = Enable Column Mode 0x0002 = Load PDM From EEPROM leaves PDC on in common mode 0x0003 = Disable PDC2 Column Mode 0x0004 = Enable PDC2 Column Mode 0x0005 = Disable all PDC

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Target Index Description Read

Write Modes

04 1d Auto Exposure Write 0x0000 = Disable AE 0x0001 = Enable Fast AE 0x0002 = Enable Slow AE 0x0003 = Enable small AED counter (1mpix) 0x0004 = Enable large AED counter (16mpix) 0x0005 = Enable AED averaging 0x0006 = Disable AED averaging

04 1e AE Set point R/W

04 1f AE Hysteresis R/W

04 20 AE max gain R/W In Digital Gain untis

04 21 AE min gain R/W

04 22 AE max exposure R/W (min erasure)

04 23 AE min exposure R/W (max erasure)

04 24 Common gain - Digital R/W

04 25 Free Run erasure R/W

04 26 AE detector Read

04 27 System Registers write data to EEDATA 030c prior to calling

Write 0x0004 = Write TPW 0x0005 = Write TRO Left Start 0x0006 = Write TRO Right Start 0x0007 = Write TRO Size 0x0008 = Write LVAL Start 0x0009 = Write LVAL Stop 0x000a = Write FVAL Start 0x000b = Write FVAL Stop 0x000e = Write TPD 0x000f = SNR Left 0x0010 = SNR Right 0x0011 = Crack Location

04 28 Trigger V Bin / Dec R/W Read/Write values 1 - 13

04 29 Trigger H Bin / Dec R/W Read/Write values 1 - 16

04 2a Write Free Run V Bin R/W Read/Write values 1 - 13

04 2b Write Free Run H Bin R/W Read/Write values 1 - 16

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Target Index Description Read

Write Modes

04 2c Left Tap Digital gain R/W

04 2d Left Tap Digital offset R/W

04 2e Right Tap Digital gain R/W

04 2f Right Tap Digital offset

R/W

04 36 Master Gain R/W

04 37 Master Offset R/W

04 38 Master DGO Enable R/W 1 = enable, 0 = disable

04 31 Mode Pre-sets – OEM

Write 0x0000 = N/A 0x0001 = Linear LUT 0x0002 = Inverted LUT 0x0003 = Preview LUT 0x0004 = Gamma LUT 0.45 0x0005 = Gamma LUT 0.60 0x0006 = Gamma LUT 0.70 0x0007 = Gamma LUT 0.80

04 40 FFC Table Load W Activates FFC

04 41 FFC test W Loads entire FFC table with data. Where 0x1000 = 1x, 0x1800 = 1.5x

04 42 FFC Master gain R/W Sets FFC master gain

04 43 FFC Load Mode R/W 0x0000 = load from com port 0x0001 = load from com port

and save to EEPROM 0x0002 = load from EEPROM

04 04 Mode Register W 0x0011 = Enable FFC 0x0012 = Disable FFC

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Camera Mode and Status

Target Index Description Read Write

Modes

05 00 Camera mode/status Read 0x0000 = read mode register 1 0x0001 = read mode register 2 0x0002 = read mode register 3 0x0003 = read mode register 4 0x0004 = read mode register 5 0x000B = read mode register 6 0x000C = read mode register 7 0x000D = read mode register 8 0x0007 = read status register 1 0x0008 = read status register 2 0x0009 = read status register 3 0x000A = read status register 4

Camera Configuration

Target Index Description Read

Write Modes

07 00 Read 0x0000 = Camera Model 0x0001 = Camera Hardware rev 0x0002 = Camera Serial Number 0x0003 = Micro firmware rev 0x0004 = FPGA major revision 0x0005 = Sensor Serial Number 0x0006 = Clock Rate 0x0007 = FPGA Sub/minor revision 0x0008 = Micro Sub/minor revision

Exposure and Trigger

Target Index Description Read Write

Modes

02 00 Set Trigger Time MS R/W ms * 100 (0x0064 = 1.0ms)

02 01 Set Trigger Time US R/W us

02 02 Set Free Run Time MS R/W ms * 100

02 03 Set Free Run Time US R/W us

02 04 Transfer Pulse Delay R/W

02 05 Soft Trigger Time W Software trigger in ms

02 06 Set trigger high W Sets internal trigger high (active)

02 07 Set trigger low W Sets internal trigger low

02 0A TG Erasure R/W

02 0B Trigger Sub Pulse Delay R/W Default = 0x0001

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Memory Management

Target Index Description Read

Write Modes

03 00 Save Camera State W Wait for acknowledge before removing power.

03 02 Restore Factory State W Wait for acknowledge before removing power.

03 03 Copy User to Factory W Wait for acknowledge before removing power.

03 04 Save substrate DAC value

W Dummy data

03 05 Copy factory to all USER

W Warning: This can take time !

03 06 Copy USER# to USER#

W Top byte is SRC USER Bottom byte is DST USER

03 07 Set USER # W Copies USER to ACTIVE, loads it, and performs soft reset Bottom byte is USER#

03 08 Number of USER configs

R 4 is the current limit

03 09 Reset EEPROM CRC W

03 20 Read 64 bytes from EEPROM

Checksum = 0x00

03 0c EEPROM data and temporary location for operations requiring data and address

W

03 0d EEPROM Word R/W 0xaaaa = address Read address directly. Write data word to 030c then write 030d with address.

03 0e EEPROM Byte R/W 0xaaaa - address Read address directly. Write data byte to 030c then write 030e with address.

03 FF EEPROM erase W Erases EEPROM with FF Very dangerous !

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Special Commands

Target Index Description Read Write

Modes

04 FF Base Reset W Resets camera mode to: Free Run, runs valid enabled, no binning, no line or text displays, no LUT, no PDC, no digital gain or offset, no test pattern, reset the LVAL and FVAL defaults. AE detector counter set to small size, enable strobe in Free Run Mode, Auto Tap Matcher off

04 D8 Checksum Mode (Cleared on restart)

Write 0x0000 = Checksum of data 0x0001 = Checksum of command and data

04 D0 Power Up W Resets camera and powers up circuits

04 D1 Power Down W Puts the camera into low power mode

09 00 Auto Tap Matcher R/W 0 = off, 1 = on

Baud Rates: The Camera Link 1.0 specification allows for serial communication at 9600 baud only. The 1.1 specification provides for faster rates. The COE-29 camera allows for the setting of the baud rate to one of five rates. This setting can be made for only the current power cycle or for the boot cycle.

The COE-29 camera allows the user the option of saving the communication speed in the camera EEPROM. This can cause communication with the camera to be lost if the command is not used carefully.

Once the EEPROM baud rate is set, the camera must be re-powered to set the rate.

Target Index Command R/W Description

04 09 Set Current Baud Rate

W 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 D2 Set Camera Link Boot Baud Rate (Requires reboot)

R/W 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 D3 External Serial Boot Baud Rate (Requires reboot)

R/W 0x0000 = 9600 0x0001 = 19200 0x0002 = 38400 0x0003 = 57600 0x0004 = 115200

04 D0 Power Up W Resets camera and powers up circuits

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System and Status Registers

Target Index Description Read

Write Modes

04 1b System Registers R 0x0000 = Read Pixels/line 0x0001 = Read Active pixels/line (in LVAL) 0x0002 = Read Lines per frame 0x0003 = Read Active lines per frame (in FVAL) 0x0004 = Read TPW 0x0005 = TRO Left Start 0x0006 = TRO Right Start 0x0007 = TRO Size 0x0008 = LVAL Start 0x0009 = LVAL Stop 0x000a = FVAL Start 0x000b = FVAL Stop 0x000c = CCD Type 0x000d = FPGA Revision 0x000e = Read TPD 0x000f = SNR Left 0x0010 = SNR Right 0x0011 = Crack detector position 0x0012 = Read Exposure value low 0x0013 = Read Exposure value high 0x0014 = Read CRC

07 00 Camera Parameters

R 0x0000 = Camera Model 0x0001 = Camera Hardware rev 0x0002 = Camera Serial Number 0x0003 = Micro firmware rev 0x0004 = FPGA major revision 0x0005 = Sensor Serial Number 0x0006 = Clock Rate 0x0007 = FPGA Sub/minor revision 0x0008 = Micro Sub/minor revision

05 00 Camera mode/ status

Read 0x0000 = read mode register 1 0x0001 = read mode register 2 0x0002 = read mode register 3 0x0003 = read mode register 4 0x0004 = read mode register 5 0x000B = read mode register 6 0x000C = read mode register 7 0x000D = read mode register 8 0x0007 = read status register 1 0x0008 = read status register 2 0x0009 = read status register 3 0x000A = read status register 4

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Mode Register #1

Bit Name Description

15 Strobe Polarity 1 = Positive Strobe

14 On Screen Text Enabled

13 Output Test Pattern Enabled

12 Input Test Pattern Enabled

11 Large AED Detector 0 = small detector (1MP), 1 = large detector (16MP)

10 Dual Tap Enabled

9 TOE: Triggered Overlap Exposure

8 Fast AE algorithm 1 = fast, 0 = iterative

7 TDE: Trigger Double Exposure

6 TME: Trigger Manual Exposure

5 TPE: Trigger Program Exposure

4 Free Run Enabled Free Run Mode

3 Runs Valid Enabled Valids (FVAL/LVAL/DVAL) are enabled in Free Run Mode

2 AE Inside Hysteresis

1 AE Exposure Mode 1 = exposure mode, 0 = gain mode

0 AE Mode Enabled

Mode Register #2

Bit Name Description

15 4 Tap CCD Readout

14 2 Tap CCD Readout

13 1 Tap CCD Readout

12 Over Scan Enabled Sensor Over Scan

11 PDC Column Mode PDC: 0 = Pixel correction, 1 = column correction mode

10 Channel Swap Enabled Swaps Camera Link channels in dual channel mode

9 Not Used

8 Bottom 8 Readout Outputs the bottom 8 bits of the 12 bit ADC data as the 8 msb’s

7 8 Bit Readout Camera Link readout mode

6 10 Bit Readout Camera Link readout mode

5 12 Bit Readout Camera Link readout mode

4 Tap Matcher Status 1 = on, 0 = off

3 Frame/Line Clamp Mode 0 = Line Clamp, 1 = Frame Clamp (Not recommended)

2 ASYNC RESET Enabled Allows triggered frames in Free Run Mode

1 LUT loaded OEM

0 OSD 2X Enabled

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Mode Register #3

Bit Name Description

15 SRC Over scan Adds 16 lines of over scan to the sensor readout

14 SRC Wave

13 SRC Average Averages data in smear reduction circuit

12 OSD Filled Plot

11 SRC Enable Smear Reduction Correction

10 OSD Column Enabled

9 OSD Line Enabled

8

7 Trigger Source External

6 Flush Gate

5 OSD Color Mode Enlarges the tap match window to two pixels wide to handle Bayer patterns

4 Free Run PDC Enabled

3 Free Run LUT Enabled OEM Only

2 Free Run DGO Enabled DGO = Digital Gain & Offset

1 Free Run Decimation Mode

0 Free Run Bin Mode

Mode Register #4

Bit Name Description

15 Command + Data Checksum

14 115200 Baud Enabled

13 57600 Baud Enabled

12 38400 Baud Enabled

11 19200 Baud Enabled

10 9600 Baud Enabled

9 Trigger Overlap Exposure

8

7 Not Used OSD screen type bit 2

6 Not Used OSD screen type bit 1

5 Not Used OSD screen type bit 0

4 Trigger PDC Enabled

3 Trigger LUT Enabled

2 Trigger DGO Enabled

1 Trigger Decimate

0 Trigger Bin

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Mode Register #5

Bit Name Description

15 AE Time base algorithm Always 1 for Rev E

14 Trigger Bayer Bin

13 FFC Table loaded

12

11 Show AF data full screen

10 Show AF Data

9 Show SNR Right Detector Window

8 Show SNR Left Detector Window

7 Show AF Detector Window Auto Focus detector window

6 Show AE Detector Window Auto Exposure detector window

5 Show Tap B Crack Detector Window Tap B is the Left Tap of the CCD

4 Show Tap A Crack Detector Window Tap A is the Right Tap of the CCD

3 TBD

2 Power Down

1

0

Mode Register #6

Bit Name Description

15 TPD SEL1 TPD Resolution

14 TPD SEL 0

13 BIN AVE 1 BIN1/0 average functions (00 = none, 01=DIV2, 10=DIV4, 11=DIV8).

12 BIN AVE 0

11 CDC Enable Column Defect Corrector

10

9 Trigger Marker Line Mode

8 Trigger Marker Enable

7

6 Trigger Arm Enable OEM Only

5 Trigger Arm OEM Only

4 AFE 14 Bit Data Path Mode

3 PPS Strobe Delay Enabled

2 PPS Shutter Delay Enabled

1 PPS Interrupt Enabled

0 Option Board #1 Enabled Seria

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Mode Register #7

Bit Name Description

15

14

13

12

11

10

9

8

7 TSE Mode

6 UART Master Enabled

5 UART Slave Enabled

4 Not Used

3 Histogram Equalization Enabled

2 AE Histogram Detector Enable

1 AE in IRIS Mode

0 AE in Gain Mode

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Status Register #1

Bit Name Description

15 FACT_CRC_ERR CRC error in factory EEPROM area

14 AE_ERR Error in auto exposure operation

13 V5_ERR 5V power supply is out of range

12 V12_ERR 12V power supply is out of range

11 VH_ERR High voltage power supply is out of range

10 VL_ERR Negative voltage power supply is out of range

9 TDE Frame # Indicates which of the two TDE frames is being readout

8 DCM Locked DCM = Digital Clock Manager

7 DCM Timeout

6 VSYNC Timeout

5 UART Error 1 = receive buffer overflow

4 WDT Reset A watchdog timer reset has occurred

3 Normal Power Up

v Brownout Reset A power brownout has occurred and reset the microprocessor

1 Xilinx Configuration Failed The FPGA could not be configured

0 WDT Enabled Watch Dog Timer

Status Register #2

Bit Name Description

15 USER_CRC_ERR CRC error in user EEPROM area

14

13

12

11

10

9

8

7

6

5 AMBER LED 1 = AMBER LED is on

4 RED LED 1 = RED LED is on

3 IBT 1 complete

2 PIO State Save Failed PIO = Parallel IO = Communication path from micro to FPGA.

1 ADC B State Save Failed ADC = Analog to Digital Converter

0 ADC A State Save Failed

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Status Register #1

Bit Name Description

15 Factory EEPROM CRC Error

14 AE Error

13 V5 Error

12 V12 Error

11 VH Error

10 VL Error

9 TDE Frame

8 DCM Lock FPGA Digital Clock Manager is locked

7 DCM Timeout DCM Error

6 Vsync Timeout

5 UART Error

4 WDT Error Watch Dog Timeout

3 Not Used

2 Brownout Reset

1 FPGA Configure Error

0 Not Used

Status Register #2

Bit Name Description

15 Not Used

14 Not Used

13 Not Used

12 Not Used

11 Not Used

10 Not Used

9 Not Used

8 Not Used

7 LED Amber On

6 LED Red On

5 IBIT Complete OEM Only

4 PIO Save State Failed Error Condition

3 ADC D State Save Fail Error Condition

2 ADC C State Save Fail Error Condition

1 ADC B State Save Fail Error Condition

0 ADC A State Save Fail Error Condition Serial C

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Status Register #3

Bit Name Description

15 AFE D Serdes Sync High if AFE Serdes is working. Low is error.

14 AFE C Serdes Sync High if AFE Serdes is working. Low is error.

13 AFE B Serdes Sync High if AFE Serdes is working. Low is error.

12 AFE A Serdes Sync High if AFE Serdes is working. Low is error.

11 AFE D LVAL Error AFE LVAL sync stream not detected. ERROR.

10 AFE C LVAL Error AFE LVAL sync stream not detected. ERROR.

9 AFE B LVAL Error AFE LVAL sync stream not detected. ERROR.

8 AFE A LVAL Error AFE LVAL sync stream not detected. ERROR.

7 Not Used

6 Not Used

5 Not Used

4 Not Used

3 Not Used

2 Not Used

1 Not Used

0 Not Used

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Lookup Tables

Preset LUTs

The camera has some predefined look up tables that may be loaded quickly into the camera with one camera command. The tables and commands are listed below. Once these tables are loaded, the LUT is automatically enabled.

Loading LUT for Use and/or Storage

LUT tables can be created on a PC and loaded into a camera. The Opto Engineering Camera Control Application has a table create feature, a load table into camera RAM and EEPROM (storage), and a load table into camera RAM.

To load tables into the camera or enable a stored table in the camera, the Lut_mode register needs to be set to the desire function.

Target Index Description Read

Write Modes

0x04 0x31 Preset Tables W 0001 = Linear LUT

0002 = Invert LUT

0003 = Knee LUT

0004 = Gamma 0.45 LUT

0005 = Gamma 0.60 LUT

0006 = Gamma 0.70 LUT

0007 = Gamma 0.80 LUT

0x04 0x46 Load Gamma Table

W XXXX when XXXX > 0 and XXXX <= 100. Gamma value is xxxx/100

0x04 0x45 Lut_mode W 0000 = Load LUT From File on PC , No EEPROM Save

0001 = Load LUT From File on PC , EEPROM Save

0002 = Load LUT from EEPROM

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Backup/Restore

The COE-29 camera control program provides features for saving and restoring the camera state. Please save the camera state before changing the default state of the camera.

State data can be saved and restored (from files) for the following: 1) Camera state with optional defect tables. 2) Flat Field Calibration data.

Note: The camera control program may change the communication rate during this operation.

Camera Save/Restore

Save Factory File: Saves the camera state to a file for future restores. Options include defect table.

Load Factory File: Restores camera state from a file. The camera state is saved in manufacturing and can be emailed to the user.

Save FFC File: Saves the camera Flat Field Correction (FFC) to a file for future restores.

Load FFC File: Restores camera FFC from a file.

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Overview

The COE-29 camera can be programmed to expose images in several different modes. These modes are grouped into two categories, Free Run and Triggered Modes. In the Free Run Mode, the COE-29 camera continuously exposes and out- puts images. In the Trigger Mode, the COE-29 waits for a trigger event. This begins an exposure/readout cycle on the trigger events edge. Some of the COE-29 Exposure Modes are listed below. Other custom OEM Trigger Modes may not be listed.

COE-29 Exposure Modes

Mode Description

FRM

Free Run Mode: Camera generates all timing signals. Exposure is set by a register that specifies lines of erasure. Trigger signals are ignored.

FRS

Free Run Synchronize: Camera generates all timing signals. Exposure is set by a register that specifies lines of erasure. If the trigger is not asserted, then the image readout is halted at the 4th line. When the trigger is asserted the readout resumes. This mode allows multiple free running cameras to be synchronized with the trigger signal. FRS is enabled by selecting FRM and ASYNC RESET.

TPE

Triggered Program Exposure: The camera waits in an idle flush state for a trigger rising edge. On the trigger rising edge the photo diode array is erased and an exposure is made based on the value of the Triggered Pulse Delay (TPD) register. When the exposure is complete, the image is transferred from the photo diodes to the CCD, readout of the CCD, and then passed to the Camera Link interface. The camera is reset and waits for another trigger sig- nal to assert.

TME

Triggered Manual Exposure: This mode is a superset of the TPE Mode and operates exactly the same, except with the following difference. The expo- sure is extended by the width of the trigger signal. The programmed expo- sure is executed at the fall of the trigger pulse. To match the exposure of the image to the trigger pulse width, the TPD register should be set to its mini- mum value (6).

TDE

Triggered Double Exposure: This mode is a superset of the TPE Mode and operates exactly the same, except with the following difference. After the first frame is transferred from the photo diodes to the CCD, a second image is exposed and readout. The exposure of the second frame is equal to the readout time of the first frame. In this mode, two frames are exposed and readout for every trigger signal.

TOE

Triggered Overlap Exposure: This mode allows overlap of the exposure and readout of the sensor. In TOE Mode, the assertion of the trigger signal transfers the image data from the photo diodes into the CCD and begins readout. The photo diodes then begin imaging. The time between trigger assertions defines the exposure. The trigger pulse width is not used.

Exposure

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Free Run

The Camera Link control signal CC1 or external signal can be used to implement the trigger function.

Multiple COE-29 cameras can be synchronized with the CC1 signal.

In the Trigger Mode, this can be accomplished by sending the same trigger signal to multiple cameras at the same time.

Exposure control is performed differently for Free Run and Trigger readout.

Free Run exposure control is set in lines of erasure. Consider the CCD sensor in Free Run Mode. The sensor is exposing the photo diodes with a new image, while at the same time the previous image is being read from the storage CCD. Because of the reading of the previous image, the timing of the electronic shutter can only happen during the horizontal line blanking. Thus, the electronic exposure can only happen once every line. This results in Free Run exposure time resolution of one-line time. Considering that the exposure of the new image starts at the first line of readout and continues until the electronic shutter signal is asserted. The time of the electronic shutter is defined as a line of readout; therefore, the exposure time is set as the number of lines to erase, with the electronic shutter.

# lines of erasure

Unused (Erased) Exposure

# lines of erasure

Unused (Erased) Exposure

Erasure Pulse

Image Transfer

Erasure Pulse

Time

Image Transfer

Free Run exposure example: Long exposure

Erasure Pulse

Image

Transfer

Erasure Pulse

Time

Image Transfer

Unused (Erased) Exposure

# lines of erasure

# lines of erasure

Exposure

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Free Run exposure example: Short exposure

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TPD

rising edge

TPD

Triggered Mode

Triggered exposure control is set in pixel clock increments. A special trigger clock in the COE-29, which is equal to the pixel clock divided by 4/16/64/1024, is used to calculate the triggered exposure time. The triggered exposure is set with a register called the Transfer Pulse Delay (TPD). TPD is the time from the trigger to the transfer of the photo diode image data into the CCD storage area for readout. In the COE-29 Trigger Mode, the camera waits for a trigger while simultaneously flushing the internal CCD. When a trigger is detected the TPD counter starts from zero. The TPD counter is used to time the electronic erasure pulse that is used to clear the photo diodes and begin exposing a new image. This electronic erasure pulse requires 6 TPD time periods (Minimum TPD is 6). The TPD counter is then incremented using the spe- cial trigger clock (1/64th the pixel clock) until the TPD counter is equal to the TPD register. When the TPD counter equals the TPD register, the image transfer and readout cycles are started.

Trigger rising edge

CCD Flush Erasure Exposure Image Readout CCD Flush

Time

Triggered Program Exposure example: TPE TPD determines the exposure

Trigger

CCD Flush Erasure Exposure Image Readout CCD Flush

Time

Triggered Manual exposure example: TME Trigger pulse width plus TPD determines the exposure

Mode interactions:

FRM + ASYNC RESET = FRS (Free Run Synchronized mode)

TOE modifies TPE and TME modes

TME exposure time = TPD + Trigger Pulse Width Exposure

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Trigger Parameters PS Enable

DGO enable LUT Enable PDC

Enable Horizontal

Binning Vertical Binning

Sensor Timing Control

Free Run Parameters PS Enable

DGO enable LUT Enable PDC

Enable Horizontal

Binning Vertical Binning

Features in Modes

A special feature of the COE-29 is the ability to turn image processing features on and off in the Exposure and Trigger Modes. Each mode has its own enables for:

COE-29 Exposure Specific Mode Enables

Mode Description and Example

DGO Digital Gain and Offset: The DGO can be used in a portrait photography example to enhance the live preview mode image contrast (leaving no effect on the triggered image).

LUT

Lookup Tables: The look up tables can be used to apply a gamma function to a live preview and not to the triggered image. This is desirable when an attractive live image is needed, but the final image is heavy software processed and only raw image data is needed.

PDC Pixel Defect Correction: The PDC circuit must be disabled in the binning modes.

BINNING Binning: Horizontal and Vertical binning can be specified sepa- rately for each mode.

Commands to the COE-29 camera can specify if the command is to be applied to the Free Run Mode, the Trigger Mode, or common to both modes.

Readout Mode Free Run or Trigger

Mode Control Block Diagram

SE

LE

CT

Exposure

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Triggered Input

The COE-29 can run in Free Run or Triggered mode. Free Run mode allows the cam- era to continuously image frames. The exposure time is allowed to start only during the end of a line being clocked out of a CCD. This process limits the exposure resolution and limits the maximum exposure time.

Trigger mode allows an external source, hardware, or software to generate an image frame. Opto Engineering cameras typically have 2 hardware triggers and one software trigger. The COE-29 camera has an extra hardware trigger that is available on a connector located on an internal board for custom applications. This extra trigger input located on an internal camera circuit board is unusable by default. Please contact Opto Engineering if this application needs an extra trigger input.

Below is a schematic diagram showing the trigger input and its options.

The three hardware trigger signals in this schematic are cc1_in (Camera Link), trig_brd_con (extra input not accessible for most users) and trig_pwr_con (trigger input on the power connector).

In normal use, the camera is triggered by the Camera Link frame grabber using CC1 (cc1_in) or an external wire into the camera via the power connector (ext_pwr_con). Opto Engineering defaults the cameras External Trigger Select (ext_trig_sel) to select the power connectors trigger line (trig_pwr_con).

The trigger polarity controls both the Camera Link CC1 input and the connector input. Trigger Select (trig_sel) determines what input is selected to control the camera.

Trigger Input

Exposure

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The hardware trigger runs into a software trigger module. When a software trigger (software_trig) is initiated, the software trigger module takes over the trigger signal to the camera (trig_in) and activates a trigger. The trigger input to the camera (trig_in) is active high.

The software trigger input pulse can be programmed to be stretched out to the cam- era. The minimum pulse is 1ms. This programmable pulse width is not accurate to the millisecond. For best measurable results, use the software trigger input with TPE (Triggered Programed Exposure) mode.

Target Index Command R/W Description

42 00

01

0x0000 0x0001

0x0000 0x0000

R/W trigger input select CC1 trigger input select power connector

trigger polarity active low trigger polarity active high

02 05 Software Trigger W 0xXXXX = trigger pulse width plus 1ms. ** Where 0x0000 = 0ms + 1ms = 1ms. This 1ms timer is not accurate and not intended to be used as an accurate trigger input timer.

04

FB

03

2F

Trigger Input Select

0080

W

R

0x0009 = trigger in CC1 (CL Cable)** 0x000A = trigger In external power cable **

0x0000 = trigger is CC1 0x0080 = trigger is external power cable

04

FB

0e

5B

Strobe/Trigger Control

0080

W

R

0x0004 = positive Trigger

polarity** * 0x0005 = negative Trigger polarity**

0x0080 = positive Trigger polarity** 0x0000 = negative Trigger polarity**

0xFC 58 External Trigger Select

W 0x0001 = Board Trig Connector **

0xFB 58 External Trigger Select

W 0x0001 = Power Trig Connector (Default)**

0xFB 58 x0001 R 0x0001 = Power Trig Connector (Default)** 0x0000 = Board Trig Connector ** E

xposure

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Strobe Output

Strobe Output Basics

The strobe output signal is a camera output that goes active when the sensor starts an exposure and ends when the exposure is complete.

The strobe out circuit allows the camera integrator flexibility for the strobe control. The camera strobe (strobe_sig) signal goes active when the camera starts its expo- sure time and goes inactive when exposure is complete.

The strobe line can feed back a trigger input signal to verify the camera is receiving a trigger. This may be a useful debugging tool. When using trigger echo on the strobe out pin, the echoed trigger polarity will be inverted.

Scope plot shows the camera strobe echoing the trigger input signal. The trigger signal is in red and the strobe out signal is in blue. Fval is yellow.

Strobe Output

Exposure

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Strobe Output Commands

The strobe can also be controlled by a control application. This strobe select (strobe_sel) control allows the application software to select the exposure driven strobe or a manually controlled signal. When the strobe select is in manual mode, the application can hold the strobe signal at any level or it can toggle the signal with control commands.

This strobe select can be used to stop the exposure driven strobe output when the camera is in Free Run mode or at any time. The application can hold the strobe pin as a logic level high or low.

Target Index Command R/W Description

41 00

01

02

03

0x0000 0x0001 0x0000 0x0001 0x0000 0x0001 0x0000 0x0001

R/W strobe polarity low strobe polarity high strobe disable (manual strobe) strobe enable (exposure active) echo trigger disable echo trigger enable manual strobe output level low manual strobe output level high

04

FB

0e

01

Strobe/Trigger Control

0x0080

W

R

0x0000 = negative Strobe polarity ** 0x0001 = positive Strobe polarity **

0x0080 = negative Strobe polarity ** 0x0000 = positive Strobe polarity **

FC FB FB

01 01 01

0x0010 0x0010 0x0010

W W R

strobe disable (manual strobe) ** strobe enable (exposure active) ** 0x0000 = strobe disable (manual mode) ** 0x0010 = strobe enabled (exposure active) **

FC FB FB

5B 5B 5B

0x0004 0x0004 0x0004

W W R

echo trigger disable ** echo trigger enable ** 0x0000 = echo trigger is disable ** 0x0040 = echo trigger is enable **

FC FB FB

58 55 55

0x0080 0x0080 0x0080

W W R

manual strobe output level low ** manual strobe output level high ** 0x0000 = manual strobe set low ** 0x0080 = manual strobe set high **

Exposure

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Free Run Mode (FRM)

In Free Run Mode (FRM), the COE-29 camera generates all timing signals to the CCD and to the Camera Link port. The trigger signal is ignored. The exposure is set with the ERASURE register. A minimum ERASURE value of 1 result in the maximum ex- posure time. The maximum ERASURE value, dependent on the CCD used, sets the minimum exposure time.

Target Index Command R/W Description

04 03 Readout Mode Select W 0x0000 = Free Run Exposure

02 02 Set Free Run ms W Set FR time in milliseconds * 100

02 03 Set Free Run us W Set FR time in us

02 02 Get Free Run ms R Return actual time in millisec- onds * 100

02 03 Get Free Run us R Return actual time in us (0xFFFF = too large).

Exposure

Read Out

FVAL

Strobe

ERASURE

Read Out N-2 Read Out N Read Out N-1 Read Out N + 1

Exposure N + 1 Exposure N-1 Exposure N + 1 Exposure N

Exposure

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Strobe Output Commands

In Free Run Sync Mode (FRS), the COE-29 camera generates all timing signals to the CCD and to the Camera Link port in FRM with the following exception: After the image is transferred into the interline storage area of the CCD, the camera waits for the trigger to assert. Thus, the camera waits for a SYNC signal, provided by the trig- ger; therefore, allowing several cameras to be slaved to the trigger signal.

Target Index Command R/W Description

04 03 Readout Mode Select

W 0x0004 = Free Run Synchronize (Note: ASYNC reset will work)

Trigger period Note: Trigger must fall

before the end of read out

Trigger

Synced by Trigger

FVAL

FRS Example: To synchronize multiple free running cameras, connect the triggers to the same source and set the cam- eras to FRS Mode. Note that the trigger timing is very critical and that the trigger period must be slightly greater than the free run frame in order to sync at the maximum possible rate.

Camera Link Trigger

COE-29

Camera in FRM

COE-29

Camera in FRM

COE-29

Camera in FRM

Exposure

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Free Run Exposure (FRE)

Free run exposure time is set in lines of erasure. The resolution of the exposure is in horizontal line times. Two commands are provided for calculating the free run time from a specified time variable (milliseconds or microseconds). The closest available time is selected and set in the internal time variable. The maximum free run time is dependent on the sensor, readout mode, and pixel clock speed. The millisecond variable is set as ms*100 to give more resolution to the command. This results in a maximum possible exposure of 655ms, although the value is sensor dependent.

Target Index Command R/W Description

04 03 Readout Mode Select W 0x0000 = Free Run

02 02 Set Free Run ms W Set FR time in milliseconds * 100

02 03 Set Free Run us W Set FR time in us

02 02 Get Free Run ms R Return actual time in millisec- onds * 100

02 03 Get Free Run us R Return actual time in us (0xFFFF = too large).

Example:

Set free run time to 10 ms

{w020203E815} 0x3E8 = dec 1000 = 10ms * 100

{w02032710C9} 0x2710 = dec 10000us = 10ms

Exposure

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Triggered Program Exposure (TPE)

TPE exposure time is set in lines of erasure. The resolution of the exposure is in hori- zontal line times. Two commands are provided for calculating the free run time from a specified time variable (milliseconds or microseconds). The closest available time is selected and set in the internal time variable. The maximum TPE time is dependent on the sensor, readout mode, and pixel clock speed. The millisecond variable is set as ms*100 to give more resolution to the command. This results in a maximum possible exposure of 655ms, although the value is sensor dependent.

Target Index Command R/W Description

04 03 Readout Mode Select W 0x0001 = Trigger Program Exposure

02 00 Set Trigger ms W Set TR time in milliseconds * 100

02 01 Set Trigger us W Set TR time in us

02 00 Get Trigger ms R Return actual time in milliseconds * 100

02 01 Get Trigger us R Return actual time in us (0xFFFF = too large).

04 03 Trigger Input Select W 0x0009 = Trigger Input CC1 (CL Cable) 0x000A = Trigger Input External Power Cable

04 0e Strobe/Trigger Control W 0x0004 = positive Trigger polarity 0x0005 = negative trigger polarity

Expo

sure

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Triggered Manual Exposure (TME)

Triggered Manual Exposure Mode (TME), uses the trigger pulse to start a pro- grammed expose/readout cycle. The exposure is set by the width of the trigger pulse and Transfer Pulse Delay (TPD) register (factory set to minimum). TME Mode is the same as TPE Mode with the exception that the exposure is extended by the trigger pulse width.

Target Index Command R/W Description

04 03 Readout Mode Select W 0x0002 = Trigger Manual Exposure

02 00 Set Trigger ms W Set TR time in milliseconds * 100

02 01 Set Trigger us W Set TR time in us

02 00 Get Trigger ms R Return actual time in milliseconds * 100

02 01 Get Trigger us R Return actual time in us (0xFFFF = to large).

04 03 Trigger Input Select W 0x0009 = Trigger Input CC1 (CL Cable) 0x000A = Trigger Input External Power Cable

04 0e Strobe/Trigger Control W 0x0004 = positive Trigger polarity 0x0005 = negative trigger polarity

Trigger

SUB (Erase)

Strobe

Transfer Pulse

Exposure

PWT

TTS

TP

TPW

TEXP

Read Out

TS

Exposure

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Triggered Double Exposure (TDE)

Triggered Double Exposure Mode (TDE), uses the trigger pulse to capture two images in rapid succession. This is accomplished by capturing the first image in the photo di- odes, transferring this image to the vertical CCD, and then capturing a second image in the photo diodes. The first image is read from the CCD as the second image is ex- posed. The second image is then transferred and read from the CCD. The second image exposure is fixed to the readout time of the first image.

Target Index Command R/W Description

04 03 Readout Mode Select W 0x0003 = Triggered Double Exposure

02 04 Transfer Pulse Delay R/W 0x0007 to 0xFFFF

04 1B Transfer Pulse Width R 0x0004 = TPW (Preset at factory)

02 00 Set Trigger ms W Set TR time in milliseconds * 100

02 01 Set Trigger us W Set TR time in us

02 00 Get Trigger ms R Return actual time in millisec- onds * 100

02 01 Get Trigger us R Return actual time in us (0xFFFF = to large).

02 0E TPD resolution R/W 0x0000 = 4 clock periods 0x0001 = 16 clock periods 0x0002 = 64 clock periods 0x0003 = 1024 clock periods

04 03 Trigger Input Select W 0x0009 = Trigger Input CC1 (CL Cable) 0x000A = Trigger Input Exter- nal Power Cable

04 0e Strobe/Trigger Control W 0x0004 = positive Trigger polarity 0x0005 = negative Trigger polarity

Trigger

Exposure

Image 1 Exposed

As TPE cycle

Image 2

Exposed

FVAL

Image 1

Transferred

Image 2

Transferred

Image 1

Read out

Image 2

Read out

Exposure

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Software Trigger

This command forces an internal trigger from a software command. The soft trigger pulse has a width in µs as specified in the data field. The range is 1 to 65535 ms (65sec). The timing is approximate due to the inaccuracies in the microprocessor time function. The exposure time is set with the TDP register in TPE Mode. The set trigger high/low can be used to create an arbitrary long exposure. The software trig- ger is logically OR’d with the CL hardware trigger so the user must disable the hard- ware trigger on the capture card for this to function correctly.

Target Index Command R/W Description

02 05 Soft Trigger W Issue a soft trigger with width in ms

02 06 Soft Trigger high W Sets trigger high

02 07 Soft Trigger low W Sets trigger low

Exposure

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Read Out Read Out N-2

Read Out Read Out N-2

Asynchronous Reset

The Trigger Modes may be used in an Async Reset when the COE-29 is operated in a Free Run Mode (FRM) and is reset by the trigger signal.

In this mode, the camera runs as if it is in FRM and waits for a trigger.

Once the trigger signal is recognized, the camera “resets” by flushing the internal CCD’s and erasing the photo diodes. The selected triggered image is then exposed and readout.

The camera then returns to FRM.

Target Index Command R/W Description

04 05 Readout Mode Select W Async Reset Enabled

04 06 Readout Mode Select W Async Reset Disabled

04 07 Readout Mode Select W Runs Valid Enabled

04 08 Readout Mode Select W Runs Valid Disabled

Trigger

Exposure

FVAL

Strobe

Async Reset Mode with Run Valid Disabled

Trigger

Exposure

FVAL

Strobe

Async Reset Mode with Run Valid Enabled

Triggered Exposure Bad

Triggered Exposure Bad

Read Out N+1 Bad Data Triggered Read Out Read Out N-1

Exposure N+2 Exposure N+1 Exposure N-1

Read Out N+1 Bad Data Triggered Read Out Read Out N-1

Exposure Exposure Exposure N-1

Exposure

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Binning

Binning uses the CCD sensor to combine adjacent pixels and lines to effectively create larger pixels. The COE-29 can bin video data independently in both horizontal and vertical modes. Vertical binning merges the charge from adjacent lines on the CCD and creates a composite line in the horizontal shift register on the CCD. This binned data is then readout as a standard line. Vertical binning can be performed in 1 to 32 line increments. Special care must be taken when binning very bright images, because the charge in the horizontal shift register can overflow and cause image artifacts. Horizontal binning is performed as a digital summation within the FPGA. There is no speed difference between digital and analog binning. Horizontal binning can be performed in 1 to 16 pixel increments. The users capture device must qualify the video data with the DVAL signal for horizontal binning to function. The H-bin math sums the pixel data. The user can use the bin data average mode to average the binned pixel data. This will reduce noise and increase the dynamic range of the camera.

Target Index Command R/W Description

04 04 Mode Register W 0xM000 = Enable Bin

04 04 Mode Register W 0xM002 = Disable Bin

M = 0: Common—both, M = 8: Free Run only, M = 4: Trigger only

04 28 Trigger Mode V Bin R/W Values 1 to 32 (1 is no binning)

04 29 Trigger Mode H Bin R/W Values 1 to 16 (1 is no binning)

04 2A Free Run Mode V Bin R/W Values 1 to 32 (1 is no binning)

04 2B Free Run Mode H Bin R/W Values 1 to 16 (1 is no binning)

04 52 Bin data average mode R/W 0x0000 = Sum binned horizontal pixel data 0x0001 = Divide sum by 2 0x0002 = Divide sum by 4 0x0003 = Divide sum by 8

Exposure

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Strobe Signal

The COE-29 Strobe signal is a 3.3V LVTTL signal that is active whenever the CCD is exposing an image. The strobe signal is very useful for analyzing and optimizing imaging applications. The strobe can be used to activate an illumination source. The strobe signal cannot drive significant current and should be buffered if used in this fashion.

Target Index Command R/W Description

04 0e Strobe/Trigger Control Write 0x0000 = negative strobe polarity 0x0001 = positive strobe polarity 0x0002 = Active during free run 0x0003 = Inactive during free run 0x0004 = positive Trigger polarity 0x0005 = negative trigger polarity (Always active during trigger)

Free Run Mode (FRM) STROBE: Yellow = trigger, Blue = LVAL, Red = STROBE, Green = FVAL

CCD:4020 Exposure = 0x0400 lines

Trigger Programmed Exposure (TPE) STROBE:

Yellow = trigger, Blue = LVAL, Red = STROBE, Green = FVAL CCD:4020 TPD = 0x1000

Trigger Double Exposure (TDE) STROBE: Yellow = trigger, Blue = LVAL, Red = STROBE, Green = FVAL

CCD:4020 TPD = 0x1000

Free Run Synchronize (FRS) STROBE: Yellow = trigger, Blue = LVAL, Red = STROBE, Green = FVAL

CCD:4020 Exposure = 0x0400 lines Exposure

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Analog Controls

COE-29 camera uses four analog to digital converters (ADC) from Analog devices, one for each tap of the CCD sensor. Each ADC has a programmable analog gain stage that can be adjusted from 6dB to 40dB. Each ADC also incorporates an active black clamp offset control feature. The offset can be selected from 0 to 256 in a 12 bit pixel space. The ADC also has a special feature for optimizing color sensor filter response.

Target Index Command R/W Description

00 01 A: Gain R/W A channel controls

00 02 A: Clamp Level R/W

00 21 B: Gain R/W B channel controls

00 22 B: Clamp Level R/W

01 01 C: Gain R/W C channel controls

01 02 C: Clamp Level R/W

01 21 D: Gain R/W D channel controls

01 22 D: Clamp Level R/W

12 bit data

ADC 12 bit

data

12 bit

data

12 bit data

Imaging

ADC ADC

ADC

Ana

log

to D

igital C

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Gain

The ADG gain range is from 0 to 1023 counts, which represents a gain of 2 to 36dB. The pre-gain of the CDS stage adds an additional 4dB of gain resulting in a range of 6 to 40dB. The gain curve follows a linear-in-dB characteristic.

ADC gain can be calculated with the following equation.

Gain (dB) = 5.1 + (0.0359 * code)

Where code is the range of 0 to 1023.

Analo

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onvers

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Black Clamp

The ADC provides an active black clamping circuit that removes the CCD’s optical black off- set. This offset exists in the CCD’s shielded black reference pixels. The ADC removes this offset in the input stage to minimize the effects of gain change on the system black level. During the optical black (shielded) pixel interval on each line, the ADC output is compared with a fixed black level reference selected by the value in the clamp register. The clamp level is programmed in 8 bit resolution. If external digital clamping is used during the post processing, the black clamp can be disabled.

Target Index Command R/W Description

00 02 A: Clamp Level R/W

00 22 B: Clamp Level R/W

01 02 C: Clamp Level R/W

01 22 D: Clamp Level R/W

CCD In

COE-29: Sensor, CDS, Analog to digital, and Clamping

2dB to 36 dB

12 bits

CDS VGA ADC

CLAMP CLAMP

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Gain

The ADG gain range is from 0 to 1023 counts, which represents a gain of 2 to 36dB. The pre-gain of the CDS stage adds an additional 4dB of gain resulting in a range of 6 to 40dB. The gain curve follows a linear-in-dB characteristic.

ADC gain can be calculated with the following equation.

Gain (dB) = 5.1 + (0.0359 * code)

Where code is the range of 0 to 1023.

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Pixel and Column Defect Correction

Pixel Defect Correction (PDC) is used to correct gross defects in an image sensor. The PDC circuit can force pixels to black or white, replace pixels with the left or right neighbor, or make an average of their neighbors or the last pixel corrected. There are separate PDC enables for Free Run and Trigger Modes. The PDC circuit can operate on either pixels or columns, but not both. The column corrector is useful for DSC grade sensors. The PDC is loaded from a specially formatted file.

A Column Defect Corrector (CDC) can be used to correct bad CCD columns. It uses the same correction codes; however, it does not use the row number.

Target Index Description Read

Write Modes

04 1C PDM Mode W 0x0002 = Enable PDC 0x0006 = Disable PDC

0x0001 = Enable CDC 0x0003 = Disable CDC

Pix

el, R

ow

and C

olu

mn D

efe

cts

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Lookup Tables LUTS

Lookup Tables (LUT) (OEM Only) are used to transform video data from sensor samples to any arbitrary value. Any 12 bit value can be transposed into any other 12 bit value. LUT’s can be loaded from tables stored within the COE-29 camera or directly from the users application.

Target Index Command R/W Description

04 04 Mode Register W 0xM007 = Enable LUT 0xM008 = Disable LUT

M = 0: Common—both, M = 8: Free Run only, M = 4: Trigger only

04 18 LUT Load Command W

04 45 LUT Mode R/W 0x0000 = load from com port 0x0001 = load from com port and save to EEPROM 0x0002 = load from EEPROM

04 46 Gamma LUT W Loads a gamma LUT where data is a number from 1-100 = gamma * 100 Note 45 dec = 0x2D hex

12 bit data

12 bit data

Look Up Table Block Diagram

Example LUT File of 0.45 gamma table (Some values omitted due to space constraints)

0, 0

1, 96

2, 132

3, 159

4, 180

4093, 4094

4094, 4094

4095, 4095

4096 entry table of 12 bit values

Loo

kup T

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The Lookup Table (LUT) is loaded using a sequence of character commands that are acknowledged with a return character from the COE-29 camera. Each command com- ponent should wait for the return character and check its status.

The table must be loaded in two passes as the internal FPGA data path to the LUT memory, because it is only a single byte wide. The high byte is loaded in the first pass and then the low nibble is loaded in the second pass.

The command sequence for loading the LUT is as follows:

Command Ack char Description {w04450001FF} : ! Optional save to EEPROM while loading {w0418000000} : ! LUT load command

> : ! Starts the LUT load sequence

Send 4096 entries for the LUT high byte

#xxxx : @ Loads a byte to the LUT where xxxx = hex number high byte Example: 0x1234 => 0x12

: $ Indicates end of first sequence

Send 4096 entries for the LUT low byte

&xxxx : * Loads a byte to the LUT where xxxx = hex number low byte Example: 0x1234 => 0x34

: % Indicates end of second sequence

Acknowledgement of load sequence : ! Indicates end of LUT load

Once the LUT is saved into EEPROM it can be reloaded into the FPGA with:

Command Ack char Description {w04450002FE} : ! Set to EEPROM load mode

{w0418000000} : ! LUT load command from EEPROM

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Digital Gain and Offset

Digital Gain and Offset (DGO) are used in situations where analog gain and offset are either to course or not applicable. The digital gain ranges from 0.002 to 16x in 0.002 increments. The digital gain is represented as a hex number where 0 x 1000 repre- sents a gain of 1X. The digital offset ranges from –4095 to +4095 in increments on 1 count. These gain and offset ranges allow for full 12 bit precision without round-off error. There are separate DGO enables for Free Run and Trigger Modes

Target Index Command R/W Description

04 04 Mode Register W 0xM005 = Enable Digital Gain and Offset 0xM006 = Disable Digital Gain and Offset

M = 0: Common—both, M = 8: Free Run only, M = 4: Trigger only

04 2c A Tap Digital Gain R/W

04 2d A Tap Digital Offset R/W

04 2e B Tap Digital Gain R/W

04 2f B Tap Digital Offset R/W

04 36 Master Digital Gain R/W

04 37 Master Digital Offset R/W

04 38 Master DGO Enable R/W 1 = enable, 0 = disable

12 bit tap video data

12 bit data

Digital Gain and Offset

Digital Gain and Offset

Minimum Setting

Minimum Value

Step Max Set- ting

Max Val- ue

Nominal Value

Nominal Setting

Gain 0x0000 1/4096 1/4096 0xFFFF 16x 1x 0x1000

Offset 0x8FFF -4095 1 0x0FFF +4095 +0 0x0000

12 bit Offset 16 bit Gain

Dig

ita

l G

ain

and

Offset

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Temperature Detector

The temperature of the COE-29 camera is obtained though a solid state device located on the CCD PCB. The temperature sensor is located as close as possible to the warm- est component in the camera. The temperature sensor does not read the CCD temper- ature.

Target Index Command R/W Description

04 07 Camera Temperature R Temperature in degrees Celsius

T

em

pera

ture

Dete

cto

r

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