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University of North Carolina at Charlotte Department of Electrical and Computer Engineering

Laboratory Experimentation Report Name: Ethan Miller Date: June 24, 2015 Course Number: ECGR 3156 Section: L03 Experiment Titles: [2] Operational Amplifiers, [3] Summing Amplifier and Applications, [4] Comparators and Schmitt Triggers Lab Partner: Joseph Bumgardner Experiment Numbers: 2, 3, 4 Angelo DeMatteo, Zack Brady Objectives:

Experiment 2: The purpose of this lab lets the experimenter to be familiarized with an operational amplifier (op-amp) and to be able to conduct the different types of operation including inverting, non-inverting and the integrator op-amp. Experiment 3: The purpose of this lab lets the experimenter to be familiarized with an operational amplifier (op-amp) and to be able to conduct the different types of operation including the summing amplifier, digital to analog converter (DAC), and temperature sensing amplifier. Experiment 4: The purpose of this lab lets the experimenter to be familiarized with an operational amplifier (op-amp) and to be able to conduct the different types of operation including comparators and the Schmitt trigger amplifier.

Equipment List: Items Asset # MB-106 Breadboard 00000001 AFG310 Arbitrary Function Generator 00000002 Agilent InfiniiVision 2000-X Series Oscilloscope 00000003 E3612A Power Supply 00000004 Agilent 34461A 6 ½ Digital Multimeter 00000005 RF - 47K, 120K, 4.3K, 150K, 75K, 37.5K, 18.75K 00000006 RS -10K, 1M, 1K, 19.6K 00000007 C-10µF, .1µF, 100uF 00000008 LM741 00000009 Cadence 00000010 1N40004

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Relevant Theory/Background Information: Experiment 2: Operational amplifiers (op-amps) have been known to be useful devices. These amplifiers are called operational because the use of math operations that can be done on them. The following are a list of different operations of op-amps: amplifiers, attenuators, summers, integrators, differentiators, filters, oscillators, non-inverting and inverting, difference, and instrumentation. Op-amps are designed to sense the difference between the two input signals. The output signal of an op-amp has a value that is very large compared to the difference of the two input signals. The gain of the circuit was determined by Equation 1. The response for the op-amp has been used a direct-coupled differential amplifier feedback control characteristic. (Direct-Coupled is amplifying the DC with a time varying signal) The customary symbol for an LM741 op-amp is shown in Figure 1. Where the input pins are 3 and 2, output pin is 6, the voltage rails are pins 7 and 4 and the offset pins are 5 and 6. Non-inverting and inverting op-amps represent the positive and negative terminals, respectively.

Figure 1: LM741 Op-Amp

Figure 2:LM741 Pin Locations

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A single stage amplifier has been built with one transistor; however the gain of a single stage amplifier were often inadequate. This was solved by cascading with a NPN and PNP transistor to balance out the temperature effects, plus other considerations were involved. Multistage amplifiers were built with a single chip, using an integrated circuit (IC). Advantages of an IC have been known for the following 1) improved noise immunity, 2) superior frequency response, 3) stability, 4) low power consumption and 5) low cost. The output voltage of an op-amp has been known for the difference between the input voltages multiplied by its open loop gain. The gain was denoted by AV. The effect of a finite was denoted as 𝑉𝑉𝑂𝑂𝑂𝑂𝑂𝑂

𝑉𝑉𝐼𝐼𝐼𝐼 . When the positive input terminal was grounded there

was a negative gain otherwise known as an inverting op-amp. Ideal op-amps are defined by the following parameters 1) no or very little current was drawn into the op-amp, thus the positive and negative terminals have 0 amps, (2) the input impedance was infinite ( 3) the output impedance was 0 ohms. In order for the gain to be finite at the output, the difference between the two input signals has to be 0 volts. A virtual short is the voltage at the positive terminal that will appear at the negative terminal. A virtual ground is the voltage at the negative terminal having a 0 voltage, but was not physically connected to ground. Ideally the gain was assumed to be infinite, and as the gain approaches infinite the ratio for the gain was found by the ratios of the feedback resistance. LM741 op-amp was used in this experiment which has a dual in-line package called DIP. Op-amps have two ways to anguished from the top of the op-amp, which are notches or dimples. The pin layout for the IC is shown on the datasheet. The pin numbers usually start at the 1 from the notch or the dimple and go to the end of the IC, usually to pin number 8. An op-amp pin layout is shown in Figure 2. Shown in Figure 2, are a set of pins called null-offset, which are set to 0 volts. In the case of the IC does not have a output of 0 volts, the null-offset needs to be set to ensure that the op-amp was ideal.

Figure 3: Inverting Amplifier

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Referring to Figure 3 (inverting op-amp), a formula was develop that will give the gain of the circuit. Since terminal 3 was connected to ground, terminal 3 and terminal 2 will have the same voltage, assuming ideal op-amps. Using Kirchoff’s current law the gain is shown in Equation 2 (inverting op-amp). Furthermore, if we introduce a capacitor, where RF was the formula will be dependent of the frequency, shown in Equation 3. This is called an inverting integrator amplifier. To show this was an integrator the input was a time-varying function (sin wave). As the virtual ground at the inverting terminal causes the input voltage to emerge across ZIN, then the current flows through the capacitor and causes a charge to collect. By assuming the circuit begins at 𝑡𝑡 = 0, then from an arbitrary time the current has left on the capacitor the charge is equal to the integral of the current. After some careful, KVL equations the final equation across the capacitor is shown in Equation 4.

Vout = Av(V1 − V2) (Eqn. 1)

AV =−ZFZIN

(Eqn. 2)

AV =−ZFZIN

= −�−1

ωC� �ZIN

= 1

ωCZIN (Eqn. 3)

VOUT(t) = −1

CR� VIN(t)t

0dt − VC (Eqn. 4)

Experiment 3: In this experiment the summing amplifier and two of its applications are going to be addressed. Let’s first consider the summing amplifier, shown in Figure 4. A summing amplifier consists of multiple inputs at the inverting terminal. From experiment 2, the virtual ground appears at the negative terminal. Ohm’s law states that the currents IN, I1, I2, are given by the voltage divided by the resistance. All currents sum together to generate a total current, I, that will be enforced to RF. The output voltage can be now determined from a simple inverting op-amp, shown in Equation 5. By adding the currents together the output voltage increases. The idea behind a summing amplifier was to integrate multiple signals at the input, while keeping the input source separate to one another. This means that when more than one input signal was placed into the circuit the output voltage stays constant to the sum of the input voltages. This also means that the designer can have multiple input signals applied to achieve all of the signals at the output. For example, say we have to design with two input signals a microphone and an iPod. With the summing amplifier, we can hear both of the signals at the output.

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A digital to analog converter (D/A or DAC) converts a digital signal with Nth number of bits (binary digit) to an analog output voltage. By starting at the input, a digital signal is applied. Digital signals consist of 1 or 0 (on or off). Depending on the number of bits depends on the number of multiple input signals must be applied to the summing amplifier. Let’s introduce a 4 bit DAC, this tells the circuit there are 24 or 16 combinations of output voltages. Now by switching the input voltages on and off to a DC power supply from 0 to 16 and by stacking the input resistors Rn = 2R. According to the on/off piston of the switches, the binary currents will be obtain from the input resistor. The current through RF will have the sum of these currents, which was then converted to its relative output voltage. The output voltage deceased by the step size from the resistors and thus creating an analog signal. A temperature circuit is appropriate for the input for a DAC. The temperature sensing circuit acts in a similarly way to a DAC, but one of the inputs would have a diode or some device that changes with temperature. Let’s say that the non-inverting terminal had a resistor and a diode in series. By using the formulas from a diode, shown in Equation 6 and 7 the temperature equation was then found, shown in Equation 8. In this equation the Q (charge) and K (Boltzmann constant) are constants. As the temperature changes, the current through the resistor and the diode changes. In order for current to pass through the diode, the voltage across the diode has to be greater than 0 volts. Since the cathode was connected to ground. If the diode was off there will be a greater voltage drop than if the diode was on. The input then goes into a DAC.

Figure 4: Weighted Summing Amplifier

VOUT = −�RF

R1V1 +

RF

R2V2 + ⋯

RF

RNVN� (Eqn. 5)

I = ISeVηVT� (Eqn. 6)

VT =kTQ

(Eqn. 7)

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T =Q(V1 − V2)

Kηln �I2I1�

(Eqn. 8)

Experiment 4: In this experiment the comparator and the Schmitt trigger will be analyzed. A comparator circuit works in a way to compare the two inputs on an op-amp. The output to a comparator measures the input by the following method: if the op-amp’s output was at the positive saturated value, then the comparator measured the non-inverting terminal; if the op-amp was at the negative saturated value, then the comparator measured the inverting terminal. Also note that a comparator can be used as an analog to digital convertor. This was implemented by applying a voltage signal at the inverting terminal and a ground at the non- inverting terminal. The results are either a logical 1 or 0. Logical 1 meaning that there was a voltage at the output and logical 0 meaning no voltage. On the other hand Schmitt trigger are design to sense the two input voltages and compare whether which was high or low, just like a comparator. The only difference between the comparator and the Schmitt trigger was the threshold, where the voltage stops. The following is how the device works, as the input voltage goes high or over the threshold. The output will stay at this threshold until it achiever a lower voltage. The low threshold acts in similar fashion. By creating this switching, on and off movement, the circuit then acts a digital signal.

Experimental Data/Analysis:

Experiment 2: In this lab the power supply was set to +/-15 volts with a 10K potentiometer for the input of the inverting and non-inverting op-amps. The potentiometer provides a voltage divider to generate a change in the input to conduct graphs shown in 33 and 34. Shown in Figure 5 was the first circuit constructed to measure the input and output voltage. A table of results was prepared by adjusting the potentiometer from -10 to +10 volts in an increment of 1 volt, shown in Table 1. When conducting the experiment the output voltage railed. This voltage reached a voltage that was greater than or equal to the power supply. Once this happened the percent error became very large. During stable operation of the op-amp the output voltage was within 5% error. As found the op-amp followed the input by the multiplication of the gain. When the input was at 2 volts the power rails were then measured. Therefore at an input of 1.99 volts the positive rail measured 14.92 volts and the negative rail measured -14.92 volts. The difference between the power rails was found to be 0 volts. By measuring these components, the op-amp was found to be in the linear region of operation. A similar producer was done to the circuit shown in Figure 6 and Table 2. This circuit resulted in a non-inverting op-amp with a gain of 2 (V/V). As shown again the output voltage railed when this voltage was greater than or equal to the one of the power rails. During linear operation the op-amp output voltage was found to be twice the input.

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Figure 5: Inverting Op-amp

Vinput (V) Measured Vout (V) Measured A*Vinput (V/V) Theoretical Percent error -10.03 14.220 47.141 69.835% -9.03 14.220 42.441 66.495% -7.97 14.220 37.459 62.038% -7.07 14.220 33.229 57.206% -6.03 14.230 28.341 49.790% -5.08 14.230 23.876 40.400% -4.08 14.230 19.176 25.793% -3.01 14.080 14.147 0.474% -2.01 9.717 9.447 2.858% -0.97 4.552 4.559 0.154% 0.04 -0.200 -0.188 6.383% 1.06 -4.922 -4.982 1.204% 1.99 -9.300 -9.353 0.567% 3.04 -13.606 -14.288 4.773% 3.99 -13.605 -18.753 27.452% 4.97 -13.604 -23.359 41.761% 6.01 -13.603 -28.247 51.843% 7.01 -13.601 -32.947 58.719% 8.04 -13.600 -37.788 64.010% 8.97 -13.599 -42.159 67.744% 10.06 -13.597 -47.282 71.243%

Table 1: Inverting Op-amp

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Figure 6: Non-Inverting Op-amp

Vinput (V) Measured

Vout (V) Measured

A*Vinput (V/V) Theoretical Percent error

-10.02 -13.567 -20.04 32.298% -8.99 -13.574 -17.98 24.505% -8.06 -13.574 -16.12 15.794% -7.06 -13.574 -14.12 3.867% -6.07 -12.195 -12.14 0.453% -5.08 -10.210 -10.16 0.492% -4.05 -8.133 -8.1 0.407% -3.01 -6.049 -6.02 0.482% -2.01 -4.043 -4.02 0.572% -1.02 -2.068 -2.04 1.373% 0.00 0.006 0 0.000% 0.95 1.923 1.9 1.211% 2.02 4.061 4.04 0.520% 2.99 6.007 5.98 0.452% 4.98 10.001 9.96 0.412% 6.00 12.047 12 0.392% 6.99 14.030 13.98 0.358% 8.00 14.206 16 11.213% 9.01 14.206 18.02 21.165% 10.00 14.206 20 28.970%

Table 2: Non-Inverting Op-amp

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An integrator circuit was constructed to measure the DC output voltage of the op-amp, shown in Figure 7. The switch was emitted to the circuit to ensure at a time of zero then the capacitor would be bypass. Since the switch was close the op-amp was performing a voltage follower and the voltage follower output was found to be approximate to 0 volts. At the time of the switch was to be open, the capacitor acted like a short which caused the output to begin at 0 volts. As time went on the capacitor become charged the capacitor acted like an open circuit. If the capacitor were to reach the open circuit the output voltage would be at the negative power rail. Although in the experiment the capacitor did not reach the charge limit because the time constant was found to be 10 seconds, instead the current across the capacitor was measured. The current across the capacitor was found by using Equation 9. As the change in voltage from 0 to -4 volts, a time was measured to be 5.95s and the current across the capacitor was found to be 6.7µA.

IC = C dVdT

(Eqn. 9)

Figure 7: Inverting Integrator Op-amp

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Figure 8: Low Pass Filter/ Inverting Integrator Op-amp

Another was constructed to analyze the input to output, shown in Figure 8. Three different input waveforms were measured against the output signal, shown in Figures 9 through 13. Each output was found to be in fact an integrator of the input. Two sine wave waveforms were measured to see that there was a 90 degree out of phase from each other. In Figure 13, the square wave input was set to 80 Hz because the circuit should stop integrating before the high cutoff frequency. At a 0 frequency the impedance of the capacitor was infinite. This resulted in a gain of 12 shown in Equation 16. As the frequency increases the gain depended on the capacitor. As a rule of thumb the function or circuit should work until the input frequency was 5 times the cutoff-frequency. The cutoff frequency was shown in Equation 15. Even though the cutoff frequency was not reached in the lab the overall graph of the output was belief to be correct.

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Figure 9: Square wave Input- Input (Yellow), Output (Green)

Figure 10: Sine wave Input @ 200Hz- Input (Yellow), Output (Green)

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Figure 11: Sine wave Input @ 400Hz- Input (Yellow), Output (Green)

Figure 12: Triangle wave @ 200Hz- Input (Yellow), Output (Green)

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Figure 13: Square wave Input @ 80Hz- Input (Yellow), Output (Green)

Another circuit was constructed to analyze the input to output, shown in Figure 14. Three different input waveforms were measured against the output signal, shown in Figures 15 through 18. Each output was found to be in fact a differential of the input. Two sine wave waveforms were measured to see that there was a 90 degree out of phase from each other. Also noted the square wave was the best waveform and the worst wave form was found to be triangle because there was a lot of noise at the output. In Figure 18, the square wave input was set to 350 Hz because the circuit should stop differentiating after the low cutoff frequency. The low cutoff frequency was found to be 10 KHz. As shown in Figure 18, the output started to stop differentiating the output. At 0 frequency the impedance of the capacitor was infinite. This resulted in a gain 0 shown in Equation 18. As the frequency increased the gain depended on the capacitor. As a rule of thumb the function or circuit should work until the input frequency was 1/5 times the cutoff- frequency. The cutoff frequency was shown in Equation 17. Even though the cutoff frequency was not reached in the lab the overall graph of the output was belief to be correct. [1]

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Figure 14: High Pass Filter/Inverting Differential Op-amp

Figure 15: Sine wave @ 200Hz- Input (Yellow), Output (Green)

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Figure 16: Square wave @ 200Hz- Input (Yellow), Output (Green)

Figure 17: Triangle wave @ 200Hz- Input (Yellow), Output (Green)

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Figure 18: Square wave @ 350Hz- Input (Yellow), Output (Green)

Laboratory Computation

Av =VoutVin

=−ZFZin

= −60K100K

= −.6VV

(Eqn. 10)

Av =VoutVin

=−ZFZin

= −100K

60K= −1. 6�

VV

(Eqn. 11)

Av =VoutVin

=−ZFZin

= 1

ωCZin=

5Kω

(Eqn. 12)

Av =VoutVin

=−ZFZin

= −47K10K

= −4.7VV

(Eqn. 13)

Av =VoutVin

=−ZFZin

= 20K10K

= 2VV

(Eqn. 14)

FH =1

2πRFCF= 13.2629 Hz (Eqn. 15)

AV =RF

(RFCω + 1)RIN= 12

VV

@ 0 Hz (Eqn. 16)

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FL =1

2πRINCIN= 10K Hz (Eqn. 17)

AV =−RFωC

(RINCω+ 1) = 0VV

@ 0 Hz (Eqn. 18)

VOUT = −VINRF2πFLC

RIN2πFLC + 1= −7.419 Vpk−pk (Eqn. 19)

FDL >15

FL > 2𝐾𝐾 𝐻𝐻𝐻𝐻 (Eqn. 20)

FIH < 5FH = 68.145 (Eqn. 21) Experiment 3: In this experiment a summing amplifier was constructed shown in Figure 19. The circuit had two input voltages one of which was a sine wave and the other was a dc input. The output wave was found to have a sine wave from a maximum value of -1V to a minimum value of -9V. A simulation of the circuit was examined in cadence to show how the output waveform acted, shown in Figure 20. Also measurements was found in the program and was found to be the correct values, shown in table 3. As a result the circuit was ready for testing in the lab and the lab resulted in similar values, shown in Figure 21.

Figure 19: Summing Amplifier

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Figure 20: Transient Analysis at the Output of the Summing Amplifier

Table 3: PSpice Measurements for the Summing Amplifier

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Figure 21: Oscilloscope Summing Amplifier Output Waveform

A DAC (digital to analog converter) was constructed to convert a digital signal to analog signal, shown in Figure 22. When the digital signal was set to the on position a logical 1 was set to 5 volts and when the signal was off the voltage was set to 0 volts. As the input changed the output changed. The table of results was shown in table 4. Also shown in the table are the theoretical voltages and the percent error.

Figure 22: Digital to Analog Converter Circuit

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Digital Input Output Voltage

Theoretical Voltage

Percent Error Bit #

0 0 0 0 -0.04 0 0.00% 0 0 0 0 1 -0.36 -0.326 10.43% 1 0 0 1 0 -0.68 -0.676 0.59% 2 0 0 1 1 -1 -1 0.00% 3 0 1 0 0 -1.33 -1.32 0.76% 4 0 1 0 1 -1.65 -1.646 0.24% 5 0 1 1 0 -1.97 -1.996 1.30% 6 0 1 1 1 -2.3 -2.32 0.86% 7 1 0 0 0 -2.61 -2.705 3.51% 8 1 0 0 1 -2.93 -3.031 3.33% 9 1 0 1 0 -3.26 -3.381 3.58% 10 1 0 1 1 -3.58 -4.007 10.66% 11 1 1 0 0 -3.9 -4 2.50% 12 1 1 0 1 -4.22 -4.331 2.56% 13 1 1 1 0 -4.55 -4.681 2.80% 14 1 1 1 1 -4.88 -5.007 2.54% 15

MSB LSB Table 4: DAC Output Voltage

The following circuit was built in the lab to achieve a temperature circuit, shown

in Figure 23 and in Figure 24 was the output voltage at 60℃. In order to get the right output voltage of 0 volts at the start the reference voltage was set to -5.31 volts. In order to achieve this a heat gun was place around the diode to achieve a change in current and voltage drop across the diode. As the voltage across the diode changed the output voltage changed dramatically. As soon as the gun was taken off the diode, the voltage across the diode was able to generate the same voltage at the start of the experiment which was about 0 volts at the output.

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Figure 23: Temperature Sensing Circuit

Figure 24: Temperature Sensing Circuit at 60 Celsius

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Laboratory Computation Summing Amplifier: Assume: Minimum output voltage was set to -9V, maximum output voltage was set to -1V Input Voltage was set to -5v and 200mVpk-pk , Let AVDC= 1V, RF = 40KΩ

AC: AV =VOVI

=−8Vpk−pk

200mVpk−pk= −40Vpk−pk =

−RF

R1 (Eqn. 22)

R1 =−RF

−40Vpk−pk= 1KΩ (Eqn. 23)

DC: AV =VOVI

=−(−5)

5= 1V =

RF

R2 (Eqn. 24)

R2 =RF

1V= 1KΩ (Eqn. 25)

4- Bit DAC: Assume: Input Voltage varied from 0 to 5V, RN = RN-1, Let AV =1, RF = 10KΩ R1 = R1 R2 = 2R1 R3 = 4R1 R4 = 8R1

V0 = −RF �V1R1

+V2

2R1+

V34R1

+V4

8R1� ∴ AV

−RF

R11.875 (Eqn. 26)

R1 = 18.75KΩ R2 = 37.5KΩ R3 = 75KΩ R4 = 150KΩ Temperature Sensing Circuit: Assume: Knee Voltage varies linearly & inversely at a rate of 2.5𝑚𝑚𝑚𝑚

℃� has a knee voltage of .6V at 20 Celsius, Output voltage varies from 0 to 5V at 20 to 100 Celsius, AV = 25, R1 = 3KΩ, VR = -5V

V0 = −RF �Vd1R1

+VRR2�

At 20 Celsius and Knee Voltage is .6

B = .6 + 2.5mV℃� × (20℃) = 650 mV ∴ Y =

−2.5mV℃

× T + 650mV (Eqn. 27)

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At 100 Celsius V0 = 5V

. 4 =−2.5mV

℃× (100℃) + 650mV

5 = −Rf

R1(. 6 − .4) − RF

R2(−5V) ∴ RF = 3R2 RF = 25R1 (Eqn. 28)

EV = VREF2N

= VHIGH − VLOW

2N=

4.88 − .0424

= .3025 V (Eqn. 29) Experiment 4: In this experiment a comparator was constructed, shown in Figure 25. In order to test the comparator the circuit had a sine wave input that had an amplitude at the lowest voltage. A DC input was then connected to the non-inverting terminal. The DC input was varied to demonstrate that the comparator would have an output that had either a positive power rail or a negative power rail. Shown in Figures 26, 27, and 28 were the results of the comparator. Two measurements were then taken to observe when the comparator would go into an unstable operation. The unstable started at 1.13 volts and ended at 1.21 volts.

Figure 25: Comparator Circuit

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Figure 26: Positive Output Comparator

Figure 27: Negative Output Comparator

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Figure 28: Unstable Operation Comparator

A Schmitt trigger was constructed to see how the unstable operation acted, shown in Figure 29. To achieve this feedback, reference voltage and the input resistor were calculated, shown in Equation 30 and 31. The source voltage was a variable voltage in order to see how the output voltage was demonstrating. The upper and lower limits of the circuit were then measured and were found to be 1.1 upper voltage and -.600 lower voltage. The measurements insured that the resistors and reference voltage were correct.

Figure 29: Schmitt Trigger

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A zero crossing/peak detector circuit was construed to measure the output voltage and to observe how the output was in compared to the input voltage, shown in Figure 30. The output voltage was then taken from the oscilloscope and is shown in Figures 31 and 32. Figure 31 had a reference voltage of 0 and Figure 32 had a reference voltage of 2 volts.

Figure 30: Zero Crossing & Peak Detector

Figure 31: Peak Detector & Zero Crossing at Vr of 0 Volts

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Figure 32: Peak Detector & Zero Crossing at Vr of 2 Volts

Laboratory Computation

Vupper = −VsatR1

R1 + R2+ VR

R2

R1 + R2 (Eqn. 30)

Vlower = +VsatR1

R1 + R2+ VR

R2

R1 + R2 (Eqn. 31)

𝑚𝑚𝑅𝑅 = .2345 𝑚𝑚 𝑅𝑅1 = 1𝐾𝐾𝐾𝐾 𝑅𝑅2 = 19.6𝐾𝐾𝐾𝐾

Vnoise rejection = +/− VsatR1

R1 + R2 (Eqn. 32)

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Conclusions: Experiment 2: In this experiment the operational amplifiers was constructed and tested for the output voltage, input voltage, and current through the capacitor in Figure 7 for an assortment of photographs that imposed the integrator and differential functions. During this experiment the output voltage of Figures 5 and 6 had a large percent error due to the condition of the op-amp. These diagrams were railing at the power supply when the output voltage reached higher than the power supply. After conducting the integrator and differential op-amp experiment photographs were shown on oscilloscope that was indeed a differential or integrator op-amp. These graphs were then verified with the cadence simulation. As a result the differential and integrator op-amp performed what was expected. Experiment 3: In this experiment the summing amplifier, DAC, and a temperature sensing circuit was constructed and tested. The summing amplifier performed the same results as the cadence simulation and acted of what was expected. On the other hand, the DAC was tested in the lab. This circuit acted as a summing amplifier and as a digital circuit was the inputted the output voltage increased with the input. When the temperature circuit was examined, the output voltage increased and decreased with temperature. Overall the circuits perform their action. Experiment 4: After experimented on the comparator, Schmitt trigger and the zero crossing detector the results were found to be approximately close to the theoretical results. The comparator resulted in a switching action between the power rails with an unstable operation when both terminals were close together. On the other hand the Schmitt trigger was a comparator but with no oscillations when the circuit was switching between the power rails. The zero crossing detector resulted in detecting the zero crossing with a sine wave input waveform.

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Post Lab: Experiment 2:

Shown in Figures 33 and 34 are the percent error vs. the change in input voltage. In both of this graphs the theoretical output voltage had a significant error because piratical applications the op-amp will have an output voltage at one of the power rails. Since this occupied the only justified percent error was at the output voltage which was below the power rails. This is showed by looking at the output voltage in red and the theoretical voltage in blue. When the output voltage proceed as a vertical line, this voltage railed. Therefore the percent error was below 5%. This was found that the op-amp was functioning correct in the linear region. The input voltage varied with percent

Figure 33: Inverting Op-amp Percent Error

Figure 34: Non-Inverting Op-amp Percent Error

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because the output voltage varied with percent. A steady gain was found between the input voltages. A calculation between the measured and theoretical output voltage in the differential circuit for a frequency that was much greater than FL. The measured value is shown in Figure 18 and the calculated value was found to be in Equation 19. Both of these had a significant amount between them. At the end of the experiment there was a realization that the Figure 18 was wrong in terms of the frequency. The cutoff frequencies to stop integrating and differentiating are shown in Equations 20 and 21. Shown in the following graphs are the cadence graphs for circuits in Figure 8 and 14. The input has a color of green and the output has a color of red. The graphs shown in comparison to the experiment resulted in the same waveform, but the output voltage did varied in the magnitude.

Figure 35: Integrator Inverting Op-amp @ 200Hz

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Figure 36: Integrator Inverting Op-amp @ 400Hz

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Figure 37: Integrator Inverting Op-amp-Square wave

Figure 38: Integrator Inverting Op-amp Triangle Wave

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Figure 39: Differential Inverting Op-amp- Sine wave @ 200Hz

Figure 40: Differential Inverting Op-amp- Square wave

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Figure 41: Differential Inverting Op-amp- Triangle wave

Experiment 3: The operation of Figure 19 was achieved and operated as excepted. The sinusoidal input waveform was found at 90 degree out of phase with the input. The AC gain was found and shown in Equation 22. The required gain was found to be approximately 40. This insured that there was actually an 8 volt peak to peak at the output. The DC gain was found by having a measurement at the output. This measurement was found to be approximately negative 5 volts. The output DC voltage insured that the DC gain was 1. Since there was a DC voltage at one of the inputs the overall waveform shifted down according to the DC offset (DC input). In the DAC converter the measured values were found to be as expected. Shown in table 4 are the percent error values. This values had a range of 2 to 5 percent in error. Some of the results had a nominal error of 10%. This could been cause by many things, but for the most part the theoretical output voltage was close to the measured output voltage. A voltage resolution was calculated for the DAC converter, shown in Equation 29. The voltage resolution tells the experimenter that each time a bit changed, this bit was on for this long. The operation of the temperature sensing circuit was found by applying the heater close to the diode. As the heater increased in the temperature the knee voltage across the diode decreased in voltage. This decreased in voltage was caused by the ratio of the voltage per temperature. This ratio also changed the thermal voltage. Since the reference voltage stayed the same and as the diode voltage decreased the output voltage decreased.

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Experiment 4: The comparator was found to be able to change a voltage between the positive and negative power rails. This was done by comparing the inverting and non-inverting terminals. When one of the terminals was greater than the other, the output would have voltage at the power rail. The unstable operation existed when both of the terminals were approximately close together in the order of millivolts. This circuit worked until both of the terminals were the same, so the limitations of the circuit will compare the input voltage as long as the changes of the input voltage was not slow once it reached the unstable operation. From the results in the Schmitt trigger was able to reduce the unstable operation of the comparator to known. Clearly the Schmitt trigger acted like a comparator but the unstable operation was found to be little to known at all. An effective way to reduce the noise of a comparator was to introduce a positive feedback. A positive feedback increased the switching speed of the comparator. Thus the Schmitt trigger provided a noise rejection range that was equal to Equation 32. In a lot of digital circuits a square wave has a rise time and a fall time, Schmitt triggers are used to reduce the rise and fall times, as well as noise in the circuit. As the zero crossing/ peak detector was built, the output voltage was found to be a square waveform. The circuit worked as the following as the input was increasing (gaining a more negative voltage), the output was found to be at the negative voltage power rail. As the input was decreasing (gaining a more positive voltage) the output was found to be at the positive power rail. At the point of which the output changes from positive to negative voltage or negative to positive voltage, the sine waveform detected the zero point on the x-axis. This can be used as a peak detector by the zero crossing. As the output changes, the peak of the sine wave changes.

List of Attachments: Original Data Sheet References: [1] A. .S. Sedra and K.C. Smith, Sedra/Smith Microelectronics Circuits, Oxford New York: Oxford University Press, 2010. [2] Lab Handout “Operational Amplifiers” [3] Lab Handout “Summing Amplifier and Applications” [4] Lab Handout “Comparators and Schmitt Triggers” This report was submitted in compliance with UNCC POLICY STATEMENT #105 THE CODE OF STUDENT ACADEMIC INTEGRITY, Revised August 24, 2008 (http://www.legal.uncc.edu/policies/ps-105.html) (ECM).