9
7’82 TEEE TF’ANSACTTQNS ON ELECTRON DEVICES, VOt. ED-30, NO. 7, JULY 1983 1979. sional MOS transistor analyzer,” IEEE Trans. Electron Devices, model of avalanchebreakdowninMOSFET’s,” IEEE Trans. N e e - [8] 3. A. Greenfieldand R. W. Dutton, “Nonplanar VLSI deviceanal- tron Devices, vol. ED-25, pp. 825-832, 1978. ysisusingthesolution of Poisson’s equation,” IEEE Trans. Elec- [6] T. Toyabe, K. Yamaguchi, S. Asai, and M. Mock, “A numerical VO~. ED-27, pp. 1540-1550, 1980. [7] S. Selberherr, A. Schutz, and H. W. Potzl, “MINIMOS-A tl inen- tron Devices, vol. ED-27, pp. 1520-1532, 1980. Optimizing Carrier LifIIiztime Profile for Improved Trade-off Betwelm Turn-off Time and Forvvard Drop VICTOR A. K. TEMPLE, MENIEIER, IEEE, AND FORREST W. HOLROYD Abstract-The trade-off between forward voltage drop and tlwice turn-off time can besignificantlyaltered by theproperlocatiorofa narrow region of lower lifetime, oriented perpendicular to the current flow. The proposed structureis discussed and calculations are precrl:.lkted to illustrate this alteration. In addition, differences in thyristor tu~:n~-off and diode turn-off in an inductive circuit and when drivenby a pwfect voltage source are investigated. Portions of this investigation WL. = *IS ,I re- ported at the 1979 and 1980 PESC Conferences. INTRODUCTION I N THIS PAPER we describe anovel device structure uti1 xing a selective carrier lifetime profile which offers a faster i lrrn- offofsemiconductor devices without the usual sacrifit.:c: in forward drop. This is done by introducing a limited regic 11 of reduced carrier recombination lifetime in the portion of th e de- vice in which peak carrier recombination would normally CI c cur during turn-off. Optimum low lifetime locations in di :Ides and thyristors appear to be qualitatively different. Wt de- scribe the proposed structures and comment on the resu1.h of our feasibility study which, to date, is based primarily on t:xact computer modeling. Preliminary device studies are undervriy. BACKGROUND Both switching speeds and turn-off charge are important con- siderations to circuit designers. For the most efficient ci1:1:1~its turn-off charge and turn-off time should be small. Naturally, for high-frequency application, switching time, which is cften dominated by turn-off time, should be short. Unfortuna xly, controlling turn-off speed by normal techniques results i~ an appreciable increase in forward voltage drop. The under1 ying Manuscript received March 10, 1982;revised February 17, 1983. The authors are with General Electric Company, Corporate Res1:::rch and Development Center, Schenectady, NY 12345. physical phenomenon which governs this trade-off is carrier lifetime T and the related property, diffusion length L. Given a certain device voltage, it is necessary to have a certain device thickness. If the lifetime is long enough that this thickness is less than one or two diffusion lengths, a high level of minority- carrier modulation is maintained, resulting in the desired low forward drop, but, turn-off time and stored charge are high, necessitating a compromise. It is known that doping semiconductor devices with lifetime killing impurities such as gold results in faster excess carrier recombination during turn-off of the device and thus faster switching speed [l] - [3], In semiconductor devices, such im- purity doping is usually applied to large areas of the device and throughout the entire bulk of the device. Significant de- sirable decreases in device turn-off time are achieved, accom- panied, however, by an attendant increase in device forward voltage drop. Various lifetime killing impurities other than gold have been used in junction semiconductor devices in attempting to achieve high switching speeds while simulta- neously increasing device forward voltage drop as little as possible. For example, doping with gold or platinum or using electron, proton, or gamma radiation all result in specific re- lationships between forward drop, turn-off time, and leakage current as thelifetime is varied. In this paper it is not the specific lifetime killing center which is considered but rather optimizing the concentration profile of such centers in such a way that turn-off time is greatly reduced but forward drop is not significantly increased. Actually, local killing of lifetime is not a new idea. Gold sinkers have been used in selective regions of power transistors to reduce turn-off time. Local regions of thyristors have also been selectively irradiated or gold doped to control carrier life- time [4] , [5] . What distinguishes our structure from prior art 0018-9383/0700-~~‘~’82$01.00 0 1983 IEEE

Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

  • Upload
    fw

  • View
    213

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

7’82 TEEE TF’ANSACTTQNS ON ELECTRON DEVICES, V O t . ED-30, NO. 7 , JULY 1983

1979. sional MOS transistor analyzer,” IEEE Trans. Electron Devices,

model of avalanche breakdown in MOSFET’s,” IEEE Trans. Nee- [8] 3 . A. Greenfield and R . W. Dutton, “Nonplanar VLSI device anal- tron Devices, vol. ED-25, pp. 825-832, 1978. ysis using the solution of Poisson’s equation,” IEEE Trans. Elec-

[6] T. Toyabe, K . Yamaguchi, S. Asai, and M. Mock, “A numerical V O ~ . ED-27, pp. 1540-1550, 1980.

[7 ] S. Selberherr, A. Schutz, and H. W. Potzl, “MINIMOS-A tl inen- tron Devices, vol. ED-27, pp. 1520-1532, 1980.

Optimizing Carrier LifIIiztime Profile for Improved Trade-off Betwelm Turn-off Time and

Forvvard Drop VICTOR A. K. TEMPLE, MENIEIER, IEEE, AND FORREST W. HOLROYD

Abstract-The trade-off between forward voltage drop and tlwice turn-off time can be significantly altered by the proper locatior of a narrow region of lower lifetime, oriented perpendicular to the current flow. The proposed structure is discussed and calculations are precrl:.lkted to illustrate this alteration. In addition, differences in thyristor tu~:n~-off and diode turn-off in an inductive circuit and when driven by a pwfect voltage source are investigated. Portions of this investigation W L . = *IS , I re- ported at the 1979 and 1980 PESC Conferences.

INTRODUCTION

I N THIS PAPER we describe a novel device structure uti1 xing a selective carrier lifetime profile which offers a faster i lrrn-

off of semiconductor devices without the usual sacrifit.:c: in forward drop. This is done by introducing a limited regic 11 of reduced carrier recombination lifetime in the portion of th e de- vice in which peak carrier recombination would normally CI c cur during turn-off. Optimum low lifetime locations in di :Ides and thyristors appear to be qualitatively different. Wt de- scribe the proposed structures and comment on the resu1.h of our feasibility study which, to date, is based primarily on t:xact computer modeling. Preliminary device studies are undervriy.

BACKGROUND Both switching speeds and turn-off charge are important con-

siderations to circuit designers. For the most efficient ci1:1:1~its turn-off charge and turn-off time should be small. Naturally, for high-frequency application, switching time, which is cften dominated by turn-off time, should be short. Unfortuna xly, controlling turn-off speed by normal techniques results i~ an appreciable increase in forward voltage drop. The under1 ying

Manuscript received March 10, 1982;revised February 1 7 , 1983. The authors are with General Electric Company, Corporate Res1:::rch

and Development Center, Schenectady, NY 12345.

physical phenomenon which governs this trade-off is carrier lifetime T and the related property, diffusion length L . Given a certain device voltage, it is necessary to have a certain device thickness. If the lifetime is long enough that this thickness is less than one or two diffusion lengths, a high level of minority- carrier modulation is maintained, resulting in the desired low forward drop, but, turn-off time and stored charge are high, necessitating a compromise.

It is known that doping semiconductor devices with lifetime killing impurities such as gold results in faster excess carrier recombination during turn-off of the device and thus faster switching speed [ l ] - [3 ] , In semiconductor devices, such im- purity doping is usually applied to large areas of the device and throughout the entire bulk of the device. Significant de- sirable decreases in device turn-off time are achieved, accom- panied, however, by an attendant increase in device forward voltage drop. Various lifetime killing impurities other than gold have been used in junction semiconductor devices in attempting to achieve high switching speeds while simulta- neously increasing device forward voltage drop as little as possible. For example, doping with gold or platinum or using electron, proton, or gamma radiation all result in specific re- lationships between forward drop, turn-off time, and leakage current as the lifetime is varied. In this paper it is not the specific lifetime killing center which is considered but rather optimizing the concentration profile of such centers in such a way that turn-off time is greatly reduced but forward drop is not significantly increased.

Actually, local killing of lifetime is not a new idea. Gold sinkers have been used in selective regions of power transistors to reduce turn-off time. Local regions of thyristors have also been selectively irradiated or gold doped to control carrier life- time [4] , [5] . What distinguishes our structure from prior art

0018-9383/0700-~~‘~’82$01.00 0 1983 IEEE

Page 2: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

TEMPLE AND HOLROYD: IMPROVED TRADE-OFF BETWEEN TURN-OFF TIME AND FORWARD DROP 7 8 3

Fig. 2. Plot of typical excess carrier concentration in the p- and n-base regions (normalized) during turn-off in a thyristor with no low lifetime region. (Note that after t = 0.2 T the peak concentration is located at "a".)

Fig, 1. Typical current (upper) and voltage (lower) waveforms showing thyristor turn-off illustrating the two main stages of turn-off.

is that we propose that lifetime be killed in a thin region of the device in a plane perpendicular to the on-state current flow, whereas prior structures have either killed lifetime throughout the device or in local regions extending downward (or upward) from the wafer surface (Le., parallel to the current flow).

DESCRIPTION OF THE CONCEPT The use of a selective lifetime profile in this paper is directed

toward decreasing switching time of semiconductor junction devices while maintaining a low forward voltage drop in the device. However, before describing the proposed device struc- tures we will describe a typical turn-off o fa thyristor. Fig. l(a) and (b) show typical anode current and voltage, respectively of a thyristor during turn-off [ 6 ] . Two stages of device turn-off may be clearly seen. First, a reverse voltage is applied to the device so that holes and electrons in the vicinity of the two end junctions are swept out through these junctions and result in a reverse current to the external circuit. These carriers are largely controlled by the applied reverse electric field in the device. During this time the anode current decreases rapidly through zero to a reverse peak as carriers are removed, the anode voltage remaining positive. The end junctions then become reverse biased and assume a voltage blocking state, causing the reverse current to decay toward zero primarily by recombina- tion in a manner which is largely independent of the circuit- controlled externally applied voltage. Turn-off is incomplete until stored charge (and current) is small enough that a reap- plication of a forward voltage will not result in turning on the device. Turn-on would occur if a high concentration of excess carriers still existed near the center of the lightly doped layer of the thyristor. Typically, the time required for the excess carriers near the center to be removed through recombination is substantially greater than the time required for the carriers near the end junctions to be removed in the first turn-offstage. Accordingly, this work concentrates on decreasing the time required to complete the second stage of turn-off.

Fig. 2 qualitatively illustrates the distribution of excess car- riers in the active region of a thyristor device. The number n of excess carriers is shown normalized to Z, the average carrier concentration in the device in the on-state. The various distribu- tions occur at the times illustrated which are referenced to the recombination lifetime, 7. It can be seen that the excess carriers towards the ends of the active region are quickly removed as was discussed earlier, being halved in approximately 5 percent of the recombination lifetime of the region. The excess carriers

4 32 @ec 0 Alcm'

P * P N' N+ , , -

Fig. 3. Measured plots of the open-circuit decay of the electron-hole distribution at 360 A/cm2.

t LOW LIFETIME t

(a) x=o REGION x = w

0.5

x = o x = w (bj

Fig. 4. (a) Thyristor structure with a single low llifetime region. (b) Plot of expected excess carrier concentration (normalized) during turn-off of the device in Fig. 4(a). Note the rapid decay of carrier concentration.

in the center of the active region, however, show an insignificant reduction during this short time and, in fact, remain at a sub- stantial level compared to the background doping level for several recombination lifetimes. Turn-off calculations by Porst [7] have described such carrier concentration profiles during turn-off of power rectifiers under various conditions. These have in fact been measured by Houston [SI for open-circuit decay. Fig. 3 (reproduced from [SI) shows dramatically that the peak carrier concentrations are originally located near the junctions. Unfortunately the experimental accuracy is not suf- ficient to follow the concentrations to the 1013 to 1014/cc level which is necessary for observing the co.mplete turn-off. In addition, being open-circuit decay, turn off proceeds some- what differently than it would in a normal circuit application.

Fig. 4(a) shows a thyristor with a low lifeti~me region intro- duced near the middle of its n-base at the x value which has the peak carrier concentration in Fig. 2. Fig. 4(b) shows sche-

Page 3: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

7 84. JEEE TIIANSACTJONS ON ELECTRON DEVICES, VOL. ED-30, NO. 7, JULY 1983

matically the expected effect on excess carrier concentrl.iion during turn-off. Carrier concentration in the lifetime 'killed region rapidly decays to values lower than in neighborirle re- gions causing a concentration gradient that rapidly driver; car- riers into that region from the surrounding normal lifetime regions.

The effect on forward drop of the low lifetime regio1:iL de- pends on the added effective base width, measured in liiffu- sion lengths. If the fractional width of the low lifetime rt: I1,ion is fw and the fractional lifetime of that region is f , , the effec- tive base width B , would go from W/L to something I;ll:ger given by

W W B , = (1 - fw) +fw -

G L

Note that with too few lifetime killing centers, and/or an i lsuf- ficiently reduced lifetime, the low lifetime region recom 3ina- tion centers could become saturated, rendering them n:,uly transparent.

COMPUTER CALCULATIONS In theory, the structure discussed above should have a faster

switching speed. Forward drop should increase relatively little because the low lifetime region is thin and oriented perpen 3icu- lar to the current flow. However, the basic structure of 1:'ig. 4 is not easily achievable experimentally. Any practical ap'1)'Iica- tions would involve an extensive development program ( v . l ~ c h is currently underway at General Electric Co.) with an unkl ,own chance of success. To discuss, in detail, possible methotis for implementing the proposed structure is outside the scolq~: of this paper.

Instead, we have utilized our exact computer modeling I:#:ipa- bilities [9] , [lo] to study forward drop and turn-off tim: in a p-i-n diode and a thyristor both with the normal doping anc. life- time profile of Fig. 5, and with the lifetime profile struclltred as in the previous section. This is done in two ways, 8cil:her assuming a perfect voltage source drive, or assuming th; de- vice to be in the circuit shown in Fig. 6. These alternativt s; are denoted "V" for voltage driven and "C" for circuit contrc~lled. Cases 1 through 7 denote different carrier lifetime pr4:)'iles while letters D and T denote diode and thyristor. In all :ases device temperature was fixed at 300°C when on and Ihen allowed to rise during turn-off. The device, however, is 'lrery well heat sunk with double sided cooling and no dry interf,ices assumed in the thermal modeling. Maximum device tempera- ture during turn-off is listed for completeness in some ( ; I f the data tables.

The lifetime profiles and the results of our first investig t tion are summarized in Table I. All cases shown depict de\,ices which were turned off, not from equal current density, ; L I i we later found to be preferable, but from an on-state for ulrllich their forward voltage drop was 1.5 V. The data relevaqt to forward drop are the current density at 1.5 V in column . and the forward drop at 100 A/cmZ in column 2. The remaining columns are related to the reverse current waveforms inchding stored charge considerations. We will concentrate on hree items, these being: 1) t o F ~ defined as the length of time Sc I the reverse current density to decay from its peak value to a value of 1 mA/cm2, 2) t , defined as the time, measured frorl the

0 20 40 60 240 260 280 300 JUNCTION DEPTH IMICRONSI

Fig. 5. Thyristor doping and lifetime profile. For the diode merely change the sign of the doping density from X = 10 p to X = 50 1.1 and add 6 X Hole lifetime is 0.1 times electron lifetime.

reverse current peak, to the point at which the average excess n base carrier density is equal to the n base doping concentra- tion, and 3) T ~ ~ ~ , the reverse current decay time constant at the 100 mA/cm2 level. Other items of interest include ATOFF, the peak transient temperature rise, and two charge quantities, Q1 and Qz. Ql is the integral of the reverse current up to its peak at t p and Q2 is the charge integral beyond that point. The cases of Table I were not optimized to any great extent. What we set out to do was to find a case for which the non- uniform lifetime profile would give both a lower on-state drop and smaller values for OFF, t , , and T ~ ~ ~ . The few surprises contained herein (or rather hidden, as is sometimes the case when great quantities of computer data are available) are dis- cussed after briefly summarizing the data. This is followed in the last sections of this paper by a second stage of profile optimization, and a prescription for generating near optimum lifetime profiles.

VOLTAGE CONTROLLED DIODE (CASES 1DV TO 7DV) As the lifetime reduction factor in the center of the device

is increased from 1 to 3 to 10 to 50 in cases 1 to 4 we find that toFF is shorter for case 4 than for the standard case 5 in which the lifetime was reduced throughout by a factor of 3. Case 4, at the same time as having a 20-percent faster turn- off, also has about a 25-percent higher on-state current density at the 1.5-V forward drop point. The T~~~ and t , values are also faster for case 4.

DIODE TURN-OFF I N A REACTIVE CIRCUIT (CASES 1DC TO 5DC)

In the circuit configuration of Fig. 6, case 4 again represents an improvement over case 5 of about 25 percent in current capability and 20 percent in speed measured by to^^, t , , and T ~ ~ ~ . Now, however, because the circuit fixes the di/dt nearly up until the reverse current peak we find that in one aspect, namely the time to reach the reverse current peak, the standard case is somewhat faster. This is not unexpected since the reverse recovery current (and recombination) occurs throughout the device.

VOLTAGE CONTROLLED THYRISTOR (CASES 1 TV TO 7 T V ) Using the same lifetime profiles as for the diode cases, we

compared forward drop and turn-off times for thyristors turned off with a perfect voltage source. Here the current capability

Page 4: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

TEMPLE AND HOLROYD: IMPROVED TRADE-OFF BETWEEN TURN-OFF TIME AND FORWARD DROP 185

TABLE 1 COMPUTER TURN-OFF SIMULATION SUMMARY

Fig. 6 . Circuit used for the circuit controlled turn-off cases 1-7DC and 1-7 TC.

of the case 4 thyristor was about 60 percent higher than for the standard lifetime profile device of case 5. However, the OFF and t, times were still marginally faster for the standard case, despite the fact that r lo0 , the reverse current decay time constant at 100 mA/cm2, was 18 percent faster for the case 4 device. In later examining the excess carrier concentration profiles during turn-off, we found that the first thyrsitor turn off phase was dominated by the upper n+-p base-n base transistor

which, in the standard case, had a factor of 3 lower p-base life- time than the case 4 structure. This, of course,would also affect the case 5 thyristor forward drop more than it would the diode. Thus case 5 had a faster p-base turn-off phase and a slower n base turn off for a net draw, but had both a lower as well as a lower ap-n-p than did the case 4 thyristor. This is the major difference between the diode and thyristor results. The under- standing of this difference led to the optimum low lifetime profiles that will be discussed in the last part of this paper.

CIRCUIT CONTROLLED THYRISTOR TURN-OFF (CASES 1 TC TO 5 TC)

The major difference between the voltage and circuit con- trolled turn-off lies in a reduced di/dt during turn-off. The series inductor (see Fig. 6) holds down device di/dt while the parallel capacitor helps reduce reverse voltage transients. Since current cannot instantaneously reverse there is, a considerable period when forward current is being reduced in which device stored charge also decreases so that, at zero device voltage, the

Page 5: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

786 IEEE TFfiNSACTIONS ON ELECTRON DEVICES, VOL. ED-30, NO. 7 , JULY 1983

" 0 !O 100 I50 200 250 503 DISTANCE IMICRONS)

Fig. 7 . Hole distribution d u : ~ i ~ ~ g turn-off at 0, 5 , 10, 15, 20, and 30 ps. The steady-state (t = 0) diptdbution is given for case 1 TV as a refer- ence. Also given is the dccing profile plotted as the absolute value of NA + N g .

..

device stored charge partly reflects the steady state silored charge and partly the time to the zero voltage point and t klere- fore the turn-off dildt. Thus Ql and Q2 for cases 1C 1.21 5C are smaller than for cases 1V to 5 K This causes to^^ ' A ) be smaller. On the other hand the inductor forces tp and thuti to be larger. However, the main conclusion, that the 1if'::i ime profile of case 4 is better than that of case 5, stands unchanged.

NEW LIFETIME PROFILE EFFECTIVENESS AND OPTIMUM LOCATION

The results presented to this point indicate that the olrsrall effectiveness of the thin low lifetime region in reducing turn- off time while maintaining constant forward drop is any,irhere from 20 to 60 percent, depending on such things as thll: cur- rent level at which forward drop is compared or wheth:r we are comparing t oo l , to^^, or T ~ ~ ~ . From a circuit desilyler's standpoint t oo l , Q1, and Q2 are probably the most impc.11 tant parameters. However, the eCfect of the single low lifetiroe re- gion seems to be measured most directly in T~~~ since, ; I i: the current level (0.1 A/cm2) at which this is measured, i-region recombination has a peak somewhere near the center ( . ) I ' the device. As a matter of fact, the peak electron concentrarilm is located in case 5DV at X = 128 p , 116 p, and 92 p at 111:'berse current levels of 1.0 A, 100 mA, and 1 ma, respectively. 'Thus it can be seen that if a single low lifetime region were t o be optimally located it would have to shift somewhat during Iurn- off, and its optimum location would neither be the 140- 160 p of case 4DV or the 50-70 p of case 7DV but somethin?, like 120 to 140 p ,

Fig. 7 shows the i-region minority-carrier (hole) concent :; ttion versus position for cases 4 TV, 5 TI', and 7TV at several -limes after turn-off. Also plotted in Fig. 7 is the background (,oping profile and the t = 0 ps concentration profile for case 1 T F , the normal case with no lifetime reduction. It can be see1 that killing the lifetime in the center of the device reduc:;; the modulation level under steady state conditions. This cau:.(,:s the higher forward drop of all cases relative to case 1. Howe m , as

shown in columns 2 and 3 of Table I, this drop in modulation level is less than that which would be caused by an overall 3 times reduction in lifetime.

The calculations also provided computer generated plots, not shown here, of the electron (majority carrier) concentration profiles during turn-off, but the effects of the low lifetime re- gion are not as dramatic. During steady-state conditions the electron and hole distributions are essentially identical in the i-region. The most important difference during turn-off is that the electron profiles rapidly lose their modulating effect in the p-base quite early in the turn-off process. This is caused by the impedance at the emitter-p-base junction rising rapidly, shutting off further current flow. The most dramatic effect of the low lifetime region is thus the rapid decay of the minority- carrier (hole) concentration as a function of time in these regions, as shown in Fig. 4. A physical definition of turn-off would be that time at which the minority-carrier concentration falls below-the base region doping concentration. This point is tabulated as tq in Table I. fq is the reverse current at this time.

DIRECT COMPARISON O F CENTER, JUNCTION, AND OVERALL LIFETIME KILLING

The last section compared in some detail the turn-off of cases 4, 5 , and 7TV. However, several problems exist in that comparison, the first being that they do not have equal on- state current densities. This motivated us to do a second set of calculations in which case 5 , with the overall three times lifetime reduction, was taken as the standard case and the other cases generated by varying the lifetime of the low lifetime re- gions in cases 4 and 7 until we obtained equal on-state current densities at a 1.5-V forward drop. These new cases were de- noted 4' and 7' with on-state and general turn-off properties as listed in Table 11. Otherwise case notation is as in Table I. Table I1 contains one additional case, denoted as 47TV, which kills the lifetime in two separate 10-pm wide regions centered

Page 6: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

TEMPLE AND HOLKOYD: IMPROVED TRADE-OFF BETWEEN TURN-OFF TIME AND FORWARD DROP 787

TABLE I 1 EFFECTS OF CLSTER (case 4') OVERALL (case 5 ' ) A N D JUNCTION REGION

(case 7') LIFETIME REDUCTION

1 4 . I

9.1

10.2

1R.8

l 4 , 6

13.1

1 1 . 7

1 5 . 9

71 5

1'1 , ' I

73.0

T I II

1 1 . 9

at the same locations as cases 4 and 7 with relative lifetimes taken from cases 4' and 7'. This case is discussed separately.

The second problem was the need for a more precise under- standing of the difference between the diode and thyristor turn-off and to what degree a second low lifetime region such as that of case 47, could improve matters. Figs. 8-12 illustrate, as a function of time, some of the differences between center, junction, and overall lifetime killing in the circuit controlled thyristor turn-off. Fig. 8 shows the dynamic current decay lifetime with case 4'TV, as expected, having the fastest decay time constant from about 1.5 ps onward. Prior to that time, case 7' has the fastest decay, demonstrating that the upper transistor is initially dominating turn-off. When decay time constant is plotted against current density as in Fig. 9, case 5 has a faster decay than case 4' to a current level of about 7A, and case 7' is faster than case 4' all the way down to 250 mA. The. eventual upturn of the curves marks the point at which current density is approaching the thermal leakage level.

Fig. 10 plots hole concentration at t = 0 (on-state) and at 5 , 10, 15, and 20 ps into turn-off. With this plot we can now see why the diode and thyristor cases differ and why, in thy- ristor cases, tool (and tOFF) and tq could behave differently. In thyristor cases the first part of the current fall time is domi- nated by the more efficient n+-emitter -p-base -n-base action which is very effectively killed in case 7' by the 20-pm wide ~ / 1 5 4 low lifetime region abutting the p-base -n-base junction,

causing a very rapid drop in hole concentration at this junction. In fact, the tool point correlates well with that time at which the n-base hole concentration at the n-base side of the junction falls to the n-base doping level.

The initial advantage of cases 7' and 5 are basically, then, a faster t S l , using normal thyristor terminology (12). This is seen in Fig. 9 in its smaller initial current decay lifetimes. After the ts l or first (p-base) storage period, the current decay of case 4' is faster as it represents the fastest ts2 or n-base stored charge decay.

OPTIMUM THYRISTOR LIFETIME PROFILE It is clear therefore that lifetime profiles for the thyristor

(and this would include gate turn-off thyristors) should be optimized somewhat differently from p-i-n diodes or even tran- sistors, and a single low lifetime zone cannot optimally reduce both t O F F and tq . For interest sake we decided to run another case, denoted in Table I1 as 47TV, with two low lifetime re- gions, one to shut off the initial flow as in case 7' and the other to aid the carrier recombination in the center of the device as in case 4'. Table I1 shows that this has the smallest value of tOFF but a tq value of 16.5 ps, a value larger than that of case 4' but much smaller than that of case 7'.

We therefore began trying different multiple low lifetime locations with all cases normalized to have the same current density (120.3 A/cm2) at a 1.5-V forward drop. Eventually it

Page 7: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

IEEE '? IIANSACTIONS ON ELECTRON DEVICES, VOL. ED-30, NO. 7, JULY 1983

I I I I 4 0 5 IO I 5 20 25

TIME (pSEC)

1:ig. 8. Current decay time constant as a function of time for v; rious thyristor turn-off cases. Cases 47, 8, and 9 are discussed later lrl the text.

COLLECTOR CURRENT DENSITY (A/CM21

Fig. 9. Current decay time constant as a function of current densil) for several thyristor turn-off cases. Cases 47, 8, and 9 are discussec later in the text.

lOl2lI ' 1 , '... : j

DISTANCE (MICRONS1 0 100 200 300

.~ /,; ,... 2 0 ' 1 1

Fig. 10. Hole distribution during turn-off at 0 ,5 , 10, 15, 20, and .. 0 p s for TV cases 5 , 4', and 7'. Also given is the doping profile plott :ti as the absolute value O f Nd +No.

became clear that a good t , versus t01;1; compromise coulli be obtained by pulling down the excess y1 base hole concentra :.ion more or less uniformly. Two new profiles were of most intel est: 8TV, with reduced lifetime zones at each end of the n-1w.e region, and 9 TV, with zones at each end and the center of the n-base region. General turn-off characteristics are summar .xed in Table 111, using the same notation as in Table 11. Fig 11 shows reverse current as a function of time (from the point l,.he external voltage was reversed from +1.5 V with 120.3 A/;:m2

TIME IpSECI

Fig. 11. Thyristor current flow during turn-off for various lifetime pro- files. Points "X" denote t , times. Note that the inset table describes the lifetime profile differences from that of Fig. 5 as discussed in the text.

Fig. 12. Hole distribution during turn-off at 0, 5 , 10, 14 (one curve), 15, and 20 p s on the same scale as Figs. 7 and 10. Also shown is the doping profile plotted as the absolute value of NA + N o .

forward current to - 10 V) for these new cases plus cases 4', 5, 7', and 47 of the previous section. The insert table also de- scribes the lifetime profile, giving the center points of the low lifetime zones and their lifetime reduction factors. The net width of zones with reduced lifetime is 20 1.1. The "X" marks on the plot give our t , values at which excess n-base hole con- centration equals the n-base doping concentrations.

This figure shows that the fastest initial current reduction favors profiles which kill lifetime at the forward blocking junc- tion (i.e., case 7'). The shortest t , value is, however, the one which most uniformly drops the n-base region excess hole con- centration, in this case, case 9. This raises the possibility of designing for good t , or designing for maximum turn-off power dissipation by reducing to^^, which could be set, not at our 1 ma/cm2 value, but at the 10- or 100-ma level. In fact, strictly speaking, it is the integral of current and voltage from the time that the device voltage reverses that is the most relevant issue if t , is not a restriction.

It is also apparent from Fig. 11 that cases 8 and 9TV are an excellent compromise with small values of both t , and OFF. Fig. 12 shows why this is the case. Here, we are plotting hole

Page 8: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

TEMPLE AND HOLROYD: IMPROVED TRADE-OFF BETWEEN TURN-OFF TIME AND FORWARD DROP 789

TABLE 111

1.5 V 120.3 A/cm2 FOR DIFFERENT Low LIFETIME ZONES COMPARISON OF THYRISTOR VOLTAGE CONTROLLED TURN-OFF FROM

#'I?' 1.441 ,111 18.8 18.7 1.8 14.9 I 1.4

4 ' n 1 ,411 > , l 5 l 14.6 14 e 5 1.4 1a.1 I 5.9

7'W 1.440 ,127 11.1 1s .o 1.2 17.0 I .06

4 7 N 1,441 . l S S 11 .7 1 1 . 6 1 .6 16.6 I ,10

8 N 1,441 ,141 11 .a 11 , l 1 .3 11 ,9 / -50

9W 1.444 ,146 10.4 10.3 1 .1 9.9 I 1.8

concentration for different times during turn-off on the same scales as Fig. 10 (which dealt with cases 4', 5, and 7') for cases 47, 8, and 9. The local dips in hole concentration clearly mark the low lifetime locations. Correlating the n-base hole concen- tration time dependence with rate of current decay (Fig. 11) shows that the current decay in the initial few microseconds is related to hole concentration at the p-base junction and that at later times current decay follows overall n-base hole decay. Case 9, with the lowest current from 8 ,us onward, has a very uni- form n-base hole decay.

OPTIMUM DIODE LIFETIME PROFILE Although the results of the diode decay cases with a single

region low lifetime zone were clear we decided in Fig. 13 to plot reverse current as a function of time for a few more diode cases, i.e., the same cases as in Fig. 11. Here we can see that the fastest, least lossy turn-off is generated for case 4', as pre- dicted, which has its single low lifetime zone in the center of the n-base region. Since, with diodes, tq really has little meaning, the fact that case 47 has a slightly smaller tq value is unimportant.

LIFETIME REDUCTION' FACTOR

5DV 3 UNIFORM

Fig. 13. Diode current flow during turn-off for the :same lifetime profiles as in Fig. 11.

From our results it is reasonable to expect high voltage tran- sistors to behave more like the diode than the thyristor and that lifetime killing in a single zone, perhaps a third of the way into the lightly doped collector, would be blest. If two zones

Page 9: Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

790 IEEE ?’ {ANSACTIONS ON ELECTRON DEVICES, VOL. ED-30, NO. 7, J U L Y 1983

were used we would expect best results to be achieved. ,with low lifetime zones in the collector at the base collectorjunl:I.ion and perhaps about 60 percent through the lightly doped part of the collector.

CONCLUSION

The proposed lifetime profiles do improve the trade-off be- tween forward drop and turn-offtime. For highvoltage dioldes, our work shows that a single low lifetime zone located ill the center of the device can lead to a substantial reduction in ’ I n -

off time and losses compared to normal uniform lifetiml? :kill- ing methods. For example, case 4’DV has a turn off tin c’; of 9 ps compared to 17 ps for case 5.

For thyristors the optimum lifetime profile is more coln~pli- cated. If tq is critical, then killing lifetime at both ends as well as the center of the n-base region (case 9) gives the shorte ;‘I: t4 value. In the examples of Fig. 11 this profile also giverr the fastest current decay to 10 ma and below and a tq of 1 2 1 ps compared to I 5 ps for case 5. However, the fastest initial cur- rent decay favors lifetime killing at the forward blocking j mc- tion side of the n-base region. For example, in Fig. 11, milo 7’ reaches 100 mA in 2 ps compared to 8.5 p s for the stanlhrd case (case 5). For the thyristor cases it is also pertinent to !r;c.int out that the calculations did not include emitter shorts wllich affect initial device turn-off. Nor does the computer prol,ram include avalanche injection. This latter lack was unimportant in this study, however, as the n+-emitter -p-basejunction bL :ak-

down voltage was never exceeded in any of the examples cited. Neither of these lacks would affect our conclusion about t q , but might change to some degree our conclusion about to^^. These lacks plus a study of GTO and transistor turn-off are part of an on-going program of modeling improvement and device investigation.

REFERENCES [ 1 ] J. M. l’aifield and B. V. Gokhale, “Gold as a recombination center

in silicon,” Solid State Electron., vol. 8, p. 685, 1965. [ 2 J K. S. Tarneja and J. E. Johnson, “Tailoring the recovered charge

in power diodes using 2 MeV electron irradiation,” presented at Electrochemical SOC. Meet., paper 261RNP, 1975.

[ 3 8 . J. Baliga and E. Sun, “Lifetime control in power rectifiers using gold, platinum, and electron irradiation,” in IEDM Tech. Dig., p. 495, 1978.

[4 ] J. L. Brown, US. patent no. 3877997. [5 J A. Jaecklin et al., US. patent no. 3943549. [6] Gentry et al., General Electric SCR Manual, 5th ed., p. 124. [7 ] A. Porst, “Reverse transient behavior of power rectifiers,” in

Proc. IEEE IAS Meet. (Pittsburgh, PA), 1974. [SI D. E. Houston, S. Krishna, and E. D. Wolley, “Study of charge

dynamics in high speed power devices using free carrier absorption

[9 ] M. S. Adler and V.A.K. Temple, “Accurate calculations of the measurements,” in IEDM Tech. Dig., p. 504, 1976.

forward drop of power rectifiers and thyristors,” in IEDM Tech. Dig., p. 499,- 1976.

[ 101 -, “Dynamics of the thyristor turn-on process,” in IEDM Tech. Dig., 1977.

[ 11 J A. Herlet, “The forward characteristics of silicon power rectifiers at high current densities,” Solid State Electron., vol. 11, p. 717, 1968.

[12] A. Blicher, Thyristor Physics. New York: Springer, 1976, pp. 88-97.

High Efficiency GalnAs/lnP Heterojunction I M PATT Diodes

JEAN-CLAUDE DE JAEGER, ROM AIN KOZLOWSKI, AND GEORGES SALMER

Abstract- Heterojunction IMPATT diodes make it possible to proc .lice new high conversion efficiency devices, combining a low bandgap ! s I : I I ~ ~ -

conductor for the avalanche zone with a large bandgap material fol: Ilhe drift region. In this study, the heterojunction GaInAslInP which se!:nns particularly attractive is used in various structures. The theoretical! pre- dictions of performances are determined by a computer simula :ion which takes into account the main limitation effects of IMPATT di4:des and the influence of particular physical phenomena due to the ubi: of

Manuscript received December 29, 1982. This work was carried (nut with the support of the DRET.

The authors are with the Centre Hyperfrhquences et SemiconductcLlrs, Universith des Sciences et Techniques de Lille I, 59655 Villeneuve d’0 jcq Cedex, France.

heterojunctions and semiconductors, mainly the influence of injection currents. Potential performances of the proposed structure appear very attractive especially in the miltimeter-wave range using a MITATT mode (Mixed-Tunneling-Avalanche-Transit-Time) by combining tunneling cur- rent and avalanche multiplication injections.

LIST OF SYMBOLS X n-InP avalanche zone width. 6 Total avalanche zone width. (W-6) Drift zone width. A Area. I dc current.

0018-9383/38/07(!~~’-0790$01 .OO 0 1983 IEEE