Embed Size (px)
Citation preview
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
OrCAD Signal Explorer
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Introduction to SI
• What is SI?
• Who needs to be concerned with Signal
Integrity?
• Why are they becoming such an issue?
• What solutions does Cadence provide for SI
Simulations?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
A Signal
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
A Signal
Driver sends a signal to a receiver
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
A Signal
Driver sends a signal to a receiver which must arrive within known
thresholds
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
while the signal integrity engineers clear the path.
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
In one sentence… What are we trying to do?
0011001101100 0011001101100
0011001101100 ?01?00?10?1??
(not exactly sure)
0011001101100 Is it sending
something?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
SI Issus
• Reflection
• Crosstalk
• Distortion
• Ground Bounce
• …
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
When is a design „high-speed“?
• High-speed is not the same as high clock
frequency!
• What matter is device rise/fall Time and track
length
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
When is a design „high-speed“?
• «Long» transmission lines creates reflexions on
short rise/fall time
• Electrical long transmission lines:
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Why are they becoming such an issue?
• More and more high-speed signals on a board
• Miniaturisation
• Designs are becoming more complex (more
than one technology on a board)
Consequence:
• Controlled Impedance, Termination, Topology,
and Timing
• Use SI Tools to analyse your nets
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Cadence SI Simulation Tool
OrCAD SigXP
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Cadence SI Simulation Tool
OrCAD SigXP
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
How do we know what the signal will look like
when it reaches the receiver?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
How do we know what the signal will look like
when it reaches the receiver?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Driver Model
Receiver Model
How do we know what the signal will look like
when it reaches the receiver?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Driver Model
How do we know what the signal will look like
when it reaches the receiver?
Receiver Model
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Simple test….
Simulate
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Simple test….
Simulate
Expected Results
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Simple test….
Simulate
Expected Results What happened???
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Mismatches in Engineering Generally cause
problems…
Civil Engineers get it, you wouldn’t see these connected
Mechanical Engineers get it, these connections don’t exist
either
But Electrical Engineers do it all the time
15 ft
15 ohms
15 mm
75 ohms
75 mm
75 ft
1000 ohms
1000 ft
1000 mm
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
What happens when a signal hits a mismatch?
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
What happens when a signal hits a mismatch?
A BOUNCE DIAGRAM is
used to mathematically
calculate:
The magnitude of the
incident wave
AND
The magnitude of the
reflected wave
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Impedance mismatch cause reflections
Solution: Impedance Matching
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Terimination Options
• Serial Termination → Demo
• Pulldowm Termination
• Pullup Termination
• RC Termination
• Thevenin Termination
• «Dioden» Termination
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Crosstalk
• In electronics, the term crosstalk (XT) has the following meanings:
• Undesired capacitive, inductive, or conductive coupling from one circuit, part of a circuit, or channel, to another.
• Any phenomenon by which a signal transmitted on one circuit or channel of a transmission system creates an undesired effect in another circuit or channel.
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Mutual Inductance and Capacitance
• Crosstalk is the coupling of energy from one line
to another via:
– Mutual capacitance (electric field)
– Mutual inductance (magnetic field)
Zs
Zo
Zo
Zo
Mutual Capacitance, Cm Mutual Inductance, Lm
Zs
Zo
Zo
Zo
Cm
Lm
near
far
near
far
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Process with SI Simulation
• Pre-Route simulation
• Post-Route simulations
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Process with SI Simulation
• What‘s necessary:
– correct Xsection definition
– define DC net‘s
– assign Model‘s
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Process with SI Simulation
• Pre-Route Simulation:
– define constraint Rules
– define determination strategy
– create „clock Floorplaning“
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Process with SI Simulation
• Post-Route Simulation:
– timing verification
– signal verification
– Bus analysis
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Design Link: single DDR3 data line
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Design Link: a single DDR3 data line
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Bus Analysis
- Bus Analysis
- Sweep component values
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Define Design Constraints in the SigXP and
transfer them to PCB Editor
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Allegro PCB SI
• Allegro PCB SI XL
– Simulation
• Allegro PCB PDN Analysis
– New 3D-Fieldsolver for Power Integrity simulation
• Allegro PCB SI Multi Gigabit Option
– Channel Analysis, Bathtub-Curve
• Allegro SI GXL
– includes all
Allegro PCB SI XL A
lleg
ro P
CB
PD
N A
na
lys
is
Alleg
ro P
CB
SI
Mu
lti-
Gig
ab
it O
pti
on
Allegro PCB SI GXL
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h What‘s New in Signal Integrity
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
SI Application Mode
• Integration via context
menus
– Efficient Access to SI-
Functions
Highlight on hover
Context
sensitive
RMB menus
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
SI Application Mode
• Double-Click starts
– Signal Probe
– Model Assignment
– Show Element
Element Drag Shift-Drag Ctrl-Drag Double-Click
Net move move copy signal probe
Symbol move spin copy model assignment
Pin add connect
DRC Error show element
Cline Segs slide delay tune
Ratsnest add connect
Via slide move copy
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Allegro PCB Power Delivery Network Analysis
• Analyse of power supply
• Detects current and
temperature hot spots – Layers strucutre can be optimized
– Optimized selection of capacitors
– Detection Resonant frequencies
• Cadence 3D full wave Simulator
• For Power- and Ground Nets
• Analysis: – PI Planes
– PI Network
– IR Drop
• Flexible Use Model
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
• Showing current flowing direction with arrows
• Canvas selection reveals current value in Options pane
IR Drop Current Path Display
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
• Easy to find “hot spots”
• Current direction shown as well
IR Drop Current Density Display
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
Ende
Besten Dank für Ihre Teilnahme und für Ihr
Interesse!
Für Fragen, Anregungen oder
Bemerkungen erreichen Sie mich unter:
Tel.: + 41 (0) 56 485 91 91
E-Mail: [email protected]
FlowCAD
ww
w.F
low
CA
D.d
e
ww
w.F
low
CA
D.c
h
