27
1 1-1 Part 1: Combinational Digital Circuits Internet Engineering Dr. Jaroslaw Sugier Digital Circuits Design 1-2 Course Bibliography Victor P. Nelson, H. Troy Nagle, Bill D. Carroll, David Irwin: Digital Logic Circuit Analysis and Design, Prentice Hall Michael J.S. Smith: Application-Specific Integrated Circuits, Addison- Wesley Mark Zwolinski: Digital System Design with VHDL, Prentice Hall P.P. Chu: RTL Hardware Design Using VHDL, Wiley-IEEE Press www.xilinx.com: documentation for XC9500XL and Spartan-3E families http://www.zsk.ict.pwr.wroc.pl/zsk/dyd/did/dcd/ - course webpage: Digital Circuits Design Laboratory: Implementation and Simulation of Digital Circuits in Programmable Devices (pdf) documentation for laboratory boards: ZL-XC9572 (WUoT) and Spartan-3E Starter Board (Xilinx Inc.)

Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

  • Upload
    others

  • View
    6

  • Download
    0

Embed Size (px)

Citation preview

Page 1: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

1

1-1

Part 1: Combinational Digital

Circuits

Internet Engineering

Dr. Jarosław SugierDigital Circuits Design

1-2

Course Bibliography

• Victor P. Nelson, H. Troy Nagle, Bill D. Carroll, David Irwin: Digital

Logic Circuit Analysis and Design, Prentice Hall

• Michael J.S. Smith: Application-Specific Integrated Circuits, Addison-

Wesley

• Mark Zwolinski: Digital System Design with VHDL, Prentice Hall

• P.P. Chu: RTL Hardware Design Using VHDL, Wiley-IEEE Press

• www.xilinx.com: documentation for XC9500XL and Spartan-3E families

• http://www.zsk.ict.pwr.wroc.pl/zsk/dyd/did/dcd/ - course webpage:

• Digital Circuits Design Laboratory: Implementation and Simulation

of Digital Circuits in Programmable Devices (pdf)

• documentation for laboratory boards: ZL-XC9572 (WUoT) and

Spartan-3E Starter Board (Xilinx Inc.)

Page 2: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

2

1-3

--- I INTRODUCTION ---

1 Digital Circuits

Input signal: X = <x1, ... xn>, Output signal: Z = <z1, ... zm>

- both signals are DIGITAL

Digital signal = finite set of values

binary signal – digital signal with just two values

bit – a single binary signal (binary digit); [b]

byte – an 8-bit vector; [B]

1-4

The two binary values: „logical zero” and „logical one”

Physical representation – varies greatly:

• voltage signals, e.g.:

TTL: 0 ÷ 0.8V � „0” / 3 ÷ 5V � „1”,

RS-232: + 5 ÷ 15V � „0” / -5 ÷ 15V � „1”,

• control & robotics: current signals (“active zero”)

Code (def) = a mapping digital signal � bit vector.

E.g.: decimal code (representation of 0 ÷ 9 digits, usually on 4b), alphanumeric

codes (ASCII characters), etc.

In general: n – bit vector can encode 2n different values of some digital signal

Page 3: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

3

1-5

1.1 Notations for binary vectors

Natural Binary Code (NBC)

Bit vector = a positive integer number in positional notation with base 2:

• 2 digits: 0, 1;

• position weights: 20 = 1, 21 = 2, 22 = 4, 23 = 8, 24 = 16, ... .

E.g. 11001012 = 20 + 22 + 25 + 26 = 1 + 4 + 32 + 64 = 10110

Hexadecimal notation

Bit vector = a positive integer number in positional notation with base 16:

• 16 digits: 0, 1, ... 9, A, B, C, D, E, F;

• position weights: 160 = 1, 161 = 16, 162 = 256, 163 = 4096, ... .

E.g. 7h = 710, Ah = 1010, Fh = 1510, 10h = 1610, 1Ah = 2610, 21h = 3310, ...

1-6

Conversion NBC ↔↔↔↔ hex notation:

Every 4-bit group = one hex digit

5 A

0101 10102

10110 = 6 x 16 + 5 = 65h = 0110 01012.

1010 01112 = A7h = 10 x 16 + 7 = 16710.

Page 4: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

4

1-7

2 Combinational Digital Circuits

Sequence of input values X1, X2, ... XN

- generates sequence of responses Z1, Z2, ... ZN.

Remarks

a) Discrete time! t = 1, 2, …

b) This model would fail in case of non-digital (analogue) circuits

c) Zero-delay response of the abstract model: change of outputs immediately

after change of inputs

1-8

THE FUNDAMENTAL DISTINCTION: TWO CASES

(2) ZN = f(X1, X2, ... XN )

– response depends on input history (circuits with memory)

(1) ZN = f( XN )

– response depends only on the current input (i.e. no memory effects)

⇓COMBINATIONAL circuits (switching circuits)

⇓SEQUENTIAL circuits

Page 5: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

5

1-9

The Truth Tables

The basic method for definition of any combinational circuit.

E.g. for n = m = 2:

Remarks:

a) n inputs => 2n rows in the table;

b) this cannot describe operation of a sequential circuit.

1-10

3 Sequential circuits

Question: Is a superposition of combinational circuits also combinational?

An example: CC1, CC2 = comb. circuits with known truth tables

=> Feedback loop!

Superposition of combinational circuits makes a combinational circuit ifit does not contain any feedback loop! (acyclic connectivity graph)

Page 6: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

6

1-11

--- II COMBINATIONAL CIRCUITS ---

1 Boolean algebra

DEFINITION

• K – a set with binary operators “+” and “⋅” (“sum” and “multiplication”);

• 0, 1 = some two elements of K;

• ∀ a, b, c ∈ K the following axioms are met:

(A) a + b = b + a a ⋅ b = b ⋅ a (commutative law)

(B) a ⋅ (b + c) = (a ⋅ b) + (a ⋅ c) a + (b ⋅ c) = (a + b) ⋅ (a + c) (distributive law)

(C) a + 0 = a a ⋅ 1 = a (neutral elements)

(D) ∀ a ∈ K ∃ /a ∈ K: (complement operator)

a + /a = 1 a ⋅ /a = 0

Notation used on these slides:

George Boole, 1853

1-12

Laws of Boolean algebra

From axioms (A) ÷ (D) it can be shown that:

(E) a + (b + c) = (a + b) + c (a ⋅ b) ⋅ c = a ⋅ (b ⋅ c) (associate law)

(F) a + a · b = a a · (a + b) = a (redundancy law)

(G) a + /a · b = a + b a (/a + b) = a b

(H) a + a = a a · a = a (identity law)

(I) a + 1 = 1 a · 0 = 0

(J) /(a + b ) = /a · /b /(a · b) = /a + /b (deMorgan’s theorem)

(K) /0 = 1 /1 = 0

(L) /(/a) = a

(…)

• An example: power set in set theory (operators: ∩, ∪)

Page 7: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

7

1-13

Every Boolean law has a dual version: any valid statement is also

valid with…

- operators “·” replaced with “+”, and vice versa

- 0 replaced with 1, and vice versa.

Attention

These simplifications are NOT valid:

a + b = a + c does NOT imply: b = c,

a b = a c does NOT imply: b = c.

1-14

Binary Boolean algebra

Also from axiom (D) :

Set K = {0, 1} and the two operators defined as:

meet all requirements of the definition.

Page 8: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

8

1-15

Proof: for example, check all axioms using truth tables.

For axiom (B) ver. 2:

1-16

3 Boolean functions; functors and gates

DEFINITION

Boolean function of n binary variables x1, x2, ... xn is a mapping

,

where the Boolean domain Dn:

⇔ f has “don’t care” values.

“Don’t care” values are common in practice and are important in function

implementation!

Page 9: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

9

1-17

So:

1) Boolean function of n variables = combinational circuit of n inputs and

one output:

2) a circuit with m outputs => a set of m functions

3) truth tables are the basic way of definition also for boolean functions

1-18

3.1 Boolean functions of 1 variable

f0 = constant 0, f3 = constant 1

f1(x) = x, - non-inverting logic amplifier, buffer

f2(x) = /x, - inverter, negator; NOT gate

Page 10: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

10

1-19

3.2 Boolean functions of 2 variables

In general: for n arguments of the function (n inputs of the circuit) there are 2n

rows in the truth table, with 22ndifferent 0 / 1 distributions – thus this is also

the number of different Boolean functions (including trivial cases, like

constant functions etc.).

n = 2 => 16 different functions of 2 variables.

1-20

Boolean functions of 2 variables - part 1 of 2:

Page 11: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

11

1-21

Boolean functions of 2 variables - part 2 of 2:

1-22

3.3 Logic gates

Page 12: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

12

1-23

MULTI-INPUT GATES

3 inputs => 28 = 256 different functions. Not categorized….

Multi-input functions: superposition of 2-in gates or, especially, multi-input

AND / OR / XOR gates:

1-24

with x1 = 0:

f(0, x2, ... xn) = 0 f1(x2, ... xn) + f2(x2, ... xn).

4 Canonical disjunctive form (sum of products)

• A formal method of transition: truth table → Boolean expression

• For now: functions without “don’t cares” only

Any function f(x1, x2, ... xn) can be decomposed with regard to any of its

variables, e.g. x1:

f(x1, x2, ... xn) = x1 f1(x2, ... xn) + /x1 f2(x2, ... xn)

with x1 = 1:

f(1, x2, ... xn) = f1(x2, ... xn) + 0 f2(x2, ... xn),

Page 13: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

13

1-25

f(x1, x2, ... xn) = x1 f(1, x2, ... xn) + /x1 f(0, x2, ... xn).

After decomposing for x2:

f(x1, x2, ... xn) = x1 [x2 f(1, 1, ... xn) + /x2 f(1, 0, ... xn)] +

/x1 [x2 f(0, 1, ... xn) + /x2 f(0, 0, ... xn)].

Decomposing for x3,...xn leads to CANONICAL DISJUNCTIVE FORM:

f(x1, x2, ... xn) = x1 x2 ... xn f(1, 1, ... 1) +

x1 x2 ... /xn f(1, 1, ... 0) +

.

. 2n minterms

.

/x1 /x2 ... xn f(0, 0, ... 1) +

/x1 /x2 ... /xn f(0, 0, ... 0).

1-26

An example for n = 2:

f(x1, x2) = x1 x2 f(1, 1) +

x1 /x2 f(1, 0) +

/x1 x2 f(0, 1) +

/x1 /x2 f(0, 0).

• Every minterm is multiplied by function value for some specific input vector:

xi = 0 in the vector ⇔ xi is inverted in the minterm.

Writing a disjunctive form equivalent to any truth table:

• find all 1’s of the function in the table,

• write a sum of minterms that correspond to all 1’s.

Page 14: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

14

1-27

Examples

1) EX-OR function

z2 = /x1 x2 x3 + x1 /x2 x3 + x1 x2 /x3 + x1 x2 x3

2) 3b majority function

1-28

3) 3-input parity bit generator

z3 = /x1 /x2 x3 + /x1 x2 /x3 + x1 /x2 /x3 + x1 x2 x3

4) Johnson code generator

z4 = /x1 /x2 /x3 + /x1 /x2 x3 + /x1 x2 x3

Page 15: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

15

1-29

f(x1, x2, ... xn) = [x1 + f(0, x2, ... xn) ][/ x1 + f(1, x2, ... xn)].

Re-writing for x2:

f(x1, x2, ... xn) =

{x1 + [x2 + f(0, 0, ... xn) ][/ x2 + f(0, 1, ... xn)] } { / x1 + [...][...] } =

[x1 + x2 + f(0, 0, ... xn) ] [x1 + /x2 + f(0, 1, ... xn)] [/x1 + x2 + f(1, 0, ... xn)]

5 Canonical conjunctive form (product of sums)

f(x1, x2, ... xn) = [x1 + f1(x2, ... xn)][/ x1 + f2(x2, ... xn)]

with x1 = 1:

f(1, x2, ... xn) = [1+ f1(x2, ... xn)][0 + f2(x2, ... xn)],

[/x1 + /x2 + f(1, 1, ... xn)]

/ axiom (B): a + b·c = (a + b)(a + c) /

with x1 = 0:

f(0, x2, ... xn) = [0+ f1(x2, ... xn)][1 + f2(x2, ... xn)].

1-30

2n maxterms

f(x1, x2, ... xn) = [x1 + x2 +...+ xn + f(0, 0, ... 0)] ⋅

[x1 + x2 +...+ /xn + f(0, 0, ... 1)] ⋅

.

.

.

[/x1 + /x2 +...+ xn + f(1, 1, ... 0)] ⋅

[/x1 + /x2 +...+ /xn + f(1, 1, ... 1)].

E.g. for n = 2:

f(x1, x2) = [x1 + x2 + f(0, 0)] ⋅

[x1 + /x2 + f(0, 1)] ⋅

[/x1 + x2 + f(1, 0)] ⋅

[/x1 + /x2 + f(1, 1)]

Page 16: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

16

1-31

In multiplication 1’s are irrelevant – only 0’s of the function remain.

Every maxterm sums with value of the function for some specific input vector:

xi = 1 in the vector ⇔ variable xi is inverted in the maxterm

Writing a conjunctive form equivalent to any truth table:

• find all 0’s of the function in the table,

• write down a maxterm for every 0 according to the above rule to create the product.

1-32

Examples

1) EX-OR

2) 3b majority function

Page 17: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

17

1-33

Abbreviated notation

Sum ∑ (product ∏) with bit vectors that gives 1’s (0’s) of the function.

Examples:

1) 3b majority circuit:

f(x1, x2, x3) = ∑(011, 101, 110, 111) = ∏(000, 001, 010, 100).

or just

f(x1, x2, x3) = ∑(3, 5, 6, 7) = ∏(0, 1, 2, 4).

2) 4b parity generator:

f(x1, x2, x3, x4) = ∑(0001, 0010, 0100, 0111, 1000, 1011, 1101, 1110)

= ∑(1, 2, 4, 7, 8, 11, 13, 14)

= ∏(0000, 0011, 0101, 0110, 1001, 1010, 1100, 1111)

= ∏(0, 3, 5, 6, 9, 10, 12, 15).

1-34

6 Functional completeness

A set of Boolean functions is functionally complete, if all other Boolean

functions can be constructed from this set and a set of input variables.

1) {NOT, AND, OR} – the basic functionally complete set

… from any of the canonical forms.

2) {NOT, AND}

Because: a + b = /(/a ⋅ /b) (deMorgan’s law J)

3) {NOT, OR}

Because: a ⋅ b = /(/a + /b) (as above, dual form)

Page 18: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

18

1-35

4) {NAND}

/a = /(a ⋅ a)

a ⋅ b = /( /( a ⋅ b) ⋅ /( a ⋅ b) )

a + b = /( /( a ⋅ a) ⋅ /( b ⋅ b) )

5) {NOR}/a = /(a + a)

a ⋅ b = /( /( a + a) + /( b + b) )

a + b = /( /( a + b) + /( a + b) )

6) {EX-OR, AND}

/a = a ⊕ 1 ( /a 1 + a /1 = /a )

a ⋅ b = a ⋅ b – functor included in the set

a + b = a ⊕ b ⊕ (a ⋅ b)

Note: EX-OR alone is NOT functionally complete

(but it is good to remember: a ⊕ 1 = /a, a ⊕ 0 = a )

1-36

Ex.1: Sum of products / product of sums using NAND / NOR only

… deMorgan’s laws

Page 19: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

19

1-37

Ex.2: EX-OR using NAND only

a ⊕ b = ∏(00, 11) =

(a + b)(/a + /b) =

(a + b) /(a b) = a /(a b) + b /(a b) =

/( /(a /(a b)) /(b /(a b)) )

1-38

7 Minimization of Boolean Functions

Minimization goal is to implement a Boolean function with minimal amount

of resources.

…minimal amount of resources…:

• minimal number of gates;

• limited set of gates (e.g. NAND only…);

• avoiding multi-input (“wide”) gates;

• minimizing number of integrated circuits;

(e.g. in TTL logic: 4xNAND = 1 chip < 2xNAND + 1xOR = 2 chips)

• specific technology limits;

(e.g. resources available in PLD / FPGA architectures…)

• others...

Page 20: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

20

1-39

Our minimization goal:simplification of a Boolean expression to the minimal number of symbols

(complemented or not).

Using the rules (A) ÷ (L) for simplification of a normal form obtained from the

truth table.

7.1 Boolean transformations

Intuitive approach; sometimes it is unclear…

• which transformation will lead to the optimal solution

• whether the current form is optimal and cannot be further optimized

1-40

Examples

1) Majority function:

f(x1, x2, x3) = ∑(011, 101, 110, 111) = /x1 x2 x3 + x1 /x2 x3 + x1 x2 /x3 + x1 x2 x3 =

(H),(B) = (/x1 + x1) x2 x3 + (/x2 + x2) x1 x3 + (/x3 + x3) x1 x2 = (D),(C) =

x2 x3 + x1 x3 + x1 x2.

Canonical form = 12 symbols, after minimization = 6 symbols.

or: canonical form = 3 x NOT + 4 x AND3in + 1 x OR4in

after minimization = 3 x AND2in + 1 x OR3in

Page 21: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

21

1-41

2) Johnson code generator:

f(x1, x2, x3) = ∑(000, 001, 011) = /x1 /x2 /x3 + /x1 /x2 x3 + /x1 x2 x3 = (H),(B) =

(/x3 + x3) /x1 /x2 + (/x2 + x2) /x1 x3 = (D), (C) = /x1 /x2 + /x1 x3.

Before / after: 9 / 4 symbols

or: 3 x NOT + 3 x AND3 + 1 x OR3

2 x NOT + 2 x AND2 + 1 x OR2

3) Parity bit generator:

f(x1, x2, x3) = ∑(001, 010, 100, 111) = /x1 /x2 x3 + /x1 x2 /x3 + /x1 x2 x3 + x1 x2 x3 =

(... ...) = x1 ⊕ x2 ⊕ x3.

1-42

8 KARNAUGH MAPS

⇒ Complementation rule:

A x + A /x = A

(B + x)(B + /x) = B

8.1 The tables

Table format depends on the number of variables - for 2, 3 and 4 variables:

⇒ Gray code

Page 22: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

22

1-43

8.2 Minimizing to the SoP (disjunctive) form

Example: 3b majority function

f(x1, x2, x3) = ∑(011, 101, 110, 111) = /x1 x2 x3 + x1 /x2 x3 + x1 x2 /x3 + x1 x2 x3

x1 x2 (/x3 + x3) = x1 x2In a Karnaugh map:

Complementation rule in Karnaugh map = joining adjacent 1’s into groups,

into so called implicants.

1-44

Writing a product term for an implicant:

• note value of every variable inside the implicant:

0, 1 or * if a variable is both 0 & 1

• if a variable is… 1 in a group of 1’s – it is not inverted in the term,

0 – it is inverted,

* – it has been removed (optimized)

3b majority function continued:

Note:

The minterm „111” belongs to three groups (in algebraic transformation: x1x2x3

was used in three complementation cases; rule (H): a = a + a).

f(x1, x2, x3) = x1 x3 + x2 x3 + x1 x2

11* � x1 x2

*11 � x2 x31*1 � x1 x3

Page 23: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

23

1-45

Another example: Johnson code generator

f(x1, x2, x3) = ∑(000, 001, 011)

f(x1, x2, x3) = /x1 /x2 + /x1 x3

0*1 � /x1 x300* � /x1 /x2

10* � x1/x2 11* � x1x2

but x1 /x2 + x1 x2 = x1 so…

Furthermore: applying the complementation rule again

1** � x1

1-46

Examples of valid groups and corresponding product terms:

**1

x3

1*0

x1/x3

**01

/x3 x4

1*10

x1 x3 /x4

00*0

/x1 /x2 /x4

*0*1

/x2 x4

*0*0

/x2 /x4

• Adjacency is also over vertical / horizontal

edges of the table

• A group can have 2k elements (k = 0, 1,

2…) and it represents a product term with

n – k literals

• A prime implicant = a group that cannot be

further expanded

Page 24: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

24

1-47

The Karnaugh maps – a summary:

0) Under consideration: a function of n variables f(x1, x2, ... xn)

1) The Karnaugh map has 2n elements

2) Every element represents one minterm (‘1’)

3) Every element has n neighbours that can be used for joining

4) The groups can have 2k elements, 0 ≤ k ≤ n

5) A group of 2k 1’s maps to a product term of n – k literals

6) For a group of 2k elements there are exactly n – k adjacent groups of the

same size that can be used for further expansion

The minimization procedure:

1) Copy the truth table to the Karnaugh map of the appropriate size

2) Create all prime implicants (group expansion)

3) Select the minimal set of prime implicants that cover all 1’s

4) For the selected implicants, write the sum of product terms

1-48

Examples:

1) f1(x1, x2, x3, x4) = ∑(0000, 0010, 1000, 1010, 1100, 1101, 1110) =

/x1/x2/x3/x4 + /x1/x2x3/x4 + x1/x2/x3/x4 + x1/x2x3/x4 + x1x2/x3/x4 + x1x2/x3x4 + x1x2x3/x4

f1 = /x2 /x4 + x1 /x4 + x1 x2 /x3 (7 literals vs. 28 in the canonical

form)

110*

x1 x2 /x3

1**0

x1 /x4

*0*0

/x2 /x4

Page 25: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

25

1-49

2) f2(x1, x2, x3, x4) = ∑(0011, 0110, 0111, 1001, 1011, 1100, 1101, 1110, 1111)

f2 = x1 x2 + x3 x4 + x1 x4 + x2 x3 (8 literals vs. 36 in the canonical form)

**11

x3 x4

1**1

x1 x4

*11*

x2 x3

11**

x1 x2

1-50

8.3 Minimizing to the PoS (conjunctive) form

Example: majority function

f(x1, x2, x3) = ∏(000, 001, 010, 100) =

(x1 + x2 + x3) (x1 + x2 + /x3) (x1 + /x2 + x3) (/x1 + x2 + x3) =

= (x1 + x2) (x1 + x3) (x2 + x3).

*00 � x2 + x3 00* � x1 + x2

0*0 � x1 + x3

(B + x)(B + /x) = B

• If a variable is 0 in a group of 0’s – it is not complemented in the sum,

1 – it is complemented,

* – it has been removed (optimized)

Page 26: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

26

1-51

Examples:

1) f1(x1, x2, x3, x4) = ∏(1, 3, 4, 5, 6, 7, 9, 11, 15) /as above/

f1 = (x1 + /x2) (/x3 + /x4) (x2 + /x4)

• 6 literals vs. 36 in the canonical form

• minimizing 1’s: SoP had 7 literals ⇐⇐⇐⇐ !

*0*1

x2 + /x4

01**

x1 + /x2

**11

/x3 + /x4

1-52

2) f3(x1, x2, x3, x4) = ∑(0001, 0010, 0011, 0101, 1010, 1011)

f3 = /x1 /x3 x4 + /x2 x3 f3 = (x3 + x4) (/x1 + x3) (/x2 + /x3)

5 literals vs. 6 literals

(the canonical forms – 24 or 40 literals)

Minimizing 1’s (SoP) Minimizing 0’s (PoS)

*01*

/x2 x3

0*01

/x1 /x3 x4

1*0*

/x1 + x3

**00

x3 + x4

*11*

/x2 + /x3

Page 27: Part 1: Combinational Digital Circuits · Part 1: Combinational Digital Circuits Internet Engineering Dr. Jarosław Sugier Digital ... rows in the truth table, with 22n different

27

1-53

8.4 Minimization with “don’t care” values

“Don’t cares” in the Karnaugh maps may be included in the groups (if this

helps in expansion) but they do not have to be covered by any group.

Examples:1) Among BCD (Binary Coded Decimal) digits detect those that are ≥ 5.

*11*

x2 x3

*1*1

x2 x4

1***

x1

f = x1 + x2 x3 + x2 x4 – 5 literals.

Without using the “don’t cares”: 3

groups each with 2 elements; 9 literals.

‘-’ – new symbol for “don’t care” values

1-54

2) 4b Johnson code generator

Code sequence:

f = /x4

***0

/x4

***1

(/x4)