Performance Analysis - Intel · Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent

Bhanu Shankar, Ph.D.

Architect, 3D XPoint™ Performance Analysis

Intel Corporation

May 17, 2016

Copyright © 2016, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.

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Legal Notices and DisclaimersIntel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel.com, or from the OEM or retailer.

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This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps.

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*Other names and brands may be claimed as the property of others.

© 2016 Intel Corporation.

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INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.

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Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

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In a single phrase “VTune is the best oscillator for Intel® Platforms”

If there is something to measure on the platform, VTune can do it

Learn a single tool

Use it on multiple Operating Systems

– Windows / Linux / FreeBSD / Android / VxWorks

Use it on Multiple Platforms

– Quark, Atom Family, Core Family, Xeon family, Xeon Phi family

Updated often with new Analyses modes for better insight

Intel® VTune™ AmplifierGet Faster Code Faster

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Familiarity with the basics of Intel® VTune™ Amplifier

Create Projects

Starting a profiling run

– Choose Target and Analysis Type

Types of Analyses available in VTune™ Amplifier

VTune Panes

– Role of the Grid

– Timeline Views

– Grouping Toolbar

Familiarity with the basics

Parallel programming using OpenMP

Intel x86 assembly language

Basics of compiler optimizations

Cache and Memory hierarchies

Audience Knowledge


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I will start with an application and work through the process analyzing its performance.

The focus of this process is to allow you, the user, to be able to find out if your application is memory bound.

If so, is the memory boundedness caused due to NUMA behavior

The application is a modified version of the stream benchmark

Freely available at: http://www.cs.virginia.edu/stream

A simple, synthetic benchmark designed to measure sustainable memory bandwidth

Synopsis of this webinar

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http://www.cs.virginia.edu/stream


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First - Run Advanced Hotspots Analysis

Identify the hotspots

Characterize the application behavior

Secondly - Run General Exploration Analysis

Identify areas to explore after the basic algorithm / hotspot

Lastly – Run Specialized Analysis

For this example - Memory Analysis

– Memory Analysis without objects

– Memory Analysis with objects (Linux only)

General Methodology for using VTune

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Let’s get started

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First - Run Advanced Hotspots



Secondly - Run General Exploration



For Instance - Memory Analysis



Step 1:

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Application – Hotspot – Bottom Up Tab

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Application Source/Object

Source code is simple

object code is straight forward

Why the large CPI?

Not caused by algorithm

Must be machine specific

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Step 2

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Summary Page

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General Exploration – Bottom Up Tab

Same Loops as earlier

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Let’s Explore – Source level

Yes, Indeed – We have a bottleneck in the memory hierarchy

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– Memory Analysis without objects – Do we have a bandwidth problem?


Step 3: Find the memory bandwidth

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How do I run Memory Access Analysis?

Make sure this box is unchecked.

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Memory Access - Summary

Looks like a problem accessing remote DRAM

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Memory Access – Bottom-Up View

Imbalance in memory access across both sockets

Average latency is fairly large

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First run Advanced Hotspots



Secondly run General Exploration






Step 4: Identify the memory object(s)

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Identify the Memory Objects - Configuration

Make sure this box is checked.Minimal size of object to track.

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Identify the Memory Objects

Location of the heap object

Average Latency is large

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Dive into an object

Access to the object in a parallel region - Good

Access to the object in a serial region –Hmmm…Investigate

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Serial Access to memory object

This is where memory is first touched.BINGO!!! Linux stripes memory to local memory of socket!!!

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Did it work? Analyze the fixed applicationRun Memory Access on fixed code

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Fixed Code: Summary Page

Effects of NUMA completely disappearedRemote DRAM access are minimal

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The stream benchmark has 5 loops that are parallelized

Locate the loops by tagged with “#pragma omp parallel for”

Remove the “#pragma omp parallel for” for each or multiple loops

Run Intel® VTune™ Amplifier

See the effects of memory placement and parallel execution

Try the compare results feature on your runs of VTune using the icon

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Lab exerciseTry out what you just learned


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Memory and Inter-socket Bandwidth

Memory Latency

Memory Hierarchy

False Sharing

True Sharing

Effectiveness of Lockless Algorithms

What other problems can I diagnose this way?

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Optimization Notice

Intel® VTune™ Amplifier continues to add tools to the toolbox to diagnose system performance problems

Memory Access Analysis is one such powerful tool

Stay tuned for more such tools in the future

Summary

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Optimization Notice

Download and Evaluate Intel® VTune™ Amplifier

https://software.intel.com/en-us/intel-vtune-amplifier-xe

Intel® VTune™ Amplifier Support

https://software.intel.com/en-us/intel-vtune-amplifier-xe-support

Get Help: Ask the Community

https://software.intel.com/en-us/forums/intel-vtune-amplifier-xe

NUMA Architecture

https://software.intel.com/en-us/articles/a-brief-survey-of-numa-non-uniform-memory-architecture-literature

Stream Benchmark

http://www.cs.Virginia.edu/stream

or type “stream benchmark” into your favorite search engine

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Call to Action

https://software.intel.com/en-us/intel-vtune-amplifier-xe

https://software.intel.com/en-us/intel-vtune-amplifier-xe-support

https://software.intel.com/en-us/forums/intel-vtune-amplifier-xe

https://software.intel.com/en-us/articles/a-brief-survey-of-numa-non-uniform-memory-architecture-literature

http://www.cs.virginia.edu/stream



Questions?

Documents

Performance Analysis - Intel · Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent