Perylene diimide molecular glass Investigations of Charge

Perylene diimide molecular glass

Investigations of Charge Transport

by

Namamrta Musterer

A thesis submitted to the

Department of Physics, Engineering Physics & Astronomy

in conformity with the requirements for

the degree of Master of Science

Queen’s University

Kingston, Ontario, Canada

July 2016

Copyright c© Namamrta Musterer, 2016

Abstract

A new glass-forming organic semiconductor material was synthesized using a known

electron transport material, perylene diimide, and attaching it to a molecular glass

in order to allow the material to be solution processed. Devices were made using a

simple metal-semiconductor-metal structure and electrodes were selected to produce

Schottky diodes. Experiments were carried out to characterize this new molecular

glass perylene diimide. The new material shows evidence of traps, hysteresis, and

other behaviours that are explored in this thesis. The material shows some potential

as an electron transport layer with possibilities of memory storage behaviour.

i

Acknowledgements

Thank you to Sanyasi Rao Bobbara for his help on the CELIV set-up and for lend-

ing his knowledgeable background. Thank you to Dr. Sabat at the Royal Military

College for allowing me to use his lab and equipment to carry out the impedance

measurements and for answering my questions. Thank you to Dr. Lebel at the Royal

Military College for the synthesis and provision of all the compounds used in this

thesis. Thank you to my supervisor Dr. Nunzi for the opportunity to work in his

group and for all his time and support given towards the completion of this thesis.

ii

Contents

Abstract i

Acknowledgements ii

Contents iii

List of Tables v

List of Figures vi

List of Abbreviations viii

Chapter 1: Introduction 11.1 Organic Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1.1 Organic Molecules . . . . . . . . . . . . . . . . . . . . . . . . 21.1.2 n-Type Semiconductors . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Why PDI? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.3 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.3.1 Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.3.2 Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.3.3 Future Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.4 Organization of Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Chapter 2: Fabrication 72.1 Cleaning and Substrate Preparation . . . . . . . . . . . . . . . . . . . 72.2 Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.3 Films . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.4 Top Electrode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.5 PDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Chapter 3: Current Voltage Characterisation 183.1 Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

iii

3.1.1 Schottky Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . 193.1.2 Insulator Diodes . . . . . . . . . . . . . . . . . . . . . . . . . 193.1.3 Charge Transport . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.2 Experimental Set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.3 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.3.1 IV Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.3.2 Heat Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . 313.3.3 Additional Characterisation . . . . . . . . . . . . . . . . . . . 32

3.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Chapter 4: Impedance Spectroscopy 374.1 Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.1.1 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394.1.2 Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . 404.1.3 Polarisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414.1.4 Traps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.2 Experimental Set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.3 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

4.3.1 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444.3.2 Capacitance Voltage Characteristics . . . . . . . . . . . . . . . 46

4.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Chapter 5: CELIV 535.1 Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545.2 Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575.3 Experimental Set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . 595.4 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

5.4.1 Mobility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 645.4.2 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 665.4.3 Density of Extracted Charge Carriers . . . . . . . . . . . . . . 67

5.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Chapter 6: Summary and Outlook 716.1 Traps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 716.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Bibliography 73

iv

List of Tables

3.1 Junction resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.1 Experimental capacitance and cutoff frequencies . . . . . . . . . . . . 50

5.1 Mobilities calculated from CELIV data . . . . . . . . . . . . . . . . . 66

5.2 Capacitance and permittivity calculated from CELIV data . . . . . . 67

v

List of Figures

1.1 Categories of organic electronic materials . . . . . . . . . . . . . . . . 3

2.1 ITO etching layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2 Poor film quality caused by dewetting . . . . . . . . . . . . . . . . . . 10

2.3 Active area diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.4 AFM image of PDI film . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.5 Layout of top electrode . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.6 Deposition of lower metal electrode . . . . . . . . . . . . . . . . . . . 14

2.7 Compound 1: PDI with single glass former . . . . . . . . . . . . . . . 16

2.8 Compound 2: PDI molecular glass without NH groups . . . . . . . . 17

3.1 Metal-semiconductor energy diagram . . . . . . . . . . . . . . . . . . 20

3.2 ITO/compound 1/Al energy diagram . . . . . . . . . . . . . . . . . . 21

3.3 Space charge limited current . . . . . . . . . . . . . . . . . . . . . . . 22

3.4 Experimental set-up for IV measurements . . . . . . . . . . . . . . . 25

3.5 IV characteristic for a compound 1 device . . . . . . . . . . . . . . . 27

3.6 Junction resistance for a compound 1 device . . . . . . . . . . . . . . 28

3.7 Log-log scale IV curve for a compound 1 device . . . . . . . . . . . . 29

3.8 Log-log scale IV curve for a compound 1 device . . . . . . . . . . . . 31

3.9 IV curve for a compound 1 device as a function of temperature . . . 32

vi

3.10 Hysteresis behaviour of a compound 1 device . . . . . . . . . . . . . . 33

3.11 Absorption spectra for compound 1 . . . . . . . . . . . . . . . . . . . 34

3.12 IV curve for a compound 1 device showing response to light . . . . . 35

4.1 Illustration of the complex impedance plane . . . . . . . . . . . . . . 39

4.2 RC model of an organic film . . . . . . . . . . . . . . . . . . . . . . . 41

4.3 Schematic of impedance measurements. . . . . . . . . . . . . . . . . 44

4.4 Capacitance data for a compound 1 device. . . . . . . . . . . . . . . . 45

4.5 Capacitance data for a compound 2 device. . . . . . . . . . . . . . . . 46

4.6 IV curve for a compound 1 device. . . . . . . . . . . . . . . . . . . . 47

4.7 Capacitance data for a compound 1 device with DC offset. . . . . . . 48

4.8 IV curve for a compound 2 device. . . . . . . . . . . . . . . . . . . . 48

4.9 Capacitance data for a compound 2 device with DC offset. . . . . . . 49

5.1 Voltage pulse and response for CELIV measurements . . . . . . . . . 58

5.2 Experimental set-up for CELIV measurements . . . . . . . . . . . . . 60

5.3 CELIV data for a compound 1 device . . . . . . . . . . . . . . . . . . 61


5.5 IV curve of a compound 1 device . . . . . . . . . . . . . . . . . . . . 63


5.7 IV curve for a compound 2 device . . . . . . . . . . . . . . . . . . . . 64

5.8 Fit CELIV data to find tmax . . . . . . . . . . . . . . . . . . . . . . . 65

5.9 CELIV data with increasing offset bias . . . . . . . . . . . . . . . . . 69

5.10 Density of extracted charges from CELIV . . . . . . . . . . . . . . . . 69

vii

List of Abbreviations

AFM Atomic Force Microscopy

CELIV Charge Extraction by Linearly Increasing Voltage

Compound 1 PDI derivative shown in Figure 2.7

Compound 2 PDI derivative shown in Figure 2.8

FET Field Effect Transistor

ITO Indium Tin Oxide

IV Current-Voltage

OPV Organic Photovoltaic

PDI Perylene Diimide

PVD Physical Vapour Deposition

RR Rectification Ratio

SCLC Space Charge Limited Current

viii

1

Chapter 1

Introduction

1.1 Organic Electronics

Organic semiconductor technology, using carbon-based compounds, is an area of much

research interest. Organic semiconductors can be found in a wide range of devices such

as diodes, sensors, transistors, solar cells, and light-emitting devices [1]. Inorganic

semiconductors like silicon, germanium, and gallium arsenide have been well stud-

ied, are well understood, and perform very efficiently. While organic semiconductors

are not as well understood and cannot reach the same efficiencies as their inorganic

counterparts, their strength lies in that they are light weight, mechanically flexible,

easily processed and have endless possibilities for chemical modifications. The fact

that chemists can tailor the chemical structure to optimize conduction, light emis-

sion/absorption, and mobility, among other electrical and optical properties allows

organic electronics to reach unique and niche applications [2, 3].

While device efficiency is an important factor, the ability to manufacture elec-

tronics at low cost is a major factor in the success of a technology; with the majority

of costs often being not the active materials themselves, but rather fabrication and

1.1. ORGANIC ELECTRONICS 2

packaging costs. Organic electronics are of much interest due their potential for low

cost fabrication techniques and large-area production. The low cost comes from the

ability to deposit films on different substrates using a variety of techniques. Organic

thin films can be deposited on glass, plastic, or metal foils via thermal sublimation

or solution-based processes such as spin-coating, stamping or ink-jet printing. These

techniques allow for large scale inexpensive processing and provide potential for roll-

to-roll processing.

1.1.1 Organic Molecules

Organic electronic materials are either small molecules, polymers, or biological molecules

as illustrated in figure 1.1. Small molecules are classified by having a well defined

structure and molecular weight and are referred to as small molecules. Polymers

are molecules classified by having any number of repeated units within a long chain.

Biological molecules have high complexity, are biological in origin, and do not have

obvious electric or optical applications [2]. Small molecules and polymers have many

similarities in electronic and optical performance, but differ in the deposition methods

used to fabricate devices. Many small molecule organic semiconductors have poor sol-

ubility and require thermal sublimation for deposition, while polymers are suited for

solution processing. Thermal sublimation is a more costly process as it is carried out

under vacuum and tends to waste material. The films made by thermal sublimation

can be uneven as molecules stick to the substrate at the place they arrive which can

cause greater disorder in the film. In contrast, solution processing can lead to very

uniform films and even alignment of polymer chains thereby decreasing disorder in

the film [2].

1.1. ORGANIC ELECTRONICS 3

Figure 1.1: Organic electronic materials increasing in complexity from left to right.Small molecules are of a well defined molecular weight, polymers arechains of any number of monomers, and biological molecules are definedby their biological origin. [Image from [2]]

1.1.2 n-Type Semiconductors

The majority of organic semiconductor research has been focused on p-type or hole

transporting materials. Electron transporting or n-type materials are notorious for

low charge mobility. The mobility of hole transporting materials can be orders of

magnitude higher than those reported for electron transporting materials and it was

previously thought that electrons were 10 to 100 times less mobile than holes, but in

fact, the low electron mobilities can be attributed to traps [4]. Electron transporting

materials are necessary for junction devices such as organic photovoltaics (OPVs).

While the requirements for an electron transporting material would vary according

1.2. WHY PDI? 4

to the application, in general, high mobility, charge injection, stability and ease of

synthesis are desired [5].

1.2 Why PDI?

One electron transport material perylene diimide (PDI) and derivatives of this com-

pound are the topic of much study [6, 7, 8, 9]. PDIs have shown promise due to their

high electron mobility.

1.3 Motivation

The drive for electron transport materials for use in OPVs motivated the research

of this thesis. Currently C60 fullerene-based acceptors are the common candidate for

an electron transport material in OPVs, yet C60 derivatives have poor absorption in

the visible range of the spectra [5]. The PDI compound studied in this thesis has an

absorption range of 400 nm to 650 nm which covers much more of the visible spectra.

1.3.1 Problem

Perylene diimide itself is a small molecule with low solubility. By attaching the

PDI unit to a molecular glass the material was made soluble, and thereby solution

processable, as well as giving it film forming properties. Being able to fabricate

devices by spin-coating or other solution-based methods is essential for the usefulness

of the material as OPVs are driven by competition for low cost.

1.4. ORGANIZATION OF THESIS 5

1.3.2 Objective

The goal of this thesis was to explore a new PDI derivative that can be easily processed

from solution and to study the charge transport properties of this new material. The

hope was that this new PDI derivative would be a candidate for an electron transport

material in OPVs. As the research progressed, and low electron mobility was apparent

in the molecular glass PDI, the focus shifted to understanding and characterizing the

material in order to understand the mechanisms hampering the electron mobility.

1.3.3 Future Outlook

Research on this molecular glass PDI will continue as an electron transport material

for OPVs. Due to its absorption spectrum one path is to try it as a blend with another

electron transport material, where the PDI provides the absorption range across the

visible spectrum and the other material in the blend will be chosen for its electron

transport properties. As well, due to hysteresis seen sometimes in the material, the

molecular glass PDI may have potential to serve as a memory material.

Following the research in this thesis, experiments were carried out using the molec-

ular glass PDI in a blend in OPVs [10].

1.4 Organization of Thesis

This thesis presents three types of experiments carried out to characterize the molec-

ular glass PDI; current-voltage measurements, impedance spectroscopy, and charge

carrier extraction using a linearly increasing voltage (CELIV). Each set of experiments

has a dedicated chapter with the corresponding background and theory presented in-

side the chapter.

1.4. ORGANIZATION OF THESIS 6

Fabrication techniques and molecular structures of the compounds used for this

research are introduced in Chapter 2 along with discussions of issues and difficulties

of the fabrication process. Chapter 3 covers the current-voltage characteristic exper-

iments carried out under a variety of external conditions. Impedance measurements

are outlined out in Chapter 4 and CELIV studies in Chapter 5. Chapter 6 contains

summaries and future directions for this research.

7

Chapter 2

Fabrication

Devices were fabricated in a metal-semiconductor-metal format. This chapter aims

to give a detailed account of fabrication methods.

2.1 Cleaning and Substrate Preparation

All devices were fabricated on glass slides purchased pre-coated on one side with an

indium tin oxide (ITO) layer. ITO was used as a base electrode for the majority of

devices fabricated. The ITO was etched using 1 M HCl acid with Zn as a catalyst.

The pattern etched allowed the top electrode of the device to be connected back to

ITO allowing leads to be attached to the durable ITO rather than to the vapour-

deposited thin top electrode which becomes damaged by repeated connections. The

etching configuration is shown in figure 2.1.

After etching, substrates were cleaned in sequential ultrasonic baths of toluene,

acetone, and ethanol. A final plasma cleaning using air was done just before the film

was deposited.

2.2. SOLUTIONS 8

Figure 2.1: Pattern used to etch into ITO substrate to isolate top and bottom elec-trodes. The blue area represents ITO while the white areas are where theITO has been etched away exposing the glass substrate and electricallyisolating each section.

2.2 Solutions

PDI has good solubility in chlorobenzene. Initially, solutions were prepared in a

variety of solvents (di-chlorobenzene, toluene, tertrahydrofuran). However, solvent

properties were such that either the solubility or boiling point was too low, limiting

either the concentration or preventing freedom in controlling the film thickness when

spin-coating. If the solvent evaporates too quickly thick films cannot be achieved by

using slower spin speeds.

Chlorobenzene has a boiling point of 131C which worked ideally for the devices

fabricated for this thesis. Spin-coating was used to achieve uniform thin films with

thinner films made by increasing the spin speed. The solvent needs to evaporate

2.3. FILMS 9

quickly, but not so quickly that the solution doesn’t spread across the entire surface

of the substrate.

Concentrations ranged from 6 g/L to 36 g/L. All solutions were left to stir for 12

hours to 24 hours before use. For solutions of higher concentrations, heat of about 40

C was used to ensure full dissolution. As well, all solutions were filtered using 0.45

µm syringe filter. Filtration was carried out as the last step, filtering the solution

while placing it on the substrate for spin-coating.

2.3 Films

All films were fabricated by spin-coating. The thickness was mainly controlled by

changing concentrations. Some effort was spent to correlate spin speeds and film

thickness, but the film thickness varied too much across one film to achieve precise

results. Spin-coating at 600 rpm gave roughly half the thickness of a film spun at 1500

rpm. Using these two speeds and changing the concentration was used to roughly

control the film thickness as needed.

Unfortunately, chlorobenzene has an affinity for water and will absorb moisture

from the air. This causes dewetting and gives very poor film quality. The solution

forms droplets and does not spread across the substrate surface. Examples of poor

film quality caused by dewetting can be found in figure 2.2.

In order to avoid dewetting, the chlorobenzene was dried using molecular sieves.

The molecular sieves were activated by heating to 100C and kept under heat and

vacuum for 24 hours (heat was limited by the oven available). After activation, the

sieves were allowed to cool to room temperature. Chlorobenzene was poured over

the sieves and left to sit for 72 hours. Both powdered and balled sieves were used.

2.3. FILMS 10

The balled sieves seemed to introduce particulate contamination to the solution and

therefore the powdered sieves were preferred. Once access to a glove box was available,

anhydrous chlorobenzene was purchased and used as is, keeping all solution processing

in a dry and nitrogen environment.

Figure 2.2: Poor film qualities caused by dewetting. The solution forms droplets onthe substrate surface rather than spreading out and wetting the surface.The resultant film shows disruptions in the surface.

Once the film is spun onto the substrate, portions of it need to be removed in order

to access the ITO electrodes. The film was removed using chlorobenzene, though

most organic solvents would also work. Film is removed at the top of the substrate

to connect to the lower ITO electrode and at the bottom so that the top electrode

can connect to the ITO and serve as a large durable contact allowing for connection

to each of the separated conducting sections. This configuration is used since the

2.3. FILMS 11

top electrode will be vacuum deposited at a thickness of 100 nm or less and the

resultant electrode is not durable. By putting this electrode in contact with the

ITO, connections to the devices (via alligator clips) can be made repeatedly without

damaging the device. It is important that the film reaches to/overlaps the etched

boundary. If not, deposition of the top electrode will contact the ITO of the bottom

electrode and cause a short circuit of the device. The areas of film removal are

illustrated in figure 2.3.

Figure 2.3: Part of the active area (shown in purple and originally covering the entiresubstrate) is removed in order to expose the conducting ITO (shown inblue). Film is removed at the top of the substrate to connect to the lowerITO electrode and at the bottom of the substrate to expose the ITO forconnection to the top electrodes.

2.4. TOP ELECTRODE 12

Some atomic force microscopy (AFM) images were taken to investigate the film

quality. An image of the surface of a typical film (concentration 12 g/L, spin speed

4500 rpm) is shown in figure 2.4. The surface is not smooth and shows rounded

features on the scale of approximately 30 nm.

Figure 2.4: AFM image of PDI film showing typical surface conditions. Solutionconcentration was 12 g/L and spun onto the substrate at 4500 rpm.

2.4 Top Electrode

Physical vapour deposition (PVD) was used to deposit the top electrode. Samples

were placed inside the vacuum chamber and pumped down to a pressure of 1.6 x 10−6

mTorr. The metal was then evaporated onto the substrate with a mask being used

to shape the electrodes as shown in figure 2.5. The circular active area of the device

has a diameter of 5 mm and an area of 0.2 cm2. The finger stretches to the isolated

ITO area giving a durable connection to the top electrode.


Au and Al were used to make the top electrodes for the devices of this thesis

depending on the work function desired for the experiment.

Figure 2.5: The top electrode (yellow) is a metal deposited under vacuum using phys-ical vapour deposition. The electrode has a diameter of 5 mm and anactive area of 0.2 cm2.

For experiments requiring a bottom electrode other than ITO, a metal was de-

posited using PVD directly on the ITO before the active layer. A mask was used so

that some ITO was left exposed for a durable connection to the electrode and to en-

sure that there was no overlap of the etched and isolated ITO regions. The electrode

layout can be seen in figure 2.6. The active layer and the top electrode were then

deposited in the same manner as described above for the other devices.


Figure 2.6: Deposition of a bottom electrode other than ITO was done in the patternshown here in yellow. The placement is such that connection to electrodesis to the ITO rather than the deposited metal so as not to damage thethin metal layer.

Note that Ag top electrodes were attempted but all resulted in short circuited

devices. Several film thicknesses were attempted to try to achieve a working device,

but short circuits persisted. One hypothesis was that the deposition of the Ag was

allowing the metal molecules to penetrate the device. However, devices were made

with Ag as the bottom electrode followed by the active layer and then an Al top

electrode. These devices still exhibited short circuiting and the source of these short

circuits was not discovered. It is possible that thicker films are needed with Ag

electrodes or that the Ag is reacting the Br in the PDI molecules.

2.5. PDI 15

2.5 PDI

As described in section 1.2, the derivative of PDI used in this thesis has molecular

glass formers attached. PDI derivatives were synthesized with either one (figure 2.7)

or two (second glass former replacing the Br) glass forming groups attached to the

PDI backbone. The mono-substituted PDI was more soluble and was used for the

majority of the experiments in this thesis.

Later during the thesis a PDI derivative with no NH groups was studied as shown

in figure 2.8. These NH groups were removed with the hypothesis that the NH groups

were acting as traps in the material and that their substitution would yield a trap-free

material.

For simplicity and clarity the PDI with one glass forming group (figure 2.7) will

be referred to as compound 1 and the modified version with the NH groups removed

(figure 2.8) will be referred to as compound 2.

All PDI derivatives used in this thesis were synthesized and provided by Dr.

Lebel’s group at the Royal Military College of Canada. Detail of the synthesis can

be found in [11].

2.5. PDI 16

Figure 2.7: Compound 1: PDI backbone with single attached molecular glass andbromine side constituent.

2.5. PDI 17

Figure 2.8: Compound 2: PDI molecular glass with single attached molecular glassand NH groups removed (as compared with molecule shown in figure 2.7).

18

Chapter 3

Current Voltage Characterisation

In the field of organic semiconductors, fabrication and characterisation of Schottky

diodes is of much interest. These diodes consist of a single layer of organic semicon-

ductor between two electrodes; one ohmic contact and one barrier contact. Schottky

diodes are the foundation of solar cells, FETs and other compound semiconductor

electronic devices. Compared with p-n junction diodes, Schottky diodes are simple

to fabricate and have fast response and low threshold voltages.

Electrical characterisation of these diodes is done by current-voltage (IV) charac-

teristic curves. IV curves are useful to understand the operation and basic parameters

of the diode by showing the relationship between the voltage applied to a device and

the resultant current that flows.

3.1 Theory

The IV curves in this thesis are used to show the characteristics of the fabricated

PDI diodes. Selection of the metal used for the contacts, based on the metal’s work

function, is done with the intention of creating a Schottky semiconductor diode.

By selecting metals with the appropriate work functions to create one ohmic and

3.1. THEORY 19

one barrier contact the resultant devices behave as diodes, with current flow under

forward bias and no current flow under reverse bias. The reverse bias will only have

no current flow for some range of applied voltages, after which the semiconducting

behaviour will again be seen. For the diodes in this chapter, Al was used for the

ohmic contact and ITO for the blocking contact.

The basic background theory necessary to describe the IV experiments carried out

in this chapter is outlined in the following sections.

3.1.1 Schottky Diodes

Metal-semiconductor contacts can either have an ohmic contact or behave as a Schot-

tky barrier. For an ideal ohmic contact there is no difference in potential energy

between the metal and neighbouring semiconductor. A Schottky barrier occurs when

there is a difference in the potential between the metal and the neighbouring semi-

conductor.

The Schottky barrier is illustrated in figure 3.1 for a p-type or hole transporting

semiconductor. The metal has Fermi energy EFm and the work function Φm while the

semiconductor has Fermi energy EFs. Once the two come in contact the system will

transfer charges and the Fermi levels align. An energy diagram for the configuration

ITO/compound 1/Al used in this chapter is shown in figure 3.2.

3.1.2 Insulator Diodes

An insulating material can also be used to make a diode. For a metal-insulator

contact the difference in the energy levels causes an injection barrier. The diode

3.1. THEORY 20

Figure 3.1: Space vs. energy diagram for a metal to p-type semiconductor contact.Materials are shown before contact on the left and after contact on theright. Figure from [12].

behaviour of a metal-insulator-metal device results from the difference in the energy

levels between the two metals. Different energy levels for the metals means the height

of their injection barriers differ and would result in rectification of current (see energy

diagram in figure 3.2).

The PDI compounds could be either semiconducting or insulating materials de-

pending on their Fermi level.

3.1.3 Charge Transport

Modelling charge transport in organic materials is a challenging task. There are many

transport regimes and the interplay of defects, environment, thermal fluctuations, and

material morphology all add to the complexity of understanding charge transport.

3.1. THEORY 21

Figure 3.2: Space vs. energy diagram for the ITO/PDI compound 1/Al diodes stud-ied in this chapter (not to scale).

Space Charge Limit

Space charge limited current (SCLC) is a model for current flow in a regime where

the density of injected charge carriers is high enough that the electric field from these

free carriers is significant. In this scenario the current is quadratically dependent on

the bias voltage.

Figure 3.3 shows how the current density is affected by the applied field. For low

fields the device has ohmic behaviour and the current is linearly dependent on the

field. Following this we see the SCLC region with the quadratic dependence due the

3.1. THEORY 22

Figure 3.3: Space charge limited current as a function of applied electric field. In a lowfield the device current is linearly dependent and shows Ohmic behaviour.At an increased bias the density of charges increases and enters the SCLCregime. A very high bias all the traps are filled and the current entersthe trap-free SCLC region. Figure from [12].

high density of charges. Here the effective mobility can still be limited by traps. It

requires a larger field to fill these traps, at which point the device reaches trap-free

SCLC. In this model the current, conductance, and capacitance are independent of

temperature unless the mobility itself is temperature dependent [12].

3.1. THEORY 23

Mott-Gurney Law

In the space charge limited current given by Mott-Gurney the current density, JSCLC ,

is given by

JSCLC =9εµ

8

V 2

d3(3.1)

where ε is the dielectric constant of the semi-conducting material, µ is the mobility of

the charge carriers, and d is the thickness of the device. The Mott-Gurney formulation

assumes the following:

• There are only electrons or holes present, not both.

• The material itself has no conductivity with all charges being injected from the

electrode.

• µ and ε are constant throughout the sample.

• There is no electric field at the cathode.

• The current is a drift current with no diffusion.

Mobility and Trap States

The mobility of the charge carriers in a diode can be calculated from the SCLC

current (equation 3.1). However, mobility of the charge carriers is affected by the

trap states. Organic materials are notoriously trap-ridden and as a result are known

for low electron mobility. However, this low mobility is better described as effectively

low mobility due to trap states. These trap states, or deep localized states, affect the

performance of organic semiconductors by capturing carriers that would otherwise

contribute to conduction. There is no distinction of the origin of these traps states,

3.2. EXPERIMENTAL SET-UP 24

they could be caused by impurities of by disorder in the material. Oxygen, water,

and air can all contribute traps [12].

Low conductivity observed in organic materials, which in turn can appear to be

low mobility, is an effect of these trap states. One indication of traps can be seen

by current which is thermally activated. This thermal activation is observed as an

increase in current as the temperature is increased.

3.2 Experimental Set-up

Devices were fabricated as described in chapter 2 and the IV characteristics were

measured. The IV characteristics were measured using a Keithley source meter with

the device attached as shown in figure 3.4.

3.3 Results

3.3.1 IV Testing

Dozens of ITO/compound 1/Al devices were fabricated and tested. A lot of variance

was observed from one device to the next. Plots to show general behaviours have been

selected with trends and overall observations discussed. The data in this chapter was

taken using devices fabricated in an open air environment (nitrogen glove box was

not a part of the lab at this time) so humidity and other contaminants are possible

factors in the results and lack of reproducibility.

An example of an IV characteristic for a compound 1 device is shown in figure 3.5.

The current increase in the forward bias is greater than that of the reverse bias. This

asymmetric and non-linear behaviour is known as rectification. The rectification ratio

3.3. RESULTS 25

Figure 3.4: Experimental set-up for IV measurements. Voltage is applied to one elec-trode (Al in the device shown here) and the ground is connected to theother electrode (ITO shown here). Current response is measured with aKeithley source meter. Schematic not to scale.

(RR) is the ratio of the current in the forward bias over the current in the reverse

bias at a given voltage. For the device shown in figure 3.5 the RR at ± 1V, 5V, 10V,

and 18V is 16, 99, 30, and 7 respectively.

Describing the current in crystalline semiconductor diode can be done using the

well known Shockley equation. For organic semiconductors additional losses need

to be accounted for. A series resistance, Rs, arises from the contact resistance of

the electrodes or from the sheet resistance of the semiconductor bulk. A parallel

resistance called the shunt resistance, Rsh, can arise from alternative paths for the

current in the diode. The modified Shockley equation for dark current is expressed

3.3. RESULTS 26

by

I = Io[expq(V − IRs)

nkT− 1] +

V − IRs

Rsh

(3.2)

where I and V are the terminal current and voltage, Io is the saturation current, k

is Boltzmann’s constant, T is the temperature, and n is the ideality factor (1 for an

ideal diode) [13]. The ideality factor can be calculated by using the slope of the linear

region in the forward bias of ln(I) vs V plot using

n =q

kT

dV

d(lnI). (3.3)

An ideality factor of 4.3 was calculated for the diode in figure 3.5. The ideality factor

is normally between 1 and 2 for crystalline diodes, but in organic semiconductors

ideality factors well above 2 are attributed to series resistance, oxide on the electrodes,

non-homogeneous films, and interfacial states [14, 15].

The saturation current, Io, in equation 3.2 is defined by

Io = AA∗T 2exp(−qΦb

kT) (3.4)

where A∗ is the Richardson constant and Φb is the barrier height at zero bias. Using

this equation, the barrier height at zero bias was calculated to be 0.91 eV.

Both the shunt and series resistance can be found from the IV characteristic. The

series resistance dictates the shape of the IV curve in the forward bias. A high series

resistance will give a wide curvature to the non-linear section of the forward bias while

a lower series resistance will result in a smaller curvature to this non-linear section.

3.3. RESULTS 27

The resistance of the junction, Rj, is calculated simply by

Rj =∂V

∂I. (3.5)

The junction resistance calculated from the IV-curve in figure 3.5 is plotted in fig-

ure 3.6. The maximum value in the reverse bias gives the shunt resistance and the

minimum value in the forward bias gives the series resistance. The data in figure 3.6

gave Rsh = 4.8 MΩ and Rs = 620 Ω. Note that an average was used to plot the

reverse bias data since small changes in the current resulted in large fluctuations in

the resistance.

Figure 3.5: IV characteristic for ITO/compound 1/Al device. Voltage is applied withrespect to the ITO electrode.

3.3. RESULTS 28

Figure 3.6: Junction resistance of the ITO/compound 1/Al device. For this devicethe shunt resistance is 4.86 MΩ and the series resistance is 616 Ω. Notethat for the reverse bias the resistance is calculated using the averagecurrent to smooth out noise in the data.

Plotting the IV characteristic of a diode on a double logarithmic scale is useful

for studying conduction mechanisms as described in section 3.1.3. Figure 3.7 shows

the double logarithmic representation of the forward bias from figure 3.5. There are

two distinct regions visible. For lower applied voltages the slope is nearly linear and

then transitions to a much steeper slope of 3.6 for higher applied voltages.

3.3. RESULTS 29

Figure 3.7: Forward bias IV of the ITO/compound 1/Al device plotted on a doublelogarithmic scale. Two slope regions are evident, with a slope of approx-imately 1 at lower applied voltages and a slope of 3.6 at higher appliedvoltages.

The linear slope represents ohmic conduction and the current density, J , in this

region can be described by

J = enoµV

d. (3.6)

where V is the applied voltage, e is the charge of an electron, no is the free carrier

density, µ is the mobility of the charge carriers, and d is the distance between the two

electrodes. Since the density of the charge carriers is not known, the mobility of the

charge carriers cannot be calculated from this region.

A slope of 2 exhibited in the space charge region, as described in section 3.1.3,

is not seen in this data. Instead the slope transitions to 3.6 following the ohmic

region. This high slope is often concluded to be SCLC conduction mechanism with

3.3. RESULTS 30

an exponential distribution of trap levels [14, 16, 17]. This did not allow for the

calculation of the mobility of the charge carriers, but indicates a high level of disorder

within the material.

The results shown in figures 3.5, 3.6, and 3.7 give an example of the characteristics

of the compound 1 diodes. However, there was a lot of variance between the dozens

of devices that were fabricated. The slope in SCLC region of the double logarithmic

forward bias varied greatly and was observed between 3 and 7. Table 3.1 gives an

summary of the slopes and junction resistances observed. All of these devices were

fabricated in open air and impurities and changes in humidity could have contributed

to the lack of reproducibility.

One batch of devices, with no intentional change to fabrication methods, showed

three conduction regions with one device having the middle region showing a slope

close to 2. The double logarithm representation of the forward bias of the IV charac-

teristic for this device is shown in figure 3.8.

Using the middle region, containing the slope of approximately 2, the mobility

was calculated using equation 3.1 giving µ = 4.4 x 10−10cm2/Vs. This region was not

observed for any other devices fabricated.

Table 3.1: Average values of series and shunt resistance from four devices fabricatedunder the same conditions (same day). The average slope of the SCLCregion in the double logarithmic IV plot of these devices is also listed.

Shunt Resistance (MΩ) Series Resistance (Ω) SCLC Slope (above 5V)

40 ± 20 300 ± 200 5 ± 2

3.3. RESULTS 31

Figure 3.8: Forward bias IV of the ITO/compound 1/Al device plotted on a doublelogarithmic scale. Three slope regions are evident, with a slope below 1at lower applied voltages, a slope of 1.8 in the middle, and a slope of 6 athigher voltages.

3.3.2 Heat Testing

Since trap states are temperature dependent applying heat to the devices is expected

to increase the current. The device was heated to the desired temperature and left for

15 minutes to stabilize the temperature and then the IV characteristic was measured.

This was repeated from 25oC to 95oC in steps of 10oC. The results are shown in figure

3.9. As expected for a material containing trap states, the current increased with the

increasing temperature.

3.3. RESULTS 32

Figure 3.9: IV curve for ITO/compound 1/Al device under heating. Device showsincreased current as temperature is increased. Temperatures are given indegrees Celsius.

3.3.3 Additional Characterisation

Hysteresis

Figure 3.10 shows an IV characteristic for an ITO/compound 1/Al device exhibiting

hysteresis. The hysteresis shows lower current flow as the forward bias is increased

which can be explained by the filling of trap states. Then when the forward bias is

decreased, the trap states are already filled and more current can flow since the trap

states are already and take some time to release the trapped charges.

3.3. RESULTS 33

This hysteresis was observed in many, but not all, of the devices which were fabri-

cated in open air. Later devices were fabricated in a controlled nitrogen environment

and the hysteresis was no longer observed in the majority of the devices.

Figure 3.10: IV characteristic for an ITO/compound 1/Al device that showed hys-teresis. Voltage increased in the forward bias shows a lower current thanthe return following return of decreasing the forward bias as indicatedby the arrow heads.

3.3. RESULTS 34

Light Testing

The original intention of the molecular glass PDI was as an electron acceptor material

for organic solar cells due to the broad absorption range of compound 1 over the visible

light range as shown in Figure 3.11.

Figure 3.11: Absorption spectra of compound 1. Note the high absorption around300 nm is due to the glass substrate.

A brief test was done to see the response of the ITO/compound 1/Al diode to

light. First the IV characteristic was measured as usual under dark conditions, then

under 1 W illumination (light shone through the transparent ITO electrode), and

then again without illumination. As shown in figure 3.12, illumination increases the

output current. The IV characteristic shows an increased current which lasts after the

illumination is removed. As well, the illumination activated a current in the reverse

bias which also persisted after the illumination was removed. This device was tested

an hour later with the increase in current still observed.

3.3. RESULTS 35

Figure 3.12: IV characteristic for an ITO/compound 1/Al device showing responseto light. In blue is the original curve pre-illumination, in red is thedevice while under 150 W illumination, and in black is the device post-illumination. The voltage was applied to the ITO electrode and groundto the Al electrode. Voltage was swept from negative to positive andback.

3.4. DISCUSSION 36

3.4 Discussion

Electrical characterisation of the ITO/compound 1/Al diodes was done by current-

voltage characteristics. Though much variance was seen from one device to the next,

some general observations about the material can be made.

From the IV characteristics plotted on a double logarithmic scale, the typical

SCLC regime was observed in only one diode. From this diode, the mobility of

the charge carriers was calculated at 10−10 cm2/Vs. Other diodes instead exhibited

steeper slopes indicative of high disorder in the material and possibly an exponential

distribution of trap states in the PDI molecular glass compound 1.

This low value of the electron mobility, along with steep slope in SCLC regime and

the heat activated current all confirm a large amount of trap states in the material.

37

Chapter 4

Impedance Spectroscopy

Impedance spectroscopy is a method of probing and characterising electrical proper-

ties of a material and the interfaces with its conducting electrodes. Types of electrical

stimuli used for impedance spectroscopy include application of a voltage step func-

tion, a random noise voltage signal, or a single-frequency voltage [18]. In the first

two methods the resultant time-variant current is measured and Fourier transferred

into the frequency domain. For the single-frequency voltage, both the phase shift

and amplitude of the current response are measured. This last approach is the most

common and commercial instruments are available making it simple to measure the

impedance as a function of frequency [18].

Impedance spectroscopy allows for the study of intrinsic properties or external

stimulus on the conductivity of an electrode-material device. Two categories of pa-

rameters can be studied: those of the material (e.g. capacitance, dielectric constant,

conductivity, mobility of charge carriers etc.) and those of the interface between the

material and the electrode (e.g. capacitance of the interface, adsorption-reaction rate

constants, diffusion coefficients etc.) [18].

4.1. THEORY 38

4.1 Theory

Electrical impedance is a measure of the opposition to current that a circuit gives

when a voltage is applied. For a direct current this quantity is simply the resistance,

but for an alternating current this quantity can be described as the complex ratio of

the voltage V and current I, both of which have a magnitude and phase

Z =V

I. (4.1)

The impedance Z is a complex number containing both a phase and magnitude and

can be written as

Z = |Z|ejarg(Z) = |Z|ejθ (4.2)

where the magnitude |Z| is the ratio of the voltage to current and the phase θ is the

lag between the voltage and current.

In a DC circuit the only impedance is the resistance. For AC circuits two addi-

tional impeding mechanisms are present; inductance, voltages induced in a conductor

by a changing electrical field, and capacitance, storage of charge between two conduc-

tors. These two sources of impedance are described as the reactance of the circuit.

Impedance is a complex value with the real part containing the resistance R and the

imaginary part containing the reactance X:

Z = R + jX. (4.3)

Both the polar and Cartesian forms of impedance are represented in figure 4.1.

4.1. THEORY 39

Figure 4.1: The complex impedance plane. The real axis contains the resistance Rand the imaginary axis contains the reactance X.

As impedance describes an AC circuit it follows that Z is a frequency dependent

quantity

Z(ω) =V (ω)

I(ω). (4.4)

Impedance spectroscopy calculates this Z(ω) from measurements of the current, volt-

age and their phases and it is from here that the electrical properties of the system

are derived.

4.1.1 Capacitance

Capacitance refers to the ability of a device to store charge. Charge storage is depen-

dent on the geometry of the device and the permittivity of the dielectric. In the case

of the parallel plate capacitor the capacitance is simply

C =εA

d(4.5)

4.1. THEORY 40

where A is the area of the electrodes, d is the thickness of the device, and ε is the

dielectric permittivity of the material between the electrodes.

Capacitance will be frequency dependent when driven by an AC signal. The

complex capacitance can be derived from the measured impedance by

C(ω) =Y (ω)

jω(4.6)

where Y (ω) is the complex admittance and ω is the angular frequency. The admit-

tance is simply the inverse of the impedance

I(ω) = Z(ω)−1. (4.7)

The real part of C(ω) describes the device’s capacitive response while the imaginary

part describes the dissipation of energy with the device.

4.1.2 Equivalent Circuit

Devices can be modelled as equivalent circuits. In the case of organic semiconductors

the device can be modelled as a capacitor and resistor in parallel as illustrated in

figure 4.2. This parallel circuit has a relaxation time τ related to the capacitance C,

resistance R where τ = RC. Here C = ∆Q/∆V and represents the total charge and

R has no physical meaning, present only in parametrizing the time constant [12].

The measured impedance leads to calculations of the parallel capacitance

Cp(ω) =1

ω2τ 2 + 1C (4.8)

4.1. THEORY 41

and the parallel resistance

Rp(ω) =ω2τ 2 + 1

ω2τ 2R. (4.9)

Charge re-distribution inside the device is dominated by diffusion. The charges

take time to respond during a cycle of voltage modulation. Only modulations with a

time period greater than τ will allow movement of charges in and out of the interface

region and contribute to the capacitance [12]. A cut-off frequency of

fc =1

2πτ(4.10)

will be found in the capacitance of a given device.

Figure 4.2: Modelling of an organic semiconductor diode as a capacitor Cp in parallelwith a resistor Rp.

4.1.3 Polarisation

An external electric field can induce polarisation in a material. Electronic polarisation

refers to the displacement of electrons relative to the nucleus of atoms in a molecule

4.1. THEORY 42

and orientation polarisation refers to the alignment of permanent dipoles.

Polarisation of dipole moments occurs when a material of polar molecules is placed

in an external electric field. As the dipoles orient due to the applied field, the effective

electric field inside the device is decreased. This decrease in the effective field results

in an increase in the capacitance of the device since the capacitance is inversely

proportional to the electric field between the electrodes. The factor by which the

capacitance is increased is known as the dielectric constant or the relative permittivity.

The relative permittivity, εr, is dependent on frequency and is defined by

εr(ω) =ε(ω)

εo(4.11)

where ε(ω) is the absolute permittivity of the material and εo is the vacuum permit-

tivity.

The orientation of permanent dipoles requires the rotation of a molecule and can

only occur when the oscillation of the electric field is slow enough. Electrons, having

much lower mass than molecules, can respond much quicker to a changing electric

field and electronic polarisation can occur at much higher frequencies than orientation

polarisation.

4.1.4 Traps

Trap states can also contribute to the capacitance of a device. As charges are trapped

the device appears to be capable of storing more charges.

Traps will affect the capacitance depending on the energy level of the traps and the

charge trap dynamics. An increase in the capacitance at low frequencies is caused by

repeated trapping and de-trapping of charge carriers [19, 20]. For higher frequencies


the voltage modulation is faster than the de-trapping and the capacitance value is

the same for the trap-free case [21].


The devices fabricated for the impedance spectroscopy experiments were in the same

metal-semiconductor-metal format as used in the current-voltage experiments of Chap-

ter 3. The devices fabricated contained a thin film active layer of either compound 1

or compound 2 between either ITO and Al contacts, or both Al contacts.

All of the impedance measurements were performed with an Agilent Impedance

Analyzer. Data is collected using a computer interface which performs the necessary

calculations to give the real and imaginary pair of requested values as a function of

frequency. For the experiments carried out here, the pair of values desired was the

parallel capacitance and the dissipation factor.

The software calculates the absolute admittance |Y | and its phase θ

|Y | =√G2p +B2

p (4.12)

θ = tan−1(Bp/Gp) (4.13)

where Gp = 1/Rp is the parallel conductance and Bp is the parallel susceptance. The

capacitive susceptance Bc is equal to ωCp. The dissipation factor is the term inside

the inverse tangent, D = Gp/Bp.

A 500 mV alternating current was used for all of the capacitance measurements.

For the experiments using a DC offset, the voltage applied was between 0 V and 6

V. The analyzer has a frequency range of 40 Hz to 110 MHz and data was taken over

4.3. RESULTS 44

the available frequency range. The experimental set-up is shown in figure 4.3 and

involves no more than attaching the device electrodes to the analyzer leads.

Figure 4.3: Schematic of experimental set-up used for impedance measurements. AnAgilent Impedance Analyzer was used to probe devices with an alternat-ing current. A device with a PDI active layer sandwiched between twoAl electrodes is featured here. (Diagram not to scale)

4.3 Results

4.3.1 Capacitance

Capacitance measurements were first taken for symmetric devices with both elec-

trodes being Al. Shown below are plots of capacitance and dissipation factor for an

Al/compound 1/Al device (figure 4.4) and an Al/compound 2/Al device (figure 4.5).

4.3. RESULTS 45

Figure 4.4: A compound 1 device with Al contacts. The top plot shows the dissipationfactor which peaks around 1 kHz. The bottom plot shows the capacitancewhich is around 12 nF, but shows an increase for low frequencies.

The compound 1 device shows a capacitance of 12 nF with a large increase in

capacitance as the frequency approaches zero. The compound 2 device shows a

capacitance of 6 nF also with a large increase as the frequency goes to zero.

4.3. RESULTS 46

Figure 4.5: A compound 2 device with Al contacts. The top plot shows the dissipationfactor which peaks around 1 kHz. The bottom plot shows a capacitancewhich is around 6 nF, but shows an increase for low frequencies.

4.3.2 Capacitance Voltage Characteristics

The capacitance experiments were repeated with the addition of an offset voltage.

New devices were fabricated where the design was reverted back to the asymmetrical

ITO and Al contacts for ease of fabrication. Experiments were carried out using the

same two compounds. Figure 4.6 shows the IV curve for compound 1 while figure

4.7 shows the capacitance measurements. For compound 2 the IV curve is shown

in figure 4.8 and the capacitance measurements in figure 4.9. All the devices show

4.3. RESULTS 47

an increased capacitance at low frequencies which increases further with the addition

of the DC offset voltage. As the offset voltage increases the capacitance increases

further for the low frequencies.

Note the IV characteristics shown in figures 4.6 and 4.8 show an increased and

fluctuating current around 3 V which can be attributed to trap states in the material.

These features were not observed in many of the future devices fabricated in the

glovebox. However, access to the impedance spectroscopy equipment was not available

to take comparison data with the newer devices.

Figure 4.6: IV characteristic for a compound 1 device with Al and ITO contacts.Voltage is applied to the ITO contact and ground to the Al contact.

4.3. RESULTS 48

Figure 4.7: Capacitance-voltage data for a compound 1 device with Al and ITO con-tacts. Offset voltages from 0 V to 5 V were applied to the device (seelegend).

Figure 4.8: IV characteristic for a compound 2 device with Al and ITO contacts.Voltage is applied to the ITO contact and ground to Al.

4.3. RESULTS 49

Figure 4.9: Capacitance-voltage data for a compound 2 device with Al and ITO con-tacts. Offset voltages from 0 V to 6 V were applied to the device (seelegend).

All of the devices show a constant capacitance, irrespective of any offset voltage

applied, for mid range frequencies (approximately 1-100 kHz). For frequencies higher

than this all of the devices show the capacitance dropping to zero. This cutoff fre-

quency is found at 350 Hz for the compound 1 device and 1 MHz for the compound

2 device (see figures 4.7 and 4.9).

These DC offset capacitance experiments were repeated for several devices of

each type and the averaged results are summarized in table 4.1. Capacitance values

reported are the middle frequency range capacitance where the capacitance falls off

to a constant value and before the capacitance drops off to zero at high frequencies.

Uncertainties were calculated from variance in the data. These capacitance values

were used to calculate the permittivity of the material using equation 4.5 for the

geometric capacitance.

4.4. DISCUSSION 50

Table 4.1: Capacitance values, cutoff frequencies, and permittivity calculated fromthe impedance spectroscopy data. Several devices of each type were testedand the average results are reported here.

MaterialCapacitance

(nF)Cutoff Frequency

(kHz)εs

(x10−11 F/m)εr

Compound 1 6 ± 1 490 ± 60 2.4 ± 0.4 2.7 ± 0.5Compound 2 4 ± 1 1000 ± 20 1.4 ± 0.4 1.6 ± 0.4

4.4 Discussion

The devices tested all show increased capacitance at low frequencies. The total ca-

pacitance from the contributions of the geometrical capacitance and the change in

capacitance seen at low frequencies can be described by

C(ω) =

ε(ω)A

d(VDC)as ω → 0

εA

dfor 0 ω > ωmax

0 for ω > ωmax

(4.14)

where at low frequencies ε shows a dependence on the frequency and the apparent

device thickness d shows a dependence on the offset voltage VDC .

The first term in equation 4.14 describes the changes to the capacitance seen at

low frequencies where the capacitance shows dependency on frequency. Two trends

were observed in the devices: an increased capacitance at low frequency and a further

increase with the application of a DC offset.

Polarisation of molecules in a disordered material allows for the molecules to reori-

ent themselves within the applied field. Rather than just the electron cloud shifting,

4.4. DISCUSSION 51

the molecule itself has some freedom to reorient. This reorientation of molecules in

the electric field translates to the material being able to store more charge and in-

creases the dielectric constant of the material. This increase in ε results in an increase

in the capacitance. Since this reorientation is not instantaneous it cannot occur at

higher frequencies as the molecules would not have enough time to shift therefore it

does not continue to increase the capacitance as the frequency continues to increase.

The addition of the DC offset also contributed to an increase of capacitance at

low frequencies. This DC offset causes the capacitor to store charge and effectively

decreases the device thickness. In other words, as the capacitor is charged the re-

maining region to be charged is decreased creating a smaller apparent thickness. As

the offset voltage is increased more charge is stored in the capacitor and the thickness

decreases further. This decrease in the effective thickness causes an increase in the

device capacitance. Applying the DC offset in addition to the AC modulation results

in the further increase of device capacitance at low frequency, above the capacitance

increase caused by the polarisability of the material. This apparent thickness depen-

dency on the DC offset only shows up for low frequencies where the molecules have

time to reorient.

Another contributor to increased capacitance are trap states. As the frequency is

modulated, charge carriers are trapped and de-trapped allowing more charges to enter

the device and causing the capacitance to increase. This trapping and de-trapping

process will have some response time and as seen for the polarisation effects it will

only increase the capacitance for low frequencies [20].

The second term in equation 4.14 is the geometric capacitance of the device and

shows no dependence on frequency. In this region the frequency modulation exceeds

4.4. DISCUSSION 52

the response time for the polarisation, DC offset, and trap state effects. The geometric

capacitance is expected to be independent of frequency as well as independent of any

DC offset.

The last term in equation 4.14 is the drop to zero seen in the capacitance at higher

frequencies (above 105 Hz for devices tested here). As described in section 4.1.2, a

material has a minimum time period required to allow the charges to respond to any

modulation in the voltage. When the frequency approaches infinity the capacitive

qualities fail and the capacitor acts as a short allowing current to flow.

53

Chapter 5

CELIV

The initial experiments using charge carrier extraction by a linearly increasing volt-

age (CELIV) were published in Russian by D. Petravichyus et al. in 1976 [22]. It

was originally used as a technique to measure charge mobility in micro-crystalline

semiconductors. Since then, CELIV has garnered considerable interest in organic

semiconductor research mainly due to the possibility of studying charge transport

directly in thin film devices with a thickness below 100 nm [23, 24, 25]. For small

molecules, polymers, material blends, or donor/acceptor systems it can be difficult

or impossible to recreate the system or components of the system in a thicker film or

modified geometry that would be required by other experimental techniques.

Several techniques for CELIV exist to probe charge transport. The basic CELIV

technique will be outlined in the following sections as the data of this chapter was

acquired using this technique. The charge extraction was very small and therefore was

difficult to observe. Both photo-CELIV and iCELIV were attempted, but as charge

extraction was not observed these techniques will not be further discussed. Photo-

CELIV, as the name suggests, uses a timed laser pulse to generate non-equilibrium

charges in the device and extracts those charges with the linearly increasing voltage

5.1. THEORY 54

[25, 26, 27]. The iCELIV technique, a less common method, uses injected charges

from an initial applied offset voltage and then sweeps those charges out using the

linearly increasing voltage [28].

5.1 Theory

CELIV is a technique which uses a voltage ramp to sweep charge carriers from a device

giving a characteristic response of a capacitative offset topped by a peak in the current

density formed by the drifting of free charge carriers. The analytical framework

outlined follows that of Juska et al. [24, 29, 30] which is commonly referenced in

organic semiconductor CELIV experiments.

The basic CELIV theory can be described by device that is represented as a

capacitor between two electrodes positioned at

x = 0

x = d

(5.1)

with one of the two electrodes required to be a blocking contact (at x=0).

The charge distribution within the capacitor p(x, t) at time t is described by

p(x, t) =

en , 0 ≤ x ≤ l(t)

0 , x > l(t)(5.2)

where n is the charge carrier density of free charge carriers, e the electron charge, and

l(t) is the extraction depth with

0 ≤ l(t) ≤ d. (5.3)

5.1. THEORY 55

If a linearly increasing voltage pulse V (t) = A′t is applied to the device the current

density j(t) in the external circuit is given by

j(t) = jo + p(t)

(µA′

dt− enµ

2εεodl(t)2

)(5.4)

where

jo =εεoA

′

d. (5.5)

εεo is the permittivity of the material and µ is the mobility of the free charge carriers.

The density of free charge carriers in the device p(t) is described by

p(t) =

en(

1− l(t)d

), 0 ≤ l(t) ≤ d

0 , d > l(t).(5.6)

The current density requires a device which has the time constant

RC ttr. (5.7)

where R and C are the resistance and capacitance of the device and ttr is the transit

time required for the charge carriers to be extracted from the device. The current

density jo is the initial differentiating step of the RC circuit.

The first term in the brackets of equation 5.4 is the drift of charge carriers caused

by the applied field and the second term contributing to the current density is due

to the field caused by the charge carriers that are distributed within the device. The

change in the electric field due to the distribution of the charge carriers is assumed

negligible in low conductivity materials and this term is dropped from the equation

5.1. THEORY 56

leaving

j(t) = jo + p(t)

(µA′

dt

). (5.8)

Calculating the transient current j(t) requires the extraction depth l(t) which can be

expressed as

dl(t)

dt= − enµ

2εεodl(t)2 +

µA′

dt (5.9)

with the initial conditions

l(0) = 0

dl(t)

dt|t=0 = 0.

(5.10)

This equation has only been solved analytically under high and low conductivity

assumptions. Continuing with the assumption of low conductivity the extraction

depth simplifies to

dl(t)

dt=µA′

dt (5.11)

which is solvable, giving

l(t) =µA′

2dt2. (5.12)

When l(t) = d all the charge carriers are extracted from the device and this is defined

as the transit time ttr giving

ttr = d

√2

µA′. (5.13)

This transit time is a signature feature of CELIV data and will be described further

in section 5.2.

5.2. METHOD 57

5.2 Method

The experimentally measured current response to the applied voltage ramp described

in section 5.1 is illustrated in figure 5.1. In the top half of the figure the applied

linearly increasing voltage ramp is shown. For materials that have free charge carriers

at equilibrium, charges can be extracted using a ramp that starts at 0 V and increases

linearly in the reverse bias. However, for devices that have very few free charge carriers

at equilibrium there are no charges to extract. Adding an offset voltage serves to

populate trap states in the material. These trapped charges can then be swept out

and probed with the voltage ramp.

The corresponding measured current response is illustrated in the lower part of

figure 5.1. The CELIV response is characterised by a current jo which is the capacitive

response of the device with a signature extraction current ∆j. For materials with no

free charge carriers in equilibrium the square response of the capacitive current jo is

all that will be seen. If charge carriers are extracted, an additional current ∆j with

a peak at tmax will be seen. The time is takes to extract all the free charge carriers is

the transit time ttr. The area under the extraction peak is the total amount of charge

extracted Qextracted.

These features are used to calculate the mobility of the charge carriers, the density

of extracted charge carriers and the device capacitance along with permittivity of the

material in section 5.4.

5.2. METHOD 58

Figure 5.1: A pulsed linear voltage ramp A′ is applied by a function generator to thediode device, shown at top. The current response of the device is shownin the lower plot with a capacitive current jo and an additional current∆j with a peak at tmax from the extraction of charge carriers. At timettr all the charge carriers have been extracted.



The configuration for CELIV experiments is shown schematically in figure 5.2. The

pulsed voltage ramp is applied using a function generator and the change in voltage

across a resistor, R, is measured to monitor the current response of the device. A

very small resistor is used since the internal resistance of the oscilloscope, Ro, is 1

MΩ and

1

Req

=1

R+

1

Ro

(5.14)

where if

Ro R (5.15)

then

Req ≈ R. (5.16)

Unlike the experiments carried out in the previous sections, CELIV requires a

diode-like device with one charge injecting contact and one blocking contact as the

voltage ramp is swept into the reverse bias. The area of the device had to be decreased

to 0.06 cm2 in order to decrease RC. Devices with several combinations of contact

metals were fabricated. Contacts of ITO and Au, ITO/ZnO and Au were attempted

but resulted in two blocking contacts within the voltage ranges achievable with the

function generator. Al and Au contacts gave a nicely asymmetric device, however

the injection current was still quite low for CELIV purposes. Devices with Al for

the injecting contact and ITO for the blocking contact were used to get the CELIV

results in this chapter.


Figure 5.2: Schematic of the experimental set-up for CELIV measurements. A pulsedlinear ramp voltage is applied by a function generator to the diode device.The voltage drop is measured across a resistor, R , which is in parallelwith the internal resistor of the oscilloscope, Ro = 1 MΩ.

The CELIV response of the devices was very small (jo ∆j) and difficult to

probe. PhotoCELIV [23, 25] and iCELIV [28] were attempted, but neither technique

gave any improvement to the charge extraction. With little way to increase the

response the data was taken by dark CELIV. An offset voltage was used to fill trap

states so those charges could be extracted. The offset voltage was increased in 0.1 V

steps until the extraction peak was seen.

5.4. RESULTS 61

5.4 Results

CELIV results were obtained for two of the materials studied in this thesis, compound

1 and compound 2. Eight devices of each material were prepared, but many of the

devices shorted during the data taking. Data was taken on all working samples and

any calculations were made and averaged using the available data.

Figures 5.3 and 5.4 show sample data for a compound 1 device and figure 5.5

shows the corresponding current voltage characteristic of the device. The jo capacitive

current can be seen in the 0 V offset data for an applied voltage ramp of 2 V over 3

ms. The offset voltage of 0.3 V was chosen as an example where the extraction peak

is clearly seen.

Figure 5.3: CELIV response for a compound 1 device. A ramp of 2 V over 3 ms wasused. Legend gives the offset voltage used for each curve.

5.4. RESULTS 62

Figure 5.4: CELIV response for a compound 1 device zoomed in to show extractionof charge carriers for the data set taken with an offset voltage. A rampof 2 V over 3 ms was used. Legend gives the offset voltage used for eachcurve.

Similar CELIV results are seen for a compound 2 device in figure 5.6, with the

corresponding current voltage curve shown in figure 5.7. The jo capacitive current can

be seen in the 0 V offset data for an applied voltage ramp of 1 V over 3 ms. Data with

an offset voltage of 0.4 V was selected as an example to show the extraction peak. The

CELIV extraction peak is spread out in time as compared with the compound 1 data

(figure 5.4). The wider spread in the extraction peak was seen for all of the compound

2 devices as compared with the compound 1 devices. As well, the compound 2 devices

showed poor blocking contacts with charge flowing in the reverse bias as shown in

figure 5.5.

5.4. RESULTS 63

Figure 5.5: Current voltage characteristic for the compound 1 device. Voltages ap-plied with respect to the ITO electrode and cycled (colour progresses fromred to green as time increases).

Figure 5.6: CELIV response for a compound 2 device zoomed in to show extractionof charge carriers. A ramp of 1 V over 3 ms was used. Legend gives theoffset voltage used for each curve.

5.4. RESULTS 64

Figure 5.7: Current voltage characteristic for a compound 2 device. Voltages appliedwith respect to the ITO electrode and cycled from 0 V to 6 V to -6 Vand then back to 6 V for four return trips. Colour progresses from red togreen as time increases.

5.4.1 Mobility

The main charge extraction occurs at tmax when the field is the strongest. The

mobility is calculated at this time, rather than at ttr as outlined by equation 5.13.

The value of µ is approximated with a numerically estimated correction factor related

to the extraction depth [24]. This formula is commonly used in organic semiconductor

CELIV experiments [23, 26, 30, 31] and µ is calculated using

µ =2d2

3A′t2max(1 + 0.36∆jjo

). (5.17)

5.4. RESULTS 65

For the data taken in the thesis, ∆jjo 1 and the charge carrier mobility was calculated

by simplifying equation 5.17 to

µ =2d2

3A′t2max. (5.18)

A third degree polynomial fit was used on each data set to find tmax as shown

in figure 5.8 and mobilities were calculated for each data set using equation 5.17.

The results were averaged using the available data sets. Unfortunately, several of the

devices were shorted/ruined during the data taking and some of the test parameters

only have one data set. The mobility results are summarized in table 5.1 for a 0.3 V

offset for the compound 1 devices and a 0.4 V offset for the compound 2 devices.

Figure 5.8: Example of CELIV data for a compound 1 device with fit to find tmax(with respect to start of applied voltage ramp). For this data a ramp rateof 2 V over 3 ms was used along with a 0.3 V offset.

5.4. RESULTS 66

Table 5.1: Mobilities, µ, calculated from CELIV data. For compound 1 results thedata is averaged from three devices. For compound 2 only the 1 V/3 msramp rate data is averaged from three devices as for the other ramp ratesonly one device was working.

Device Material µ (x10−8cm2/Vs) Ramp Rate (V/3 ms) Offset (V)

Compound 1

66 1

0.384 2

86 3

Compound 2

17 1

0.422 2

21 3

5.4.2 Capacitance

Using the jo value from the CELIV plots with no extracted charges the device capac-

itance and permittivity of the material can be calculated.

jo =A′

dεrεo (5.19)

where εo is the permittivity of free space, εr is the relative permittivity and the εs is

the permittivity of the material

εs = εrεo. (5.20)

The geometry of the device is that of a parallel plate capacitor allowing the capaci-

tance to be calculated by

5.4. RESULTS 67

C = εsa

d(5.21)

where a is the area of the device and d the thickness.

Using the data from the CELIV experiments the capacitance and permittivity

values are averaged in table 5.2.

Table 5.2: Capacitances and permittivity values calculated from CELIV experimentdata. Data is averaged from five sets of data and the standard deviationis given as the uncertainty.

Device Material Capacitance (nF) εs (x10−11 F/m) εr

Compound 1 2.1±0.2 2.8±0.3 3.2±0.3

Compound 2 2.0±0.1 2.7±0.1 3.0±0.1

5.4.3 Density of Extracted Charge Carriers

As shown in figure 5.1, the area under the CELIV peak represents the extracted

charge carriers. By integrating the area under the CELIV curve that is above the jo

capacitive current the number of extracted charge carriers can be calculated.

For all the devices tested, under all the conditions applied, the charge carrier

density was on the order of 1015/cm3. As mentioned in section 5.4.1 and shown in

figures 5.4 and 5.6, charges are still being extracted after the extraction peak has

passed as seen by the tail where the current density is also above jo after the initial

extraction of charges in the peak. This tail is a sign of trap states in the material where

the trap states take time to release the trapped charges resulting in charges still being

extracted after the initial extraction peak. Ideally the applied voltage ramp would

be extended in time to extract the remaining charges and with the current density

5.4. RESULTS 68

falling to the same value as jo. Extending the voltage ramp requires sweeping further

into the reverse bias. Unfortunately, for these devices going further in the reverse bias

goes beyond the range in which the ITO behaves as a blocking contact. Sweeping

further into the reverse bias results in charge injection and an increase in current. As

a result, calculations of the density of extracted charges are an underestimate of the

available charge carriers in the device.

As the offset voltage in the forward bias is increased, the peak increases in height

as shown in figure 5.9 for compound 1. The extraction peak increases as does the

height of the tail of continued charge extraction. For the CELIV data shown in figure

5.9 the density of the extracted charges was calculated and plotted in figure 5.10. The

density of extracted charges continues to increase with the increasing offset voltage.

Ideally the offset voltage would be increased until the resultant density of extracted

charges stops increasing, which would give information about the energy of the trap

states in the device. For these devices, increasing the forward bias also increases the

capacitance of the device and thereby increasing the RC response time. This results

in the rising edge of the CELIV response rounding off and preventing the extraction

peak from being observed. Therefore, it was not possible to increase the forward bias

enough to find the voltage at which the density of extracted charge carries stopped

increasing for these devices.

5.4. RESULTS 69

Figure 5.9: Example of CELIV data for a compound 1 device with the offset voltageincreased in the forward bias in steps of 0.1 V.

Figure 5.10: Example of CELIV data for a compound 1 device calculating the densityof extracted charges as function of the increasing offset voltage in theforward bias.

5.5. DISCUSSION 70

5.5 Discussion

It was difficult to find the conditions to extract charges from the devices. The CELIV

peak itself is quite spread out and small. The electron mobility calculated from these

CELIV experiments was on the order of 10−7 cm2/Vs. The literature values for

mobilities of PDI-derived devices range from 10−1 to 10−4 cm2/Vs [32, 33, 34].

Hanfland et al. [35] argue that Juska’s assumptions do not carry over very well for

organic semiconductors as they do not properly account for trap levels or high levels

of disorder. They argue that the free charges cannot all be swept out in the initial

transit time, since trap levels will still be trapping and de-trapping at later times

under the changing field. This description is backed up by the charge extraction seen

in the CELIV data after the initial charge extraction peak has passed. Hanfland

et al. conclude that there is significant effect of the trap states which alter the

CELIV transient and equation 5.17 cannot be considered more than an estimate of

the mobility and can be off by as much as two orders of magnitude [35].

71

Chapter 6

Summary and Outlook

The molecular glass PDI compounds perform well under fabrication techniques as in-

tended, but the large number of trap states inhibit its potential as an electron trans-

port material for organic photovoltaics. The devices fabricated for this thesis proved

difficult to measure with reproducibility. A clean room environment for fabrication

and testing and device encapsulation could possibly improve the reproducibility of

measurements.

6.1 Traps

Trap states were evident in the data of each experiment carried out. In the current

voltage characteristics, the space charge limited regime was observed to have a steep

slope due to the exponential distribution of trap states and high disorder in the mate-

rial. As well, the current voltage characteristics showed a dependence on temperature

indicating trapped charges. Traps were seen again by the voltage dependence of the

capacitance measured by impedance spectroscopy. In the CELIV experiments, traps

were evident by the extraction of charges occurring after the initial peak extraction.

6.2. FUTURE WORK 72

6.2 Future Work

Research on these molecular glass PDIs will continue as an electron transport material

for organic solar cells. Due to its broad absorption spectra, one path is to try a blend

with another electron transport material; where the molecular glass PDI provides the

absorption range across the visible spectra and the other material would be chosen

for its electron transport properties. Work following this thesis testing the molecular

glass PDIs in a blend for the active layer in organic solar cells can be found in [10].

Another possible avenue is to modify the molecular glass PDI by synthesising an

improved compound with higher mobility and fewer traps. Work carried out following

the research in this thesis predicted that the bulky groups at the imide positions were

hindering molecular stacking and showed that replacing the phenyl end groups with

octyl chains improved electron mobilities by an order of magnitude [10].

As well, due to the hysteresis observed in some of the PDI devices, the molecular

glass PDI may have potential to serve as a memory material.

BIBLIOGRAPHY 73

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