Photonics Integration for Computing Applications · 144 x 10+ Gbps 21 x 10 Gbps 17.5 mm x 13.5 mm ERNI 1 m cable differential striplines 2 x 10 Gbps 80x17 µm tracks @ 460 µm pitch

© 2013 IBM Corporation

IBM Research - Zurich

Photonics Integration for Computing Applications

Bert Jan Offrein

27. June 2008 | Kyoto, JapanTampere – Summer School 2013

2 © 2013 IBM Corporation


Bert Jan Offrein

Outline

• Inter-system communication trends, need for optics• Status of optical interconnects in computing

• Electro-optical integration, examples

– Board-level electro-optical links– Silicon photonics WDM multiplexers

– Silicon photonics systems integration path

• Exploratory directions

– High Q optical cavities– Colloidal quantum dots

• Conclusions



Bert Jan Offrein

Acknowledgement

• Optical Interconnects– R. Dangel, F. Horst, J. Weiss, D. Jubin, N. Meier– M. Taubenblatt, F. Duany, C. Schow, D. Kuchta, F. Libsch– Y. Taira, S. Nakagawa

• Si-Photonics– F. Horst, J. Hofrichter, M. Soganci, A. La Porta, T. Morf– Y. Vlasov, W. Green, S. Asseffa, T. Barwicz– G. Morthier & P. Mechet (IMEC), O. Raz, T. de Vries & H. Dorren (TUE)

• Exploratory Photonics– R. Mahrt, T. Stoeferle, P. Seidler, G. Raino

• And many others!

• Funding– EU (FIREFLY, HISTORIC, HERODOT)– DARPA (TERABUS)



Bert Jan Offrein

Exponential Growth in Supercomputing Power

• Performance increaseFactor 10 every 4 yrs

• Exascale Systems by 20203 Orders increase compared to today!!!

• BW requirements must scale with System Performance, ~1B/FLOP (memory & network)

• Requires exponential increases in communication bandwidth at all levels of the system �� Inter-rack, backplane, card, chip



Bert Jan Offrein

Electrical BW Bottlenecks – Optics opportunities

• Electrical Buses become increasingly difficult at high data rates (physics):• Increasing losses & cross-talk ; Frequency

resonant effects

• Optical data transmission: • Power Efficiency , much less lossy, not

plagued by resonant effects

Rack BackplaneModule Card

OPTICS

CIRCUIT BOARD

MULTI CHIP MODULE

μμμμPμμμμP OPTICSOPTICS

CIRCUIT BOARD

MULTI CHIP MODULE

μμμμPμμμμPμμμμPμμμμP



Bert Jan Offrein

Density advantage of optics

Cables

Connectors PCB-Tracks

Electrical I/O Optical I/O

144 x 10+ Gbps 21 x 10 Gbps

ER

NI

17.5

mm

x 1

3.5

mm

1 m cable

differential striplines2 x 10 Gbps

80x17 µm tracks @ 460 µm pitch

optical waveguides16 x 10+ Gbps

35x35 µm cores @ 62.5 µm pitch

IBM

IBM



Bert Jan Offrein

Where to position the transceiver?

On

proc

esso

r

On

pack

age

On

boar

d

At b

oard

edg

e

Better performance, more disruptive, more development required

board

memory

processor

back

plan

e



Bert Jan Offrein

2008: Roadrunner – 1 PetaFlop

Backplane

Processor Processor

Memory

Optics

Optics at the board-edge:

Performance increaseBased on existing assembly concepts

Total ~48000 Fibers



Bert Jan Offrein

2011: Power P775 System

Avago MicroPODTM

Processor Package

Backplane

Processor ProcessorMemory

OpticsOptics

Optics at board-levelPerformance increaseAdditional assembly effort



Bert Jan Offrein

How much optics will be required?

• 10x performance increase every 4 years• 10x performance increase costs 1.5x as much

• 10x performance increase requires 2x more energy

0.025$ /Gb/s10$ /Gb/sCost of optics

1 mW/Gb/s50 mW/Gb/sOptics efficiency

320x106 @ 25 Gb/s48000 @ 5 Gb/s# Optical signals

400 PB/s0.012 PB/sOptical bandwidth

20 MW2.5 MWEnergy consumption

500 M$150 M$Cost

1 ExaFlop1 PetaFlopPerformance

20202008

Based on existing trends, not a product plan, courtesy J. Kash

Optics must become- More efficient- Cheaper- Simpler



Bert Jan Offrein

Looking back, electronics

EAI 580 patch panel, Electronic Associates, 1968Whirlwind, MIT, 1952

Today’s state of computing is based on:- Integration and scaling of the logic functions (CMOS electronics)- Integration and scaling of the interconnects (PCB technology & assembly)

Pictures taken at:



Bert Jan Offrein

From electrical to electro-optical integration

• Board-level– Integration and scaling of the interconnects (PCB technology)

– Electrical and optical ‘wires’ on or in printed circuit boards (Electro-optical PCB)

• Chip-level- Integration and scaling of the electrical functions (CMOS electronics)- Integrate the electro-optical transceiver

- By close packaging of components (Drivers/Amplifiers/Lasers/Detectors)- By adding the transceiver to the silicon function library (silicon photonics)

• Assembly

– Massive simultaneous interfacing of electrical connections

– Massive simultaneous interfacing of electrical and optical connections

• However:

– Need a step by step approach to integrate optics– Optics emerged at the system edge

– Future system will apply optics closer to the processor



Bert Jan Offrein

Photonics Roadmap – Optical Interconnects in SupercomputingBackplane

Processor ProcessorMemory

Optics

Opt

ical

I/O

2008

Today

Electrical system, optical fibers at card edge only

Optical fibers across the boards

Optical waveguides in/on boards

Optical interconnects integrated with the processor

Developm

entR

esearch

Optical interconnects will be applied for shorter and shorter links to fulfill bandwidth and power efficiency requirements. Integration will increase bandwidth density and reduce cost.

OpticsOptics

OpticsOptics

OpticsOptics

Optics

Optics



Bert Jan Offrein

FR4

Lowercladding

Corelayer

Woven glassfiber bundles

Cu layer

Epoxyresin

Uppercladding

Polymer Waveguides: Processing principle

FR4

Polymer materialPolyurethane

Acrylate

Substrate material

Polysiloxane



Bert Jan Offrein

Multimode optical printed circuit board technology

• Board-level optical interconnects through polymer waveguiding structures

• Siloxane waveguide materials show– Excellent optical properties, propagation loss < 0.05 dB/cm

– Long term stability against high temperatures and humidity

– Lamination and solder reflow resistance– High flexibility, suitable for in-board lamination and thin sheet applications

– Fast and convenient processing, excellent geometrical control



Bert Jan Offrein

Substantial improvements in multi-mode optical PCB technology

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Processing

Full waveguide stack in < 45 min

Adhesion

Flexibility

Propagation loss

Excellent flexibility, no curling

Propagation loss < 0.05 dB/cm Excellent adhesion on polyimide

In collaboration with:



Bert Jan Offrein

Substantial improvements in multi-mode optical PCB technology

Flexible, stable, and easily pocessable silicone polymer waveguides

• Fast and straight-forward processing procedure• Various deposition and patterning methods • Excellent flexibility, no curling on thin-film sheets • Low propagation loss less than 0.05 dB/cm • Compatible with solder reflow processes• No measureable increase in attenuation after 2000h at

85% RH / 85�C.

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Reliability

85%RH/85°C Solder reflow

Chemical resistance

No loss change after 2000 hrs Small loss increase, remains <0.05 dB/cm

No loss change after 30 min inchemical bath

5 cycles to 260 °C in airLoss increase, +0.016±0.005 dB/cm

In collaboration with:



Bert Jan Offrein

Arrays of very long waveguidesspirals (� 170 cm) to be used inhigh-precision optical attenuationmeasurements.

Waveguide flex sample for materialcharacterization tests regardingcurling, adhesion, flexibility, reliability.

40 cm

Waveguide flex sample for one or multi-layer connectorization and assembly tests.

Examples of waveguide flexes:

Arrays of 12 waveguides

Arrays of waveguide spirals made with slightly different UV exposure parameters

Waveguide Flex Manufacturing Results



Bert Jan Offrein

• Optical PCBs are a key enabler for electro-optic integration:• Provide electrical and optical signal routing capability at board-level• Enable simultaneous interfacing of electrical and optical connections• Mating of numerous optical interfaces in one assembly step• Allow close integration of electrical and optical functions• Enable board-level optical signaling by embedding waveguide sheets in board stack• Avoid cable handling at board-level

12 embeddedwaveguides

EO modulMT

interface

Arrays of 12 waveguides

TRX116TX + 16RX

TRX216TX + 16RX

Optochip16TX + 16RX

Printed circuit board with electrical and optical wiring Terabus Optochip assembly concept, providing multiple optical connections between the Optochip and the optical board. 15+15 optical channels at 15 Gb/s and 9.7 pJ/bit

Board-level Waveguides - Motivation

Examples of optical PCB based demonstrators realized in research, showing above mentioned capabilities:



Bert Jan Offrein

Transceiver Board-Level Optical Links

Component and Package Development• Transceiver Chip: Low Power CMOS driver and receiver designs

• Optical Components: 2D arrays of 985nm VCSELs and pin photodiodes, with integrated backside lenses

• Organic Carrier: Multi-level high-speed wiring for transceiver data and power

• Packaging and Assembly: Solder hierarchy, optical system design, mechanical tolerances, thermal analysis

• Optocards: Dense array of low-loss optical waveguides and turning mirrors

Objectives• Demonstrate high-speed board-level optical links through integrated

waveguides• Highly integrated packaging approach to yield dense Optomodules that “look”

like surface-mount electrical chip carriers

Optomodule

Optocard

Lens ArrayLens ArraySLC

Transceiver IC

OESLC

Transceiver IC

OEOE



Bert Jan Offrein

Lens Array

TRX IC

OE

SLC Carrier

FR4

Lens Array

TRX IC

OE

SLC Carrier

FR4

Optocard waveguides: Turning mirrors and Lens Array

BGA site for Optomodule

Waveguide Lens Array

• Integrated turning mirrors–TIR – laser ablation–Dense waveguide pitch

• Integrated 48-channel collimating lens array channel 35, 40 not shown, in-coupling scattering

0.00

0.50

1.00

1.50

2.00

2.50

0 10 20 30 40 50

Channel Number

Bo

ard

Lo

ss (

dB

)

Median : 1.6Stdev: 0.1

1.6 dB average loss� 0.9dB for 7.5cm WG @980nm� ~0.7dB for mirror/lens assembly

Waveguide/Mirror Uniformity

48-channel Waveguide mirror array

waveguide cores on 62.5um pitch

48-channel Waveguide mirror array

waveguide cores on 62.5um pitchTIR mirrors



Bert Jan Offrein

TERABUS Link Demonstrator

16 channels TRX1� TRX2 at 10Gb/s

16 channels TRX1� TRX2 at 10Gb/s

52 WG channels

� Waveguides on top of PCB� Ultra-high density (62.5 μm channel pitch)� Coupling with 45o mirrors

Optomodule with Optochip

TRX116TX + 16RX

TRX216TX + 16RX

Optocard

Optochip16TX + 16RX

� 16 TX + 16 RX � Minimized OEIC footprint (17 mm2)� High-speed (up to 15 Gb/s/ch)� Ultra low power ICs (5 mW/Gb/s per unidirectional link)



Bert Jan Offrein

Optical printed circuit boards

Connector interface 12 waveguides Alignment marker

Top FR4 stack (with electrical lines)

Polymer waveguide layer

Bottom FR4 stack

Waveguide processing on large panels, 305 mm x 460 mm

Finished optical board with optical and mechanical interfaces

Electrical SMA connector interfaces

Embedded waveguides

Optical connector interfaces



Bert Jan Offrein

Passive alignment of optical components

MT pins

Alignmentstuds

Coppermarkers

waveguides

Alignmentslots

PCB

MT ferrule aligned by copper markers Positioned MT ferrule to polymer waveguides

Assembled transceiver moduleTransceivers realized in collaboration withIntexys Photonics

Connection of 120 Gb/s transceiver moduleto the MT ferrule



Bert Jan Offrein

120 Gb/s Board-to-Board Optical Link Demonstrator

• Embedded polymer waveguides (12 channels)

• Passive alignment of MT standard based connectors

• MT interface as standard interface for WG, fiber bundles/optical flexes and transceivers

• Pluggable TX/RX module (butt coupling)

Optical TX/RX board as building block Complete 12x10 Gb/s link demonstrator

12 embeddedwaveguides

EO modulMT

interface

10 Gb/s 10 Gb/s

Eye diagrams for 2 channels at 10 Gb/s



Bert Jan Offrein

Hybrid Optical Interconnect Technology

TRX116TX + 16RX

TRX216TX + 16RX

Processing of optical waveguides

Waveguide based multi-layer optical backplane

Optical link with waveguides between processors

Optical printed circuit board technology allows• low cost processing and assembly • higher density optical links

Optical waveguides in/on boards



Bert Jan Offrein

Integrated Optical Functions at Silicon-Level

Optical interconnects integrated with the processor

3D Stack, combining logic, memory and optical functions

Silicon photonics• enables the integration of optical functions in silicon• allows a tight integration between logic and optics• brings massive improvements in bandwidth density, power efficiency and cost

Opt

ical

I/O

Logic Plane

Off

-chi

pop

tical

sign

als

On-

chip

op

tica

l tra

ffic

Photonic PlaneMemory Plane

3D Integrated Chip

Silicon waveguide

1520 1530 1540 1550 1560-35

-30

-25

-20

-15

-10

-5

0

without taperCorner mirrors

Tra

nsm

issi

on [d

B] r

el. t

o st

raig

htWavelength [nm]

Optical wavelength multiplexer for ultra-high bandwidth data transfer



Bert Jan Offrein

Silicon photonics

IntegratedTransmitter

IntegratedReceiver

interconnect

� Silicon photonics– Modulators– Drivers– Detectors– Amplifiers– WDM filters– Dense integration

– + CMOS electronics

Provides the integration of optical interconnects with electrical functions



Bert Jan Offrein

WDM requirements

Design target:• Between 6 and 12 wavelengths per

waveguide, 3.2 nm wavelength spacing

• Many equal devices on one chip

� Highly reproducible, robust design� Small size

• Expected local temperature variations of ± 15 ºC

– Local thermal wavelength detuning of the order of ±1 nm

� Wide, flat pass-band

±15°C



Bert Jan Offrein

Echelle gratings as optical (de)multiplexers

Components:• Input waveguide

• Free space region

– Slab waveguide, no lateral confinement

• Focusing diffraction grating– Grating: Reflects light into

different diffraction orders

– Power in desired order optimized by blazing (tilting) the grating “teeth” / mirrors

– Curved: Refocuses light from input waveguide onto output waveguides

• Output waveguides– Diffraction angle depends on

wavelength � Different output waveguide for different wavelength



Bert Jan Offrein

Echelle grating results: E-beam“Extreme” design

1520 1530 1540 1550 1560

-35

-30

-25

-20

-15

-10

-5

0

without taperCorner mirrors

Tra

nsm

issi

on

[dB

] re

l. to

str

aig

ht

Wavelength [nm]

“Conservative” design



Bert Jan Offrein

Mach-Zehnder wavelength splitters

� 1 stage:

� 2 stages:

� 3 stages:

Delay Line DirectionalCoupler

0.5 0.5

0.5 0.3

0.1

0.5

0.2 0.2 0.05

In

Out 1

Out 2



Bert Jan Offrein

Full 1 to 8 WDM (de)multiplexer

• First splitter determines shape of ��

– First splitter needs 3-stage device

• Next levels in the tree can use simpler � ��

Theoretical transmission:



Bert Jan Offrein

Wide delay lines: Results

New run:• 1 µm wide delay lines on all stages

• Improved technology

Result:• Fully functional device

• Insertion loss ~ 1.5 dB

• Extinction ratio > 15 dB

1470 1475 1480 1485 1490 1495 1500-25

-20

-15

-10

-5

0

Tra

nsm

issi

on [d

B]

Wavelength [nm]

Measurement

1535 1540 1545 1550 1555 1560 1565-25

-20

-15

-10

-5

0

Tra

nsm

issi

on [d

B]

Wavelength [nm]

Simulation

100 µm



Bert Jan Offrein

Double Filtering stages for improved crosstalk suppression

In 1... 4� �

Out 1�

Out 3�

Out 2�

Out 4�

3

2

2

odd

even In 1... 4� �

Out 1�

Out 3�

Out 2�

Out 4�

3

3

3

odd

even

2

2

2

2

2

2

• 4 Wavelength Demux• Channel spacing 5 nm• Passband 3 nm• Passband ripple < 0.7 dB• Crosstalk > 24 dB• Insertion loss < 1.5 dB



Bert Jan Offrein

Basic grating coupler concept

� Coupling light from/to a cleaved standard

single mode fiber to/from the chip

� Coupling from top of wafer laterally into

the waveguide

� Main purpose: In-line device monitoring

of silicon photonic components

� Fabrication using FEOL integration

(9WG at BTV)

� No CMOS process changes



Bert Jan Offrein

General design considerations

• Design target for grating couplers:– Low Fabry-Perot ripples

– Large bandwidth

(3 dB BW > 50 nm)– Fair coupling efficiency

(> -10 dB)



Bert Jan Offrein

Grating coupler design: SOI fully or partially etched

Silicon dioxide (STI fill)

Silicon nitride slab

Top Si waveguide core

2um BOX

Silicon dioxide Waveguide width = 400-500nm

Schematic: Not to scale

145nmRX

waveguide

Meep

Coupling efficiency:

ηc ~ 0.78 * Pup,max

= 31% = -5 dB



Bert Jan Offrein

Grating couplers for process control

Microscope image�� Grating couplers can be used throughout the entire CMOS fabrication flow

J. Hofrichter et al., IEEE Group IV Photonics, London, (2011).



Bert Jan Offrein

Partially Etched (a = 720 nm fixed) 15o

�Focusing gratings for s-band application around 1490 nm

� -6 dB peak efficiency and more than 100 nm bandwidth

�Fabrication in CMOS process

29 µm focusing grating a=720nm, 15 degree



Bert Jan Offrein

DVS-BCBSiO2

siliconwaveguide

Metal

cw light in

Modulated light out

InPMQW

• MQW: InAsP MQW• PL maximum: 1520 nm

InP on silicon microdisk structures

J. Hofrichter et al.,Electron. Lett., 2011

Van Campenhout et al.,IEEE PTL, 2008

L. Lui et al.,Nature Photonics, 2010

� Material optimizedfor lasing



Bert Jan Offrein

Device structure

FIB cutBottom contact

InP disc

Siliconwaveguide

SiO2

Contact via

Disk diameter: 8 µm � 50 µm2 active area� Compact device



Bert Jan Offrein

Disk cavities for optical interconnectsOn chip resonant modulators

a) IV characteristics: current lower than 1 uA up to -4 V biasb) Static transmission characteristics: > 6 dB extinction



Bert Jan Offrein

Eye diagrams (NRZ PRBS length: 231 – 1)2.5 Gb/s 5.0 Gb/s

2.2 dB

4.5 dB 4.5 dB

10 Gb/s 10 Gb/s reference

10 dB

�� Open eyes at 2.5, 5.0 and 10 Gb/s



Bert Jan Offrein

BER measurements – NRZ PRBS pattern length: 231 – 1

3.1 dB

3.1 dB

7.0 dB

Power penalty mainly due toreduced extinction ratio

�Error-free operation (BER < 1x10-9) at 2.5, 5.0 and 10 Gb/s�Vpp < 2 V compatible with BiCMOS technology�Power efficiency 36 fJ/bit�Small form factor, area 50 μμμμm2

2.2 dB



Bert Jan Offrein

Where to position the Silicon Photonics transceiver chip?

On

proc

esso

r

On

pack

age

On

boar

d

At b

oard

edg

e

Better performance, more disruptive, more development required

board

memory

processor

back

plan

e

Chip-level assembly of silicon photonics die is (not yet) available!Need to package the silicon chip into a transceiver housing



Bert Jan Offrein

Silicon Photonics: Transceivers

• Assembly of a silicon photonics chip into a housing:– (Pluggable) Electrical connectivity

– Fiber-optical connectivity

– Standard form factor (QSFP, …)– Standard compatible (Infiniband, …)

• Advantages of silicon photonics:

– Low cost optical subassembly (when volumes are large enough)– Larger bandwidth

– Increased functionality (WDM)

– Higher bandwidth density

• However:

– System-level assembly effort remains

Molex/Luxtera Blazar QSFP AOC

Higher state of integration at chip-level, not at system-level



Bert Jan Offrein

Silicon Photonics: Chip-level assembly

• Assembly of a silicon photonics chip into the processor package– Directly next to the processor chip

– Solder attach the chip to the processor carrier

• Advantages of silicon photonics:

– As for the transceiver +– No transceiver overhead– Much higher bandwidth density

– Massively simplified assembly process

• However:– How to interconnect the optical signals?

transceiversprocessor

carrie

r substr

ate

waveguides



Bert Jan Offrein

Single mode polymer waveguides

Single mode polymer waveguides after development



Bert Jan Offrein

Silicon photonics and optical PCB

• Si photonics provides transceiver-level integration

– But the board and system-level integration challenge remains

single modewaveguides

lensestransceiver

carrier substrate

S P

lS lP

rR r

U

lL

tS

tS

d d

“S-lens” “P-lens”

Si Si

niml

niml

collimated beam

Dual lens lateral coupling system:- Coupling loss: 0.4 dB- Lateral alignment tolerance: 20 μm for 1 dB additional loss- Lens-to-lens distance tolerance: 100 μm for 1 dB additional loss- Spot size conversion from silicon to polymer waveguide

transceiver

carrier substrate

single modewaveguidestransceivers

processor

carrie

r substr

ate

waveguides

Silicon to polymer waveguide coupling:- Modal spot size of expanded Si-wg: 3 μm- Single mode polymer waveguides- Alignment tolerance: < 1 μm



Bert Jan Offrein

Adiabatic coupling between a Si photonics chip and polymer waveguides

• Adiabatic couplers between waveguides on chip and waveguides on carrier (or interposer)– Adiabatic supermode conversion using SOI waveguide tapers

• Expected advantages of the concept:

– Good tolerance• to positioning errors,

• to process variations

– High coupling efficiency despite mode mismatch

Side view of the photonic coupler Front view of the photonic coupler

Low-cost photonic packaging



Bert Jan Offrein

Basic principle of the adiabatic coupler

• The taper at one waveguide causes evolution of the supermode– Taper can be designed to shift the mode from one waveguide to the other

adiabatically• Optimized (nonlinear) taper designs lead to compact couplers.

Top view

Side view

Taper input: Complete confinement in SOI waveguide

Taper center: Overlap with both waveguides

Taper output: Complete confinement in polymer waveguide

Simplified schematic of a coupler with a linear taper



Bert Jan Offrein

Polymer waveguide to silicon chip optical coupling

• Adiabatic coupling based on silicon waveguide tapering– Polymer waveguide and silicon waveguide are in contact– Reducing the silicon waveguide width forces the light to couple to the polymer waveguide

Silicon photonics chip

Ormocer polymer waveguides

InOut

Polymer to silicon waveguide adiabatic coupling Silicon die, flip-chip attached to polymer waveguides

Carrier substrate

Si waveguidePolymer waveguide



Bert Jan Offrein

Adiabatic coupling tolerance measurements

• Demonstrated optical coupling loss < 0.2 dB– Appeared to be for the case where the Si waveguide was pressed into the polymer

waveguide– Non-deformed polymer waveguides show a coupling loss of 0.8 dB

• Alignment tolerance ± 2 μm for a loss increase of 0.5 dB

Adiabatic coupling concept demonstrated

1530 nm 1570 nm



Bert Jan Offrein

How to Improve Silicon Photonics Further?

Electro-optical modulation

All-optical switchingDetection

Transportation / guiding

• 2020 generation silicon photonics builds on ‘classical’ optical devices� Minimization of known optical device concepts

• Subsequently, silicon photonics has to be scaled to� smaller size, improved efficiency, faster

• Requires new device concepts and new materials for these photonics functions

Amplification / lasing

pump



Bert Jan Offrein

Very low penetration of light into Si compared to DBR/DFB/PC structures Cavity feasible even with αSi ~ 20000 cm-1 with a 10-fold smaller footprint

Planar Fabry-Pérot resonator with integrated HCGs

Broadband high reflectivity

Ref

lect

ivity

R

0

0.1

0.2

0.3

0.4

0.5

Lattice constant a (nm)

Rad

ius

r (n

m)

120 140 160 180 20040

50

60

70

80λ = 495 nm

Silicon-On-Insulator

New Device Concepts – High Contrast Grating (HCG) Mirrors

Q ~ 100length = 1.8 µm

FDTD Simulation



Bert Jan Offrein

New Device Concepts – Fabricated Resonator

1 μm1 μm

Fabrication: AMO, Aachen

Fabricated structure is covered with polymer gain material

• Material: MeLPPP (ladder-type conjugated polymer)

• Thickness: ~700 nm (spin-coating)

• Effective 4-level system

• Optical gain: ~2000 cm-1 between 480 – 500 nm



Bert Jan Offrein

460 470 480 490 500 510 520 530 540

Em

issi

on(a

rb.

units

)

Wavelength (nm)

Increasingpump energy

yx

z

Threshold: ~ 30 pJ/pulse

10Em

issi

on(a

rb.u

nits

)

Pump energy (pJ/pulse)

Pump wavelength: λ = 440 nmPulse duration: 200 fsRepetition rate: 1 kHzSpot size: 2 μm 1/e2 diameter

Stöferle, Nano Letters 10, 3675, 2010.

New Device Concepts – Measured Spectral Threshold Characteristics



Bert Jan Offrein

Laser

ω

T

ω0

δω

10201017 1018 1019

ΔN (cm-3)

free electrons

free holes

Plasma dispersion effect

ωωωω0 Q0 σσσσ0cw input with ω0 output ω0

electrical / opticalmodulation signal

Modulator:Light is modulated by applying an electric or optical field

Resonant modulator:Effective interaction length is increased which enables small integrated devices (figure of Merit: Q/V)

Refractive index change Δn of the optical resonator� frequency shift δω of resonance frequency ω0

New Device Concepts – Modulator Based on an Optical Resonator



Bert Jan Offrein

• Absorbed switching energy:6 fJ (25000 photons)

• Ultrafast optical response: <~10 ps

• Record-low energy at this switching speed with monolithic silicon

0 100 200150Time Delay (ps)

-50 50

1527.6

Wav

elen

gth

λ(n

m)

1528.4

1528.0

1528.8

1529.2

Tran

smis

sion

(a.u

.)

1.0

3.0>

<

p-doped

n-doped

1 m

SOI220nm TopSi

New Device Concepts – Optical Switch Based on Holey Waveguide

Schönenberger, Optics Express 18, 22485, 2010.



Bert Jan Offrein



Bert Jan Offrein



Bert Jan Offrein

Comparison of experiment and simulation

• Designed Q > 800.000 and V < 0.02 (λ/2n)3 � Q/V > 107

• Measured Q > 100.000 and Q/V > 106

• Excellent basis for observing strong optical nonlinearities



Bert Jan Offrein

Advantages

• Tunability (visible - infrared)

• Advanced heterostructures possible

• Low cost (wet chemistry approaches)• Easy to process (spin coating,

roll-to-roll inkjet printing)

• High photo-stability

Colloidal Quantum Dots and Rods

Applications

• Light emitting devices- gain material in integrated laser devices

- single photon source for quantum communication

• Photovoltaics

• Thermo electrics

http://www.google.it/images

http://www.google.it/images

Spectral Tunability of QDs

Material Emission Particle Size

• PbSe: 1100-2340 nm (3-9nm)

• PbS: 800-2100 nm (3-10nm)

• InP: 520-760 nm (2-6nm)• CdTe: 520-700 nm (2-7nm)

• CdSe: 470-640 nm (2-7nm)

• ZnSe: 360-440 nm (4-6nm)

HRTEM



Bert Jan Offrein

Type I Configuration

• High oscillator strength

(High non-radiative Auger rate)

Quasi-Type II Configuration

• Good e-h wavefunction overlap

(Reduced Auger relaxation rate)• Ideal for Lasing and single photon em.

Type II Configuration

• Complete charge separation

• Ideal for photovoltaic applications

Wavefunction Engineering

Different FunctionalitiesEngineering the electron-hole wavefunctions in strongly confined hetero-nanojunction

Type I Quasi-Type II Type II

Sub-nm scale dimensional control is required to tailor optical properties (single ML)!

Talapin et al. Chemical Reviews, 2010



Bert Jan Offrein

Wavefunction Engineering Probed by Time-Resolved PL

0 2 4 6 8 10

0.4

0.5

0.6

0.7

0.8

0.9

1

core 2.2 nm τ = 36ns core 2.5 nm τ = 26ns core 2.9 nm τ = 20ns core 3.3 nm τ = 13ns

3.3 nm

Nor

mal

ized

PL

Inte

nsity

Time (ns)

2.2 nm

core diameter

0 2 4 6 8 10

0.4

0.5

0.6

0.7

0.8

0.9

1

rod diameter 4.8 nm τ = 26ns rod diameter 3.9 nm τ = 18ns rod diameter 3.4 nm τ = 14ns

3.4 nm

rod diameter

Nor

mal

ized

PL

Inte

nsity

Time (ps)

4.8 nm

Different degree of wavefunction localization can be obtained by tuning the hetero-junction parameters. This is in good agreement with theoretical calculations.

Theoretical Calculation

Radiative Rate ~ �2fif ~ |<�e1|�h1>|2

NanoLetters, 2009, 9, 3470-3476

CdS

CB

VB

+

CdSe

-



Bert Jan Offrein

Amplified Spontaneous Emission (ASE) Experiments

QD film

excitation@400nm

ASE

glass substrate

CdSe CdS

The use of CdS shells enhances the absorption cross section and significantly reduce the lasing threshold (5-fold)

540 560 580 600 6200

5000

10000

15000

20000

25000

Inte

nsity

(a.

u)

wavelength (nm)

10uW 30uW 100uW 300uW 500uW 750uW 1mW 1.5mW 2mW

ASE

PL band

1

2

0 100 200 300100

200

300

400

data fit

AS

E T

hres

hold

(uW

)

Temperature (K)

c)

T0~350K

0 200 400 600 800 1000 1200

ASE_Core_5K ASE_Core_100K ASE_Core_250K ASE_Core_325K

AS

E In

teni

ty

Pump Power (uW)

b)5K

325K

Very good thermal stability (T0>350K), a prerequisite for integrated laser devices

Rainò et al., Advanced Materials, 24, OP231, 2012.



Bert Jan Offrein

Summary

• Optical interconnects will play an important role in future computing systems

• Roadmap towards a tight integration between electrical and optical functions

• Silicon Photonics

– Chip-level integration

– Enhanced bandwidth and functionality– Flat passband WDM (de)multiplexers, high efficiency III-V on Si modulators

• Optical PCB technology– Board-level integration

– Offers versatile design capability and simplified assembly

– Enables simultaneous electrical and optical interfacing– For multimode VCSEL and single mode Si photonics applications

• Resonant devices and novel material concepts

– High Q cavity structures for enhanced light-matter interaction– Colloidal quantum dots for optical gain

Documents

Photonics Integration for Computing Applications · 144 x 10+ Gbps 21 x 10 Gbps 17.5 mm x 13.5 mm ERNI 1 m cable differential striplines 2 x 10 Gbps 80x17 µm tracks @ 460 µm pitch