core technologies

CORE TECHNOLOGIESSUITE NO.8A, 3RD FLOOR184, LENIN SARANIKOLKATA 700 013PHONE: 91-33-22126863, 65FAX: 91-33-22124167EMAIL:support@core-technologies.comWEB:www.core-technologies.com

Introduction

General DescriptionThe Universal Trainer Kit (CT-UTK) is an Embedded Systems training tool for different platforms e.g. 8052, PIC, AVR, ARM etc.). The kit contains different experiments which are interfaced with the microcontroller using connecting cables. The microcontroller is placed as a daughter module which can be interchanged with other controllers. This makes the kit very flexible and caters to a universal embedded platform. The different microcontrollers come along with their various tool-chains (programmers, emulators, IDE) which may be connected between the kit and computer.

The kit comes along with an Atmel AT89S52 daughter module with a built in In-Circuit Programmer and an Integrated Development Environment (IDE). The software enables the user to write code in assembly language, assemble the code and download the same onto the microcontroller.

Hardware Features 16 x 2 Line LCD Module 4 nos. of 7 segment Display 8 nos. of Digital Output 8 nos. of Digital Input 8 bit Analog to Digital converter 8 bit Digital to Analog Converter Serial Port Interface using MAX232 8 x 8 LED Matrix 2 Nos. Opto-Couplers 1 No. Encoder Input 2 Nos. Relays LM35 Temperature sensor 0 ~ 5V DC Voltage Source DC Motor Interface (PWM) with motor Stepper Motor Interface with motor ASCII Keyboard Interface Matrix Keypad Interface Serial ROM Interface Real Time Clock Interface

Software Features 8051/8052 assembler for AT89S51/AT89S52 Targets Integrated In-Circuit Programmer RUN/REST Control

System RequirementsPentium I or higher16MB RAMWindows 9x/Me/XP/2K/NT

Packing List1) Universal Trainer Kit (CT-UTK)2) Daughter Card (CT-EDB-89S52)3) Serial Cable4) Software CD5) User Manual6) Flat Cable Connectors (4)7) Patch Chords (4)8) Serial Cable (1)

Installation

Hardware Installation1) Connect the 4-pin CPU cable to the power supply connector. Maintain proper alignment and check

the connection before switching on.2) Remove all flat cables and connectors.3) Switch on the power.4) Refer to the comments given on the examples for connections for different experiments.

Software InstallationInsert the installation CD into the CD drive and run setup.exe.Follow the installation procedure on the screen.Run Core Embedded Lab 2012 program.

Connectors

Connector Description

CN1 ~ CN8 – Daughter Card TerminationsCN9 & CN10 – Daughter Card ~ Main Board ConnectionsCN11 – Motor & RelayCN12 – ADC DataCN13 – DAC DataCN14 – Serial DataCN15 – Isolated Input & EncoderCN16 – RTC & Memory DataCN17 – Matrix Display Row DataCN18 – Matrix Display Column DataCN19 – Digital Output (LED’s) DataCN20 – Digital Input (DIP switches) DataCN21 – 7 segment display digit driveCN22 – 7 segment display segment driveCN23 – LCD Control PinsCN24 – LCD Data PinsCN25 – ASCII Keyboard Data

Connector Details

Microcontroller Interface (only for CT-EDB-89S52)

Pin CN1 CN2 CN3 CN4 CN5 CN6 CN7 CN81 RD0 P3.0 P0.0 P1.02 RD1 P3.1 P0.1 P1.13 RD2 P3.2 P0.2 P1.24 RD3 P3.3 P0.3 P1.35 RD4 P3.4 P0.4 P1.46 RD5 P3.5 P0.5 P1.57 RD6 P3.6 P0.6 P1.68 RD7 P3.7 P0.7 P1.7910

Peripheral Interface

Pin

CN11 CN12 CN13 CN14 CN15 CN16 CN17 CN18

1 M1 ADC0 DAC0 RXD IN1 REST ROW0 CSTB2 M2 ADC1 DAC1 TXD IN2 IO ROW1 CDAT3 M3 ADC2 DAC2 ENC SCLK ROW2 CCLK4 M4 ADC3 DAC3 CS ROW35 M5 ADC4 DAC4 SK ROW46 M6 ADC5 DAC5 DI ROW57 RL1 ADC6 DAC6 DO ROW68 RL2 ADC7 DAC7 ROW7910

Pin CN19 CN20 CN21 CN22 CN23 CN24 CN251 LED0 SW0 DIG1 SEGA RS D0 KBCLK2 LED1 SW1 DIG2 SEGB RW D1 KBDAT3 LED2 SW2 DIG3 SEGC EN D24 LED3 SW3 DIG4 SEGD D35 LED4 SW4 SEGE D46 LED5 SW5 SEGF D57 LED6 SW6 SEG

GD6

8 LED7 SW7 DP D7910

Appendix

Instructions that affect flags

INSTRUCTION FLAGCY OV AC

ADD X X XADDC X X XSUBB X X XMUL 0 XDIV 0 XDA XRRC XRLC XCJNE XSETB C 1CLR C 0CPL C XANL C,bit XANL C,/bit XORL C,bit XORL C,/bit XMOV C,bit X

8051 INSTRUCTION SET

ARITHMETIC OPERATIONSMNEMONIC BYTE CYC

ADD A,@Ri 1 1ADD A,Rn 1 1ADD A,direct 2 1ADD A,#data 2 1ADDC A,@Ri 1 1ADDC A,Rn 1 1ADDC A,direct 2 1ADDC A,#data 2 1

SUBB A,@Ri 1 1SUBB A,Rn 1 1SUBB A,direct 2 1

SUBB A,#data 2 1INC A 1 1INC @Ri 1 1INC Rn 1 1INC DPTR 1 1INC direct 2 1

DEC A 1 1DEC @Ri 1 1DEC Rn 1 1DEC direct 2 1MUL AB 1 4DIV AB 1 4DA A 1 1

LOGICAL OPREATIONSMNEMONIC BYTE CYC

ANL A,@Ri 1 1ANL A,Rn 1 1ANL A,direct 2 1ANL A,#data 2 1ANL direct,A 2 1ANL direct,#data 3 2ORL A,@Ri 1 1ORL A,Rn 1 1ORL A,direct 2 1ORL A,#data 2 1ORL direct,A 2 1ORL direct,#data 3 2XRL A,@Ri 1 1XRL A,Rn 1 1XRL A,direct 2 1XRL A,#data 2 1XRL direct,A 2 1XRL direct,#data 3 2

CLR A 1 1CPL A 1 1RL A 1 1RLC A 1 1RR A 1 1RRC A 1 1SWAP A 1 1

DATA TRANSFERMNEMONIC BYTE CYC

MOV A,@Ri 1 1MOV A,Rn 1 1MOV A,direct 2 1MOV A,#data 2 1MOV @Ri,A 1 1MOV @Ri,direct 2 2MOV @Ri,#data 2 1MOV Rn,A 1 1MOV Rn,direct 2 2MOV Rn,#data 2 1MOV Direct,A 2 1MOV Direct,@Ri 2 2MOV Direct,Rn 2 2MOV Direct,direct 3 2MOV Direct,#data 3 2MOV DPTR,#data16 3 2MOVC A,@A+DPTR 1 2MOVC A,@A+PC 1 2MOVX A,@Ri 1 2MOVX A,@DPTR 1 2MOVX @Ri,A 1 2MOVX @DPTR,A 1 2PUSH direct 2 2POP direct 2 2XCH A,@Ri 1 1XCH A,Rn 1 1XCH A,direct 2 1XCHD A,@Ri 1 1

BOOLEAN VARIABLE MANIPULATIONMNEMONIC BYTE CYCCLR C 1 1SETB C 1 1CPL C 1 1CLR Bit 2 1SETB Bit 2 1CPL Bit 2 1ANL C,bit 2 2ANL C,/bit 2 2ORL C,bit 2 2ORL C,/bit 2 2MOV C,bit 2 1MOV Bit,C 2 2

PROGRAM AND MACHINE CONTROLMNEMONIC BYTE CYCNOP 1 1RET 1 2RETI 1 2ACALL Addr11 2 2AJMP Addr11 2 2LCALL Addr16 3 2LJMP Addr16 3 2SJMP rel 2 2JMP @A+DPTR 1 2DJNZ Rn,rel 2 2DJNZ Direct,rel 3 2JZ rel 2 2JNZ rel 2 2JC rel 2 2JNC rel 2 2JB Bit,rel 3 2JNB Bit,rel 3 2JBC Bit,rel 3 2CJNE A,direct,rel 3 2CJNE A,#data,rel 3 2CJNE @Ri,#data,rel 3 2

CJNE Rn,#data,rel 3 2

Special Function Registers

Register MSB LSB ByteSymbol b7 b6 b5 b4 b3 b2 b1 b0 Address

P0 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 80HSP 81HDP0L 82HDP0H 83HDP1L 84HDP1H 85HPCON SMOD GF1 GF0 P D IDL 87HTCON TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 88HTMOD GATE C/T M1 M0 GATE C/T M1 M0 89HTL0 8AHTL1 8BHTH0 8CHTH1 8DHAUXR WDIDLE DISRTO DISALE 8EHP1 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 T2EX T2 90HSCON SM0 SM1 SM2 REN TB8 RB8 TI RI 98HSBUF 99HP2 P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 A0HAUXR1 DPS A2HWDTRST A6HIE EA ET2 ES ET1 EX1 ET0 EX0 A8HP3 RD WR T1 T0 INT1 INT0 TXD RXD B0HIP PT2 PS PT1 PX1 PT0 PX0 B8HT2CON TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 C8HT2MOD T2OE DCEN C9HRCAP2L CAHRCAP2H CBHTL2 CCHTH2 CDHPSW CY AC F0 RS1 RS0 OV F1 P D0HACC ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0 E0HB B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0 F0H

Pin Configuration of AT89S52

(T2) P1.0 1 40 VCC

(T2 EX) P1.1 2 39 P0.0 (AD0)

P1.2 3 38 P0.1 (AD1)

P1.3 4 37 P0.2 (AD2)

P1.4 5 36 P0.3 (AD3)

(MOSI) P1.5 6 35 P0.4 (AD4)

(MISO) P1.6 7 34 P0.5 (AD5)

(SCK) P1.7 8 33 P0.6 (AD6)

RST 9 32 P0.7 (AD7)

(RXD) P3.0 10 31 EA/VPP

(TXD) P3.1 11 30 ALE/PROG

(INT0) P3.2 12 29 PSEN

(INT1) P3.3 13 28 P2.7 (A15)

(T0) P3.4 14 27 P2.6 (A14)

(T1) P3.5 15 26 P2.5 (A13)

(WR) P3.6 16 25 P2.4 (A12)

(RD) P3.7 17 24 P2.3 (A11)

XTAL2 18 23 P2.2 (A10)

XTAL1 19 22 P2.1 (A9)

GND 20 21 P2.0 (A8)