Power Distribution Studies at Fermilab Aida Todri, FNAL
ATLAS/CMS Power WG Meeting March 31 st, 2010
Slide 2
Outline Panel test stand. System setup. DC-DC conversion
powering scheme tests: Efficiency measurements. Cooling impact on
converter. Pixel performance measurements. 2
Slide 3
Panel Test Stand 3 CAPTAN DAQ system, 12bit ADC, 65MHz Panel 21
ROCs, TBM, 40MHz, Ianalog~1.35A, Idigital~1.5A with external load
Converters AMIS2 DC-DC converters for V A and V D.
Slide 4
Pixel Calibration 4 Analog signal in ADC counts from all the
readout chips in a panel sampled by the front-end digitizer.
Decoding of analog signal.
Slide 5
DC-DC Converters 5 Chip: AMIS2 by CERN Vin=6-12V Iout
