2
14 Technical View Practical Applications of Low-Power Design with nanoWatt XLP Mark Hofmann – Advanced Engineer, Future Electronics In any low power or battery powered application that includes microcontrollers, there are four basic parameters that need to be controlled in order to have a system meet power requirements: • Low Sleep Current • Low Active Current • Fast Wake-Up Time • Low-Power Monitoring Circuits As the drive to develop lower-power consumption, longer battery life and higher efficiency devices continues, Microchip has introduced a family of products to help you deliver on your next genera- tion devices. These devices have the lowest sleep currents in the industry and give you the flexibil- ity to meet your design goals. Microchip calls this technology nanoWatt XLP (eXtreme Low-Power) Technology. This technology enables Microchip to define a specification for power consumption in their PIC microcontrollers. These specifications can be seen in Table 1. While low sleep currents are necessary for a low- power system, the advantage of these low sleep currents can be lost if the monitoring circuits around the processor consume too much power. Microchip has optimized these circuits for low- power operation. For example, the Brown Out Reset (BOR) circuit consumes just 45nA. This family of nanoWatt XLP processors range from 8-bit PIC16 processors to the 16-bit PIC24 series. These full featured processors offer a host of peripherals including: USB, CTMU (Capacitive touch), A/Ds, flexible PWMs and Real Time Clock/ Calendar (RTCC), and EEPROM. New Power Modes In order to maximize power savings, Microchip has introduced a new power mode for some of their nanoWatt XLP devices. This new power mode, called Deep Sleep, gives the user the ability to reduce their power consumption to as low as 20nA. Microchip’s existing sleep mode powers down the core but allows some peripherals to run and retains the RAM. In Deep Sleep, the core RAM and all of the peripherals are powered off. Despite this, there are still many sources that can wake the processor from Deep Sleep. These in- clude: Watchdog, BOR, Interrupts, Power On Re- set (POR) and Master Reset. When in Deep Sleep, the processor also has 2 words of RAM that are maintained. When the processor wakes from Deep Sleep, the previous state of the device is recorded in these 2 bytes. When the device wakes from Deep Sleep, the processor knows what state it was in before entering Deep Sleep. Also important to note – regardless of sleep mode, the pin states are retained. The differences between Sleep and Deep Sleep are summarized in Table 2 below. When trying to decide which power mode to use, the most important consideration is how long the device will remain asleep. Waking from Deep Sleep is very similar to a POR and the processor must re- initialize the system to wake from Deep Sleep. This requires the processor to remain in active mode much longer than if the sleep mode is used. Real- izing the power savings from Deep Sleep requires knowing the differences between Sleep and Deep Sleep and how to use it effectively. There are many applications where the microcon- troller wakes from Sleep solely to update the RTCC. This mode of operation consumes a lot of power and reduces battery life. Microchip’s nanoWatt XLP devices can enable the RTCC while in Deep sleep mode, allowing for much lower power consumption and removing the need to wake from Sleep every second. Power Reduction Techniques One of the most obvious and commonly used methods of reducing power is increasing the value of pull-up resistors. Since most of the power consumed by pull-up resistors is static power, increasing these resistors can reduce the amount of power consumed. There are some drawbacks to using this method to reduce power. First of all, the designer must care- fully weigh the input impedance of the devices that are connected. External devices that require pull-ups may have input impedances that are less than the pull-up value. If this occurs, there may be a voltage divider set up, rather than the expect- ed pull-up behavior. See Figure 2. Secondly, the designer needs to evaluate the system response times as the increase in pull-up value will increase the system response. In the case of I 2 C, doubling the pull-up resistance on an I 2 C bus halves the operating frequency of the bus. Another popular method of reducing power is to run at a reduced clock rate. This can lead to some significant power savings, but only if used correctly. Depending on the application, it can be more advantageous to run at faster frequencies and take advantage of long Sleep times than it would be to continuously run at a low frequency. In order to demonstrate this, we will use data from one of the nanoWatt XLP devices, the PIC24F16KA102. To illustrate this point, this example will take into consideration only the power consumed in the core and the only variable is the frequency of the Mode of Operation Best nanoWatt XLP Specifications Competing MCU Specifications Sleep down to 20nA 100-350nA Watchdog Timer down to 350nA 800-1000nA Real Time Clock/ Calendar down to 490nA 1000-1500nA Table 1. Low Power Mode Core Powered Off Peripherals Powered Off Wake Up Time Pin State Maintained Wake Up Sources RAM Retention Sleep Yes Some 1-5ms Yes POR, BOR, WDT, INT, RTCC, Periph Yes Deep Sleep Yes All Similar to POR Yes POR, BOR, WDT INT, RTCC 2-4 Bytes only Table 2. Figure 2. nanoWatt XLP Device External Device V dd V in = V dd (R in/ (R pu + R in )) R pu R in Figure 1. Applications that wake up less frequently are more likely to use Deep Sleep mode Applications that wake up less frequently are more likely to use Deep Sleep mode Applications that wake up frequently are more likely to use Sleep mode Applications that wake up frequently are more likely to use Sleep mode 1.800.FUTURE.1 www.FutureElectronics.com

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Page 1: Practical Applications of Low-Power Design with nanoWatt XLPww1.microchip.com/downloads/en/DeviceDoc/Future XLP Article.pdf · run and retains the RAM. In Deep Sleep, the core RAM

14

Technical View

Practical Applications of Low-Power Design with nanoWatt XLP™

Mark Hofmann – Advanced Engineer, Future Electronics

In any low power or battery powered application that includes microcontrollers, there are four basic parameters that need to be controlled in order to have a system meet power requirements:

• Low Sleep Current• Low Active Current• Fast Wake-Up Time• Low-Power Monitoring Circuits

As the drive to develop lower-power consumption, longer battery life and higher efficiency devices continues, Microchip has introduced a family of products to help you deliver on your next genera-tion devices. These devices have the lowest sleep currents in the industry and give you the flexibil-ity to meet your design goals. Microchip calls this technology nanoWatt XLP (eXtreme Low-Power) Technology. This technology enables Microchip to define a specification for power consumption in their PIC microcontrollers. These specifications can be seen in Table 1.

While low sleep currents are necessary for a low-power system, the advantage of these low sleep currents can be lost if the monitoring circuits around the processor consume too much power. Microchip has optimized these circuits for low-power operation. For example, the Brown Out Reset (BOR) circuit consumes just 45nA.

This family of nanoWatt XLP processors range from 8-bit PIC16 processors to the 16-bit PIC24 series. These full featured processors offer a host of peripherals including: USB, CTMU (Capacitive touch), A/Ds, flexible PWMs and Real Time Clock/Calendar (RTCC), and EEPROM.

New Power Modes

In order to maximize power savings, Microchip has introduced a new power mode for some of their nanoWatt XLP devices. This new power mode, called Deep Sleep, gives the user the ability to reduce their power consumption to as low as 20nA. Microchip’s existing sleep mode powers

down the core but allows some peripherals to run and retains the RAM. In Deep Sleep, the core RAM and all of the peripherals are powered off. Despite this, there are still many sources that can wake the processor from Deep Sleep. These in-clude: Watchdog, BOR, Interrupts, Power On Re-set (POR) and Master Reset. When in Deep Sleep, the processor also has 2 words of RAM that are maintained. When the processor wakes from Deep Sleep, the previous state of the device is recorded in these 2 bytes. When the device wakes from Deep Sleep, the processor knows what state it was in before entering Deep Sleep. Also important to note – regardless of sleep mode, the pin states are retained. The differences between Sleep and Deep Sleep are summarized in Table 2 below.

When trying to decide which power mode to use, the most important consideration is how long the device will remain asleep. Waking from Deep Sleep is very similar to a POR and the processor must re-initialize the system to wake from Deep Sleep. This requires the processor to remain in active mode much longer than if the sleep mode is used. Real-izing the power savings from Deep Sleep requires knowing the differences between Sleep and Deep Sleep and how to use it effectively.

There are many applications where the microcon-troller wakes from Sleep solely to update the RTCC. This mode of operation consumes a lot of power

and reduces battery life. Microchip’s nanoWatt XLP devices can enable the RTCC while in Deep sleep mode, allowing for much lower power consumption and removing the need to wake from Sleep every second.

Power Reduction Techniques

One of the most obvious and commonly used methods of reducing power is increasing the value of pull-up resistors. Since most of the power consumed by pull-up resistors is static power, increasing these resistors can reduce the amount of power consumed.

There are some drawbacks to using this method to reduce power. First of all, the designer must care-

fully weigh the input impedance of the devices that are connected. External devices that require pull-ups may have input impedances that are less than the pull-up value. If this occurs, there may be a voltage divider set up, rather than the expect-ed pull-up behavior. See Figure 2. Secondly, the designer needs to evaluate the system response times as the increase in pull-up value will increase the system response. In the case of I2C, doubling the pull-up resistance on an I2C bus halves the operating frequency of the bus.

Another popular method of reducing power is to run at a reduced clock rate. This can lead to some significant power savings, but only if used correctly. Depending on the application, it can be more advantageous to run at faster frequencies and take advantage of long Sleep times than it would be to continuously run at a low frequency. In order to demonstrate this, we will use data from one of the nanoWatt XLP devices, the PIC24F16KA102.

To illustrate this point, this example will take into consideration only the power consumed in the core and the only variable is the frequency of the

Mode of Operation

Best nanoWatt XLP™

Specifications

Competing MCU Specifications

Sleep down to 20nA 100-350nA

Watchdog Timer down to 350nA 800-1000nA

Real Time Clock/ Calendar

down to 490nA 1000-1500nA

Table 1.

Low Power Mode

Core Powered

Off

Peripherals Powered Off

Wake Up

Time

Pin State Maintained Wake Up Sources RAM Retention

Sleep Yes Some 1-5ms Yes POR, BOR, WDT, INT, RTCC, Periph Yes

Deep Sleep Yes All Similar

to POR Yes POR, BOR, WDT INT, RTCC 2-4 Bytes only

Table 2.

Figure 2.

nanoWatt XLP Device External Device

Vdd

Vin = Vdd (Rin/(Rpu + Rin))

Rpu

Rin

Figure 1.

Applications that wake up less frequently are more likely to use Deep Sleep mode

Applications that wake up less frequently are more likely to use Deep Sleep mode

Applications that wake up frequently are more likely to use Sleep mode

Applications that wake up frequently are more likely to use Sleep mode

1.800.FUTURE.1 • www.FutureElectronics.com

Page 2: Practical Applications of Low-Power Design with nanoWatt XLPww1.microchip.com/downloads/en/DeviceDoc/Future XLP Article.pdf · run and retains the RAM. In Deep Sleep, the core RAM

15

Technical View

Practical Applications of Using Deep Sleep

Using Deep Sleep significantly reduces the amount of power consumed by the processor. However, there are some considerations to make when us-ing this mode. In Deep Sleep, only the RTCC, WDT, and LCD are powered and it means that the core, flash, RAM, and supervisors (other than WDT) are de-powered. Once the processor comes out of Deep Sleep, it starts executing as if it had just come out of a POR. There is some RAM (2-4bytes) that is retained while in Deep Sleep, so processor status can be saved before entering Deep Sleep. Once the processor initializes, it reads this retained RAM so that it can continue operating from where it was before it entered Deep Sleep. See Figure 3. Doing all this re-initialization causes the processor to be active for much longer than if it woke up from Sleep. Typically, Deep Sleep gives the most power savings when the Sleep times are long, but there are exceptions to this; specifically, if the initializa-tion routines are short, or if the temperatures are high. While this mode does have some tradeoffs, it allows the processor to enter a mode that is the lowest sleep current than any processor currently available on the market. Figure 3 shows the operation of a device in Deep Sleep.

For this particular set of parameters, the PIC24F16KA102 has less average power consumption in sleep mode when coming out of

Figure 3.

Reset Vector

Initialize Application

Woke from Deep Sleep?

Perform Application Tasks

Enter Deep Sleep

Read Deep SleepRegisters and

Restore Context

Release State

Wake-up

Y

N

Store Context in Deep SleepRegisters

execution. The example takes a program that runs 12k of instructions and then the processor goes to Sleep. This 12k of code executes once per second. The specifications chosen are V

DD = 3.3V at 25ºC. Since ninety percent of the PIC24 instructions in the instruction set are single cycle instructions, we will assume that each of the 12k of instructions take one clock cycle. We will assume 2.5ms to go into and out of Sleep.

For this application, the least amount of power consumption comes not when we run at the lowest current draw specs, but at a somewhat higher frequency. Running the core at 32kHz gives us twice the power consumption compared to 1MHz. In practice, the calculations can be more complex; however the same methods could be used to optimize to a specific design. These devices can also change their execution frequency on the fly. This allows Microchip nanoWatt XLP devices to change its operating frequency in order to optimize the power consumption to the specific code that’s running. They also have the ability to switch between clock sources dynamically, which allows even more flexibility in the system for further power reduction.

In addition to Sleep and Deep Sleep, the PIC24 has another power mode that can help the designer accomplish the power goals of the system. The PIC24, dsPIC and PIC32 have “Doze” modes and runs the core at a slower clock frequency than the peripherals. This is useful if the peripherals are required to run at full speed, but the core is not particularly active. The PIC24, dsPIC and PIC32 can also disable or completely remove power to a module. This can even be done while the proces-sor is running so peripherals can be switched on and off depending on whether the system requires the peripheral.

Parameter 32kHz 1MHz 2MHz 32MHz

Active Current 55μA 540μA 1100μA 18000μA

Sleep Current 540nA 540nA 540nA 540nA

# of Instructions 12k 12k 12k 12k

Time in Active 375ms 12ms 6ms 375μs

% age Sleep 62.5% 98.8% 99.4% 99.96%

Average Power 22μW 10.9μW 13.9μW 98μW

Table 3.

Sleep every second. Deep Sleep is more advanta-geous if the period is an hour. As a matter of fact, using Deep Sleep in the one hour case reduces the average power of the core by about 40%. As with the previous example, the particular design will dictate when to use Sleep or Deep Sleep.

Another consideration to make when trying to choose between Sleep and Deep Sleep is environment. As the environmental temperature increases, the Sleep and Deep Sleep currents also increase, but not at the same rates. In Sleep, the current increases almost 2μA from -40ºC to +85ºC. However, the current increases by only 0.68μA when in Deep Sleep. This changes the above calculation slightly. In Table 4, it was obvious that under the conditions specified, we would use Sleep if we were going to wake every second. If we do the same calculation at 85ºC, the result isn’t so clear cut.

With the introduction of nanoWatt XLP, Microchip Technology is now the industry leader with the lowest sleep currents. It is important to understand how to make the most of the low power features of these devices in order to get the most power savings possible for the design. Using these technologies effectively makes it possible for designers to increase the performance of their designs.

For additional resources, please refer to the download section found on Future Electronics product pages at www.FutureElectronics.com, refer to documents found in references below or email [email protected].

References:PIC24F16KA102 Family Data Sheet, DS39927B, revB, PreliminaryAN1267: nanoWatt and nanoWatt XLP™ Technologies: An Introduction to Microchip’s Low-Power Devices, DS01267A, revAPIC Microcontroller Low Power Tips ‘n Tricks, DS01146B, Chapter 2, revB

Sleep (1s)

Deep Sleep (1s)

Sleep (1hr)

Deep Sleep (1hr)

Active Current 540μA 540μA 540μA 540μA

Sleep Current 540nA 300nA 540nA 300nA

# of Instructions 12k 18k 12k 18k

Time in Active 12ms 18ms 12ms 18ms

Average Power 10.9μW 13.4μW 1.78μW 0.993μW

Table 4.

Sleep (1s) Deep Sleep (1s)

Active Current 720μA 720μA

Sleep Current 2450nA 980nA

# of Instructions 12k 18k

Time in Active 12ms 18ms

Average Power 20.2μW 19.7μW

Table 5.

XLP Demo Video

PIC24F16KA102-I/ML

XLP series

1.800.FUTURE.1 • www.FutureElectronics.com