University of Benghazi

Facility of Information Technology

Computer Design Department

Independent Study Project

Transistors and Logic Families By

Monia A. Abida 311Supervised by:

Dr. Ashraf Huaidy

Project outlines

•Transistors

•Types of Transistors

•Bipolar Junction Transistor (BJT)

•Logic families of BJT

•Junction Field Effect Transistor JFET

•Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET)

•Complementary Metal-Oxide-Semiconductor Field Effect Transistors (CMOSFET)

•CMOS Logic Gates

•CMOS compared to TTL

Types of Transistors

•Bipolar Junction Transistor (BJT)

•Field Effect Transistors

Junction Field Effect Transistors JFETs

Metal-Oxide-Semiconductor Field Effect

Transistors (MOSFET)

Transistors

Bipolar Junction Transistor (BJT)

Structure

Transistor DC Parameters

BJT Transistor operation

Cut-off region: VBE < vγ; IB=0 ,therefore; IC=0;

Active region VBE = vγ ; IB > 0; VCE ≥ VCEsat IC=βIB

Saturation region: VBE = Vγ ; IB > 0; VCE =VCEsat VCEsat = 0:2 - 0:3 IC=βIB

BJT Transistor operation Cont .

Input characteristic Output characteristic

BJT Logic families

RTL NOR gate

Resistor- Transistor Logic ( RTL) :

BJT Logic families Cont

Resistor- Transistor Logic ( RTL) :

NOR Gate With Four Combinations Of Inputs

Truth table for RTL gate

Diode-Transistor-Logic (DTL)

BJT Logic families Cont

DTL NOR Circuit

DTL NAND gate model with one or all input low

ANALYSIS WITH ALL INPUTS HIGH

DTL circuit analysis

Transistor-Transistor Logic :

TTL gate and configuration of Q1 as 3-emitter

Analysis With One Or More Inputs Low :

TTL NOR Gate

TTL Circuit Model With One Input Low.

Calculations With Input High :

TTL NOR Gate cont

TTL gate with all input high

Junction Field-Effect Transistor

(JFET)

The primary difference between the two types of transistors is the fact that the BJT transistor is a current-controlled device.

Construction and characteristics of JFETs

Junction Field-Effect Transistor Water analogy for the JFET control mechanism.

VGS =0 V, VDS Some Positive Value

JFET in the VGS =0 V and

VDS > 0 V.

ID versus VDS for VGS = 0 V Pinch-off (VGS = 0 V,

VDS = VP).

VGS< 0 V

Application of a negative voltage to the gate of a JFET

n-Channel JFET characteristics with IDSS = 8 mA and VP=-4 V

P-Channel Devices

p-Channel JFET

Symbols

JFET symbols: (a) n-channel; (b) p-channel

Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET)

The physical construction

Construction of a MOSFET. (n-channel, enhancement)

MOSFET Operation

The MOSFET with VDS>0

The MOSFET with a positive gate voltage.

MOSFET Operation contd..

MOSFET with a positive gate voltage. MOSFET with a positive gate voltage .. and VDS >0

Channel in Triode Channel in Pinch-off

MOSFET Operation contd..

TRIODE REGION: (VGS -VT > VDS ) [Could also be written VGD >VT ],

CUTOFF REGION (VGS < VT)

PINCHOFF (VGS -VT < VDS )

Circuit Models For The MOSFET

1-Cutoff (VGS < VT), ID = 0 Pinch-off (VGS > VT and VGS-VT < VDS) 2-

ID = k(VGS - VT)2

3-Triode (VGS > VT and VGS-VT > VDS) ; ID = k(2(VGS - VT)VDS - VDS2)

RDSon=1/ 2k(VGS - VT)

Complementary Metal-Oxide-Semiconductor

Field Effect Transistors (CMOS)

CMOS inverter circuit

The CMOS Inverter

Voltage transfer characteristic for a CMOS inverter:

CMOS Logic Gates,

CMOS NAND Gate

CMOS NOR Gate

CMOS Logic Gates cont..

1. TTL circuits utilize BJTs while CMOS circuits utilize FETs.2. CMOS components are typically more expensive that TTL equivalents. However, CMOS technology is usually less expensive on a system level due to CMOS chips being smaller and requiring less regulation.ie.. CMOS allows a much higher density of logic functions in a single chip compared to TTL.3. CMOS circuits do not draw as much power as TTL circuits while at rest.4. Due to longer rise and fall times, the transmission of digital signals become simpler and less expensive with CMOS chips.5. CMOS components are more susceptible to damage from electrostatic discharge than TTL components.6.CMOS gate circuits have far greater noise margins than TTL.

CMOS compared to TTL

Logic Levels and Noise Margin Compare cont

CMOS compared to TTL cont

Logic Levels and Noise Margin Compare cont

CMOS compared to TTL cont

Thanks for Listening