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Product Manual ELS - MB1500A
(Xilinx FPGA XC6SLX150-FG484 EVM 보드)
Embedded and Logic Solution
eLogics
RM607-1, Digital Empire, #685,Gasan-dong,
Geumcheon-gu Seoul, Korea. (Zip: 150-023)
Phone: (02) 2624-2573
Fax: (02)2624-2575
www.eLogics.co.kr
이로직스
서울 특별시 금천구 가산동 568번지
디지털엠파이어 607-1호 (우: 152-050)
전화: (02) 2624-2573
팩스: (02)2624-2575
www.eLogics.co.kr
© 2011 eLogics All rights reserved
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
2
ELS-1500A Manual Version
Version Description Date Who
0.9 Initial Create 2013-03-08 Elogics
0.99 버그 수정 2013-08-08 Elogics
1.0 CHIP 교체 2014-03-08 Elogics
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
3
목차
1. 제품 설명 ........................................................................................................................................................... 5
2. 제품 사양 ........................................................................................................................................................... 5
2.1. 하드웨어 사양 .......................................................................................................................................... 5
2.2. 소프트웨어 사양 ..................................................................................................................................... 5
2.3. 전기적 사양 ............................................................................................................................................... 5
3. 제품 구성 ........................................................................................................................................................... 6
4. 보드 사진 및 구성도 .................................................................................................................................... 7
4.1. 보드 사진 ................................................................................................................................................... 7
4.2. 보드 BLOCK DIAGRAM ........................................................................................................................ 7
5. 기능 설명 ........................................................................................................................................................... 8
6. The overview of MicroBlaze is as follows: ............................................................................................ 8
6.1. 소프트 프로세서 (마이크로브레이즈) ...................................................................................... 8
6.2. Bus 구조 ..................................................................................................................................................... 8
6.3. HDMI 출력 설명 ..................................................................................................................................... 8
6.4. 응용 및 실습 분야 ................................................................................................................................. 9
6.5. ............................................................................................................................................................................. 9
7. ELS-MB1500A 회로도 ................................................................................................................................ 9
7.1. USB 회로도 : USB1.1 FT232RL CHIP 을 사용했다. .................................................................. 9
7.2. FPGA DDR2 회로도 16Bit 128Mbyte DDR2 메모리 ............................................................. 10
7.3. 1Gbps 이더넷 회로도 ........................................................................................................................ 10
10/100 이더넷 회로도 .................................................................................................................................. 11
7.4. 업보드 확장 콘넥터 회로도 ............................................................................................................ 11
7.5. 업보드 확장 콘넥터 회로도 ............................................................................................................ 12
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
4
7.6. DVI OUT 회로도 ................................................................................................................................... 12
7.7. System Clock generation 회로도 ................................................................................................. 13
3.3V 50Mhz OSC ...................................................................................................................................... 13
2.5V 200MhZ LVDS OSC 기본 장착(clock+, clock-) ................................................................ 13
7.8. Reset 회로 .............................................................................................................................................. 13
7.9. 전원 회로 ................................................................................................................................................ 13
7.10. Configuration Prom 회로 ............................................................................................................ 13
8. 콘넥터 설명 ................................................................................................................................................... 14
8.1. USB1 – Console 포트로 사용됨 .................................................................................................... 14
8.2. CN6 RJ 45 JACK 1Gbps 이더넷 콘넥터 .................................................................................... 14
8.3. J9 RJ 45 JACK 10/100 bps 이더넷 콘넥터 ............................................................................ 14
8.4. J1,CN7 DC Jack 5V (DC 입력) ........................................................................................................ 15
8.5. J10. Xilinx Jtag ....................................................................................................................................... 15
8.6. J8 UP Board 콘넥터( 3.3V I/O) ...................................................................................................... 16
8.7. J7 (1.8V , 3.3V I/O 선택) UP Board 콘넥터 – B2: 1.8V , B9: 3.3V(디폴트) .............. 17
8.8. BEAD : BANK0 전원 선택 스위치(2 개중 1 개만 선택한다.) 디폴트 3.3V ................ 18
8.9. P1. MINI HDMI 콘넥터( TMDS 3.3V I/O) ............................................................................... 18
8.10. Xilinx Tool 을 이용한 FPGA 내용 변경 하기...................................................................... 19
9. Example Project ........................................................................................................................................... 25
9.1. 4 개의 LED 와 DIP Switch 사용 예제 ......................................................................................... 25
9.2. .......................................................................................................................................................................... 26
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
5
1. 제품 설명
ELS-1500A은 Xilinx사의 스파르탄 시리즈 중 XC6S25,45,75,150-FG484패키지로 제작된 FPGA
EVM보드 입니다. 보드 내에 On chip PHY 10/100/1000bps, Local Bus 10/100Mbps 이더넷,
128Mbyte DDR2(16Bit)메모리 , LVDS 200Mhz OSC, MINI HDMI TX, USB2SERIAL등이 내장되어
있다. 또한 사용자가 포트를 확장 할 수 있도록 80핀 IO포트가 2개 있습니다. 구동 전원은
5V 2A 전원으로 동작하며, 보드 동작을 표시하기 위한 LED등이 있습니다. 기존에 스파르탄 3
용으로 제작된 MB1500 업그레이드 버전이기 때문에 I/O 포트를 호환 되도록 설계 하였으며,
최대 XC6S150-FG456 칩으로 구매 시 최대 1500만 게이트 용량까지 사용할 수 있는 장점이
있습니다.
2. 제품 사양
2.1. 하드웨어 사양
FPGA : Xilinx XC6SLX25,45,75,150-FG484(250~1500)만게이트 사용할 수 있음
DDR2-16Bit 128Mbyte
M88E1111-Gbps 이더넷
LAN9220 10/100Mbps 이더넷
Single USB2Serial Port
FPGA Configuration EEPROM(SPI PROM)
DC Power 5V 입력
4 bit dip switch
4 bit LED, 전원 표시 LED
업보드 확장 콘넥터(2x40x2x2.0MM)
보드 사이즈: 115mm x 90mm
2.5V LVDS 200Mhz, 50Mhz OSC
전원 스위치
2.2. 소프트웨어 사양
ISE 12.4 , EDK (예제 코드), ISE 11.5 이상 지원됨
제공 소스: 마이크로 브레이즈 예제 기본, SP601를 수정한 소스
DVI OUT 소스
마이크로 브레이즈 LWIP 테스트 소스 코드
Serial Uart Source 코드
2.3. 전기적 사양
5V 2A DC 아답터(메인전원)
1.2V FPGA CORE 전원
1.8V DDR2 메모리 전원
2.5V 이덧넷 I/O 전원
3.3V 주변 I/O 전원
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
6
3. 제품 구성
구분 수량 비고
ELS-MB1500A, USB Cable 1 판매
제품 설명서 1 이로직스
회로도 PDF, ORCAD 원본(이메일 발송) 1 Webhard
제공 소스
- 영상처리 필터 소스(SB601)
- 마이크로브레이즈 예제코드
1 Webhard
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
7
4. 보드 사진 및 구성도
4.1. 보드 사진
4.2. 보드 BLOCK DIAGRAM
90mm
105mm
1
PWR SW
RJ-45
2.5V
1.2V
1.8V
array res
XC6S-25/45/100/150
FG456DDR 2SDRAM
CFG FLASH
XCS08F
LAN
9220
88E1111
RJ-45
USB
DCJACK JTAG
CY22393
3
2
1
0
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
8
5. 기능 설명
본 제품은 Xilinx 사에서 제공되는 ISE Tool를 이용한 VHDL,Velog H/W 개발
언어를 이용한 여러가지 IP(UART, HDMI, DSP BLOCK, MAC)를 실습 할 수 있
으며, 또한 EDK Tool을 사용하여 FPGA내부에 마이크로 브레이즈 마이컴을
내장하는 방법과 예제 프로그램을 테스트 할 수 있는 EVM 보드 입니다. 단
지 교육용만 아니라 여러 가지 용도로 응용 할 수 있도록 확장 I/O 포트가
내장되어 있습니다. .
6. The overview of MicroBlaze is as follows:
6.1. 소프트 프로세서 (마이크로브레이즈)
・32-bit, RISC Processor
・32-bit, fixed length instruction
・32 generic 32bit registers
・3-Stage Pipeline
・Instruction cache and data cache
・Hardware multiplier
・Hardware debug logic supported
6.2. Bus 구조
The bus consists of the following three bus types. FPGA Internal LMB A dedicated bus used to connect the Micro Blaze and BRAM (FPGA internal memory). FPGA Internal OPB A bus used to connect multiple peripheral IP cores. When customizing, peripheral cores are added to this bus. FPGA External Bus A bus used to connect external memory devices through OPB EMC and
OPB DDR2 SDRAM. ,AXI BUS지원
6.3. HDMI 출력 설명
HDMI(DVI) 출력은 MB1500A에서 영상 처리된 데이터를 DVI 포트로 모니터에 표시하기
위해서 사용되며, MB1500A보드 내에 FRAME BUFFER가 있으며, 메모리에 저장된 내용을
1280x1024x70Hz로 모니터에 디스플레이 됩니다.
지원 해상도 1280x1024x70Hz DVI 모니터
DUAL 12BIT RGB 출력
R/A 콘넥터 전기적 사양
12BIT DUAL RGB DATA( 3.3V)
HSYNC, DISPLAY EN, PCLK (3.3V)
DDC 데이터는 지원 하지 않음
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
9
6.4. 응용 및 실습 분야
네트워크 JPG DID 광고용 모니터
영상처리 실습 등
이더넷 MAC 코딩 실습
UART 코딩 실습
기타 등등…
6.5.
7. ELS-MB1500A 회로도
7.1. USB 회로도 : USB1.1 FT232RL CHIP을 사용했다.
USB1
UX60
-MB
-5S
T,
min
iUS
B T
ype A
B
D-2
D+3
VB1
ID4
G2
7
G3
6
G15
U13
FT232RL
TXD1
DTR2
RTS3V
CC
IO4
RXD5
RI6
GN
D7
NC8
DSR9
DCD10
CTS11
CBUS412
CBUS213
CBUS314
USBDP15
USBDM16
3V
3O
UT
17
GN
D18
RESET19
VC
C20
GN
D21
CBUS122
CBUS023
NC24
AG
ND
25
TEST26
OSCI27 OSCO28
USB_D-
USB_D+
C4
10uF
/10V
USB_5V
USB_5V
FT_RXD ST_TXDST_RXDFT_TXD
C395 10uF
/10V
D9
PG
B0010603M
R
D10
PG
B0010603M
R
ST_RXD 2ST_TXD 2
VCC2V5
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
10
7.2. FPGA DDR2회로도 16Bit 128Mbyte DDR2 메모리
7.3. 1Gbps 이더넷 회로도
1.0V@3A
VTT_DDRV
FPGA_SDAFPGA_SCL
USER_SW0USER_SW1
DDR_A11DDR_CKEDDR_A12
DDR_DB11
네트 길이 조정
DDR_A8
TERM_PTERM_N
DDR_DB10
DDR_A9
org
DDR_A4
USER_SW3
DDR_A10
DDR2_VREF
DDR_RAS
DDR_A10
DDR_BA2
DDR_CAS
DDR_A13DDR_WE
DDR_A4
DDR_A9DDR_A8
DDR_A12
DDR_A5
DDR_A0
DDR_A3
DDR_A11
DDR_A2
DDR_A7
DDR_A6
DDR_BA1DDR_BA0
DDR_A1
TERM_P
DDR_DB12
DDR_DB14DDR_DB13
DDR_DB15 DDRVREF
TERM_N
18V_IO19N18V_IO19P
DDRVREF
USER_SW2
DDR_CS
DDR_DB8DDR_DB9
DDR_DB5
DDR_DB2
DDR_DB4
DDR_DB7DDR_DB6
DDR_DB0DDR_DB1
DDR_DB3
DDR2_VREF
DDR_BA2
DDR_DQM1
DDR_BA1DDR_A0
DDR_BA0
CLK_DDRA
CLK_DDRA#
DDR_A7DDR_A2
DDR_RASDDR_CAS
DDR_WE
I2C3_SCL 2DDR_OPT
DDR_DQM0
DDR_A5
DDR_A1
DDR_A6
DDR_A3
I2C3_SDA 2
DDR_DQS0_M
DDR_DQS1_PDDR_DQS1_M
DDR_DQS0_P
DDR_CKE
C347
0.1uF
RA14C47R
5 6
C351
0.1uF
SW3
SW/SMD-4/SM_1
1234
8765
U10
K4T1G164QQ-HC(L)E6-667
RFU3R7
LDMF3
WE#K3 CAS#L7 RAS#K7 CS#L8
BA0L2
BA1L3
A10M2
A0M8
A1M3
A2M7
A3N2
VREFJ2
UDMB3
CK#K8 CKJ8
CKEK2
A12R2 A11P7
A9P3 A8P8 A7P2 A6N7 A5N3 A4N8
VSS1A3
VSS2E3
VSS3J3
VSS4N1
VSS5P9
VSSQ1A7
VSSQ2B2
VSSQ3B8
VSSQ4D2
VSSQ5D8
VSSQ6E7
VSSQ7F2
VSSQ8F8
VSSQ9H2
VSSQ10H8
VSSDLJ7
DQ0G8
DQ1G2
DQ2H7
DQ3H3
DQ4H1
DQ5H9
DQ6F1
DQ7F9
DQ8C8
DQ9C2
DQ10D7
DQ11D3
DQ12D1
DQ13D9
DQ14B1
DQ15B9
VDDLA1
VDD1E1
VDD2J9
VDD3M9
VDD4R1
VDDLJ1
VDDQ1A9
VDDQ2C1
VDDQ3C3
VDDQ4C7
VDDQ5C9
VDDQ6E9
VDDQ7G1
VDDQ8G3
VDDQ9G7
VDDQ10G9
UDQS#A8
UDQSB7
LDQS#E8
LDQSF7
ODTK9
A13/RFU4R8
BA2L1
RFU2R3
NC1A2
NC2E2
R323 47 x1 2
RP1 10K1 82 73 64 5
VCC1.8V
+
CT53
22uF
/16V
RA13B47R
3 4
RA15D47R
7 8
C358
0.1u
F
X7R
12
C352
0.1uF
USER_SW1USER_SW2USER_SW3
RA13C47R
5 6
USER_SW0
RA15A47R
1 2
DDR_BA2
R387
20K
12
C357
0.1u
F
X7R
12
C367
4.7uF
org
LENGTH SAME
RA17D47R
7 8
DDR_A13
RA15B47R
3 4
R388
20K
12
C360
0.1u
F
X7R
12
DDR_A2
+CT52
22uF
/16V
DDR_A1
DDR_A9
DDR_A0
DDR_A8
RA17A47R
1 2
DDR_A5
DDR_A7
DDR_A3
DDR_A6
DDR_A11
R324 471 2
DDR_A12
DDR_A4
DDR_A10
RA15C47R
5 6
C356
0.1u
F
X7R
12
+
CT
5122
uF/1
6V
R38520K
12
+
CT12
22uF
/16V
C348
0.1uF
+
CT
49
22uF
/16V
RA17B47R
3 4
R325 471 2
RA16D47R
7 8
C359
0.1u
F
X7R
12DDR_BA0
DDR_VREFM
C343
0.1uF
DDR_DQS0_PDDR_DQS0_M
DDR_BA1
RA14D47R
7 8
C355
0.1u
F
X7R
12
DDR_DQS1_M
DDR_DB8
DDR_DQM1DDR_DQM0
DDR_DQS1_P
U12
LP2996/7MR x
GN
D0
1
SD2
VSENSE3
VREF4
VDDQ5
AVIN6
PVIN7
VTT8
GN
D1
9
DDR_DB11
DDR_DB1
DDR_DB6
DDR_DB14
DDR_DB3
R389
1001 2
DDR_DB10
DDR_DB13
DDR_DB4
DDR_DB0
DDR_DB15
C3490.1uF
DDR_DB12
DDR_DB7
DDR_DB2
DDR_DB9
RA17C47R
5 6
C345
0.1uF
DDR_RAS
DDR_CKE
DDR_OPT
DDR_DB5
R386
20K
12
XEINT1 4
CLK_DDRA#CLK_DDRA
DDR_WEDDR_CAS
DDR_CS
C361
0.1u
F
X7R
12
XEINT3 4
XEINT2 4
C344
0.1uF
XEINT4 4
RA16A47R
1 2
RA14A47R
1 2
B7
BEADC78
0.01uF
B6
BE
AD
C350
0.1uF
C346
0.1uF
R390 471 2
RA16B47R
3 4
RA13D47R
7 8
+
CT
5022
uF/1
6V
C362
0.00
1uF
X7R
12
RA14B47R
3 4
R322 471 2
18V_IO20P
DDR_OPT
18V_IO20N
C81
0.00
1uF
X7R
12
RA16C47R
5 6
RA13A47R
1 2
SPARTAN-6 FG484
U6C
XC6S25-FG484
IO_L44N_A2_M1DQ7_1K22
IO_L43N_GCLK4_M1DQ5_1J22
IO_L44P_A3_M1DQ6_1K21
IO_L45P_A1_M1DQS_1L20
IO_L45N_A0_M1DQSN_1L22
IO_L46P_FCB_B_M1_DQ2_1M21
IO_L46N_FOE_B_M1_DQ3_1M22
IO_L47P_FWE_B_M1DQ1_1N20
IO_L47N_LDC_M1DQ1_1N22
IO_L48P_HDC_M1DQ8_1P21
IO_L48N_M1DQ9_1P22
IO_L49P_M1DQ10_1R20
IO_L49N_M1DQ11_1R22
IO_L50P_M1UDQS1_1T21
IO_L50N_M1UDQSN1_1T22
IO_L51P_M1DQ12_1U20
IO_L51N_M1DQ13_1U22
IO_L52P_M1DQ14_1V21
IO_L52N_M1DQ15_1V22
IO_L58P_1M16
IO_L58N_1L15
IO_L53P_1M19
IO_L53N__VREF_1N19
IO_L59P_1P19
IO_L59N_1P20
IO_L60P_1W20
IO_L60N_1W22
IO_L61P_1L17
IO_L61N_1K18
IO_L70P_1U19
IO_L70N_1V20
IO_L71P_1M17
IO_L71N_1M18
IO_L72P_1P17
IO_L72N_1N16
IO_L73P_1P18
IO_L73N_1R19
IO_L74P_AWAKE_1T19
IO_L74N_DOUT_BUSY_1T20
IO_L9P_1G16
IO_L1P_A25_1C19
IO_L1N_A24_VREF_1B20
IO_L9N_1G17
IO_L10P_1F16
IO_L10N_1F17
IO_L19P_1B21
IO_L19N_1B22
IO_L20P_1A20
IO_L20N_1A21
IO_L21P_1K16
IO_L21N_1J16
IO_L28P_1H16
IO_L28N_VREF_1H17
IO_L29P_A23_M1A13_1D19
IO_L29N_A22_M1A14_1D20
IO_L30P_A21_M1RESET_1F18
IO_L30N_A20_M1A11_1F19
IO_L31P_A19_M1CKE_1D21
IO_L32N_A16_M1A9_1C22
IO_L33P_A15_M1A10_1G19
IO_L31N_A18_M1A12_1D22
IO_L32P_A17_M1A8_1C20
IO_L33N_A14_M1A4_1F20
IO_L34P_A13_M1WE_1H19
IO_L34N_A12_M1BA2_1H18
IO_L35P_A11_M1A7_1E20
IO_L35N_A10_M1A2_1E22
IO_L36P_A9_M1BA0_1J17
IO_L36N_A8_M1BA1_1K17
IO_L37P_A7_M1A0_1F21
IO_L37N_A6_M1A1_1F22
IO_L38P_A5_M1CLK_1H20
IO_L38N_A4_M1CLKN_1J19
IO_L39P_M1A3_1G20
IO_L39N_M1ODT_1G22
IO_L40P_GCLK11_M1A5_1K20
IO_L40N_GCLK10_M1A6_1K19
IO_L41P_GCLK9_M1RASN_1H21
IO_L41N_GCLK8_M1CASN_1H22
IO_L42P_GCLK7_M1UDM_1M20
IO_L42N_GCLK6_M1LDM_1L19
IO_L43P_GCLK5_M1DQ4_4J20
+
CT10
22uF
/16V
VCC1.8V
VCC1.8V
VCC1.8V
VCC1.8V
3.3V
VCC1.8VVCC1.8V
VCC1.8V
FPGA_SDAFPGA_SCL
CLK_DDRA#CLK_DDRA
R414 1K1 2R413 1K1 2
DDR_A13
에러 수정
PHY_LED_TX
PHY_LED_LINK10
PHY_CFG0
PHY_LED_LINK100
* LVDS SIGNAL( Pair SIGNAL) -> P/N* Routing Length Same
PHY_LED_RX
PHY_CFG0
PHY_LED_RX
에러 수정
PHY_LED_LINK1000
TOP ROUTING
BOTTOM PLACE
PHY_LED_DUPLEX
C37
80.
1uF
R66
47
C90
0.01uF
12
C95
0.1u
F
C99
0.1u
F
LED15 SMD_LED(1608)12
C11
10.
1uF
R58
4.99K
R554.7K
C37
70.
1uF
R671K
R701K
C10
00.
1uF
R75
4.7K
LED12 SMD_LED(1608)12
C11
20.
1uF
R71
4.7K
R77
4.7K
C37
90.
1uF
LED10 SMD_LED(1608)12
R60
47
C10
10.
1uF
C98
0.1u
F
C10
80.
1uF
R76
4.7K
U27
M88E1111 X
MDIO33
MDC35
CLK12531
INIT_B32
COMA37
RESET_B36
RSET39
CRS115
COL114
RXCLK7
RXER8
RXDV4
RXD03
RXD1128
RXD2126
RXD3125
RXD4124
RXD5123
RXD6121
RXD7120
GTXCLK14
TXCLK10
TXER13
TXEN16
TXD018
TXD119
TXD220
TXD324
TXD425
TXD526
TXD628
TXD729
TDI67
TMS69
TRST_B68
TDO72
TCK70
NC_5050
VDDOX_7171
VDDOX_3434
VDD_122122
VDDO_3030
VDD_1111
VDD_55
VSS9494
VSS9393
VSS8484
VSS6666
VSS6565
VSS6363
VSS6060
VSS5858
VSS5555
VSS5151
VSS4848
VSS4545
VSS4343
VSS4040
VSS3838
VSS2222
VSS2121
VSS1515
VSS99
VSS11
MDIO_P41
MDIO_N42
MDI1_P46
MDI1_N47
MDI2_P56
MDI2_N57
MDI3_P61
MDI3_N62
HSDAC_P53
HSDAC_N54
SCLK_P110
SCLK_N109
SIN_P113
SIN_N112
SOUT_P107
SOUT_N105
SEL_OSC77
XTAL176
XTAL275
LED_LINK10100
LED_LINK10099
LED_LINK100098
LED_DPLX95
LED_RX92
LED_TX91
CONFIG088
CONFIG187
CONFIG286
CONFIG382
CONFIG481
CONFIG679CONFIG580
AVDD_104104
AVCC_6464
AVDD_5959
AVDD_5252
AVDD_4949
AVDD_4444
VDDOH_8989
VDDOH_9797
VDDOH_7373
DVDD_118118
DVDD_117117
DVDD_9696
DVDD_9090
DVDD_8585
DVDD_7878
DVDD_2727
DVDD_2323
DVDD_1717
DVDD_1212
DVDD_66
DVDD_22
VSS_127127
VSS_119119
VSS_116116
VSS_111111
VSS_108108
VSS_106106
VSS_103103
VSS_102102
VSS_101101
VSS_7474
VSS8383
LED14 SMD_LED(1608)12
R64
47
C91
0.01uF
12
C37
60.
1uF
C11
30.
1uF
C10
70.
1uF
R79
NA
R56
4.7K
+CT21
22uF/16V
R721K
C88 22pF
R681K
R74
4.7K
+CT22
22uF/16V
R731K
R61
47
C11
00.
1uF
C97
0.1u
F
R574.7K
R59
47
B1 BEAD
C93 22pF
RJ-45
CN6
HFJ11-1G01E/
TD2_P4
TD1_N6 TD1_P3
SHIELD13
TD2_N5
TD3_P7
TD0_N2 TD0_P1
TD3_N8
VCC9
TCGND10
C10
90.
1uF
R691K
R78
4.7K
R62
47
LED11 SMD_LED(1608)12
C89
0.01uF
12
LED13 SMD_LED(1608)12
R65
47
+C380
22uF/16VSMD-CT(3225)
B3
BEAD
R63
47
C96
0.1u
F
C94
0.1u
F
C92
0.01uF
12
Y125MHz
13
24
C10
60.
1uF
VCC2V5
VCC2V5
PHY_AVDD0
PHY_AVDD0
VCC1.1V
VCC2V5
VCC2V5
VCC2V5
VCC1.1V
PHY_AVDD0
VCC2V5
VCC2V5
VCC2V5
PHY_INT2
PHY_COL2
PHY_RESET_B2
PHY_RXCLK2
PHY_CRS2
PHY_MDIO2
PHY_RXCTL_RXDV2PHY_RXER2
PHY_MDC2
PHY_RXD02PHY_RXD12
PHY_RXD42
PHY_RXD22PHY_RXD32
PHY_RXD52PHY_RXD62PHY_RXD72
PHY_TXCLK2PHY_TXER2
PHY_TXD12
PHY_GTXCLK2
PHY_TXD02
PHY_TXD22
PHY_TXEN2
PHY_TXD52
PHY_TXD32PHY_TXD42
PHY_TXD72PHY_TXD62
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
11
10/100 이더넷 회로도
7.4. 업보드 확장 콘넥터 회로도
R392 1K
R404 10K
R345 4.7K
+ C36
8
22uF
/16V
VCC2V5
VCC2V5
ETN_3.3VVCC2V5
VCC2V5
3.3V
LED_A 7LED_B 7
ERXD- 7
ETXD- 7
ERXD+ 7
ETXD+ 7
ERXD+
ERXD-
VCC2V5
R417 1KVCC2V5
R405 1KVCC2V5
3.3V
ETXD-
ETXD+
+ C36
9
22uF
/16V
VDD_18CORE
C37
00.
1uF
C37
10.
1uF
C411 22pF
C412 22pF
Y625MHz
13
24
VCC2V5
BA11
U8
LAN9220 / LAN9221
VDD18CORE2
GPIO0/nLED13
GPIO1/nLED24
GPIO2/nLED35
VD
D33
A51
TPO+45
TPO-44
TPI+48
TPI-47
VD
D33
RE
G1
PME41
nRESET42
nRD15
nWR16
VDD18CORE37
nCS17
EXRES50
AMDIX_EN52
FIFO_SEL13
IRQ43
VDD18A53
D1519 D1420 D1321 D1222 D1123 D1025 D926 D827
VD
DV
AR
IO18
A112
A211
A310
A49
A58
A67
A76
VD
DV
AR
IO24
D728 D629 D531 D432 D333 D234 D135 D036
VD
DV
AR
IO30
VD
DV
AR
IO56
XTAL1/CLKIN55
XTAL254
VD
D33
A46
VD
D33
A49
VS
S(P
AD
)57
TEST14
EECLK40
EE
DIO
/GP
O3/
TX
_EN
/TX
_CLK
38
EE
CS
39
BWEBOE
SYS_RST
BA3
BA1BA2
BA7BA6BA5BA4
BD4BD3
BD0
BD9
BD5BD6
BD8
BD12
BD7
BD1
BD15BD14BD13
BD2
BD11BD10
INT_ETH
ETH_CS
B4
BEAD
R344 22
R326 1K
R343 4.7K
R329 12.4K
R3931K
C36
40.
1uF
R3941K
R397 10K
C36
30.
1uF
INIT_65P
LENGTH SAME
LENGTH SAME
J8
CON80A
1616
11
1818
22
2020
33
2222
44
2424
55
2626
66
2828
77
3030
88
3232
99
3434
1010
3636
1111
3838
1313
4040
1515
4242
1717
4444
1919
4646
2121
4848
2323
5050
2525
5252
2727
5454
2929
5656
3131
5858
3333
6060
3535
6262
3737
6464
3939
6666
4141
6868
4343
7070
4545
7272
4747
7474
4949
7676
5151
7878
5353
8080
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
1212
1414
SPARTAN-6 FG484
U6D
XC6S25-FG484
IO_L18P_2V13
IO_L18N_2W13
IO_L17P_2Y16
IO_L17N_2W15
IO_L19P_2AA16
IO_L19N_2AB16
IO_L15P_2Y17 IO_L14N_D12_2
AB18
IO_L2P_CMPCLK_2AA21
IO_L2N_CMPMOSI_2AB21
IO_L4P_2T18
IO_L4N_VREF_2T17
IO_L5P_2Y19
IO_L5N_2AB19
IO_L6P_2W18
IO_L14P_D11_2AA18 IO_L13N_D10_2
V15
IO_L6N_2Y18
IO_L7P_2T16
IO_L7N_2T15
IO_L8P_2U17
IO_L15N_2AB17
IO_L8N_2U16
IO_L9P_2V19
IO_L9N_2V18
IO_L10P_2R16
IO_L16P_2AA14
IO_L16N_VREF_2AB14
IO_L10N_2R15
IO_L11P_2V17
IO_L11N_2W17
IO_L20P_2W14
IO_L20N_2Y14
IO_L21P_2Y15
IO_L21N_2AB15
IO_L22P_2T12
IO_L22N_2U12
IO_L23P_2T14
IO_L23N_2R13
IO_L29P_GCLK3_2W12
IO_L29N_GCLK2_2Y12
IO_L32P_GCLK29_2Y11
IO_L32N_GCLK28_2AB11
IO_L40P_2R11
IO_L40N_2T11
IO_L41P_2AA10
IO_L41N_2AB10
IO_L42P_2V11
IO_L42N_2W11
IO_L43P_2Y9
IO_43N_2AB9
IO_L44P_2W10
IO_L44N_2Y10
IO_L45P_2AA8
IO_L45N_2AB8
IO_L46P_2W8
IO_L46N_2V7
IO_L47P_2W9
IO_L47N_2Y8
IO_L48P_D7_2Y7
IO_L48N_RDWR_B_VREF2AB7
IO_L49P_D3_2AA6
IO_L49N_D4_2AB6
IO_L50P_2U9
IO_L50N_2V9
IO_L51P_2T8
IO_L51N_2U8
IP_L52P_2T10
IO_L52N_2U10
IO_L53P_2W6
IO_L53N_2Y6
IO_L54P_2Y5
IO_L54N_2AB5
IO_L57P_2AA4
IO_L57N_2AB4
IO_L58P_2Y3
IO_L58N_2AB3
IO_L59P_2R9
IO_L59N_2R8
IO_L60P_2T7
IO_L60N_2R7
IO_L62P_D5_2W4
IO_L62N_D6_2Y4
IO_L63P_2U6
IO_L63N_2V5
IO_L64P_D8_2AA2
IO_L64N_D8_2AB2
IO_L65P_INIT_B_2T6
IO_L30P_GCLK1_2Y13
IO_L30N_GCLK0_2AB13
IO_L31P_GCLK31_2AA12
IO_L31N_GCLK30_2AB12
BUG FIX
FPGA_CLK1
LVDS_P5
LVDS_N14
LVDS_N13
LVDS_P6LVDS_N6
LVDS_N5
LVDS_P16
LVDS_P30LVDS_N30
LVDS_P15
LVDS_N15
LVDS_P14
LVDS_P32LVDS_N32
LVDS_P31LVDS_N31
LVDS_N16
LVDS_P42LVDS_N41LVDS_P41
LVDS_P40LVDS_N40
LVDS_P45LVDS_N44LVDS_P44LVDS_N43LVDS_P43
LVDS_N42
DSS_D5 2
DSS_D102
LVDS_N47LVDS_P47LVDS_N46LVDS_P46LVDS_N45
DSS_D4 2
DSS_D22
DSS_D92
LVDS_P50LVDS_N49LVDS_P49LVDS_N48LVDS_P48
DSS_D12
DSS_D7 2
LVDS_P63LVDS_N62LVDS_P62
LVDS_N53LVDS_P53
LVDS_N50
DSS_D112
DSS_D32
DSS_PCLK+2
LVDS_N54LVDS_P54
LVDS_P17LVDS_N17
LVDS_N63
DSS_D8 2
DSS_D02
LVDS_N19
LVDS_P64LVDS_N64
LVDS_P18LVDS_N18
DSS_D62DSS_ACBIAS2
LVDS_P58LVDS_N57
LVDS_P20LVDS_N20
LVDS_P57
LVDS_P19
LVDS_N60LVDS_P60LVDS_N59LVDS_P59LVDS_N58
LVDS_P2LVDS_N2
LVDS_P21LVDS_N21
DSS_HSYNC2DSS_VSYNC2
LVDS_N13
LVDS_P32LVDS_P42 LVDS_N42
LVDS_N41
LVDS_N6LVDS_P6
LVDS_P20 LVDS_N20
LVDS_P45
LVDS_P57 LVDS_N57
LVDS_P44LVDS_P41
LVDS_N44
LVDS_P31
LVDS_N45
LVDS_N31
LVDS_P30 LVDS_N30
LVDS_P59LVDS_P47
LVDS_N46
LVDS_N59LVDS_N47
LVDS_P50
LVDS_P60
LVDS_P43
LVDS_N60
LVDS_N43
LVDS_P46LVDS_N48LVDS_P48
LVDS_P15 LVDS_N15
LVDS_N50
LVDS_N18
LVDS_P2 LVDS_N2
LVDS_N62LVDS_P62LVDS_P54
LVDS_P19 LVDS_N19
LVDS_P49 LVDS_N49
LVDS_P18
LVDS_P53 LVDS_N53
LVDS_N5LVDS_P5
LVDS_N54
LVDS_N14
LVDS_P63 LVDS_N63
LVDS_P17 LVDS_N17
LVDS_N64
LVDS_P21 LVDS_N21
LVDS_P14
LVDS_N40LVDS_P40
LVDS_P16 LVDS_N16
LVDS_P64
LVDS_N32
LVDS_P58 LVDS_N58
VCC3.3 BANK2
IO_L13P_2LVDS_P13
EXT_CLK1
EXT_CLK1
INIT_65P
R43
710
K
3.3V
FPGA_CLK1
SMD& DIP 겸용
3.3V
Y450.000MHz
CLK3
VCC4
NC1
GND2 R398 22
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
12
7.5. 업보드 확장 콘넥터 회로도
7.6. DVI OUT 회로도
LVDS0_NN16LVDS0_NP16
LVDS0_N34LVDS0_P34
J7
CON80A
1616
11
1818
22
2020
33
2222
44
2424
55
2626
66
2828
77
3030
88
3232
99
3434
1010
3636
1111
3838
1313
4040
1515
4242
1717
4444
1919
4646
2121
4848
2323
5050
2525
5252
2727
5454
2929
5656
3131
5858
3333
6060
3535
6262
3737
6464
3939
6666
4141
6868
4343
7070
4545
7272
4747
7474
4949
7676
5151
7878
5353
8080
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
1212
1414
SPARTAN-6 FG484
U6A
XC6S25-FG484
IO_L3N_0C6
IO_L4P_0B6
IO_L4N_0A6
IO_L5P_0C7
IO_L2N_0A5 IO_L2P_0C5 IO_L1N_VREF_0A4
IO_L3P_0D6
IO_L37P_GCLK13_0B12
IO_L37N_GCLK12_0A12
IO_L5N_0A7
IO_L6P_0B8
IO_L6N_0A8
IO_L7P_0D9
IO_L7N_0C8
IO_L8P_0C9
IO_L8N_VREF_0A9
IO_L14P_0E8
IO_L14N_0F8
IO_L15P_0G8
IO_L35P_GCLK17_0C11
IO_L35N_GCLK16_0A11
IO_L36P_GCLK15_0D11
IO_L36N_GCLK14_0C12
IO_L15N_0F9
IO_L16P_0G9
IO_L16N_0H10
IO_L17P_0E10
IO_L17N_0F10
IO_L18P_0G11
IO_L18N_0H11
IO_L32P_0D7
IO_L32N_0D8
IO_L33P_0D10
IO_L33N_0C10
IO_L34P_GCLK19_0B10
IO_L34N_GCLK18_0A10
IO_L1P_HSWAPEN_0A3
IO_L38P_0C13
IO_L38N_VREF_0A13
IO_L45N_0D13
IO_L46P_0H13
IO_L46N_0G13
IO_L47P_0E14
IO_L47N_0F15
IO_L48P_0F14
IO_L43P_0E12
IO_L43N_0D12
IO_L44P_0H12
IO_L48N_0H14
IO_L49P_0D14
IO_L49N_0C14
IO_L44N_0F12
IO_L50P_0B14
IO_L50N_0A14
IO_L51P_0C15
IO_L51N_0A15
IO_L62P_0D15
IO_L62N_VREF_0C16
IO_L63P_SCP7_0B16
IO_L63N_SCP6_0A16
IO_L64P_SCP5_0C17
IO_L64N_SCP4_0A17
IO_L65P_SCP3_0B18
IO_L65N_SCP2_0A18
IO_L66P_SCP1_0E16
IO_L66N_SCP0_0D17
IO_L45P_0F13
5V
R40910K
LVDS0_P35 LVDS0_N35
LVDS0_NN17LVDS0_NP17
R41010K
LVDS0_P37 LVDS0_N37
R41110K
LVDS0_P36LVDS0_N33LVDS0_P33LVDS0_N36
LVDS0_NP18 LVDS0_NN18
LVDS0_NP14
LVDS0_N1LVDS0_P2LVDS0_N2
R418330
LVDS0_N5
LVDS0_P4LVDS0_N4
LVDS0_P3LVDS0_N3
LVDS0_N8
LVDS0_P7LVDS0_N7
LVDS0_P6LVDS0_N6
LVDS0_P5
LVDS0_N33LVDS0_P33
LVDS0_P32LVDS0_N32
LVDS0_P8
LVDS0_P36LVDS0_N35LVDS0_P35
LVDS0_N34LVDS0_P34
LVDS0_N43
LVDS0_N38LVDS0_P38
LVDS0_N37LVDS0_P37
LVDS0_N36
LVDS0_N45LVDS0_P45LVDS0_N44LVDS0_P44
LVDS0_P43
LVDS0_P48LVDS0_N47LVDS0_P47LVDS0_N46LVDS0_P46
LVDS0_P51LVDS0_N50LVDS0_P50LVDS0_N49LVDS0_P49LVDS0_N48
LVDS0_N63
LVDS0_P63
LVDS0_P62LVDS0_N62
LVDS0_N51
LVDS0_N66
LVDS0_P65LVDS0_N65
LVDS0_P64LVDS0_N64
LVDS0_P1
LVDS0_P66
LVDS0_NN14
R41210K
VCC3.3 & 1.8V SELECT BLOCK
LVDS0_NN15
LVDS0_NP15
LVDS0_P49
LVDS0_P64
LVDS0_N49
LVDS0_N4LVDS0_N3
LVDS0_N64
LVDS0_N32LVDS0_P32
LVDS0_P62 LVDS0_N62
LVDS0_N50LVDS0_P50
LVDS0_P63
LVDS0_N46LVDS0_P46
LVDS0_N5LVDS0_P5
LVDS0_N63
LVDS0_N1LVDS0_P1
LVDS0_N51LVDS0_P51
LVDS0_N7LVDS0_P7
LVDS0_N45LVDS0_P45
LVDS0_P6 LVDS0_N6
LVDS0_N65LVDS0_P65
LVDS0_N48LVDS0_P48
LVDS0_N38LVDS0_P38
LVDS0_N8LVDS0_P8
LVDS0_P2
LVDS0_N66LVDS0_P66
LVDS0_N47LVDS0_P47
LVDS0_N2
LVDS0_P4LVDS0_P3
LVDS0_NP16LVDS0_NN16
bug
XEINT11
VCC1.8V
18V_IO20P
XEINT21
18V_IO20N
VCC1.8V
XEINT31
VCC1.8V
XEINT41
VCC1.8V
LVDS0_NP17LVDS0_NN17
LVDS0_NN18LVDS0_NP18
LVDS0_NN14LVDS0_NP14
18V_IO19P 18V_IO19N
LVDS0_P44LVDS0_N43LVDS0_N44
LVDS0_P43
LVDS0_NN15LVDS0_NP15
SW4
KEY_F11 3
SW5
KEY_F11 3
SW6
KEY_F11 3
SW7
KEY_F11 3
P1
MINI_HDMI
DAT2+2 DAT2-3
DAT2_S1
DAT1+5
DAT1_S4
DAT1-6
DAT0+8
DAT0_S10
DAT0-9
CLK+11 CLK-12 CLK_S13
CBL_CEC14
SCL15
SDA16
DDC/CEC GND7 +5V
18
HPLG19
T120
T221
T322
T423
NC17
R425 22
R423 22R424 22 TVDD
DVI_CLK+
MSEN
C421
0.1uF 10V
3.3V
R431
4.7K
5V
DDC_I2C3_SCLI2C3_SCL2I2C3_SDA2
VCC1.8V
I2C3_SCL
C420
0.1uF10V
DDC_I2C3_SDAI2C3_SDA
DVI_DATA4
DSS_D52
DSS_D102DSS_D92
DSS_HSYNC2
DVI_+5v
R432 4.7K
DVI_DATA10
U31TFP410
tq64-10x10-0.5
PD063
PD162
PD261
PD360
PD459
PD558
PD655
PD754
PD853
PD952
PD1051
PD1150
PD1247
PD1346
PD1445
PD1544
PD1643
PD1742
PD1841
PD1940
PD2039
PD2138
PD2237
PD2336
TXD0+25TXD0-24
TXD1+28TXD1-27
TXD2+31TXD2-30
TFADJ19
TXC+22TXC-21
DK27
DK18
IDCK+57
IDCK-56
DE2
VSYNC5
HSYNC4
BSEL/SCL15
DSEL/SDA14
HTPLG/EDGE9
NC49RSVD234DKEN35
VREF3
TG
ND
32
TG
ND
26
TG
ND
20
DV
DD
33
DV
DD
12
DG
ND
16
PG
ND
17
PV
DD
18
TV
DD
23
TV
DD
29
DG
ND
48
MSEN11
DK36
ISEL/RESET13 PD10
DV
DD
1
DG
ND
64
C4140.1uF10V
DVI_DATA3
3.3V
TXD0-
ISEL
DVI_HSYNC
DVI_DATA9
BSEL
DSS_D22
TXD2+
DSS_D42
R430 4.7K
L8BEAD
DVI_DSEL
DVI_DATA2
L10BEAD
C4190.1uF10V
TXC-
R428
4.7K
TFADJ
L9BEAD
R42110K,0603 x
DVI_DATA1
R422 4.7K
C4180.1uF10V
DSS_VSYNC2
TVDD
DSS_D72 DVI_DATA8TXD1+
t
RT1
RXEF010 x
FUSE-LITTEL_451
DVI_VSYNC
DSS_PCLK+2
DSS_D12
R427
4.7K
TXD0+
DSS_D32
3.3V
R420
4.7K
R433 4.7K
DSS_D02
DSS_D112
C4150.1uF10V
3.3V
3.3V
DVI_DATA7
C4170.1uF10V
DSS_D82
DVI_DVDD
DVI_DATA0 TXD2-
3.3V
DVI_PVDD
410_NC
DVI_DATA6
TXC+
DVI_DEN
C4160.1uF10V
DV
I_V
RE
F
DVI_DATA5
DKEN
DSS_ACBIAS2
TXD1-
HTPLG
R429 4.7K
R426
510
DVI_DATA11
DSS_D62
Adjusted for .9V
U32
TXS0102 (DCU) x
A15
B18VCCA
3VCCB
7
OE6
GND2A2
4B2
1
R436 4.7K
DDC I2C Interface
R434 4.7K
Internal 10K Pullups.
R435 4.7KDK1DK2DK3
QFP64/0.5M
Mini HDMI Interface
Place Close to
the OMAP
Processor.
100Ma
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
13
7.7. System Clock generation 회로도
3.3V 50Mhz OSC
2.5V 200MhZ LVDS OSC 기본 장착(clock+, clock-)
7.8. Reset 회로
Positive Level reset 입력( H: Reset, L: Normal)
7.9. 전원 회로
1.2V FPGA CORE 공급회로 : 1.2V 6A 전원공급
2.5V 이더넷 공급회로 : Gbps 이더넷 및 2.5V I/O 전원 공급
3.3V I/O 공급회로 : 3.3V I/O 전원 공급
7.10. Configuration Prom 회로
ST사의 MP25P64 Serial Prom을 사용했다.
BUG
R3211K
12
R403221 2
C120
0.1uF
PWR_nRST 2
VCC2V5
SW9
KEY_F1
1
2
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
14
8. 콘넥터 설명
8.1. USB1 – Console 포트로 사용됨
Pin
Number
Pin Name 설 명
1 VCC USB 전원 5V 500mA
2 USB - USB Negative Signal
3 USB + USB Positive Signal
4 GND Ground
8.2. CN6 RJ 45 JACK 1Gbps 이더넷 콘넥터
8.3. J9 RJ 45 JACK 10/100 bps 이더넷 콘넥터
Pin
Number
Pin Name 설 명
1 TD0_P 1G TX0 Positive Transmit
2 TD0_N 1G TX0 Negative Transmit
3 TD1_P 1G TX1 Positive Transmit
4 TD1_N 1G TX1 Negative Transmit
5 TD2_P 1G TX2 Positive Transmit
6 TD2_N 1G TX2 Negative Transmit
7 TD3_P 1G TX3 Positive Transmit
8 TD3_N 1G TX3 Negative Transmit
Pin
Number
Pin Name 설 명
1 TD0_P TX0 Positive Transmit
2 TD0_N TX0 Negative Transmit
3 TD TAB
4
5
6 RXD TAB
7 RD0_N RX0 Negative Transmit
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
15
8.4. J
1,CN7 DC Jack 5V (DC 입력)
본 제품은 5V@2A 아답터 전원으로 사용한다.
8.5. J10. Xilinx Jtag
Pin Number Pin Name 설 명
1 VCC 3.3 V
2 GND Ground
3 TCK JTAG Clock
4 TDO JTAG Data Out
5 TDI JTAG Data In
6 TMS JTAG Mode Set
8 RD0_P RX0 Negative Transmit
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
16
8.6. J8 UP Board 콘넥터( 3.3V I/O)
Num I/O BANK FPGA NC P Num I/O BANK FPGA NC P
1 LVDS_N2 BANK2 2 LVDS_P2 BANK2
3 LVDS_N5 BANK2 4 LVDS_P5 BANK2
5 LVDS_N14 BANK2 6 LVDS_P14 BANK2
7 LVDS_N6 BANK2 8 LVDS_P6 BANK2
9 LVDS_N15 BANK2 10 LVDS_P15 BANK2
11 LVDS_N19 BANK2 12 LVDS_P19 BANK2
13 LVDS_N17 BANK2 LX75,LX100 14 LVDS_P17 BANK2 LX75,LX100
15 LVDS_N21 BANK2 16 LVDS_P21 BANK2
17 GND 18 GND
19 LVDS_N13 BANK2 20 LVDS_P13 BANK2
21 LVDS_N16 BANK2 22 LVDS_P16 BANK2
23 LVDS_N20 BANK2 LX75 24 LVDS_P20 BANK2 LX75
25 LVDS_N30 BANK2 26 LVDS_P30 BANK2
27 LVDS_N18 BANK2 LX75 28 LVDS_P18 BANK2 LX75
29 LVDS_N31 BANK2 30 LVDS_P31 BANK2
31 INIT_65P BANK2 32 EXT_CLK1 BANK2
33 LVDS_N40 BANK2 LX75 34 LVDS_P40 BANK2 LX75
35 LVDS_N42 BANK2 36 LVDS_P42 BANK2
37 LVDS_N32 BANK2 38 LVDS_P32 BANK2
39 GND 40 GND
41 LVDS_N44 BANK2 LX75 42 LVDS_P44 BANK2 LX75
43 LVDS_N41 BANK2 44 LVDS_P41 BANK2
45 LVDS_N50 BANK2 LX75 46 LVDS_P50 BANK2 LX75
47 LVDS_N43 BANK2 48 LVDS_P43 BANK2
49 LVDS_N59 BANK2 LX75 50 LVDS_P59 BANK2 LX75
51 LVDS_N47 BANK2 LX75 52 LVDS_P47 BANK2 LX75
53 LVDS_N45 BANK2 54 LVDS_P45 BANK2
55 LVDS_N60 BANK2 LX75 56 LVDS_P60 BANK2 LX75
57 LVDS_N46 BANK2 LX75 58 LVDS_P46 BANK2 LX75
59 LVDS_N48 BANK2 60 LVDS_P48 BANK2
61 LVDS_N53 BANK2 LX75 62 LVDS_P53 BANK2 LX75
63 GND 64 GND
65 LVDS_N49 BANK2 66 LVDS_P49 BANK2
67 LVDS_N63 BANK2 68 LVDS_P63 BANK2
69 LVDS_N54 BANK2 LX75 70 LVDS_P54 BANK2 LX75
71 LVDS_N62 BANK2 72 LVDS_P62 BANK2
73 LVDS_N57 BANK2 74 LVDS_P57 BANK2
75 LVDS_N58 BANK2 76 LVDS_P58 BANK2
77 LVDS_N64 BANK2 78 LVDS_P64 BANK2
79 GND 80 GND
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
17
8.7. J7 (1.8V , 3.3V I/O 선택) UP Board 콘넥터 – B2: 1.8V , B9: 3.3V(디폴트)
Num I/O BANK FPGA NC Num I/O BANK FPGA NC
1 VCC5 BANK0 2 VCC5 BANK0
3 LVDS0_N1 BANK0 4 LVDS0_P1 BANK0
5 LVDS0_N2 BANK0 6 LVDS0_P2 BANK0
7 LVDS0_N3 BANK0 8 LVDS0_P3 BANK0
9 LVDS0_N4 BANK0 10 LVDS0_P4 BANK0
11 LVDS0_N32 BANK0 12 LVDS0_P32 BANK0
13 LVDS0_N5 BANK0 14 LVDS0_P5 BANK0
15 LVDS0_N7 BANK0 16 LVDS0_P7 BANK0
17 LVDS0_N6 BANK0 18 LVDS0_P6 BANK0
19 LVDS0_N8 BANK0 20 LVDS0_P8 BANK0
21 LVDS0_N14 BANK0 22 LVDS0_P14 BANK0
23 LVDS0_N15 BANK0 24 LVDS0_P15 BANK0
25 LVDS0_N16 BANK0 26 LVDS0_P16 BANK0
27 GND 28 GND
29 LVDS0_N17 BANK0 30 LVDS0_P17 BANK0
31 LVDS0_N18 BANK0 32 LVDS0_P18 BANK0
33 LVDS0_N33 BANK0 34 LVDS0_P33 BANK0
35 LVDS0_N36 BANK0 36 LVDS0_P36 BANK0
37 LVDS1_N19_1.8 BANK1 1.8V IO 38 LVDS1_P19_V1.8 BANK1 1.8V IO
39 LVDS0_N34 BANK0 40 LVDS0_P34 BANK0
41 LVDS0_N37 BANK0 42 LVDS0_P37 BANK0
43 LVDS0_N35 BANK0 44 LVDS0_P35 BANK0
45 LVDS0_N44 BANK0 LX45,LX75 46 LVDS0_P44 BANK0 LX45,LX75
47 LVDS0_N43 BANK0 LX45 48 LVDS0_P43 BANK0 LX45
49 LVDS0_N38 BANK0 50 LVDS0_P38 BANK0
51 LVDS0_N45 BANK0 LX45 52 LVDS0_P45 BANK0 LX45
53 GND 54 GND
55 LVDS0_N46 BANK0 LX45 56 LVDS0_P46 BANK0 LX45
57 LVDS0_N50 BANK0 58 LVDS0_P50 BANK0
59 LVDS0_N49 BANK0 60 LVDS0_P49 BANK0
61 LVDS0_N47 BANK0 LX45 62 LVDS0_P47 BANK0 LX45
63 LVDS0_N48 BANK0 LX45 64 LVDS0_P48 BANK0 LX45
65 LVDS0_N51 BANK0 66 LVDS0_P51 BANK0
67 LVDS1_N20_1.8 BANK1 1.8V IO 68 LVDS1_P20_1.8V BANK1 1.8V IO
69 LVDS0_N63 BANK0 70 LVDS0_P63 BANK0
71 LVDS0_N62 BANK0 72 LVDS0_P62 BANK0
73 LVDS0_N64 BANK0 74 LVDS0_P64 BANK0
75 LVDS0_N66 BANK0 76 LVDS0_P66 BANK0
77 LVDS0_N65 BANK0 78 LVDS0_P65 BANK0
79 GND 80 GND
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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8.8. BEAD : BANK0 전원 선택 스위치(2개중 1개만 선택한다.) 디폴트 3.3V
Num I/O BANK
1 VCC 3.3V +3.3V
2
3 1.8V +1.8V
8.9. P1. MINI HDMI 콘넥터( TMDS 3.3V I/O)
Pin
Number
Pin Name 설 명
1 DATA2 Ground TMDS GROUND
2 DATA2+ TMDS DATA2 PLUS
3 DATA2- TMDS DATA2 MINUS
4 DATA1 Ground TMDS GROUND
5 DATA1+ TMDS DATA1 PLUS
6 DATA1- TMDS DATA1 MINUS
7 DDC/CEC GROUND DDC RETURN GROUND
8 DATA0+ TMDS DATA0 PLUS
9 DATA0- TMDS DATA0 MINUS
10 DATA0 GROUND TMDS GROUND
11 CLK+ TMDS CLOCK PLUS
12 CLK- TMDS CLOCK MINUS
13 CLK GROUND TMDS CLOCK GROUND
14 CBL/CEC CEC
15 DDC SCL DDC CLOCK
16 DDC SDA DDC DATA
17 NC NC
18 DVI +5V DVI OUT 5V
19 HPLG HOT PLUG
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
19
8.10. Xilinx Tool을 이용한 FPGA 내용 변경 하기
jtag tool을 이용하여 FPGA 내용을 사용자 logic으로 변경 할 수 있다
8.10.1. Bit File을 만들기
아래그림에서 Generate Programming File를 더블 클릭하면
Synthesis -> Implement -> Bitfile 생성이 되며, 개발 시 필요한 bit file이 생성된다.
8.10.2. PROM FILE 만들기
Configure Taget Device -> Generate Target PROM/ACE File 을 클릭한다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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ISE IMPACT 프로그램이 실행된다. 여기서 Create PROM File Formatter를 클릭한다.
Configure Single FPGA -> -> Auto Select PROM -> 순으로 클릭한다.
Output File Name : 생성될 file 이름
Output File Location : bit file 위치한 디렉토리
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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하단에 OK을 클릭한다.
OK을 누르면 Bitfile에서 생성된 file을 load한다.
또 다른 device Add을 할 창이 띄면 No 한다 -> 다음은 OK 을 누른다.
Geneare File…을 실행한다. 여기서 사용자 mcs파일이 생성되었다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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8.10.3. 생성된 Bit,mcs File 다운로드 하기
J1 콘넥터 순서: VCC, GND , TCK ,TDI .TDO, TMS
Flashlink보드와 usb jtag ,제공된 프린터 jtag tool 을 연결한다.
Usb cable을 연결한다.
Boundary Scan을 클릭한다.
마우스 우측 button을 누른 후 Initialize Chain을 클릭한다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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클릭하면 우측에 XILINX IC 모양과 SPI/BPI 창이 뜬다.
SPI/BPI을 클릭한다. 클릭하면 위에서 생성된 *.MCS파일을 LOAD한다.
MB1500A 보드에 MP25P16, MP25P64가 실장 되어있어서 이것을 선택한다.
녹색으로 표시된 FLASH ICON을 클릭한다.
다음에 Program을 선택하여 Write을 진행하며 Wirte가 완료 시 성공 메시지가 표시된다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
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ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
25
9. Example Project
9.1. 4개의 LED와 DIP Switch 사용 예제
상태 표시 LED1,LED2,LED3,LED4
Option를 설정하기 위한 DIP SWICH SW1,SW2,SW3,SW4
예제 소스 : 제공된 프로젝트를 led blink open 한다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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9.2.
9.3. module ledTest_top
9.4. (
9.5. sys_clk_pin,
9.6. sys_rst_pin_i,
9.7. leds
9.8. );
9.9. //
9.10. parameter CLOCK_FREQ = 50000000;
// 50 Mhz
9.11.
9.12. parameter ONE_SECOND = CLOCK_FREQ; //
1 second
9.13. parameter HALF_SECOND = ONE_SECOND / 2; //
1/2 second
9.14. parameter ONE_MILLI_SECOND = ONE_SECOND / 1000; // One msec
9.15.
9.16. // port
9.17. input sys_clk_pin;
9.18. input sys_rst_pin_i;
9.19. output [3:0] leds;
9.20.
9.21.
9.22. wire sys_rst_pin;
9.23.
9.24. assign sys_rst_pin = sys_rst_pin_i;
9.25. // DCM Clock Generating
9.26. wire dcm_clk_w; //
buffered clk
9.27. wire dcm_clk_half_w; // 1/2
buffered clk
9.28.
9.29. clk_dcm Inst_clk_dcm
9.30. (
9.31. .clkin_in (sys_clk_pin) ,
9.32. .rst_in (sys_rst_pin) ,
9.33. .clkdv_out (dcm_clk_half_w) ,
ELS-MB1500A Manual V. 1.0 [2014-03-08]
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9.34. .clkin_ibufg_out (CLKIN_IBUFG_OUT) ,
9.35. .clk0_out (dcm_clk_w) ,
9.36. .locked_out (LOCKED_OUT)
9.37. );
9.38.
9.39.
9.40. // Led
9.41. //assign dcm_clk_out = dcm_clk_w;
9.42. reg dir_r; //
0 : left, 1 : right
9.43. reg [7:0] leds_r;
9.44. reg [3:0] led_count_r;
9.45.
9.46. reg [31:0] count_r;
9.47. /*
9.48. always@(posedge sys_clk_pin ) begin
9.49. if (sys_rst_pin) begin
9.50. count_r <= 0;
9.51. end
9.52. else
9.53. count_r <= count_r + 1;
9.54.
9.55. end
9.56.
9.57. */
9.58.
9.59. always@(posedge sys_rst_pin or posedge dcm_clk_w) begin
9.60. //always@(posedge sys_clk_pin ) begin
9.61. if (sys_rst_pin) begin
9.62. dir_r <= 0;
9.63. leds_r <= 8'b00000001;
9.64. led_count_r <= 1;
9.65. count_r <= 0;
9.66. end
9.67. else begin
9.68. //count_r <= count_r + 1;
9.69.
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9.70. if ( count_r >= ONE_MILLI_SECOND * 3'b111)begin //dip_sw[6:0] ) begin
9.71. led_count_r <= led_count_r + 1;
9.72.
9.73. if (dir_r == 1'b0)
9.74. leds_r <= leds_r << 1;
9.75. else
9.76. leds_r <= leds_r >> 1;
9.77.
9.78. count_r <= 0;
9.79. end
9.80. else count_r <= count_r + 1;
9.81.
9.82. if (led_count_r == 4'b1000) begin
9.83. dir_r <= ~dir_r;
9.84. led_count_r <= 1;
9.85. end
9.86. end
9.87. end
9.88.
9.89. // 0 : On, 1 : Off
9.90. assign leds[3:0] = ~leds_r[3:0];
9.91. //assign leds[3:0] = ~count_r[15:12];
9.92. //assign leds[3:0] = {sys_clk_pin,sys_rst_pin_i,sys_clk_pin,sys_rst_pin_i};
NET sys_clk_pin LOC="Y12"|IOSTANDARD=LVCMOS33; # 50Mhz
//NET sys_rst_pin_i LOC="H8" |SLEW=SLOW |IOSTANDARD=LVCMOS25;
NET sys_rst_pin_i LOC="L17" |SLEW=SLOW |IOSTANDARD=LVCMOS18;
NET leds<0> LOC="AB20";
NET leds<1> LOC="AA20";
NET leds<2> LOC="U14";
NET leds<3> LOC="U13";
#NET dip_sw<0> LOC=M1;
#NET dip_sw<1> LOC=M2;
#NET dip_sw<2> LOC=M3;
#NET dip_sw<3> LOC=M4;
#NET dip_sw<4> LOC=L1;
#NET dip_sw<5> LOC=L4;
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#NET dip_sw<6> LOC=L3;
#NET dip_sw<7> LOC=L6;
#NET dcm_clk_out LOC=C22;
;
위 프로젝트를 임플리먼트를 실행 후 bit File을 다운로드 한다.
그러면 LED가 깜박이는 것을 볼 수 있다.
9.93. SB601프로젝트 실습하기
9.93.1. Windows응용프로그램 설치하기(아래 프로그램은 XP에서만 지원됨 WIN7은 지원 되지 않
음)
d: \project\MB1500A\SP601_BRD_Application\BaseRefDISetup2_0_6.msi 이 파일을 설
치한다. 설치 후 실행하면 아래와 같다.
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9.93.2. SP601 프로젝트 컴파일 및 bit 파일 만들기
d:\project\MB1500A\DSP48A\DSP48A.xise를 더블 클릭한다.
임플리먼트를 실행하고 bit, MCS파일을 생성한다.
생성된 BIT파일을 다운로드 한다.
1G BIT 이더넷 통신모드로 동작을 한다. 위에 빨강색으로 표시된 Not connected FPGA
메시지가 connected FPGA로 바뀐다.
Select Image에서 영상 처리해야 할 이미지 파일을 선택한다.
아래 메뉴에 show display를 클릭한다. 설치된 os에 따라 이미지가 표시 되지 않을 수
있다. 이 경우에는 영문 windows XP를 설치하여 테스트 하면 된다.
이미지 실행 모두가 AUTO 와 Manual를 선택하면서 실행하면 된다.
9.93.3. DVI 모니터로 출력하기(SUB BOARD )
단) DVI서브 보드를 구입한 보드에 한함(SB1600),또는 MB1500A
MB1500A보드에 HDMI 케이블을 연결한다.
연결 시 영상처리 결과를 모니터로 통해서 볼 수 있다.
10. EDK 활용
10.1. EDK사용법은 CD에 제공된 Xilinx_Embedded_Processor.pdf 파일을 참조 합니다.
제공된C/D에서 D:\sale_project\LOGIC_PROGRAM\edk_LWIP_142_45\system.xmp를 더
블 클릭하면 위와 같이 프로젝트가 OPEN 됩니다.
ELS-MB1500A Manual V. 1.0 [2014-03-08]
Embedded and Logic Solution: eLogics
31
위 예제는 메모리 테스트 프로젝트 입니다. 여기에 사용자 로직 및 응용 프로그램을 코
딩하여 사용 하면 됩니다.