ProductDatasheetICE2PCS02 v2.4 Mar2010...CCM-PFC ICE2PCS02/G Functional Description Version 2.4 7 22 Mar 2010 3.1 General The ICE2PCS02/G is a 8 pin control IC for power factor correction

CCM-PFC

ICE2PCS02

ICE2PCS02G

Standalone Power FactorCorrect ion (PFC) Control ler inCont inuous Conduct ion Mode(CCM) with Input Brown-OutProtect ion

N e v e r s t o p t h i n k i n g .

Version 2.4, 22 Mar 2010

P o w e r M a n a g e m e n t & S u p p l y

Edition 2010-03-22

Published byInfineon Technologies AG81726 München, Germany

© 2007 Infineon Technologies AGAll Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions orcharacteristics. With respect to any examples or hints given herein, any typical values stated herein and/or anyinformation regarding the application of the device, Infineon Technologies hereby disclaims any and all warrantiesand liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rightsof any third party.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearestInfineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types inquestion please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may be used in life-support devices or systems only with the express writtenapproval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failureof that life-support device or system, or to affect the safety or effectiveness of that device or system. Life supportdevices or systems are intended to be implanted in the human body, or to support and/or maintain and sustainand/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons maybe endangered.

For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany orthe Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com

CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.

CCM-PFC

Revision History: 2010-03-22 Datasheet

Previous Version: V2.3

Page Subjects(major changes since last version)

18&19 Package outline dimension changed

CCM-PFCICE2PCS02

ICE2PCS02G

Version 2.4 3 22 Mar 2010

Type Package

ICE2PCS02 PG-DIP-8

ICE2PCS02 PG-DSO-8

Standalone Power Factor Correction (PFC)

Controller in Continuous Conduction Mode

(CCM) with Input Brown-Out Protection

ICE2PCS02PG-DIP-8

ICE2PCS02GPG-DSO-8

Product Highlights• Leadfree DIP and DSO Package

• Wide Input Range

• Direct sensing, Input Brown-Out Detection

• Optimized for applications which require fast Startup

• Output Power Controllable by External Sense Resistor

• Fast Output Dynamic Response during Load Jumps

• Trimmed, internal fixed Switching Frequency (65kHz)

Features• Ease of Use with Few External Components• Supports Wide Input Range• Average Current Control• External Current and Voltage Loop Compensation

for Greater User Flexibility• Trimmed internal fixed Switching Frequency

(65kHz+5% at 25oC)• Direct sensing, Input Brown-Out Detection

with Hysteresis• Short Startup(SoftStart) duration• Max Duty Cycle of 95% (at 25oC)• Trimmed Internal Reference Voltage (3V+2% at

25oC)• VCC Under-Voltage Lockout• Cycle by Cycle Peak Current Limiting• Output Over-Voltage Protection• Open Loop Detection• Soft Overcurrent Protection• Enhanced Dynamic Response

• Fulfills Class D Requirements of IEC 1000-3-2

DescriptionThe ICE2PCS02/G is a 8-pin wide input range controllerIC for active power factor correction converters. It is de-signed for converters in boost topology, and requires fewexternal components. Its power supply is recommendedto be provided by an external auxiliary supply which willswitch on and off the IC.The IC operates in the CCM with average current control,and in DCM only under light load condition. The switchingfrequency is trimmed and fixed internally at 65kHz. Bothcurrent and voltage loop compensations are done exter-nally to allow full user control.There are various protection features incorporated to en-sure safe system operation conditions. The internal refer-ence is trimmed (3V+2%) to ensure precise protection andoutput control level.

85 ... 265 VAC EMI-Filter

Voltage LoopCom pensation

Protection Unit

FixedOscillator

Current LoopCompensation

PW M LogicDriver

ICE2PCS02 /GCCM PFC

VCC

Auxiliary SupplyV

OUT

Typical Application

RampGenerator

ICOMP

VSENSE

VCOMP

ISENSE GND

NonlinearGain

GATE

VINSBrown-out

CCM-PFCICE2PCS02/G


1 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Representative Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.2 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.3 Start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.4 System Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.4.1 Input Brown-Out Protection (IBOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.4.2 Soft Over Current Control (SOC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.4.3 Peak Current Limit (PCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.4.4 Open Loop Protection (OLP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.4.5 Over-Voltage Protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.5 Fixed Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.6 Average Current Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.6.1 Complete Current Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.6.2 Current Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.6.3 Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.6.4 Nonlinear Gain Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103.7 PWM Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.8 Voltage Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.8.1 Voltage Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.8.2 Enhanced Dynamic Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.9 Output Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134.3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.3.1 Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.3.2 PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144.3.3 System Protection Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154.3.4 Current Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154.3.5 Voltage Loop Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164.3.6 Driver Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18


CCM-PFCICE2PCS02/G

Pin Configuration and Functionality

1 Pin Configuration and Functionality1.1 Pin Configuration

Figure 1 Pin Configuration (top view)

1.2 Pin Functionality

GND (Ground)

The ground potential of the IC.

ICOMP (Current Loop Compensation)

Low pass filter and compensation of the current controlloop. The capacitor which is connected at this pinintegrates the output current of OTA2 and averages thecurrent sense signal.

ISENSE (Current Sense Input)

The ISENSE Pin senses the voltage drop at theexternal sense resistor (R1). This is the input signal forthe average current regulation in the current loop. It isalso fed to the peak current limitation block.

During power up time, high inrush currents cause highnegative voltage drop at R1, driving currents out of pin3 which could be beyond the absolute maximumratings. Therefore a series resistor (R2) of around220W is recommended in order to limit this current intothe IC.

VINS (Brown-out Sense Input)

This VINS pin senses a filtered input voltage dividerand detects for the input voltage Brown-out condition.A Brown-out condition of VINS<0.71V, shuts down theIC. The IC turns on at VINS>1.5V.

VSENSE (Voltage Sense/Feedback)

The output bus voltage is sensed at this pin via aresistive divider. The reference voltage for this pin is3V.

VCOMP (Voltage Loop Compensation)

This pin provides the compensation of the outputvoltage loop with a compensation network to ground(see Figure 2).

VCC (Power Supply)

The VCC pin is the positive supply of the IC and shouldbe connected to an external auxiliary supply. Theoperating range is between 11V and 26V. The turn-onthreshold is at 11.8V and under voltage occurs at 11V.There is no internal clamp for a limitation of the powersupply.

GATE

The GATE pin is the output of the internal driver stage,which has a capability of 1.5A instantaneous sourceand 2.0A instantaneous sink current.

Its gate drive voltage is internally clamped at 15.0V(typically).

Pin Symbol Function

1 GND IC Ground

2 ICOMP Current Loop Compensation

3 ISENSE Current Sense Input

4 VINS Brown-out Sense Input

5 VCOMP Voltage Loop Compensation

6 VSENSE VOUT Sense (Feedback) Input

7 VCC IC Supply Voltage

8 GATE Gate Drive Output

Package PG-DIP-8 / PG-DSO-8

1

6

7

8

4

3

2

5

GATEGND

ICOMP

ISENSE

VCC

VSENSE

VINS VCOMP

CCM-PFCICE2PCS02/G

Representative Block diagram


2 Representative Block diagram

Figure 2 Representative Block diagram

CCM-PFCICE2PCS02/G

Functional Description


3.1 General

The ICE2PCS02/G is a 8 pin control IC for power factorcorrection converters. It comes in both DIP and DSOpackages and is suitable for wide range line inputapplications from 85 to 265 VAC. The IC supportsconverters in boost topology and it operates incontinuous conduction mode (CCM) with averagecurrent control.

It is a design derivative from the ICE2PCS01/G with thedifferences in the supporting functions, namely theinput brown-out detection and internal fixed switchingfrequency 65kHz.

The IC operates with a cascaded control; the innercurrent loop and the outer voltage loop. The innercurrent loop of the IC controls the sinusoidal profile forthe average input current. It uses the dependency ofthe PWM duty cycle on the line input voltage todetermine the corresponding input current. This meansthe average input current follows the input voltage aslong as the device operates in CCM. Under light loadcondition, depending on the choke inductance, thesystem may enter into discontinuous conduction mode(DCM) resulting in a higher harmonics but still meetingthe Class D requirement of IEC 1000-3-2.

The outer voltage loop controls the output bus voltage.Depending on the load condition, OTA1 establishes anappropriate voltage at VCOMP pin which controls theamplitude of the average input current.

The IC is equipped with various protection features toensure safe operating condition for both the systemand device.

3.2 Power Supply

An internal under voltage lockout (UVLO) blockmonitors the VCC power supply. As soon as it exceeds11.8V and both voltages at pin 6 (VSENSE) >0.6V andpin 4 (VINS) >1.5V, the IC begins operating its gatedrive and performs its Startup as shown in Figure 3.

.

Figure 3 State of Operation respect to VCC

If VCC drops below 11V, the IC is off. The IC will thenbe consuming typically 300mA, whereas consuming10mA during normal operation.The IC can be turned off and forced into standby modeby pulling down the voltage at pin 6 (VSENSE) to lowerthan 0.6V. In this standby mode, the currentconsumption is reduced to 300mA. Other condition thatcan result in the standby mode is when a Brown-outcondition occurs, ie pin 4 (VINS) <0.71V.

3.3 Start-up

Figure 4 shows the operation of voltage loop’s OTA1during startup. The VCOMP pin is pull internally toground via switch S1 during UVLO and other faultconditions (see later section on “System Protection”).

During power up when VOUT is less than 83% of therated level, OTA1 sources an output current, maximum30mA into the compensation network at pin 5 (VCOMP)causing the voltage at this pin to rise linearly. Thisresults in a controlled linear increase of the inputcurrent from 0A thus reducing the stress on theexternal component.

Figure 4 Startup Circuit

As VOUT has not reached within 5% from the ratedvalue, VCOMP voltage is level-shifted by the windowdetect block as shown in Figure 5, to ensure there isfast boost up output voltage.

When VOUT approaches its rated value, OTA1’ssourcing current drops and so does the level shift of thewindow detect block is removed. The normal voltageloop then takes control.

VCC

(VVSENSE

> 0.6 V)

AND (VVINS

> 1.5 V)

11.8 V

11.0 V

t

OFFStartUp

Open loop/Standby

NormalOperation

IC'sState

OFFNormal

Operation

(VVSENSE

< 0.6 V)

OR (VVINS

< 0.8 V)

(VVSENSE

> 0.6 V)

AND (VVINS

> 1.5 V)

VCOMP

C5C4

VSENSE

OTA13V

ICE2PCS02/G

protect

R3 + R4

R4x V

OUT)(

R6

S1

3 Functional Description

CCM-PFCICE2PCS02/G



.

Figure 5 Startup with controlled maximum current

3.4 System Protection

The IC provides several protection features in order toensure the PFC system in safe operating range:

• VCC Undervoltage Lockout (UVLO)• Input Brown-out Detection (IBOP)• Soft Over Current Control (SOC)• Peak Current Limit (PCL)• Open-Loop Detection (OLP)• Output Over-Voltage Protection (OVP)

After the system is supplied with the correct level ofVCC and VIN, the system will enter into its normal modeof operation. Figure 6 shows situation when theseprotections features are active, as a function of theoutput voltage VOUT.

An activation of the UVLO, IBOP and OLP results in theinternal fault signal going high and brings the IC into thestandby mode.

As the function of UVLO has already described in theearlier “Power Supply” section, the following sectionscontinue to describe the functionality of theseprotection features.

Figure 6 Protection Features

3.4.1 Input Brown-Out Protection (IBOP)

Brown-out occurs when the input voltage VIN falls belowthe minimum input voltage of the design (i.e. 85V foruniversal input voltage range) and the VCC has notentered into the VCCUVLO level yet. For a system withoutIBOP, the boost converter will increasingly draw ahigher current from the mains at a given output powerwhich may exceed the maximum design values of theinput current.

ICE2PCS02/G provides a new IBOP feature whereby itsenses directly the input voltage for Input Brown-Outcondition via an external resistor/capacitor/diodenetwork as shown in Figure 7. This network provides afiltered value of VIN which turns the IC on when thevoltage at pin 4 (VINS) is more than 1.5V. The IC entersinto the standby mode when VINS goes below 0.71V.The hysteresis prevents the system to oscillatebetween normal and standby mode. Note also that VIN

needs to at least 20% of the rated VOUT in order toovercome OLP and powerup the system.

Figure 7 Input Brown-Out Protection (IBOP)

av(IIN)

VOUT

t

VOUT =rated

95%rated

Window Detect Normal Control

t

Max Vcomp current

83%rated

VCOMP

Level-shifted VCOMP

t

VOUT

PCL / SOC

20%

100%

OLP OLP

108%

OVP

VOUT,Rated

UVLO / IBOPSupplyrelated

Currentrelated

Outputrelated

ICE2PCS02/G

85 ... 265 VAC

VinC1

D2 ... D5

VINSC4

C5R

S

1.5V

0.71V

Brown-Out Detection R8

R9C6

D7

brown-out

3.5V

CCM-PFCICE2PCS02/G



3.4.2 Soft Over Current Control (SOC)

The IC is designed not to support any output powerthat corresponds to a voltage lower than -0.75V at theISENSE pin. A further increase in the inductor current,which results in a lower ISENSE voltage, will activatethe Soft Over Current Control (SOC). This is a softcontrol as it does not directly switch off the gate drive.It acts on the nonlinear gain block to result in a reducedPWM duty cycle.

Figure 8 SOC and PCL Protection as function ofVISENSE

The rated output power with a minimum VIN (VINMIN) is

Due to the internal parameter tolerance, the maximumpower with VINMIN is

3.4.3 Peak Current Limit (PCL)

The IC provides a cycle by cycle peak current limitation(PCL). It is active when the voltage at pin 3 (ISENSE)reaches -1.04V. This voltage is amplified by OP1 by afactor of -1.43 and connected to comparator C2 with areference voltage of 1.5V as shown in Figure 9. Adeglitcher with 300ns after the comparator improvesnoise immunity to the activation of this protection.

Figure 9 Peak Current Limit (PCL)

3.4.4 Open Loop Protection (OLP)

Whenever VSENSE voltage falls below 0.6V, orequivalently VOUT falls below 20% of its rated value, itindicates an open loop condition (i.e. VSENSE pin notconnected) or an insufficient input voltage VIN fornormal operation. In this case, most of the blocks withinthe IC will be shutdown. It is implemented usingcomparator C3 with a threshold of 0.6V as shown in theIC block diagram in Figure 2.

3.4.5 Over-Voltage Protection (OVP)

Whenever VOUT exceeds the rated value by 5%, theover-voltage protection OVP is active as shown inFigure 6. This is implemented by sensing the voltage atpin VSENSE with respect to a reference voltage of3.15V. A VSENSE voltage higher than 3.15V willimmediately reduce the output duty cycle, bypassingthe normal voltage loop control. This results in a lowerinput power to reduce the output voltage VOUT. AVSENSE voltage higher than 3.25V will immediatelyturn off the gate, thereby preventing damage to buscapacitor.

3.5 Fixed Switching Frequency

ICE2PCS02/G has an internally fixed switchingfrequency as opposed to the ICE2PCS01/G which canbe externally set. This frequency is trimmed to 65kHzwith an accuracy ±5% at 25oC.

VISENSE

-0.61V -0.75V -1.04V

NormalOperation

SOC PCL

POUT(rated)

IC’sState

0

POUT(max)

POUT rated( ) VINMIN0.61

R1 2×-------------------´=

POUT max( ) VINMIN0.75

R1 2×-------------------´=

ISENSE

ICE2PCS02/G

R1

R2

IINDUCTOR

OP1

1.43x

Current Limit

300nsC2

Deglitcher

Turn OffDriver

1.5V

Full-waveRectifier

CCM-PFCICE2PCS02/G


Version 2.4 10 22 Mar 2010

3.6 Average Current Control

3.6.1 Complete Current Loop

The complete system current loop is shown in Figure10.

Figure 10 Complete System Current Loop

It consists of the current loop block which averages thevoltage at pin ISENSE, resulted from the inductorcurrent flowing across R1. The averaged waveform iscompared with an internal ramp in the ramp generatorand PWM block. Once the ramp crosses the averagewaveform, the comparator C1 turns on the driver stagethrough the PWM logic block. The Nonlinear Gain blockdefines the amplitude of the inductor current. Thefollowing sections describe the functionality of eachindividual blocks.

3.6.2 Current Loop Compensation

The compensation of the current loop is done at theICOMP pin. This is the OTA2 output and a capacitor C3has to be installed at this node to ground (see Figure10). Under normal mode of operation, this pin gives avoltage which is proportional to the averaged inductorcurrent. This pin is internally shorted to 4.2V in theevent of standby mode.

3.6.3 Pulse Width Modulation (PWM)

The IC employs an average current control scheme incontinuous conduction mode (CCM) to achieve thepower factor correction.

Assuming the voltage loop is working and outputvoltage is kept constant, the off duty cycle DOFF for aCCM PFC system is given as

From the above equation, DOFF is proportional to VIN.

The objective of the current loop is to regulate theaverage inductor current such that it is proportional tothe off duty cycle DOFF, and thus to the input voltageVIN. Figure 11 shows the scheme to achieve theobjective.

Figure 11 Average Current Control in CCM

The PWM is performed by the intersection of a rampsignal with the averaged inductor current at pin 5(ICOMP). The PWM cycle starts with the Gate turn offfor a duration of TOFFMIN (400ns typ.) and the ramp iskept discharged. The ramp is then allowed to rise afterTOFFMIN expires. The off time of the boost transistorends at the intersection of the ramp signal and theaveraged current waveform. This results in theproportional relationship between the average currentand the off duty cycle DOFF.

Figure 12 shows the timing diagrams of TOFFMIN and thePWM waveforms.

Figure 12 Ramp and PWM waveforms

3.6.4 Nonlinear Gain Block

The nonlinear gain block controls the amplitude of theregulated inductor current. The input of this block is the

R

S

ICE2PCS02/G

VoutL1

C2

R3

R4

GateDriver

D1From

Full-waveRetifier

GATE

R1R2

OTA2

ICOMP

4.2V

Current LoopCompensation

Current Loop

NonlinearGain

1.0mS+/-50uA (linear range)

C3S2

Fault

ISENSE

C1

PWMComparator

PWM Logic

Q

Input FromVoltage Loop

voltageproportional to

averagedInductor current

R7

DOFF

VIN

VOUT--------------=

t

ave(IIN) at ICOMPramp profile

GATEdrive

TOFFMIN

400ns

VCREF(1)

VRAMP

PWM

rampreleased

PWM cycle

(1) VCREF is a function of VICOMP

t

CCM-PFCICE2PCS02/G


Version 2.4 11 22 Mar 2010

voltage at pin VCOMP. This block has been designedto support the wide input voltage range (85-265VAC).

3.7 PWM Logic

The PWM logic block prioritizes the control inputsignals and generates the final logic signal to turn onthe driver stage. The speed of the logic gates in thisblock, together with the width of the reset pulse TOFFMIN,are designed to meet a maximum duty cycle DMAX of95% at the GATE output.

In case of high input currents which result in PeakCurrent Limitation, the GATE will be turned offimmediately and maintained in off state for the currentPWM cycle. The signal Toffmin resets (highest priority,overriding other input signals) both the current limitlatch and the PWM on latch as illustrated in Figure 13.

Figure 13 PWM Logic

3.8 Voltage Loop

The voltage loop is the outer loop of the cascadedcontrol scheme which controls the PFC output busvoltage VOUT. This loop is closed by the feedbacksensing voltage at VSENSE which is a resistive dividertapping from VOUT. The pin VSENSE is the input ofOTA1 which has an accurate internal reference of 3V(±2%). Figure 14 shows the important blocks of thisvoltage loop.

3.8.1 Voltage Loop Compensation

The compensation of the voltage loop is installed at theVCOMP pin (see Figure 14). This is the output of OTA1and the compensation must be connected at this pin toground. The compensation is also responsible for thesoft start function which controls an increasing AC inputcurrent during start-up.

Figure 14 Voltage Loop

3.8.2 Enhanced Dynamic Response

Due to the low frequency bandwidth of the voltage loop,the dynamic response is slow and in the range of aboutseveral 10ms. This may cause additional stress to thebus capacitor and the switching transistor of the PFC inthe event of heavy load changes.

The IC provides therefore a “window detector” for thefeedback voltage VVSENSE at pin 6 (VSENSE).Whenever VVSENSE exceeds the reference value (3V)by +5%, it will act on the nonlinear gain block which inturn affect the gate drive duty cycle directly. Thischange in duty cycle is bypassing the slow changingVCOMP voltage, thus results in a fast dynamicresponse of VOUT.

3.9 Output Gate Driver

The output gate driver is a fast totem pole gate drive. Ithas an in-built cross conduction currents protection anda Zener diode Z1 (see Figure 15) to protect the externaltransistor switch against undesirable over voltages.The maximum voltage at pin 8 (GATE) is typicallyclamped at 15V.

G1

R

SL1

R

SL2

Peak CurrentLimit

Current LoopPWM on signal

Toffmin385ns

CurrentLimit Latch

PWM onLatch

HIGH =turn GATE on

Q

Q

VCOMP

VSENSE

C5C4

R6

OTA13V

VIN

Av(IIN

)Nonlinear

Gain

t

ICE2PCS02/G

VoutL1

C2

R3

R4

Gate DriverCurrent Loop

+PWM Generation

D1FromFull-wave

Retifier

GATE

R7

CCM-PFCICE2PCS02/G


Version 2.4 12 22 Mar 2010

Figure 15 Gate Driver

The output is active HIGH and at VCC voltages below the under voltage lockout threshold VCCUVLO, the gate driveis internally pull low to maintain the off state.

GATE

ExternalMOSZ1

VCC

Gate DriverPWM LogicHIGH toturn on

LV

* LV: Level Shift

ICE2PCS02/G

CCM-PFCICE2PCS02/G

Electrical Characteristics

Version 2.4 13 22 Mar 2010

4 Electrical Characteristics

4.1 Absolute Maximum Ratings

Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destructionof the integrated circuit.

4.2 Operating Range

Note: Within the operating range the IC operates as described in the functional description.

Parameter Symbol Limit Values Unit Remarks

min. max.

VCC Supply Voltage VCC -0.3 25 V

VINS Voltage VVINS -0.3 9.5 V 3)

VINS Current IINS -1 35 uA

ICOMP Voltage VICOMP -0.3 5 V

ISENSE Voltage VISENSE -20 5 V 2)

ISENSE Current IISENSE -1 1 mA Recommended R2=220W

VSENSE Voltage VVSENSE -0.3 5 V

VSENSE Current IVSENSE -1 1 mA R3>400kW

VCOMP Voltage VVCOMP -0.3 5 V

GATE Voltage VGATE -0.3 17 V Clamped at 15V(typ)if driven internally.

Junction Temperature Tj -40 150 °C

Storage Temperature TS -55 150 °C

Thermal ResistanceJunction-Ambient for PG-DSO-8

RthJA (DSO) - 185 K/W PG-DSO-8

Thermal ResistanceJunction-Ambient for PG-DIP-8

RthJA(DIP) - 90 K/W PG-DIP-8

ESD Protection VESD - 2 kV Human Body Model1)

1) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kW series resistor)

2) Absolute ISENSE current should not be exceeded

3) Absolute VINS current should not be exceeded

Parameter Symbol Limit Values Unit Remarks

min. max.

VCC Supply Voltage VCC VCCUVLO 25 V

Junction Temperature TJCon -40 125 °C

CCM-PFCICE2PCS02/G


Version 2.4 14 22 Mar 2010

4.3 Characteristics

Note: The electrical characteristics involve the spread of values within the specified supply voltage and junctiontemperature range TJ from – 40 °C to 125°C.Typical values represent the median values, which arerelated to 25°C. If not otherwise stated, a supply voltage of VCC =18V is assumed for test condition.

4.3.1 Supply Section

4.3.2 PWM Section

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

VCC Turn-On Threshold VCCon 11.4 11.8 12.7 V

VCC Turn-Off Threshold/Under Voltage Lock Out

VCCUVLO 10.4 11.0 11.7 V

VCC Turn-On/Off Hysteresis VCChy 0.65 0.8 1.4 V

Start Up CurrentBefore VCCon

ICCstart - 450 1100 mA VVCC=VVCCon -0.1V

Operating Current with active GATE ICCHG - 10 13 mA CL= 4.7nF

Operating Current during Standby ICCStdby - 700 1300 mA VVSENSE= 0.5VVICOMP= 4V


min. typ. max.

Fixed Oscillator Frequency fSW 58 65 70 kHz

Max. Duty Cycle DMAX 92 95 98.5 %

Min. Duty Cycle DMIN 0 % VVCOMP= 0V, VVSENSE= 3VVICOMP= 4.3V

Min. Off Time TOFFMIN 270 400 770 ns VVSENSE= 3VVISENSE= 0.1V

CCM-PFCICE2PCS02/G


Version 2.4 15 22 Mar 2010

4.3.3 System Protection Section

4.3.4 Current Loop Section


min. typ. max.

Open Loop Protection (OLP)VSENSE Threshold

VOLP 0.55 0.6 0.65 V

Peak Current Limitation (PCL)ISENSE Threshold

VPCL -1.16 -1.04 -0.95 V

Soft Over Current Control (SOC)ISENSE Threshold

VSOC -0.75 -0.68 -0.61 V

Output Over-Voltage Protection (OVP) VOVP 3.1 3.25 3.4 V

Input Brown-out Protection (IBOP)High to Low Threshold

VVINSL 0.64 0.71 0.77 V

Input Brown-out Protection (IBOP)Low to High Threshold

VVINSH 1.46 1.50 1.57 V

Input Brown-out Protection (IBOP)VINS Bias Current

IVIN0V -1 -0.2 1 mA VVINS= 0V


min. typ. max.

OTA2 Transconductance Gain GmOTA2 0.8 1.0 1.3 mS At Temp = 25°C

OTA2 Output Linear Range1)

1) The parameter is not subject to production test - verified by design/characterization

IOTA2 - ± 50 - mA

ICOMP Voltage during OLP VICOMPF 3.9 4.2 - V VVSENSE= 0.5V

CCM-PFCICE2PCS02/G


Version 2.4 16 22 Mar 2010

4.3.5 Voltage Loop Section


min. typ. max.

OTA1 Reference Voltage VOTA1 2.92 3.00 3.08 V measured at VSENSE

OTA1 Transconductance Gain GmOTA1 26 39 51 mS

OTA1 Max. Source CurrentUnder Normal Operation

IOTA1SO 18 30 38 mA VVSENSE= 2VVVCOMP= 3V

OTA1 Max. Sink CurrentUnder Normal Operation

IOTA1SK 21 30 41 mA VVSENSE= 4VVVCOMP= 3V

Enhanced Dynamic ResponseVSENSE High ThresholdVSENSE Low Threshold

VHi

VLo

3.092.76

3.182.85

3.262.94

VV

VSENSE Input Bias Current at 3V IVSEN5V 0 - 1.5 mA VVSENSE= 3V

VSENSE Input Bias Current at 1V IVSEN1V 0 - 1 mA VVSENSE= 1V

VCOMP Voltage during OLP VVCOMPF 0 0.2 0.4 V VVSENSE= 0.5VIVCOMP= 0.5mA

CCM-PFCICE2PCS02/G


Version 2.4 17 22 Mar 2010

4.3.6 Driver Section


min. typ. max.

GATE Low Voltage VGATEL - - 1.2 V VCC =10VIGATE = 5 mA

- 1.5 V VCC =10VIGATE =20 mA

- 0.4 - V IGATE = 0 A

- - 1.0 V IGATE = 20 mA

-0.2 0 - V IGATE = -20 mA

GATE High Voltage VGATEH - 14.8 - V VCC = 25VCL = 4.7nF

- 14.8 - V VCC = 19VCL = 4.7nF

7.8 9.2 - V VCC = VVCCoff + 0.2VCL = 4.7nF

GATE Rise Time tr - 60 - ns VGate = 2V ...12VCL = 4.7nF

GATE Fall Time tf - 50 - ns VGate = 12V ...2VCL = 4.7nF

GATE Current, Peak,Rising Edge

IGATE -1.5 - - A CL = 4.7nF1)

1) Design characteristics (not meant for production testing)

GATE Current, Peak,Falling Edge

IGATE - - 2.0 A CL = 4.7nF1)

CCM-PFCICE2PCS02/G

Outline Dimension

Version 2.4 18 22 Mar 2010

5 Outline Dimension

PG-DIP-8 Outline Dimension

CCM-PFCICE2PCS02/G

Outline Dimension

Version 2.4 19 22 Mar 2010

PG-DSO-8 Outline Dimension

Qualität hat für uns eine umfassendeBedeutung. Wir wollen allen IhrenAnsprüchen in der bestmöglichenWeise gerecht werden. Es geht uns alsonicht nur um die Produktqualität –unsere Anstrengungen geltengleichermaßen der Lieferqualität undLogistik, dem Service und Supportsowie allen sonstigen Beratungs- undBetreuungsleistungen.

Dazu gehört eine bestimmteGeisteshaltung unserer Mitarbeiter.Total Quality im Denken und Handelngegenüber Kollegen, Lieferanten undIhnen, unserem Kunden. UnsereLeitlinie ist jede Aufgabe mit „NullFehlern“ zu lösen – in offenerSichtweise auch über den eigenenArbeitsplatz hinaus – und uns ständigzu verbessern.

Unternehmensweit orientieren wir unsdabei auch an „top“ (Time OptimizedProcesses), um Ihnen durch größereSchnelligkeit den entscheidendenWettbewerbsvorsprung zu verschaffen.

Geben Sie uns die Chance, hoheLeistung durch umfassende Qualität zubeweisen.

Wir werden Sie überzeugen.

Quality takes on an allencompassingsignificance at Semiconductor Group.For us it means living up to each andevery one of your demands in the bestpossible way. So we are not onlyconcerned with product quality. Wedirect our efforts equally at quality ofsupply and logistics, service andsupport, as well as all the other ways inwhich we advise and attend to you.

Part of this is the very special attitude ofour staff. Total Quality in thought anddeed, towards co-workers, suppliersand you, our customer. Our guideline is“do everything with zero defects”, in anopen manner that is demonstratedbeyond your immediate workplace, andto constantly improve.

Throughout the corporation we alsothink in terms of Time OptimizedProcesses (top), greater speed on ourpart to give you that decisivecompetitive edge.

Give us the chance to prove the best ofperformance through the best of quality– you will be convinced.

h t t p : / / w w w . i n f i n e o n . c o m

Total Quality Management

Published by Infineon Technologies AG

Documents

ProductDatasheetICE2PCS02 v2.4 Mar2010...CCM-PFC ICE2PCS02/G Functional Description Version 2.4 7 22 Mar 2010 3.1 General The ICE2PCS02/G is a 8 pin control IC for power factor correction