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Video PAL encoder. Project by : Sokolik Dmitry Instructor : Boaz Mizrahi digital lab. Card Interface. Compressed data. Compressor. 16 bit. Pal. Control. I 2 C. To PCI. Functional Block diagram. 24.576 MHz. Aux. Bus. Compress unit. output interface. Video sampling. 33.333 MHz. - PowerPoint PPT Presentation
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Project by : Sokolik Dmitry
Instructor : Boaz Mizrahi
digital lab
PalCompressor
Compressed
data
I2C
To PCI
16 b
it
Control
Video sampling
Compress unit
output interface
PCI Bus
Au
x. B
us
9080
Local Bus
24.576 MHz
Control unit33.333 MHz
Maximum Compressed Data Rate is 16.67MHz
I2C
8 bit Video BusComposite
PAL
SAA7111SAA7111LPFLPF
24.576 MHz
•LPF - filtering high frequencies to prevent aliasing;
•SAA7111 - Composite Video Decoder
1) Control -- I2C protocol;
2) 24.576 MHz clock.
3) 27 MHz reading rate
4) CCIR-656
PCF8584PCF8584
• ADV601 -- wavelet video encoder ( also decoder ) ;• DRAM -- NEC uPD424210ALE-60 (256Kx16 bit );• ADSP-2181 -- DSP providing algorithm calculations;• Compressed data -- 32 bit bus ( 8 , 16 bit optional ); • Control -- host interface;
ADV601
Data in Compressed Data
ADSP2181DRAM
Control
ADV601 ADSP2181Serial CommunicationBin Width Statistics
Block Diagram Encoding
Local bus arbiter
LHOLD
LHOLDA
Data processing
Local bus
data
PCF8584
interface
I2C
SAA7111
ADV
interface
TO ADV
•Slave
•C bus mode
•Burst mode
