project report

Result Alert System With E-mail and sms Project Report ’10

INTRODUCTION

Communication has an undeniable role on molding our lifestyle. Modern world

of ours revolves around communication facilities that render information transfer fast,

reliable and trustworthy. Our quest for faster means of communication provided us with

the now unavoidable technology for communication of modern times – E-mail and sms.

Within a short span of time E-mail and sms has become an indispensable part of

communication of common man. Most of the information that is needed to be relied

fastly and efficiently is now conveyed through this media. Irrespective of the distance

between the users the information is delivered swiftly and securely. This most attractive

feature of this technology paved way to the implementation of E-mail and sms for

important data transfers.

In this project E-mail and sms technology is implemented for the fast and

reliable procurement of exam results. Now also even after the publication of exam

result by the university/board, the candidates have to wait a long time to get their result

details. This problem is tried to be solved through this system which uses E-mail and

sms to provide exam results to the needed candidates. The candidates who have

registered for exam will have to provide their E-mail Id and mobile number for contact.

After the exam result has been published from the university these candidates can call

the result center and give their exam registration number. Now their exam result will be

automatically provided at their mail box. In addition to this their exam result status will

be sent as a message to the provided mobile phone number.


MICROCONTROLLERS VERSUS MICROPROCESSORS

The microprocessor is a clock driven semiconductor device consisting of

electronic logic circuits .By microprocessor is meant the general purpose

microprocessors such as Intel’s x86 family. These microprocessors contain no RAM;

no RAM no I/O ports on the chip itself.

The microprocessors is capable of performing various computing functions

And making decisions to change the sequence of program execution. The

microprocessor is in many ways similar to CPU but includes all the logic circuitry

including the control unit, on one chip. The microprocessor is divided mainly into three

segments they are Arithmetic Logic Unit (ALU), Register Array and Control Unit.

Arithmetic Logic Unit –This is the area of the microprocessor where various computing

functions are performed on data. The ALU performs such arithmetic operations as

additions and subtractions, and such logic functions as AND, OR, and exclusive OR.

Register Array – This area of microprocessors consists of various registers .These

registers are primarily used to store data temporarily during the execution of a program

and are accessible to the user through instructions.

Control unit – The control unit provides the necessary timing and control signals to all

the operations in the microcomputer. It controls the flow of data between the

microprocessor and memory and peripherals.

A microcontroller has a CPU in addition to a fixed amount of RAM, ROM

I/O ports and a timer all on a single chip . The fixed amount of on chip ROM, RAM

and number of I/O ports in microcontrollers make them ideal for many applications in

which cost and space are critical.


Criteria for choosing a microcontroller:

1. The first and foremost criteria is that it must meet the task at hand efficiently and

cost effectively. In analyzing the need for microcontroller-based project, first see

whether an

8-bit, 16-bit or 32-bit microcontroller can best handle the computing the needs of the

task most effectively. Other considerations are:

Speed.

Packaging.

Power consumptions.

The amount of RAM and ROM on chip.

The number of I/O pins and timer on the chip.

Cost per unit

2. The second criteria in choosing a microcontroller are how easy it is to develop

product around it.

3. The third criterion is its ready availability in needed quantities both now and in

future.


WHY WE CHOOSE AVR MICROCONTRLLER?

Here in this project we used AVR (Advanced Virtual RISC)microcontroller due to

its some special features, that are specified below:

Power on reset

External and internal interrupt sources.

Six sleep modes. (ADC noise production, power slave, power down, ideal standby, and

external –standby).

Twenty three programmable input output pins.

Forty pin programmable I/O lines.

Using voltage 4.5v - 5.5v.

Four-Eight MHz speed

Availability.

Low cost.


BLOCK DIAGRAM


BLOCK DIAGRAM DESCRIPTION

The block diagram of ‘Result Alert System with E-mail and sms’system is

shown in figure.

POWER SUPPLY

It provides required power, 5V to the circuits.

MICROCONTROLLER

The microcontroller ATMEGA8535 is used in our project to interface details with

GSM modem and computer. It connects the DTMF and speaker IC’s and also it provides

control of the whole system.

TELEPHONE SYSTEMS

The entire ‘result alert system with E-mail and sms’ consist of two telephone

systems – one at user end and another at the result publishing center. A mobile phone is

employed at the result publishing center whereas any type of telephone system can be

used by the caller.

APR9600

This is the speaker IC which provides instructions to the caller. The instructions

to be conveyed are stored in the memory of this IC prior to application. After the call is

established the controller triggers it to prompt the caller to dial their register number.

SPEAKER

There is a provision in the APR9600 to interface with a speaker. This speaker

feeds the voice responses from the speaker IC to the mouthpiece of the telephone at the

result center.

DTMF DECODER


This block decodes the key strokes corresponding to the register number

entered by the caller. Each digit in the keypad has two specific frequencies associated

with it. According to the received frequencies the number is decodedand fed to the

microcontroller.

MAX232

Max 232 is used to interface the Microcontroller to the computer and GSM

modem. It makes the CMOS logic of microcontroller compatiable with the RS-232

standard of computer and GSM modem.

GSM MODEM

The GSM MODEM is used to send data to the mobile of the candidate.

PC

This computer stores the entire database of all the registered candidates. A high

level programming language is used to configure the system automatically to send the result

details to the mail Id provided for each candidate. It also transmits the result status to controller

for messaging purposes.


HARDWARE SECTION


AVR MICROCONTROLLER

BRIEF HISTORY

It is believed the AVR basic architecture was conceived by two students at the

Norwegian Institute of Technology (NTH) Alf-Egil Bogen and Vegard Wollan.

The original AVR MCU was developed at a local ASIC house in Trondheim Norway,

where the two founders of Atmel Norway were working as students. It was known as a

uRISC (Micro RISC). When the technology was sold to Atmel, the internal architecture

was further developed by Alf and Vegard at Atmel Norway, a subsidiary of Atmel

founded by the two architects.

The acronym AVR has been reported to stand for Advanced Virtual RISC, but it

has also been rumored to stand for the initials chip's designers: Alf and Vegard [RISC].

Atmel says that the name AVR is not an acronym and does not stand for anything in

particular.

Among the first of the AVR line was the AT90S8515, which in a 40-pin DIP

package has the same pin out as an 8051 microcontroller, including the external

multiplexed address and data bus. The polarity of the /RESET line was opposite (8051's

having an active-high RESET, while the AVR has an active-low /RESET), but other

than that, the pin out was identical.

The AVR is a Harvard architecture machine with programs and data stored

separately. Typical Harvard type machines store their programs in permanent or semi-

permanent memory and data in volatile memory. Hence, they are ideal for embedded

http://en.wikipedia.org/wiki/Harvard_architecture

http://en.wikipedia.org/w/index.php?title=Vegard_Wollan&action=edit

http://en.wikipedia.org/w/index.php?title=Alf-Egil_Bogen&action=edit

http://en.wikipedia.org/wiki/Norwegian_Institute_of_Technology


systems in the field, since the program memory is protected from voltage spikes and

other harsh environmental factors that might corrupt the program.

Three Basic Families

AVRs are generally classified into three broad groups:

Tiny AVRs

o 1-8 kB program memory

o 8-20-pin package

o Limited peripheral set

. mega AVRs

o 4-256 kB program memory

o 28-100-pin package

o Extended instruction set (Multiply instructions and instructions for

handling larger program memories)

o Extensive peripheral set

Application specific AVRs

o megaAVRs with special features not found on the other members of the

AVR family, such as LCD controller, USB controller, advanced PWM etc.

o FPSLIC (Field Programmable System Level Integrated Circuit), an

AVR core on-die with an FPGA. The FPSLIC uses SRAM for the AVR program code,

unlike all other AVRs. Partly due to the relative speed difference between SRAM and

flash, the AVR core in the FPSLIC can run at up to 50MHz.

http://en.wikipedia.org/wiki/Field-programmable_gate_array

http://www.atmel.com/products/FPSLIC/


Program Execution

Atmel's AVRs have a single level pipeline design. This means the next machine

instruction is fetched as the current one is executing. Most instructions take just one or

two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers.

The AVR family of processors were designed with the efficient execution of

compiled C code in mind and has several built-in pointers for the task.

MCU Speed

The AVR line can normally support clock speeds from 0-16 MHz, with some

devices reaching 20 MHz. Lower powered operation usually requires a reduced clock

speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or

resonator circuitry.

Since many operations on the AVR are single cycle, the AVR can achieve up to

1MIPS per MHz.

http://en.wikipedia.org/wiki/Million_instructions_per_second

http://en.wikipedia.org/wiki/C_(programming_language)

http://en.wikipedia.org/wiki/Compiler

http://en.wikipedia.org/wiki/Pipeline_(computer)


AVR CPU Core

The main function of the CPU core is to ensure correct program execution. The

CPU must therefore be able to access memories, perform calculations, control

peripherals, and handle interrupts.


Architectural Overview

In order to maximize performance and parallelism, the AVR uses a

Harvard architecture– with separate memories and buses for program and data.

Instructions in the program memory are executed with a single level pipelining. While

one instruction is being executed ,the next instruction is pre-fetched from the program

memory. This conceptacles instructions to be executed in every clock cycle.

The program memory is In-System Re-Programmable Flash memory.The fast-access

Register File contains 32 x 8-bit general purpose working registers with a single clock

cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)operation. In a

typical ALU operation, two operands are output from the Register File, the operation is

executed, and the result is stored back in the Register File – in one clock cycle.

Six of the 32 registers can be used as three 16-bit indirect address register pointers

for Data Space addressing – enabling efficient address calculations. One of the these

address pointers can also be used as an address pointer for look up tables in Flash

program memory.

The ALU supports arithmetic and logic operations between registers or between a

constant and a register. Single register

operations can also be executed in the ALU. After an arithmetic operation, the Status

Register is updated to reflect information about the result of the operation.

Program flow is provided by conditional and unconditional jump and call

instructions, able to directly address the whole address space. Most AVR instructions

have a single 16-bit word format. Every program memory address contains a 16- or 32-

bit instruction. Program Flash memory space is divided in two sections, the Boot

Program section and the Application Program section. Both sections have dedicated

Lock bits for write and read/write protection. The SPM instruction that writes into the


Application Flash memory section must reside in the Boot Program section.During

interrupts and subroutine calls, the return address Program Counter (PC) is stored on

the Stack. The Stack is effectively allocated in the general data SRAM, and

consequently the Stack size is only limited by the total SRAM size and the usage of the

SRAM. All user programs must initialize the SP in the reset routine (before subroutines

or interrupts are executed). The Stack Pointer SP is read/write accessible in the I/O

space. The data SRAM can easily be accessed through the five different addressing

modes supported in the AVR architecture.

The memory spaces in the AVR architecture are all linear and regular memory

maps. A flexible interrupt module has its control registers in the I/O space with an

additional Global Interrupt Enable bit in the Status Register. All interrupts have a

separate Interrupt Vector in the Interrupt Vector table. The interrupts have priority in

accordance with their Interrupt Vector position. The lower the Interrupt Vector address,

the higher the priority. The I/O memory space contains 64 addresses for CPU

peripheral functions as Control Registers, SPI, and other I/O functions.

ALU – Arithmetic Logic Unit

The high-performance AVR ALU operates in direct connection with all the

32 general purpose working registers. Within a single clock cycle, arithmetic operations

between general purpose registers or between a register and an immediate are executed.

The ALU operations are divided into three main categories – arithmetic, logical, and

bit-functions. Some implementations of the architecture also provide a powerful

multiplier supporting both signed/unsigned multiplication and fractional format.

Reset and Interrupt Handling

The AVR provides several different interrupt sources. These interrupts and

the separate Reset Vector each have a separate Program Vector in the program memory

space. All interrupts are assigned individual enable bits which must be written logic one

together with the Global Interrupt Enable bit in the Status Register


in order to enable the interrupt. Depending on the Program Counter value, interrupts

may be automatically disabled when Boot Lock bits BLB02 or BLB12 are

programmed. This feature improves software security. The lowest addresses in the

program memory space are, by default, defined as the Reset and Interrupt Vectors. The

list also determines the priority levels of the different interrupts. The lower the address,

the higher the priority level is. RESET has the highest priority, and next isINT0 – the

External Interrupt Request 0.

Interrupt Response Time

The interrupt execution response for all the enabled AVR interrupts

is four clock cycles minimum. After four clock cycles, the Program Vector address for

the actual interrupt handling routine is executed. During this four clock cycle period,

the Program Counter is pushed onto the Stack. The Vector is normally a jump to the

interrupt routine, and this jump takes three clock cycles. If an interrupt occurs during

execution of a multi-cycle instruction, this instruction is completed before the interrupt

is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt execution

response time is increased by four clock cycles. This increase comes in addition to the

start-up time from the selected sleep mode. A return from an interrupt handling routine

takes four clock cycles. During these four clock cycles, the Program Counter (two

bytes) is popped back from the Stack, the Stack Pointer is incremented by two, and the

I-bit in SREG is set.

AVR AT MEGA8535 MEMORIES

The AVR architecture has two main memory spaces, the Data Memory

and the Program Memory space. In addition, the ATmega8535 features an EEPROM

Memory for data storage. All three memory spaces are linear and regular.


In-System Reprogrammable Flash Program Memory

The ATmega8535 contains 8K bytes On-chip In-System

Reprogrammable Flash memory for program storage. Since all AVR instructions are 16

or 32 bits wide, the Flash is organized as 4K x 16. For software security, the Flash

Program memory space is divided into two sections, Boot Program section and

Application Program section. The Flash memory has an endurance of at least 10,000

write/erase cycles. The ATmega8535 Program Counter (PC) is 12 bits wide, thus

addressing the 4K program memory locations.

SRAM Data Memory.

The 608 Data Memory locations address the Register File, the I/O Memory,

and the internal data SRAM. The first 96 locations address the Register File and I/O

Memory, and the next 512 locations address the internal data SRAM. The five different

addressing modes for the data memory cover: Direct, Indirect with Displacement,

Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register

File, registers R26 to R31 feature the indirect addressing pointer registers. The direct

addressing reaches the entire data space. The Indirect with Displacement mode reaches

63 address locations from the base address given by the Y- or Z-register. When using

register indirect addressing modes with automatic pre-decrement and post increment,

the address registers X, Y, and Z are decremented or incremented. The 32 general

purpose working registers, 64 I/O Registers, and the 512 bytes of internal data SRAM

in the ATmega8535 are all accessible through all these addressing modes.

Data Memory Access Times

This section describes the general access timing concepts for internal memory

access.


EEPROM Data Memory

The ATmega8535 contains 512 bytes of data EEPROM memory. It is

organized as a separate data space, in which single bytes can be read and written. The

EEPROM has an endurance of at least 100,000 write/erase cycles. The access between

the EEPROM and the CPU is described in the following, specifying the EEPROM

Address

Registers, the EEPROM Data Register, and the EEPROM Control Register.

I/O Memory

The I/O space definition of the ATmega8535 is shown in page 299. All

ATmega8535 I/Os and peripherals are placed in the I/O space. The I/O locations are

accessed by the IN and OUT instructions, transferring data between the 32 general

purpose working registers

and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly bit-

accessible using the SBI and CBI instructions. In these

registers, the value of single bits can be checked by using the SBIS and SBIC

instructions. Refer to the instruction set section for more details.

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F

must be used. When addressing I/O Registers as data

space using LD and ST instructions, 0x20 must be added to these addresses.

For compatibility with future devices, reserved bits should be written to zero if

accessed. Reserved I/O memory addresses should never be written. Some of the status

flags are cleared by writing a logical one to them. Note that the CBIand SBI

instructions will operate on all bits in the I/O Register, writing a one back into any flag

read as set, thus clearing the flag. The CBI and SBI instructions work with registers

0x00 to 0x1F only.


AT mega 8535

The AT mega8535 is a low power CMOS 8- bit microcontroller based on the

AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the

AT mega 8535 achieves throughputs approaching 1MIPS per MHz .

The AVR core combines a rich instruction set with 32 general purpose working

registers. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU),

allowing two independent registers to be accessed in one single instruction executed in

one clock cycle. The resulting architecture is more code efficient while achieving

through puts up to ten times faster than conventional CISC microcontrollers. The

ATmega8535 provides the following features: 8K bytes of In-System Programmable

Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM,

32general purpose I/O lines, 32 general purpose working registers, three flexible

Timer/Counters with compare modes, internal and external interrupts, a serial

programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit

ADC with optional differential input stage with programmable gain in TQFP package,

a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and six

software selectable power saving modes. The Idle mode stops the CPU while allowing

the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning.

The Power-down mode saves the register contents but freezes the Oscillator,

disabling all other chip functions until the next interrupt or Hardware Reset. In Power-

save mode, the asynchronous timer continues to run, allowing the user to maintain a

timer base while the rest of the device is sleeping. The ADC Noise Reduction mode

stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize

switching noise during ADC conversions. In Standby mode, the crystal/resonator

Oscillator is running while the rest of the device is sleeping. This allows very fast start-

up combined with low-power consumption. In Extended Standby mode, both the main

Oscillator and the asynchronous timer continue to run.


The device is manufactured using Atmel’s high density nonvolatile memory

technology. The On-chip ISP Flash allows the program memory to be reprogrammed

In-System through an SPI serial interface, by a conventional nonvolatile memory

programmer, or by an On-chip Boot program running on the AVR core. The boot

program can use any interface to download the application program in the Application

Flash memory. Software in the Boot Flash section will continue to run while the

Application Flash section is updated, providing true Read-While-Write operation. By

combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a

monolithic chip, the Atmel ATmega8535is a powerful microcontroller that provides a

highly flexible and cost effective solution to many embedded control applications.


M-8870 DECODER

Features

• Low Power Consumption

• Adjustable Acquisition and Release Times

• Central Office Quality and Performance

• Power-down and Inhibit Modes (-02 only)

• Inexpensive 3.58 MHz Time Base

• Single 5 Volt Power Supply

• Dial Tone Suppression

Applications

• Telephone switch equipment

• Remote data entry

• Paging systems

• Personal computers

• Credit card systems


DESCRIPTION

The M-8870 is a full DTMF Receiver that integrates both bandsplit filter

and decoder functions into a single 18-pin DIP or SOIC package. Manufactured using

CMOS process technology, the M-8870 offers low power consumption (35 mW max)

and precise data handling. Its filter section uses switched capacitor technology for both

the high and low group filters and for dial tone rejection. Its decoder uses digital

counting techniques to detect and decode all 16 DTMF tone pairs into a 4-bit code.

External component count is minimized by provision of an on-chip differential input

amplifier, clock generator, and latched tri-state interface bus. Minimal external

components required include a low-cost 3.579545 MHz color burst crystal, a timing

resistor, and a timing capacitor. The M-8870-02 provides a “power-down” option

which, when enabled, drops consumption to less than 0.5 mW. The M-8870-02 can also

inhibit the decoding of fourth column digits

BLOCK DIAGRAM


FUNCTIONAL DESCRIPTION

M-8870 operating functions include a bandsplit filter that separates the

high and low tones of the received pair, and a digital decoder that verifies both the

frequency and duration of the received tones before passing the resulting 4-bit code to

the output bus.

Filter

The low and high group tones are separated by applying the dual-tone signal to

the inputs of two 6th order switched capacitor bandpass filters with bandwidths that

correspond to the bands enclosing the low and high group tones. The filter also

incorporates notches at 350 and 440 Hz, providing excellent dial tone rejection. Each

filter output is followed by a single-order switched capacitor section that smooths the

signals prior to limiting. Signal limiting is performed by highgain comparators

provided with hysteresis to prevent detection of unwanted low-level signals and noise.

The comparator outputs provide full-rail logic swings at the frequencies of the

incoming tones.

Decoder

The M-8870 decoder uses a digital counting technique to determine the

frequencies of the limited tones and to verify that they correspond to standard DTMF

frequencies. A complex averaging algorithm is used to protect against tone simulation

by extraneous signals (such as voice) while tolerating small frequency variations. The

algorithm ensures an optimum combinationof immunity to talkoff and tolerance to

interfering signals (third tones) and noise. When the detector recognizeshe

simultaneous presence of two valid tones (known as signal condition), it raises the

EarlySteering flag (ESt). Any subsequent loss of signal condition will cause ESt to fall.


Steering Circuit

Before a decoded tone pair is registered, the receiver checks for a valid signal

duration (referred to as character- recognition-condition). This check is performed by

an external RC time constant driven by ESt. A logic high on ESt causes VC to rise as

the capacitor discharges. Provided that signal condition is maintained (ESt remains

high) for the validation period (tGTF), VC reaches the threshold (VTSt) of the steering

logic to register the tone pair, thus latching its corresponding 4-bit code into the output

latch. At this point, the GT output is activated and drives VC to VDD.GT continues to

drive high as long as ESt remains high. Finally, after a short delay to allow the output

latch to settle, the delayed steering output flag (StD) goes high, signaling that a

received tone pair has been registered. The contents of the output latch are made

available on the 4-bit output bus by raising the threestate control input (OE) to a logic

high. The steering circuit works in reverse to validate the interdigit pause between

signals. Thus, as well as rejecting signals too short to be considered valid, the receiver

will tolerate signal interruptions (dropouts) too short to be considered a valid pause.

This capability, together with the ability to select the steering time constants

externally,allows the designer to tailor performance to meet awide variety of system

requirements .

Basic Steering Circuit

.


Input Configuration

The input arrangement of the M-8870 provides a differential input operational

amplifier as well as a bias source (VREF) to bias the inputs at mid-rail. Provision is

made for connection of a feedback resistor to the op-amp output (GS) for gain

adjustment.

In a single-ended configuration, the input pins are connected as shown in the

Single - Ended Input Configuration on page 3 with the op-amp connected for unity gain

and VREF biasing the input at 1/2VDD. The Differential Input Configuration bellow

permits gain adjustment with the feedback resistor R5.

DTMF Clock Circuit

The internal clock circuit is completed with the addition of a standard 3.579545 MHz

television color burst crystal. The crystal can be connected to a single M-8870. a single

crystalcan be used to connect a series of M-8870s by couplingthe oscillator output of

each M-8870 through a 30pF capacitor to the oscillator input of the next M-8870.


TONE DECODING


APR 9600

APR9600 is a low-cost high performance sound record/replay IC incorporating

flash analogue storage technique. Recorded sound is retained even after power supply

is removed from the module. The replayed sound exhibits high quality with a low noise

level. Sampling rate for a 60 second recording period is 4.2 kHz that gives a sound

record/replay bandwidth of 20Hz to 2.1 kHz. However, by changing an oscillation

resistor, a sampling rate as high as 8.0 kHz can be achieved. This shortens the total

length of sound recording to 32 seconds. Total sound recording time can be varied

from 32 seconds to 60 seconds by changing the value of a single resistor. The IC can

operate in one of two modes: serial mode and parallel mode. In serial access mode,

sound can be recorded in 256 sections. In parallel access mode, sound can be recorded

in 2, 4 or 8 sections. The IC can be controlled simply using push button


keys. It is also possible to control the IC using external digital circuitry such as micro-

controllers and computers. The APR9600 has a 28 pin DIP package. Supply voltage is

between 4.5V to 6.5V. During recording and replaying, current consumption is 25 mA.

In idle mode, the current drops to 1 mA. The APR9600 experimental board is an

assembled PCB board consisting of an APR9600 IC, an electret microphone, support

components and necessary switches to allow users to explore all functions of the

APR9600 chip. The oscillation resistor is chosen so that the total recording period is 60

seconds with a sampling rate of 4.2 kHz. The board measures 80mm by 55mm.

FUNCTIONAL BLOCK DIAGRAM OF APR9600

Functional Description of Recording

On power up, the device is ready to record or play back, in any of the enabled

message segments. To record, /CE must be set low to enable the device and /RE must

be set low to enable recording. You initiate recording by applying a low level on the

message trigger pin that represents the message segment you intend to use. The

message trigger pins are labeled /M1_Message - /M8_Option on pins 1-9 (excluding

pin 7) for message segments 1-8 respectively. When actual recording begins the device

responds with a single beep (if the BE pin is high to enable the beep tone) at the

speaker outputs to indicate that it has started recording. Recording continues as long as


the message pin stays low. The rising edge of the same message trigger pin during

record stops the recording operation (indicated with a single beep).

Functional Description of Playback

On power up, the device is ready to record or playback, in any of the enabled

message segments. To playback, /CE must be set low to enable the device and /RE

must be set high to disable recording & enable playback. You initiate playback by

applying a high to low edge on the message trigger pin that representing the message

segment you intend to playback. Playback will continue until the end of the message

is reached. If a high to low edge occurs on the same message trigger pin during

playback, playback of the current message stops immediately. If a different message

trigger pin pulses during playback, playback of the current message stops immediately

(indicated by one beep) and playback of the new message segment begins. A delay

equal to 8,400 cycles of the sample clock will be encountered before the device starts

playing the new message.

If a message trigger pin is held low, the selected message is played back

repeatedly as long as the trigger pin stays low. A period of silence, of a duration equal

to 8,400 cycles of the sampling clock, will be inserted during looping as an indicator to

the user of the transition between the end and the beginning of the message.

Microprocessor Controlled Message Management

The A P R 9 6 0 0 device incorporates several features designed to help simplify

microprocessor controlled message management. When controlling messages the

microprocessor essentially toggles pins as described in the message management

sections describe previously. The /Busy, /Strobe, and /M7_END pins are included to

simplify handshaking between the microprocessor and the APR9600

The /Busy pin when low indicates to the host processor that the device is busy

and that no commands can be currently accepted. When this pin is high the device is

ready to accept and execute commands from the host.

The /Strobe pin pulses low each time a memory segments is used. Counting

pulses on this pin enables the host processor to accurately determine how much

recording time has been used, and how much recording time remains. The APR9600

has a total of eighty memory segments.


The /M7_END pin is used as an indicator that the device has stopped its current

record or playback operation. During recording a low going pulse indicates that all

memory has been used. During playback a low pulse indicates that the last message has

played.

Signal Storage

The APR 9 6 0 0 samples incoming voice signals and stores the instantaneous

voltage samples in non-volatile FLASH memory cells. Each memory cell can support

voltage ranges from 0 to 256 levels. These 256 discrete voltage levels are the equivalent

of 8-bit (28=256) binary encoded values. During playback the stored signals are

retrieved from memory, smoothed to form a continuous signal, and then amplified

before being fed to an external speaker


RELAY

A relay is an electrically operated switch. Many relays use an electromagnet to

operate a switching mechanism, but other operating principles are also used. Relays

find applications where it is necessary to control a circuit by a low-power signal, or

where several circuits must be controlled by one signal. A type of relay that can handle

the high power required to directly drive an electric motor is called a contactor. Solid-

state relays control power circuits with no moving parts, instead using a semiconductor

device to perform switching. Relays with calibrated operating characteristics and

sometimes multiple operating coils are used to protect electrical circuits from overload

or faults.

Basic design and operation

A simple electromagnetic relay is an adaptation of an electromagnet. It consists

of a coil of wire surrounding a soft iron core, an iron yoke, which provides a low

http://en.wikipedia.org/wiki/Magnetic_core

http://en.wikipedia.org/wiki/Coil

http://en.wikipedia.org/wiki/Electromagnet

http://en.wikipedia.org/wiki/Contactor

http://en.wikipedia.org/wiki/Switch

http://en.wikipedia.org/wiki/Electric


reluctance path for magnetic flux, a movable iron armature, and a set, or sets, of

contacts; two in the relay pictured. The armature is hinged to the yoke and

mechanically linked to a moving contact or contacts. It is held in place by a spring so

that when the relay is de-energized there is an air gap in the magnetic circuit. In this

condition, one of the two sets of contacts and the other set is open. Other relays may

have more or fewer sets of contacts depending on their function. The relay in the

picture also has a wire connecting the armature to the yoke. This ensures continuity of

the circuit between the moving contacts on the armature, and the circuit track on the

printed circuit board (PCB) via the yoke, which is soldered to the PCB.

When an electric current is passed through the coil, the resulting magnetic field

attracts the armature, and the consequent movement of the movable contact or contacts

either makes or breaks a connection with a fixed contact. If the set of contacts was

closed when the relay was de-energized, then the movement opens the contacts and

breaks the connection, and vice versa if the contacts were open. When the current to the

coil is switched off, the armature is returned by a force, approximately half as strong as

the magnetic force, to its relaxed position. Usually this force is provided by a spring,

but gravity is also used commonly in industrial motor starters. Most relays are

http://en.wikipedia.org/wiki/Magnetic_field

http://en.wikipedia.org/wiki/Electric_current

http://en.wikipedia.org/wiki/Printed_circuit_board

http://en.wikipedia.org/wiki/Spring_(device)

http://en.wikipedia.org/wiki/Armature_(electrical_engineering)

http://en.wikipedia.org/wiki/Magnetic_reluctance


manufactured to operate quickly. In a low voltage application, this is to reduce noise. In

a high voltage or high current application, this is to reduce arcing.

When the coil is energized with direct current a diode is often placed across the coil, to

dissipate the energy from the collapsing magnetic field at deactivation, which would

otherwise generate a voltage spike dangerous to circuit components. Some automotive

relays already include a diode inside the relay case. Alternatively a contact protection

network, consisting of a capacitor and resistor in series, may absorb the surge. If the

coil is designed to be energized with alternating current (AC), a small copper ring can

be crimped to the end of the solenoid. This "shading ring" creates a small out-of-phase

current, which increases the minimum pull on the armature during the AC cycle.

By analogy with functions of the original electromagnetic device, a solid-state relay is

made with a thyristor or other solid-state switching device. To achieve electrical

isolation an optocoupler can be used which is a light-emitting diode (LED) coupled

with a photo transistor.

http://en.wikipedia.org/wiki/Photo_transistor

http://en.wikipedia.org/wiki/Light-emitting_diode

http://en.wikipedia.org/wiki/Optocoupler

http://en.wikipedia.org/wiki/Thyristor

http://en.wikipedia.org/wiki/Alternating_current

http://en.wikipedia.org/wiki/Voltage_spike

http://en.wikipedia.org/wiki/Diode

http://en.wikipedia.org/wiki/Direct_current

http://en.wikipedia.org/wiki/Arcing


MAX 232

Since RS232 is not compatible with today’s microprocessors and

microcontrollers we need a line driver to convert the RS232’Ss signals to TTL voltage

levels that will be acceptable to the today’s microprocessor pins. One example of such a

converter is MAX232 from Maxim corporation .

The MAX232 converts from RS232 voltage levels to TTL voltage levels. A

MAX232 chip has long been using in many uC boards. It provides 2-channel RS232C

port and requires external 10uF capacitors.

http://www.maxim-ic.com/quick_view2.cfm?qv_pk=1798


GSM MODEM

GSM (Global system for mobile

communications)is the most popular standard for mobile telephone systems in the

world . The GSM association ,its promoting industry trade organization of mobile

phone carriers and manufactures ,estimates that 80% of the global mobile market uses

the standard. GSM is used by over 3 billion people across more than 212 countries and

territories .Its ubiquity enables international roaming arrangements between mobile

phone operators, providing subscribers the use of their phones in many parts o the

world.GSM differs from its predecessor technologies in that both signaling and speech

channels are digital, and thus GSM is considered a second generation(2G) mobile

phone system. This also facilitates the wide –spread implementation of data

communications applications into the system . Enhanced Data Rates for GSM

Evolution(GSM EDGE) is a 3G version of the protocol.


Antenna connector

Signal LED Power LED


9 pin D Type Female Power DC 9-24V

SIM Interface : 3V

Weight : 250gram

Storage Temperature: -25-+70Degree C

Operating Temperature : 0-55Degree C

Dimensions : 120mm (Width)

: 80 mm (Depth)

:38mm(Height)

DELIVERABLES

Universal AC/DC Adapter

PC Communication Cable

Magnetic Mount GSM Antenna with 2M Cable

WSM PC DEMO SOFTWARE ON A CD

TYPICAL APPLICATIONS

Automatic Meter Reading

GSM pay Phones

Fleet/Traffic Management

Security Systems

Mobile/Fixed Internet Connectivity

Remote Data Logging and Reporting

PRODUCT FEATURES


GSM & GPRS class2;Dual band 900/1800Mhz

Internet,Data,SMS

Remote Control by AT Commands

Maximum output power:2 W for GSM 900 & 1 W for GSM 1800

Real Time Clock

Flashing LED to indicate Network connection

Serial RS232c compatible port for connectivity

GSM antenna with Magnetic Mount and 2 M cable

9-24 VDC Power supply

POWER SUPPLY

The power supply circuit is shown in the figure. We use a regulated power

supply, which gives a stable output of 5volt from the voltage regulator IC 7805. The


entire circuit uses the +5 volt power supply. The pin configuration is shown in the

figure below:

A power supply is a device or system that supplies electrical or

other types of energy to an output load or group of loads.

A simple AC powered linear power supply usually uses a

transformer to convert the voltage from the outlet (mains) to a different, usually a lower

voltage. If it is used to produce DC a rectifier circuit is employed either as a single

chip, an array of diodes sometimes called a diode bridge or Bridge Rectifier, both for

full wave rectification or a single diode yielding a half wave (pulsating) output. More

elaborate configurations rectify the AC voltage at first to pulsating DC. Then a

capacitor smooths out part of the pulses giving a type of DC voltage. The smaller

pulses remaining are known as ripple. Because of a fullwave rectification they occur at

twice the mains frequency (in USA it's 60 Hz doubled to 120 Hz - or the UK, it's 50Hz,

doubled to 100Hz). Finally, depending on the requirements of the load, a linear

regulator may be used to reduce the ripple sometimes also allowing for adjustment of

the output to the desired but lower voltage.

Here the output of the rectifier is filtered by using 220microfared

capacitor. This filtered dc is given to the regulated IC 7805(pin 1 and 2). The output of

the regulator (pin 3 and 2) supplies 5 volt continuously to the entire circuit.

http://en.wikipedia.org/wiki/Linear_regulator

http://en.wikipedia.org/wiki/Linear_regulator


http://en.wikipedia.org/wiki/Rectifier


http://en.wikipedia.org/wiki/Diode_bridge


http://en.wikipedia.org/wiki/Rectifier


http://en.wikipedia.org/wiki/Transformer

http://en.wikipedia.org/wiki/Alternating_current

http://en.wikipedia.org/wiki/External_electric_load

http://en.wikipedia.org/wiki/Energy

http://en.wikipedia.org/wiki/Electrical


CIRCUIT DIAGRAM




COMPONENTS REQUIRED

Microcontroller AT MEGA 8535

Speaker IC APR9600

DTMF decoder CMD 8870

MAX232

Relay

Speaker

GSM modem

Computer

Crystal oscillator

Resistors

Capacitors

LEDs


CIRCUIT DESCRIPTION

The circuit diagram for ‘Result Alert System with E-mail and sms’ is shown in

figure.

A common power supply is used to provide the required 5V to the

microcontroller and other ICs. 230V main supply drives the computer system and GSM

modem.

The functioning of this circuit arrangement begins as soon as the call is

established. The caller who desires to know their exam result will have to call the result

center. At the result center the receiving mobile is configured in auto-answer mode.

Once the call is connected the caller has to press a specific key – 8 in this case. When

the depression of key 8 is registered the microcontroller triggers the speaker IC

APR9600. it contains the stored message that instructs the caller to dial their regioster

number. As the caller dials their register number each keystroke will be decoded by

DTMF decoder producing corresponding BCD numbers. The availability of BCD

output corresponding to the entered register number is indicated by a logic 1 at the STD

pin of DTMF decoder. This enables the microcontroller to read the register number and

send a character corresponding to that to the computer.

The computer operation is under the control of a high level program loaded in

it. The character transmitted by the microcontroller is made available at the serial port

of the computer. The computer reads it and locates the needed register number and the

details associated with it from the database stored in it. This database consist of register

number, name of the candidate, marks obtained in each subject, total marks and the E-

mail Id of the candidate. All these details are forwarded to the mail Id provided for the

register number located. At the same time the total marks is analyzed. If it is found

greater than 50% , the computer signals the microcontroller that the candidate has

passed. This triggers the microcontroller to send a message indicating ‘PASS’ to the

mobile number of the candidate through the GSM modem.

All the communication between the microcontroller-computer and

microcontroller-GSM modem is through MAX232 IC. This interface is needed to make

the signaling levels compatible with each device. Microcontroller AVR 8535


operates on CMOS logic whereas RS232 standard defines the signaling levels of

computer and GSM modem. So the signals transferred between these devices working

on different logic is made compatible by MAX232.

Similarly a relay is provided for communication between microcontroller-

computer and microcontroller-GSM modem. For AVR 8535 only two pins are available

for serial communication- one for transmission and another for reception., enabling

only one device to be connected for two way communication. But here we have to

transmit data from microcontroller to computer and GSM modem at various times. A

two-contact relay is used to overcome this difficulty.

At first computer is connected to the Txd and Rxd pins through relay. After the

computer sends data to microcontroller a logic 1 is produced at pin PD3 connected to

the relay. This closes the transistor circuit of the relay thus powering the solenoid. The

resulting magnetic field due to the emf produced in the solenoid pulls down the contact

of the relay closing the transmission path to the GSM modem. This enables the

communication with two devices effectively.


PCB FABRICATION

Printed circuit boards, or PCBs, form the core of electronic equipment domestic

and industrial. Some of the areas where PCBs are intensively used are computers,

process control, telecommunications and instrumentation.

MANUFATCURING:

The manufacturing process consists of two methods; print and etch, and print,

plate and etch.

The single sided PCBs are usually made using the print and etch method. The

double sided plate through – hole (PTH) boards are made by the print plate and etch

method.

The production of multi layer boards uses both the methods. The inner layers are

printed and etch while the outer layers are produced by print, plate and etch after

pressing the inner layers.

SOFTWARE:

The software used in our project to obtain the schematic layout is MICROSIM.

PANELISATION:

Here the schematic transformed in to the working positive/negative films. The

circuit is repeated conveniently to accommodate economically as many circuits as

possible in a panel, which can be operated in every sequence of subsequent steps in the

PCB process. This is called penalization. For the PTH boards, the next operation is

drilling.


DRILLING:

PCB drilling is a state of the art operation. Very small holes are drilled with high

speed CNC drilling machines, giving a wall finish with less or no smear or epoxy,

required for void free through hole plating.

PLATING:

The heart of the PCB manufacturing process. The holes drilled in the board are

treated both mechanically and chemically before depositing the copper by the electro

less copper platting process.

ETCHING:

Once a multiplayer board is drilled and electro less copper deposited, the image

available in the form of a film is transferred on to the out side by photo printing using a

dry film printing process. The boards are then electrolyticaly plated on to the circuit

pattern with copper and tin. The tin-plated deposit serves an etch resist when copper in

the unwanted area is removed by the conveyorised spray etching machines with

chemical etchants. The etching machines are attached to an automatic dosing

equipment, which analyses and controls etchants concentrations.

SOLDERMASK:

12bath, hot air is blown on both sides of the board through air knives in the

machines, leaving the board soldered and leveled. This is one of the common finishes

given to the boards. Thus the double sided plated through whole printed circuit board is

manufactured and is now ready for the components to be soldered.


PROCEDURE:

The first step in making electronic equipment is PCB manufacturing. PCBs of

some particular circuits are readily available in the market, yet it may not have of out

desired size and shape. We can make the printed circuit board of our desire in our

laboratory. A number of methods are available for making PCB.

The simplest method is drawing the pattern on a copper clad board with enchant

resistant ink or paint. This method is suitable where there is no need for precision and

quantity required in only one or two pieces. But with the use of ICs and crowding of the

components on the board, this method become unsuitable as one have a very steady

hand in drawing the lines of required thickness with paint and brush. Another method is

to make silk screen stencil by a photographic process, paint the pattern on a copper-clad

board, etch and drill the holes.

The fabrication of PCB includes the following steps

i. Preparing the PCB pattern

ii. Transferring the pattern in the PCB

iii. Developing the PCB

iv. Finishing touches.


PCB LAYOUT


COMPONENTS LAYOUT


SOFTWARE SECTION


INTRODUCTION TO EMBEDDED C

Embedded C is a C language extension. Embedded C is designed to bridge

the performance mismatch between Standard C and the embedded hardware and application

architecture.

It aims to provide portability and access to common performance- increasing

features of processors used in the domain of and embedded processing. The Embedded C

specification extends the C language to support freestanding embedded processors in exploiting

the multiple address space functionality, user-defined named address spaces, and direct access

to processor and I/O registers. These features are common for the small, embedded processors

used in most consumer products

The Embedded C specification for fixed-point, named address spaces, and named

registers gives the programmer direct access to features in the target processor, thereby

significantly improving the performance of applications. The hardware I/O extension is

a portability feature of Embedded C. Its goal is to allow easy porting of device-driver

code between systems.

Embedded C Features

The features introduced by Embedded C are fixed-point and saturated arithmetic, segmented

memory spaces, and hardware I/O addressing. The description we present here addresses the

extensions from a language-design perspective, as opposed to the programmer or processor

architecture .Embedded C supports the multiple address spaces found in most embedded

systems. It provides a formal mechanism for C applications to directly access (or map onto)

those individual processor instructions that are designed for optimal memory access

perspective.


AT COMMANDS

AT commands are used for sending sms through GSM modem. Entire functioning of

the GSM modem is controlled by the microcontroller through the AT commands loaded

in it.

Initial setup AT commands

AT commands to setup and check the status of the GSM modem are listed below:

AT Returns a "OK" to confirm that modem is working

AT+CPIN="xxxx" To enter the PIN for your SIM ( if enabled )

AT+CREG? A "0,1" reply confirms your modem is connected to GSM network

AT+CSQ Indicates the signal strength, 31.99 is maximum.

Sending SMS using AT commands

To test whether GSM modem can send SMS before proceeding the AT commands

involved are:..

AT+CMGF=1 To format SMS as a TEXT message

AT+CSCA="+xxxxx" Set your SMS center's number. Check with your provider.

To send a SMS, the AT command to use is AT+CMGS ..

AT+CMGS="+yyyyy" <Enter>


> Your SMS text message here <Ctrl-Z>

The "+yyyyy" is the receipent's mobile number.

FLOWCHART


MICROCONTROLLER PROGRAM


#include <mega8.h>

#include <stdio.h>

#define bcd PINB

#define led PORTD.7

#define relay PORTD.3

#define sound PORTC.5

unsigned int cnt;

unsigned char tdata,temp;

bit flag,flag1,flag2,flag3;

void delay1(unsigned int d)

{ unsigned int b,c;

for(b=0;b<d;b++)

{ for(c=0;c<1000;c++)

{;}

}

}

interrupt [EXT_INT0] void ext_int0_isr(void)

{


tdata=bcd;

tdata=(tdata & 0x0f);

if(tdata==0x08)

{ led=1;

//relay=1;

flag=1;

sound=0;

delay1(200);

sound=1;

}

if(tdata==0x09)

{ led=0;

//relay=0;

}

if(flag==1)

{ if(tdata==0x02) {putchar('A');flag=0;}

if(tdata==0x03) {putchar('B');flag=0;}

}

}

interrupt [TIM0_OVF] void timer0_ovf_isr(void)

{ if(++cnt>2500)

{cnt=0;


flag3=1;

}

}

void cmgf()

{ putchar('A');

putchar('T');

putchar('+');

putchar('C');

putchar('M');

putchar('G');

putchar('F');

putchar('=');

putchar('1');

putchar(13);

delay1(100);

}

void cmgs()

{ putchar('A');

putchar('T');


putchar('+');

putchar('C');

putchar('M');

putchar('G');

putchar('S');

putchar('=');

putchar('"');

putchar('0');

putchar('9');

putchar('7');

putchar('4');

putchar('7');

putchar('6');

putchar('0');

putchar('1');

putchar('0');

putchar('5');

putchar('5');

putchar('"');

putchar(13);

delay1(100);

if(flag1==1)


{putchar('F');

putchar('A');

putchar('I');

putchar('L');

}

if(flag2==1)

{putchar('P');

putchar('A');

putchar('S');

putchar('S');

}

putchar(26);

putchar(13);

delay1(100);

}

void main(void)

{


PORTB=0x00;

DDRB=0x00;

PORTC=0x00;

DDRC=0x00;

DDRC.5=1;

sound=1;

PORTD=0x00;

DDRD=0x00;

DDRD.3=1;

DDRD.7=1;

TCCR0=0x03;

TCNT0=0x00;

TCCR1A=0x00;

TCCR1B=0x00;

TCNT1H=0x00;

TCNT1L=0x00;

ICR1H=0x00;

ICR1L=0x00;

OCR1AH=0x00;


OCR1AL=0x00;

OCR1BH=0x00;

OCR1BL=0x00;

ASSR=0x00;

TCCR2=0x00;

TCNT2=0x00;

OCR2=0x00;

GICR|=0x40;

MCUCR=0x02;

GIFR=0x40;

TIMSK=0x01;

UCSRA=0x00;

UCSRB=0x18;

UCSRC=0x86;

UBRRH=0x00;

UBRRL=0x19;

cmgf();

#asm("sei")


while (1)

{ if(UCSRA & 0x80)

{ temp=getchar();

if(temp=='F') {flag1=1;flag2=0;temp=0x00;}

if(temp=='P') {flag1=0;flag2=1;temp=0x00;}

if(flag1==1 || flag2==1)

{delay1(500);

relay=1;

delay1(500);

cmgs();

delay1(500);

relay=0;

flag1=0;

flag2=0;

flag3=0;

}

}

}

}

INTRODUCTION TO .NET

In this project the functioning of the computer is under the control of a program

in high level language loaded in it. Here we use .NET for this purpose.


WHY .NET ?

The .NET Framework is a new computing platform that simplifies application

development in the highly distributed environment of the Internet. The .NET

Framework is designed to fulfill the following.

To provide consistent object-oriented programming environment whether object

code is stored and executed locally but Internet distributed, or executed remotely, code-

execution environment that minimizes software deployment and versioning conflicts,

that guarantees safe execution of code, including code created by an unknown or semi-

trusted third party, that eliminates the performance problems of scripted or interpreted

environments. The developer experience consistent across widely varying types of

application, and Web- based application, all communication on industry standards to

ensure that code based on the .NET Framework can integrate with any other code.

The .NET Framework has two main components: The Common Language

Run Time and the .NET Framework Class Library. The Common Language Run

Time is the foundation of the .NET Framework. You can think of the Run Time as the

foundation of the .NET Framework and as an agent that manages code at execution

time, providing core services such as memory management, thread management while

also enforcing strict type safety and other forms of code accuracy that ensure security

and robustness. In fact, the concept of code management is a fundamental principle of

the run time. Code that targets the run time is known as

managed code, while code that does not target the run time is known as unmanaged

code. The Class Library, the other main component of the .NET Framework, is a

comprehensive, object-oriented collection of reusable types that you can use to develop

applications ranging from traditional command-line or graphical user interface (GUI)

applications.

C#.NET

C#.NET is the next generation of the Visual Basic language from Microsoft.

With C# you can build .NET applications quickly and easily. Applications made with


C# are built on the services of the common language runtime and take advantage of

the .NET Framework.

C# has many new and improved features such as inheritance,

interfaces, and overloading that make it a powerful object-oriented programming

language. Other new language features include free threading and structured exception

handling. C# fully integrates the .NET Framework and the common language runtime,

which together provide language interoperability, garbage collection, enhanced

security, and improved versioning support. C# supports single inheritance and create

Microsoft intermediate language (MSIL) as input to native code compilers.

C# is comparatively easy to learn and use, and has become the programming

language of choice for hundreds of thousands of developers over the past decade. An

understanding of C# can be leveraged in a variety of ways, such as writing macros in

Visual Studio and providing programmability in applications such as Microsoft Excel,

Access and Word.

DATABASE SERVERS

A database server is used to store data in a database. Users can access the data

and manipulate it. A web application can provide the user with the interface to the

database. There are many types of databases. The most popular among them is the

Relational Database Management System (RDBMS).

RDBMS

RDBMS is a type of database management system that stores data in the form

of related tables. Relational databases are powerful because they require few

assumptions about how data is related or how it will be extracted from the database. As

a result, the same database can be viewed in many different ways.

An important feature of relational systems is that a single database can be

spread across several tables. This differs from flat-file databases, in which each

database is self-contained in a single table.

SQL:

The structured Query Language (SQL) comprises one of the fundamental

building blocks of modern database architecture. SQL is an ANSI (American National


Standards Institute) standards computer language for accessing and manipulating

database systems. SQL statements are used to retrieve and update data in a database.

SQL works with database programs like MS Access, Oracle, DB2, Informix, MS SQL

Server and Sybase etc.

A database most often contains one or more tables. Each tables is identified by a

name (E.g. “Customer” or “Orders”). A table contains record (rows) with data. With

SQL we can query a database and have a result set returned. SQL is the syntax for

executing queries. But the SQL language also includes the syntax to insert and delete

records. These query and update commands together form the Data Manipulation

Language (DML) part of SQL. The Data Definition Language (DDL) part of SQL

permits database tables to be created or detected. We can also define indexes (keys),

specify links between tables and imposes constraints between databases.

ACTIVEX DATA OBJECTS

ActiveX Data Objects (ADO) is a high level interface to provide case of access

to data stored in a wide variety of database sources. ADO can be used with a variety of

programming languages including C#, Visual Basic, VB Script, J Script, Visual C++ and

Visual J++

.NET PROGRAM

Imports System.Data.SqlClientImports System.DataImports System.Net.MailImports System.NetPublic Class form1 Dim usr As String Dim mrk As String


Private Sub Button1_Click(ByVal sender As System.Object, ByVal e As System.EventArgs) Handles Button1.Click

Try SerialPort1.PortName = ComboBox1.Text SerialPort1.Open() MessageBox.Show("Successfuly configured") Catch ex As Exception MessageBox.Show("INVALID PORT NAME Try Again") End Try End Sub

Private Sub SerialPort1_DataReceived(ByVal sender As System.Object, ByVal e As System.IO.Ports.SerialDataReceivedEventArgs) Handles SerialPort1.DataReceived usr = SerialPort1.ReadExisting() Dim con As New SqlConnection("Data Source=.\SQLEXPRESS;AttachDbFilename=D:\result\result\data\data.mdf;Integrated Security=True;Connect Timeout=30;User Instance=True") Dim sql As String = "select * from result where id = '" + usr + "'" Dim ad As New SqlDataAdapter(sql, con) Dim ds As New DataSet ad.Fill(ds) Dim dt As New DataTable dt = ds.Tables(0) Dim dr As DataRow dr = dt.Rows(0) If dr(7) < 150 Then SerialPort1.Write("F") Else SerialPort1.Write("P") End If Dim sql1 As String = "select * from result where id = '" + usr + "'" Dim ad1 As New SqlDataAdapter(sql1, con) Dim ds1 As New DataSet ad.Fill(ds1) Dim dt1 As New DataTable

dt1 = ds1.Tables(0) 'DataGridView1.DataSource = dt Dim dr1 As DataRow dr1 = dt1.Rows(0) Dim mail As New MailMessage("[email protected]", "[email protected]") mail.Body = "Regno: " + dr(1).ToString() + " " + "Name: " + dr(2).ToString() + " " + "English: " + dr(3).ToString() + " " + "Digital Signal Processing: " + dr(4).ToString() + " " + "Programming in C: " + dr(5).ToString() + " " + "Total : " + dr(7).ToString() Dim sm As New SmtpClient()


sm.EnableSsl = True sm.Host = "smtp.gmail.com" sm.Port = 587 Dim net As New NetworkCredential("[email protected]", "akhil725568") sm.Credentials = net mail.IsBodyHtml = True mail.Subject = "Mark " Try

sm.Send(mail) MessageBox.Show("Mail sent successfully") Catch ex As Exception MessageBox.Show("Error..") End Try End Sub

CONCLUSION

Our project entitled ‘Result Alert System with E-mail and sms’ was designed to

provide the registered candidates with their result details when they wish. This result is


provided through E-mail and sms simultaneously. This enables a candidate to get their

exam results from anywhere, at anytime instantly. There is no need to call from their

phone itself. Call can be made from any telephone while the result is obtained at the

registered number. Entire result details can be verified from their mail at ease. Thus

Result alert system is very efficient in obtaining result details.

FUTURE EXPANSIONS

‘Result alert system with E-mail and sms’ can be further modified to accept

multi-digit register numbers. This can be included by improving the microcontroller


program. Provision for including more details in the message sent by the GSM modem

can also be included. We can also enable the message to be sent to the called number.

BIBLIOGRAPHY

www.wikipedia.com

www.howstuffworks.com

www.atmel.com

http://www.atmel.com/


www.dallassemiconductors.com

www.Electrofriend.com

www.Electronicproject.com

Embedded programming in C and Atmel 8535

http://www.Electronicproject.com/

http://www.Electrofriend.com/

http://www.dallassemiconductors.com/


DATASHEETS

Documents

project report