Pulse generation

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2007 Wiley Periodicals, Inc.

PULSE GENERATOR BASED ONCOMMERCIALLY AVAILABLE DIGITALCIRCUITRY

K. C. Chang and C. MiasSchool of Engineering, Warwick University, Coventry, CV4 7AL,United Kingdom

Received 26 October 2006

ABSTRACT: The circuitry of a low cost pulse generator based on acommercially available digital integrated circuit is presented. The cir-cuit produces rectangular pulses of amplitude 0.77 V and width 362 psat half amplitude, and 0.688 V peak-to-peak monocycle pulses with a10 dB bandwidth of 1.2787 GHz (0.1191 to 1.3978 GHz). 2007Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 14221427,2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22425

Key words: ultrawideband; monocycle pulse generator

1. INTRODUCTION

Considerable attention is currently being devoted to time domainresearch due to the varied time-domain reectometry applicationsand the widespread interest in ultrawideband (UWB) communica-tions [14]. Our interest lies in the area of short pulse propagationmethods for material measurements [5, 6]. In particular, we aimtowards the development of low cost short pulse measurementsystems.

The transmitter is a key component of a short pulse measure-ment system and work has been published recently on low costUWB pulse transmitters based on transistors/diodes [79] and onUWB transmitters based on digital circuits [10].

In this article, we report the development of a low cost short-pulse transmitter. Our proposed pulse transmitter is based on acommercially available digital integrated circuit (IC) employed fordata communications. We show the circuit design that producesrectangular pulses and the delay line circuit employed to trans-form the rectangular pulse into a monocycle pulse. The transientshape and frequency spectrum of both pulses is presented. Al-though it might seem odd to use a commercial transceiver IC as apulse generator, the work highlights the fact that commercial chipsdo exist that with some modications can be readily used in otherapplications.

2. PULSE GENERATOR DESIGN

The pulse generator circuit presented here takes advantage of thecommercially available high speed digital Texas Instruments IC

TLK2521. The TLK2521 is a transceiver, intended for use inhigh-speed bidirectional point-to-point data transmission systems.It performs parallel-to-serial, serial-to-parallel data conversion,and clock extraction functions for a physical layer interface device.It supports an effective serial interface speed of 2.5 Gbits persecond.

Figure 1 shows the functional block diagram of the pulsegenerator [11]. Its detailed circuit design is shown in Figure 2. TheMulticomp MCDM(R)-10-T DIP switches S1 and S2 control thepresence or absence of pulses in the output stream. The switchesare operated manually. However, a low-cost Field ProgrammableGate Array (FPGA) digital interface can be employed instead. A125 MHz Saronix S1903C-125.00 oscillator is used to clock theparallel data into the TLK2521. It also feeds the internal PhaseLock Loop (PLL) of the TLK2521, which produces an oscillatingsignal of frequency 20 125 MHz necessary for the parallel-to-serial conversion. An external power 4 V power supply feeds the125 MHz oscillator and the STMicroelectronics LD1117D25C 2.5V voltage regulator. This low drop regulator supplies theTLK2521. The regulators maximum output current is 800 mA,double the maximum current requirement for the TLK2521 chip.

During the parallel-to-serial operation of the TLK2521, 18 bitsof parallel input data are framed with two additional bits; a start bitalways at high logic and a stop bit always at low logic. The bitsare clocked at a frequency of 125 MHz. The output serial streamis subsequently transmitted at a rate of 2.5 Gbits per second. If theoutput binary digits are set through TXD0 to TXD17 (see Fig. 2)to alternate logic, i.e., high followed by low, one may obtain anoutput oscillating signal of frequency 1.25 GHz. If all the binarydigits are set to low then a single pulse is achieved, the start bit.The pulse width can increase by setting to logic high bits adja-cent to the start bit. By setting each adjacent bit to logic high thepulse width increases by 400 ps assuming an 125 MHz externaloscillator. The parallel input data (TXD0 to TXD17) are set by theDIP switches with 1 k pull-up resistor and 100 nF capacitor ateach pin (see Fig. 2). The 100 nF capacitor helps to stabilize thevoltage at the input pin of the TLK2521 by coupling ac signals tothe ground.

The circuit design allows a differential output as shown inFigure 1 or a single-ended output by terminating one of theoutputs, DOUTTXP (pin 60) or DOUTTXN (pin 59) with a 50 termination resistor.

Figure 1 The functional block diagram of the proposed TLK2521 pulsegenerator setup. In addition to the pulse generator the setup includes theexternal power supply, the sampling oscilloscope and the attenuators

1422 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 49, No. 6, June 2007 DOI 10.1002/mop

The TLK2521 chip requires a 2.5 V positive voltage supply andit provides a Positive Emitter Coupled Logic (PECL) output witha differential voltage swing of 1.5 V. The on chip PREEMPH pin(see Fig. 2) provides pre-emphasis of the start bit for stronger pulseoutput. The receiving part of the chip was not used. Thus, pinsDINRXP and DINRXN (see Fig. 2) were set to low to reducepotential noise. Pins RD0 to RD17 were left open to reduce thenumber of on-board resistors.

In Figure 2 the TKL2521 pins were divided into three groups:Transmit (U1A), Receive (U1B), and the third group (U1C). Onlythe TX group (U1A) was used in this work.

As the TLK2521 chip contains both Low Voltage Transistor-Transistor Logic (LVTTL) and PECL, care must be taken in thecircuit design (see Fig. 3) to avoid interference. LVTTL currentsmay generate noise that can potentially interfere with PECL sig-nals when the two types of signals share a common ground. The

125 MHz oscillator may also be a potential source of interferenceto the PECL signals. Thus, as a precaution, signal and groundplanes were divided into the analogue PECL section and thedigital LVTTL sections. The analogue and digital sections areconnected together by Meggitt Sigma BMB2A0120AN4 ferritebeads L2, L3 and L4 [Figs. 2 and 3(b)]. The ferrite bead allows dcconnection but appears as high impedance for high frequencysignals.

A low-cost double-sided FR4 printed circuit board is used toconstruct the circuit. The upper metalisation layer [Figs. 3(a) and4(a)] contains the majority of the signal tracks and the lowermetalisation layer is the ground plane [Figs. 3(b) and 4(b)]. Thelatter is divided [Fig. 3(b)] into the digital ground (DGND) andthe analogue ground (AGND) sections. Signal routing on thelower layer was kept to a minimum to avoid the presence ofground slots that break the continuity of the ground plane. The

Figure 2 Detailed circuit design of the pulse generator

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 49, No. 6, June 2007 1423

ground slots force the return current to detour, creating unwantedinductance that may lead to serious ringing and cross-talk prob-lems in the circuit.

In our two-layer PCB design, the 2.5 V voltage is distributed bymicrostrip lines to the DIP switches and the TLK2521 chip. IfFPGA switches are employed the switching operation may possi-bly draw substantial current for short durations of time, thus shuntcapacitors of 100 nF and 10 F were placed along the 2.5 V

supply lines to prevent temporal changes in the supplied voltagelevel. These capacitors are placed close to component voltagesupply pins.

Leadless surface mount devices (SMD) are employed to avoidlead inductance. The GTX CLK pin (see Fig. 2) of the TLK2521chip is clocked by an on board SMD oscillator of 125 MHz. Theoscillator requires a minimum supply voltage of 3.3 V. This isobtained from the external power supply via an RLC lter (L1,R24, C23) for jitter reduction. The ENABLE (EN) pin of theoscillator is connected to the power supply via the R26 resistor andto the ground via a coupling capacitor for noise reduction.

The SMA connector P3 (Figs 2 and 3) provides the externaltrigger to the sampling oscilloscope.

3. PULSE GENERATOR MEASUREMENTS

Both the ultrawideband (UWB) pulse and trigger signal from ourgenerator are fed to the sampling oscilloscope (Agilent InniumDCA-J 86100C) using 1 m low-cost exible coaxial SMA cables.As the maximum input voltage level at the sampling oscilloscopessignal and trigger ports is 2 V peak-to-peak (p-p), attenuators wereused to prevent the risk of oscilloscope damage. A 6 dB attenuatorwas used at the trigger port. The pulse amplitudes are shown inFigure 5. A 3 dB attenuator is used at the oscilloscopes signal

Figure 4 Photographs of the upper (a) and lower (b) metalisation layersof the pulse generator. [Color gure can be viewed in the online issue,which is available at www.interscience.wiley.com]

Figure 3 The pulse generators upper (a) and lower (b) metalisationlayers. U1, TLK2521 transceiver; U2, 125MHz Oscillator; U3,LD1117D25C voltage regulator. [Color gure can be viewed in the onlineissue, which is available at www.interscience.wiley.com]


port. The measured amplitude of the pulse, in Figure 5(a), is 545mV p-p. Hence, the actual voltage level is 545 (2)1/2 mV p-p.The rise and fall times of the pulse, as recorded by the oscillo-scope, are 152 and 218 ps, respectively. The Fourier Seriesspectrum of the periodic pulse of Figure 5(a) is shown in Figure 6.The rst sidelobe attenuation is at about 21.1 dB. The minimumat 0 Hz is due to the negative base voltage, which is approximately0.017 V. The spectral components are computed using the stan-dard formula,

Am 1T0

0

T0

at ejm0t dt (1)

where, 0 2/T0 and T0 8 ns. For each spectral component,the square of its absolute value ( Am 2) is normalized by the squarevalue of the maximum absolute spectral component amplitudemax[ Am ]. The ratio is plotted in Figure 6. The integral wasevaluated using the trapezoidal rule.

Figure 5 also demonstrates the exibility of the developedpulse generator. With different settings of the DIP switches, dif-

Figure 5 Rectangular pulse output waveforms for different DIP switch settings (the start and stop bits are also included): (a) 10000000000000000000,(b) 10101010101010101010, (c) 11001100110011001100, (d) 10110011011111100100

Figure 6 The spectrum of the rectangular pulse in Figure 5(a). The10 dB point corresponds to 1.623 GHz (approximately)


ferent output waveforms can be obtained. In Figure 5(a), all DIPswitch values are set to low and hence the waveform shows arepetition of the start pulse at 125 MHz. Figures 5(b) and 5(c)show the change in the output waveform when a single and a dualbit alternate, i.e., for waveforms 10101010101010101010 and11001100110011001100, respectively. In Figure 5(d) the modu-lated pattern 10110011011111100100 is shown.

4. PULSE DELAY CIRCUIT AND MONOCYCLE PULSEGENERATOR RESULTS

The pulse generator can be easily congured to have two SMAoutput signals that are of opposite polarity (see Fig. 7). If thenegative polarity signal is delayed relative to the positive polaritysignal and subsequently both signals are combined then a mono-cycle pulse can be generated. To achieve this, the pulse delaycircuit in Figure 8 was fabricated. The microstrip lines of the delaycircuit have a 50 characteristic impedance. The delay circuit wasdesigned [11] to provide the following delay line options: 100,200, 400, and 800 ps. Thus, with different combinations ofjumper settings, a delay from 100 to 1500 ps in steps of 100 pscan be achieved. A double-sided low-cost FR4 PCB was used tofabricate the pulse delay circuit. Its conguration was chosen toallow us to establish quickly, through trial and error, a suitabledelay time. A delay time of 500 ps was found to be necessary togenerate the monocycle pulse. The pulse is shown in Figure 9. Themonocycle possesses an equal amplitude for the positive andnegative cycles. The spectrum of the pulse is shown in Figure 10.

Approximately, the 10 dB bandwidth is 1.2787 GHz and thecentral frequency is 0.7584 GHz.

5. CONCLUSION

A detailed circuit description of a pulse/monocycle pulse generatoris presented. Experimental results are shown demonstrating rect-angular pulses of amplitude 0.77 V and width 362 ps at halfamplitude. The monocycle pulse has an amplitude of 0.688 V p-p.It has a 10 dB bandwidth of 1.2787 GHz with central frequencyat fc 0.7584 GHz. It is an UWB pulse of fractional bandwidth B/fc greater than 0.2. The proposed circuit offers the exibilityto increase the pulse duration.

The circuit can be improved further to avoid the ringing trail ofthe monocycle pulse. It can also be made more compact. Inaddition, a multi-layer board can be used. The latter will allow ICsof higher speeds to be employed to generate even shorter pulses. Itwill also lead to a reduction of the existing cross-talk. Suchimprovements will be the subject of future work.

Figure 7 The monocycle pulse generator. [Color gure can be viewed inthe online issue, which is available at www.interscience.wiley.com]

Figure 8 The microstrip pulse delay circuit. [Color gure can be viewedin the online issue, which is available at www.interscience.wiley.com]

Figure 9 Monocycle pulse waveform. DIP switch: 10000000000000000000

Figure 10 The spectrum of the monocycle pulse (one period); f1 0.1191 GHz and f2 1.3978 GHz


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2007 Wiley Periodicals, Inc.

EQUIVALENT CIRCUIT MODEL OF ATRI-RESONANCE WIDEBANDDIELECTRIC RESONATOR ANTENNA

Yu-Feng Ruan,1 Yong-Xin Guo,2 and Xiang-Quan Shi11 Nanjing University of Science and Technology, 200 Xiao Lingwei,Nanjing, Jiangsu 210094, Peoples Republic of China2 Institute for Infocomm Research, 20 Science Park Road, No. 0221/25, TeleTech Park, Science Park II, Singapore 117674

Received 27 October 2006

ABSTRACT: An equivalent circuit model of a tri-resonance widebanddielectric resonator antenna is presented to give a physical insight intothe wideband behavior of the antenna. The well-known LevenbergMar-quardt algorithm is employed to improve the convergence characteris-tics of the curve tting method used for nding the complex equivalentcircuit model values having three resonators. The equivalent circuitmodels with various combinations of the antenna parameters such asdielectric constant, probe length, excitation position, and air-gap areprovided to verify that the proposed equivalent circuit model can give agood description of the antenna wideband behavior. 2007 Wiley Peri-odicals, Inc. Microwave Opt Technol Lett 49: 14271433, 2007;Published online in Wiley InterScience (www.interscience.wiley.com).DOI 10.1002/mop.22470

Key words: wideband antennas; dielectric resonator; equivalent circuit;curve tting; LevenbergMarquardt algorithm

1. INTRODUCTION

Since a dielectric resonator (DR) was introduced as an antenna byLong et al. [1], dielectric resonator antennas (DRAs) have receivedmuch attention [25]. DRAs share many of the advantages of themicrostrip antennas, such as small size, low prole, and light

Figure 1 The structure of stacked disc-ring dielectric resonator antenna

Figure 2 Equivalent circuit model of tri-resonance wideband dielectricresonator antenna

Figure 3 Return losses with r2 6, r3 3, r1 4.3 mm, r22 mm,r3 7 mm, h1 2.5 mm, h2 4.7 mm, f 3 mm, lw 4.5 mm, g2 0, and g1 g3 0.1 mm


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Pulse generation