Purpose• This course discusses techniques for analyzing and eliminating

noise in microcontroller (MCU) and microprocessor (MPU) based embedded systems.

Objectives• Learn about how packaging affects efforts to reduce EMI.

• Understand the necessity for carefully designed decoupling capacitors, such as three-pin teed-through types.

• Find out how to evaluate EMI countermeasures.

• Discover the best way to implement EMI reduction techniques.

Content• 15 pages

Learning Time30 minutes

Course Introduction

Reducing EMI

EMI reduction is a goal shared by both the semiconductor experts who design MPUs and other LSI devices and by the engineers who apply those chips in embedded systems

ECU Electronic Control Unit

EMI Electromagnetic Interference

Explanation of Terms

A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU, ROM, RAM, and blocks implementing timers, communication, and analog functions.

Power supply

Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL (internal step-down). The Vss-based power supply routed through the LSI is VSL.

Harness Cables (wires) connecting a board and power supply or connecting one unit in a system to another

Balun

LISN

TEM Cell

WBFC

Core

A room designed to block radiation from the outside and to minimize reflections off the room’s walls, ceiling, and floor

A passive electronic device that converts between balanced and unbalanced electrical signals

CISPR 25 International Special Committee on Radio Interference (CISPR) publication 25: “Limits and methods of measuring radio disturbance characteristics for the protection of receivers on board vehicles.” CISPR is a sub-committee of the International Electrotechnical Commission (IEC).

Line Impedance Stabilization Network

Transverse Electromagnetic Cell

Workbench Faraday Cage

Anechoicchamber

Page 2Delete the thin line

through the illustration

• Design goal for EMI reduction: Increase current supply from decoupling capacitor (Cdc, loop B) and decrease current from main power supply (loop A) as much as possible

- Current ratio A/B is determined by the impedance ratio: • If possible, this ratio should be <1/100 (-40dB)

Two methods for reducing EMI:

• Increase loop-A impedance by inserting ferrite bead in loop

• Decrease impedance of loop by decreasing its inductance - Make the loop area as small as possible to minimize its inductance

- Use feed-through capacitors because they have intrinsic impedances less than 1/10th those of conventional SMD ceramic capacitors

Supply Decoupling Basics

Loop B

Loop A

Chip

Module

Package

CPG

Measuring point

A C

B

C = A + B

loo

p A

loo

p B

Ferritebead(L1)

Decoupling capacitor (Cdc)

1313: 240 pins 1111: 256 pins2727: 256 pins2828: 208pins

QFPBGA

TypicalDie size

WLP

FBGA(Fine-pitch BGA)

CSP28 mm

(256 pins/0.4 mm)

BGAs and CSPs Save Board Space

Smaller chip packages allow products to become more compact and convenient, but complicate design efforts to place decoupling capacitors where they will be most effective for reducing EMI

27mm

BGA

Decoupling Capacitors for BGAs

Top of circuit board for mounting a BGA Bottom side showing placement of bypass caps

Finding sufficient mounting space can be a problem!

VCPU

Low-ESL Bypass Capacitors

Multi-pin IDC-type capacitor achieves

low supply impedance

Three-pin SMD feed-through capacitors provide very good connections- No extra paths, so 100% of supply current is fed through

3-pin feed-through capacitor* Design alternative:IDC-type capacitor

achieves low supply impedance

*Source: Murata Manufacturing

Page 6Problems with Narration

Current measurement points (Vcc, PVcc, Vss)

Pads for inductors (ferrite beads)

Typical decoupling capacitor

Evaluation of Supply Decoupling

Area under deviceshowing pads for

decoupling capacitors

Powersupply

connections

Top of evaluation board Bottom of evaluation board

Page 7Slide Changed

(Text moved to left, away from top photo.)

Evaluation Example

* MPU: SH7055R Frequency: 80MHz

Near-field tests* using the evaluation board allow comparisons of levels of RF current in the power supply lines

12 bypass capacitors added Ferrite bead + 12 capsNo filter components

Near-field Tests

MPU: SH7055R (40MHz)

Capacitor Tests with 256-pin QFP

Twelve 3-pin capacitors (0.1µF each)

VDE measurement point

NFM21Caps (for Vcc)Caps (for PVcc, AVcc)

256-pin QFP

Macro (sensitive) probe @80MHz

-20dB

One 3-pin capacitor (NFM21: 1µF)

-10

0

10

20

30

40

50

60

70

80

0 100 200 300 400 500 600 700 800 900 1000

w/o DeCaps

12 DeCaps

NFM21

VDE Measurements

Frequency (MHz)

No

ise

(dB

µV

)

All Decoupling caps :on bottom side

NFM21Caps (for Vcc)Caps (for PVcc, AVcc)

Capacitor Tests with 256-pin BGA

256-pin BGA

MPU: SH7055R (40MHz)

Macro (sensitive) probe @80MHz

Near-field TestsEight 2-pin capacitors (0.1µF each)

-10

0

10

20

30

40

50

60

70

80

0 100 200 300 400 500 600 700 800 900 1000

w/o DeCaps

8 DeCaps(T)

NFM21

VDE Measurements

Frequency (MHz)

No

ise

(dB

µV

)

-20dB

One 3-pin capacitor (NFM21: 1µF)

Near-field tests reveal EMI problem distant from MPU- Magnitude of noise near output connector of ECU-B is 20dB higher than that of ECU-A

MPU

MPU

Scan for EMI at All Locations

ECU-A: Good EMI performance ECU-B: Excess Leakage

ECU package

Page 11Problem with slide — Dotted lines in scans have been replaced with

solid lines and moved. Please correct.

Data Shows Progress — and Problem

Noise reduction efforts were successful for both ECUs, yet insufficient for ECU-B - Target level was exceeded by ECU-B’s design

x Without caps

With caps

With caps+FB

ECU-A

ECU-B

60

40

20

No

ise

Cu

rren

t (d

Bµ

V)

0

Target Level

Test data showing decoupling effectson basic boards

Test data showing degradation on

ECU-B

Frequency (MHz)

パスコン + インダクタ

- Test data when decoupling capacitors and ferrite bead

were used

No

ise

Cu

rre

nt

(dB

µV

)

- Test data when decoupling capacitors were used

No

ise

Cu

rre

nt

(dB

µV

)

Page 12Problem with slide — Text in the two data traces is missing, and

“Frequency (MHz) “ is obscured.

Effects of Adding Components

0

10

20

30

40

50

60

70

0 2 4 6 8 10 12 14 16 18 20

Number of Decoupling Capacitors

No

ise

Cu

rren

t (d

Bµ

V) Capacitors added

Capacitors + Ferrite bead

f = 80MHz

-20dB

Target level

Using a ferrite bead and multiple decoupling

capacitors is an effective way to reduce EMI

Vcc

GND

Capacitor

I/Ocurrent

Core current

Ferrite

bead

Decouplingcapacitors

Power plane

Ground plane (no slit)

Slit(moat)

Page 13Problem with slide —

Block diagram (bottom right) is broken up and moved down.

Countermeasure ImplementationIt’s best to follow a step-by-step EMI reduction procedure: Find the most important noise contributor and eliminate/reduce that problem; then repeat the process until design goal is met

Reducing noise from unimportant element has no effect

Reducing noise from important element drops overall level by 3dB

60

50

40

30

-10dB

EM

I lev

el (

dB)

Effect:-3dB

Before counter-measure

After counter-measure

Noise element BResulting noise level

Noise element A

60

50

40

30

-10dB

EM

I lev

el (

dB)

Effect:0dB

Before counter-measure

After counter-measure

Noise element 2

Noise element 1 Resulting noise level

Page 14Problem with slide —

Vertical arrows should be dotted, not solid.

• How packaging affects EMI reduction

• Three-pin SMD feed-through capacitors

• Evaluating EMI countermeasures

• Iterative method for countermeasure implementation

Course Summary

For more information on specific devices and related support products and material, please visit our Web site:

http://america.renesas.com

Page 15Problem with slide — Text in the yellow block should be contained

within the box, as shown here.