6
PWM Block Method for Control of Ultracapacitor Based Bidirectional DC/DC Backup System K.Saichand, Student member, IEEE and Vinod John, Senior member, IEEE Department of Electrical Engineering Indian Institute of Science, Bengaluru Abstract—This paper presents the design of a DC/DC power supply which provides energy backup to critical loads in case of momentary power main failures. This paper proposes a switch control of bidirectional converter based on PWM block method. PWM block method ensures smooth, seam less transition between charging and discharging operating modes using ultracapacitor stack as the energy source. The paper also proposes a accurate method for identification of the operating modes which is key to the switch control. The advantages of switch control using PWM block method when compared to unified control strategy which employs same control structure for charging and discharging in bidirectional converter is presented. The proposed control strategy has been verified in simulations and experimentation and the mode identification algorithm proposed here is found to be work well. Index Terms—Bidirectional converter, Unified control strategy, Switch control strategy, Mode identification, Ultracapacitors, PWM block method. I. I NTRODUCTION Ultracapacitor based bidirectional DC/DC converters find applications in hybrid electric vehicles, traction and in micro- grids for energy backup provision. The control of such a bidirectional converter considered in Fig. 1 can be broadly classified into 1) Switch control method and 2) Unified con- trol strategies. While the unified control strategy involves a common control structure for both charging and discharging modes, the switch control as the name indicates, involves different control structures for both the switches. Unified control strategy is quite popular and is useful for current control based applications [1]- [2] and uses the fact that the current loop dynamics of buck and boost converters are similar [3]. Considering the system from ride through point of view, the charging and discharging time of the UC stack is quite critical. Since ultracapacitors can withstand high bursts of power and DC/DC converter interface is usually over rated, Constant Voltage (CV) control ensures lesser charging time as compared to Constant Current (CC) control [4]. Hence usage of voltage control in charging of UC stack is more advantageous for ride through applications. But when both the charging and discharging control involves outer voltage and inner current control loops each, unified control strategy becomes less This work was supported by the DST IRHPA, India, under project “Fa- cility for design, development and demonstration of advanced batteries and ultracapacitors”. advantageous. This is because, due to the presence of different outer voltage loops, the control structures of charging and discharging are no longer similar. UC stack + _ Critical Load Two port network Fig. 1. Ultracapacitor based energy backup system considered. In [5] a method for switch control of a bidirectional con- verter as suggested. However, due to the use of fixed transition times, seamless transition is not achieved. This paper addresses the problem mentioned above by providing a novel mode identification algorithm which identifies the control modes accurately and uses PWM block method to ensure a smooth, seam-less transition between the two control modes. This paper also focuses on controller design rules for UC based boost topologies with Right Hand Zero (RHZ) problem. Although, references such as [6], [7] and [8] emphasizes RHZ elimination by modifying circuit parameters, using sliding mode control, leading edge modulation or modifying the circuit topology, the practical implementation of the same is quite difficult, makes the control schemes susceptible to noise, reduces system efficiency or modifies the topology as a whole. This paper provides the design rules which addresses the RHZ problem and at the same time ensures best dynamic performance criteria possible. II. POWER CIRCUIT AND CONTROLLER DESIGN The bidirectional DC/DC converter used for providing the energy backup to a critical load is as shown in Fig. 1. The converter acts as a buck converter during the charging of the UC stack and as a boost converter during the discharging mode. This paper focuses on a ultracapacitor based DC/DC converter which would provide energy backup to a critical load rated at 80W . The energy backup system consists of a ultracapacitor (UC) stack which is interfaced with the 24V dc supply through a bidirectional DC/DC converter as shown in Fig. 1. The power converter design and UC stack sizing is done so as to handle the power requirements of a critical load

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PWM Block Method for Control of UltracapacitorBased Bidirectional DC/DC Backup System

K.Saichand, Student member, IEEE and Vinod John, Senior member, IEEEDepartment of Electrical EngineeringIndian Institute of Science, Bengaluru

Abstract—This paper presents the design of a DC/DC powersupply which provides energy backup to critical loads in case ofmomentary power main failures. This paper proposes a switchcontrol of bidirectional converter based on PWM block method.PWM block method ensures smooth, seam less transition betweencharging and discharging operating modes using ultracapacitorstack as the energy source. The paper also proposes a accuratemethod for identification of the operating modes which is key tothe switch control. The advantages of switch control using PWMblock method when compared to unified control strategy whichemploys same control structure for charging and dischargingin bidirectional converter is presented. The proposed controlstrategy has been verified in simulations and experimentationand the mode identification algorithm proposed here is found tobe work well.

Index Terms—Bidirectional converter, Unified control strategy,Switch control strategy, Mode identification, Ultracapacitors,PWM block method.

I. INTRODUCTION

Ultracapacitor based bidirectional DC/DC converters findapplications in hybrid electric vehicles, traction and in micro-grids for energy backup provision. The control of such abidirectional converter considered in Fig. 1 can be broadlyclassified into 1) Switch control method and 2) Unified con-trol strategies. While the unified control strategy involves acommon control structure for both charging and dischargingmodes, the switch control as the name indicates, involvesdifferent control structures for both the switches. Unifiedcontrol strategy is quite popular and is useful for currentcontrol based applications [1]- [2] and uses the fact that thecurrent loop dynamics of buck and boost converters are similar[3].

Considering the system from ride through point of view, thecharging and discharging time of the UC stack is quite critical.Since ultracapacitors can withstand high bursts of power andDC/DC converter interface is usually over rated, ConstantVoltage (CV) control ensures lesser charging time as comparedto Constant Current (CC) control [4]. Hence usage of voltagecontrol in charging of UC stack is more advantageous forride through applications. But when both the charging anddischarging control involves outer voltage and inner currentcontrol loops each, unified control strategy becomes less

This work was supported by the DST IRHPA, India, under project “Fa-cility for design, development and demonstration of advanced batteries andultracapacitors”.

advantageous. This is because, due to the presence of differentouter voltage loops, the control structures of charging anddischarging are no longer similar.

UC

sta

ck

+

_ Critical Load

Two port network

Fig. 1. Ultracapacitor based energy backup system considered.

In [5] a method for switch control of a bidirectional con-verter as suggested. However, due to the use of fixed transitiontimes, seamless transition is not achieved. This paper addressesthe problem mentioned above by providing a novel modeidentification algorithm which identifies the control modesaccurately and uses PWM block method to ensure a smooth,seam-less transition between the two control modes.

This paper also focuses on controller design rules for UCbased boost topologies with Right Hand Zero (RHZ) problem.Although, references such as [6], [7] and [8] emphasizes RHZelimination by modifying circuit parameters, using slidingmode control, leading edge modulation or modifying thecircuit topology, the practical implementation of the sameis quite difficult, makes the control schemes susceptible tonoise, reduces system efficiency or modifies the topology as awhole. This paper provides the design rules which addressesthe RHZ problem and at the same time ensures best dynamicperformance criteria possible.

II. POWER CIRCUIT AND CONTROLLER DESIGN

The bidirectional DC/DC converter used for providing theenergy backup to a critical load is as shown in Fig. 1. Theconverter acts as a buck converter during the charging of theUC stack and as a boost converter during the dischargingmode. This paper focuses on a ultracapacitor based DC/DCconverter which would provide energy backup to a criticalload rated at 80W . The energy backup system consists of aultracapacitor (UC) stack which is interfaced with the 24Vdcsupply through a bidirectional DC/DC converter as shown inFig. 1. The power converter design and UC stack sizing isdone so as to handle the power requirements of a critical load

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during a momentary power main failure for a period of 10seconds.

A. Power circuit design details

The ultracapacitor (UC) stack used for back-up is rated for125W. The ultracapacitor (UC) stack consists of 12 MaxwellBCAP0150 capacitors each of capacitance 150F. The overallcapacitance of the UC stack, C2 is 12.5F and the RESR ismeasured to be as 0.1Ω. The bidirectional converter used asan interface is rated at 240W switching at 100kHz.

B. Closed loop control design

The closed loop controller design of the bidirectional con-verter can be categorized as control design for charging oper-ation and discharging operation. The overall control structurefor the bidirectional operation is as shown in Fig. 2. It shouldbe noted that although the control structures for both chargingand discharging control looks very similar, the charging con-trol’s outer voltage loop regulates ultracapacitor stack’s voltageVuc where as discharging control’s outer voltage loop regulatesoutput voltage V0 at 24V .

Inner current loop

(b)

Inner current loop

(a)

Fig. 2. Control block diagram for (a) Charging mode, and (b) Dischargingmode.

1) Controller design for charging mode of operation: Theplant and controller transfer function of inner current loop andouter voltage loop is as shown in (1) and (2) respectively. Itshould be noted that the resonant frequency corresponding toUC stack as load has better damping as compared to regularbuck converter with R-load. The bandwidth of the currentand voltage loops are 10kHz and 1kHz respectively. Thebode plots for inner current loop plant transfer function withand without controller transfer functions is shown in Fig. 3.

iL(s)

d(s)=

sVgC2

LC2s2 +RESRC2s+ 1, Hic(s) =

1(1 + s/1000)

s/1000(1)

Vuc(s)

iL(s)=

1

C2s, Hvc(s) = 12500 (2)

-50

0

50

100

150

Mag

nitu

de (d

B)

10-2

100

102

104

-135

-90

-45

0

45

90

Pha

se (d

eg)

Frequency (Hz)

Open loop t/fOpen loop t/f+controller

Fig. 3. Bode plot of inner current loop control for charging mode operation.

2) Controller design for discharging mode of operation:The inner current loop design of boost mode is similar tobuck mode control around gain cross over frequency withthe only difference that the boost mode controller design isperformed for various UC voltage and load conditions. Thecorresponding control bandwidth of the inner current loop ischosen to be around 10kHz. The plant and controller transferfunctions of inner current loop is derived as (3) and (4). Thebode plots for inner current loop plant transfer function withand without controller transfer functions based on which thecontroller design is performed is as shown in Fig. 4.

-20

0

20

40

60

80

100

Mag

nit

ud

e (d

B)

100

101

102

103

104

105

-180

-135

-90

-45

0

45

90

Ph

ase

(deg

)

Frequency (Hz)

Open loop t/fOpen loop t/f +controller

Fig. 4. Bode plots of inner current loop control for discharging modeoperation.

iL(s)

d(s)=

VucRL(1 −Ds)3

2 + sCfRL

1 + sLRL(1−Ds)2

+s2LCf

(1−Ds)2

(3)

Hid(s) =1(1 + s/1000)

s/1000(4)

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On the other hand, the outer voltage loop control has adifferent plant structure as compared to charging mode controlstructure. The desired bandwidth of the voltage loop is chosento be 1kHz. The plant transfer function of outer voltage loopis as shown in (5).

Vo(s)

iL(s)=RL(1 −Ds)(1 − sL

RL(1−Ds)2)

2 + sCfRL=RLVuc(1 − sLV 2

o

RLV 2uc

)

2Vo(1 +sCfRL

2 )(5)

It can be seen from (5) that the Right Hand Zero (RHZ)whose location varies with variation of RL and Vuc can affectthe stability and desired bandwidth. The location of RHZ forvariation in RL and Vuc is tabulated in Table. I. It can be seenfrom Table. I that the RHZ lies within the desired bandwidthof 1kHz for low Vuc and high load conditions.

TABLE IVARIATION OF RHZ IN HZ WITH THE VARIATION IN Vuc AND RL

Vuc (V) Power in RL

40W 80W 160W14 2600 1300 65019 4788 2394 119723 7016 3508 1754

Hence, analytic design of controllers for boost based topolo-gies affected by RHZ problem is presented in this paper. Basedon (5), the following simplifications are considered:

VucRL

2Vo= G,

RLV2uc

LV 2o

= a,2

RLCf= b (6)

Using (6), (5) is further simplified which is shown in (7),where Go(s) is the overall open loop transfer function andC(s) is the controller transfer function to be designed.

Go(s) = C(s)Vo(s)

iref (s)=sKp +Ki

sG

1 − sa

1 + sb

(7)

Based on the open-loop transfer function, Go(s) provided in(7), the closed loop transfer function, Gc(s) for a unity feedback system is obtained as shown in (8).

Gc(s) =Go(s)

1 +Go(s)=

G(1 − sa )(Ki + sKp)

s2( 1b − GKp

a ) + s(GKp − GKi

a ) +GKi

(8)For the solutions of (8) to be real, the necessary conditionsrequired are as follows:

1

b− GKp

a> 0 & GKp −

GKi

a> 0 (9)

The two limiting conditions given in (9) not only provide theboundary values of Kp and Ki but also gives the stabilitycriteria for the overall control structure. (9) can be re-arrangedas shown below:

Kp <VucRLCf

LVo,Ki <

R2LV

3ucCf

L2V 3o

(10)

Since, 3Ω<RL<15Ω, 13V <Vuc<24V , the worst case oper-ating conditions of RL=3Ω and Vuc=13V is considered for

design which gives, Kp<10.833, Ki<31785. For performancecriteria, since the overall transfer function Gc(s) is only ofthe second order, ξ=1 is chosen such that the system wouldbe critically damped. For such a damping criteria and for agiven value of Kp, Ki can be obtained using (11).

Ki =G2(Kp − Ki

a )2

4( 1b − GKp

a )G(11)

From (10), in order to have best dynamic performance, Kp

chosen is 10.5. For this value of Kp, the set of solutions to(11) is given as

Ki = (2a2

Gb− aKp) ± 2a

√(a2

G2b2− Kpa

Gb) (12)

Among these set of solutions, values corresponding to

Ki=( 2a2

Gb −aKp)+ 2a√

( a2

G2b2 − KpaGb ) is rejected, since all the

corresponding values lie outside the Ki stability limits (10).

Only Ki=( 2a2

Gb −aKp)− 2a√

( a2

G2b2 − KpaGb ) is considered for

various operating values of RL and Vuc which is tabulated inTable. II. Also, more importance is given to operating valuesof 19V <Vuc<25V and 3Ω<RL<7Ω (shown in shaded regionin Table. II), since these operating conditions are practical andmore often used. Hence, the value of Ki chosen is 16000 forKp=10.5.

TABLE IIVARIATION OF Ki WITH THE VARIATION IN RL AND Vuc

Vuc (V) Load RL

3Ω 7Ω 11Ω 15Ω

13 21612 9589 8652 829016 17218 11169 10330 999119 17473 12806 12025 1170022 18479 14471 13728 1341325 19770 16153 15436 15128

Bode plots of outer loop voltage plant transfer functionwith and without controller for various operating conditionsis shown in Fig. 5 verifies the above design analysis and theeffect of RHZ on the designed closed loop control quite well.The final outer loop controller transfer function Hvd(s) isgiven in (13).

Hvd(s) =10.5(1 + s/1524)

s/1524(13)

III. PWM BLOCK METHOD USING MODE IDENTIFICATIONALGORITHM

As indicated in Section I, unlike in unified control strategy,switch control methods does allow separate control structuresfor both the operating control modes allowing greater flexi-bility in control. One of the major challenges of the switchcontrol methods is the mode identification unlike in unifiedcontrol strategy, where mode transfer is automatic. Viewingthe entire energy backup system as a two port network, shownin Fig. 1, a input and output parameter is needed to identify the

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-100

-50

0

50

100M

agn

itu

de

(dB

)

10-1

100

101

102

103

104

105

90

180

270

360

Ph

ase

(deg

)

Frequency (Hz)

Open loop t/fOpen loop t/f+controller

Fig. 5. Bode plots of outer voltage loop control for boost operation.

control modes. For this purpose, the output voltage Vo (outputparameter) and inductor current iL (input parameter) is usedfor accurate mode identification.

Buck

Boost Boost

Boost

Buck

Boost

Buck-boost transitionBoost-buck transition

PWM Blocked

Fig. 6. Inductor current IL and output voltage V0 during mode transition.

It should be noted that disdt where is is supply current can

also be used as an output parameter. But this can result infalse identification of control modes for load changes andother Vo variations. Also supply current is is prone to noiseand hence cannot be used effectively as a mode identificationparameter. Another major problem is implementation of dis

dtin digital domain. Hence, output voltage Vo is used as a modeidentification parameter. For this purpose, a barrier voltageVb, is chosen between supply voltage Vg and output voltageVo. It should be noted that although Vb decides the operatingcontrol mode, actual application of either the correspondingcontrol mode PWM or PWM blocking is decided by iL.

The PWM blocking is applied only during the transitionfrom one mode to another which is decided by the value ofiL and Vo. During the transition state between ultracapacitorcharging to discharging mode or vice versa, the PWM to the

switches is blocked. This is done until the stored energy inthe inductor is completely dissipated, which is sensed usinginductor current iL. The expected variation of iL and Vo duringvarious closed loop controls and mode transitions is shown inFig. 6. The mode identification algorithm provided here thoughis a non-linear control, still ensures smooth transition betweencontrol modes. Table. III summarizes role of PWM blockmethod and iL, Vo conditions for control mode identification.

It should be noted that the mode identification algorithmalso provides a hysteresis of 2ITH (ITH=0.01A) when usinginductor current iL as one of the parameters which can beseen from Table. III. Also the typical duration of the PWMblocking, which ensures zero inductor current at the beginningof charging or discharging closed loop controls, depending onwhether the transition is charging to discharging or vice-versais decided by inductor value L, magnitudes of inductor currentiL, ultracapacitor voltage Vuc and supply voltage Vg .

TABLE IIILOGIC CONDITIONS FOR MODE IDENTIFICATION.

IL(A) Vo(V ) Mode PWM Block

IL<ITH† Vo>Vb

∗ Buck closed loop control No

IL<−ITH Vo<Vb Buck-Boost transition Yes

IL>−ITH Vo<Vb Boost closed loop control No

IL>ITH Vo>Vb Boost-Buck transition Yes† ITH = 0.01A; ∗ Vb = 24.5V

A. During ultracapacitor charging-discharging transition

During the charge-discharge transition, the PWM is blockedbased on the mode identification algorithm where by all theenergy stored in the inductor is supplied to ultracapacitor stack.In this duration, the inductor discharges through anti-paralleldiode of SW1. It should be noted that since supply voltageVg is absent in this period it results in output filter capacitorCf discharging to supply the load, which in turn results indipping of Vo. The typical duration of PWM blocking can beestimated by (14).

∆t = LdiLVuc(i)

(14)

where, Vuc(i) is ultracapacitor stack voltage at the end ofcharging duration which is considered to be 22V for anexample. The typical duration of PWM blocking for a chargingcurrent of iL=1A is obtained to be around 13.6µs.

B. During ultracapacitor discharging-charging transition

During the discharge-charge transition, the PWM is onceagain blocked until Vuc+VL ∼ Vg . It should be noted thatduring this period, the supply voltage Vg is restored. Theinductor current discharges between two voltage sources Vucand Vg through the anti-parallel diode of SW2. The typicalduration of PWM blocking is given in (15).

∆t = LdiL

(Vuc(i) − Vg)(15)

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where, Vuc(i) is ultracapacitor stack voltage at the end ofdischarging duration which is considered here for an exampleto be 20V . The typical duration of PWM blocking for iL=4Aand Vg=26V is obtained to be around 200µs.It should be noted that seamless transition is more criticalin charging to discharging transition rather than vice-versa.This is because, the supply voltage Vg is restored duringdischarge-charge transition thus making the transition timeless critical as compared to charging-discharging case. Theissue of the accurate mode identification for separate switchcontrol can be effectively addressed using the proposed modeidentification algorithm which is verified using simulation aswell as experimental results.

IV. SIMULATION STUDIES

In this section, the simulation results for the switch controlof the energy backup system based on the PWM block methodis presented. The initial UC stack voltage, Vuci consideredis 18V . The UC stack is charged at 5A charging current.The supply voltage Vg considered is 26.08V . The load RL

considered is equivalent to 80W . The complete transition ofcharge-discharge-charge cycle is as shown in Fig. 7. It canbe observed from Fig. 7(b) the output voltage V0 is tightlyregulated at 24V through out the ride through period. Theinductor current iL along with the corresponding charging anddischarging current references is as shown in Fig. 7(a).

0 0.1 0.2 0.3 0.4 0.5 0.6-6-5-4-3-2-1012345

Cur

rent

(A

)

time (in seconds)

Inductor currentBuck referenceBoost reference

Charging

Discharging

Charging

(a)

0 0.1 0.2 0.3 0.4 0.5 0.623.524

24.525

25.5

26.5

26

time (in seconds)

Out

put v

olta

ge (

Vo)

Charging

Discharging

Charging

(b)

Fig. 7. Simulation results during ride through period for: (a) Inductor current,Boost reference, Buck reference currents,(b) Output voltage V0.

The transition of inductor current from charging to dis-charging mode, which is more crucial than vice-versa, is asshown in Fig. 9. It can be seen from Fig. 9 and Fig. 7(b) thatthe inductor current tracks the current reference generated byouter voltage loop and output voltage V0 is regulated at 24V .The simulations are performed in PSIM environment. It can

also be observed from Fig. 9 that the transition from chargingto discharging is smooth and seamless, indicating that switchcontrol strategy based on PWM block method is quite effectivefor energy backup purposes.

0.2 0.201 0.202 0.203 0.204

-4

-2

0

2

4

time (in seconds)

Curr

ent

(A)

Inductor current

Buck reference

Boost reference

Fig. 8. Inductor current, Boost reference, Buck reference currents duringbuck-boost transition.

V. EXPERIMENTAL RESULTS

This section provides the experimental results for the switchcontrol of bidirectional converter switching at 100kHz whichis operated at 50W load using PWM blocking and modeidentification algorithms.

A. Performance during charging periodFig. 10 shows the charging profile of the UC stack for a

charging current of Iuc=1A. The UC stack is charged to 16Vin a span of 200s which can be verified using (16).

C2dVucdt

= iuc (16)

It can also be seen that the current is regulated at 1A indicatingclosed loop control’s proper operation. During the chargingperiod, the input voltage Vdc is at 26V indicating the presenceof a voltage source Vg .

a

Fig. 9. Charging of UC stack from 0-16V [Ch.1: iuc 500mA/div.,Ch.2: Vuc 5V/div.,Ch.3: Vdc 5V/div.,Ch.4: Iucsensed 1V/div., timescale: 20s/div.]

Fig. 11 shows the zoomed in version of the various wave-forms for a charging current of Iuc=2A. The switching ripplecorresponding to 100kHz can also be observed. The UC stackis charged at various charging currents and the charging profileis found to match the charging time relation given in (16).

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Fig. 10. Waveforms during charging mode [Ch.1: Vdc 5V/div.,Ch.2: Vuc 5V/div.,Ch.3: iuc 1A/div.,Ch.4: Iucsensed 1V/div., timescale: 10µs/div.]

B. Performance during discharge & mode transition periods

Fig. 12 shows the variation of Vuc, Vdc, iuc during thedischarging of UC stack. The UC stack is charged to 20Vand the supply voltage Vg , which is 26V , is removed duringwhich the UC stack discharges regulating the output voltageVo at 24V. Since, the output voltage needs to be regulated at24V while the UC stack is discharging for a constant load, itcan be seen that the inductor current Iuc increases based onthe outer voltage loop control.

Fig. 11. Discharging of UC stack:[Ch.1: iuc 1A/div.,Ch.2: Vuc 5V/div.,Ch.3: Vdc 2V/div.,Ch.4: Iucsensed 1V/div., timescale: 2s/div.]

Fig. 13 shows the zoomed in version of Vuc, Vdc, iucduring charge-discharge mode transition. It can be seen fromFig. 13 that the mode transition is smooth and seamlesswithout any high inductor current transients. The experimentalresults for mode change match closely with the simulationresults indicating accurate mode identification and closed loopcontrols working at desired bandwidth. It can be observed thatthe output voltage Vo is regulated to 24V within the desiredsettling time of 2.4ms. It can also be seen that UC stackvoltage Vuc starts decreasing during the discharging period.

Fig. 12. Charging to discharging mode transition[Ch.1: iuc 1A/div.,Ch.2: Vuc 5V/div.,Ch.3: Vdc 2V/div.,Ch.4: Iucsensed 1V/div., timescale: 5ms/div.]

VI. CONCLUSIONS

In this paper, a new switch control strategy based onPWM block method is proposed to ensure a smooth, seamlesstransition between charging and discharging modes. The paperalso provides a analytic approach for controller design for ul-tracapacitor based boost topologies facing RHZ problem. Thecontroller design thus obtained is verified using bode designcriteria, simulation and experimental results. The paper alsoaddresses one of the major challenges in the implementationof the switch control method, which is mode identification.Using the mode identification algorithm proposed in this paper,the corresponding control modes are accurately identifiedwhich can be observed from the simulation and experimentalresults. Smooth and seam-less transition between charging anddischarging control modes and vice-versa is also ensured. Thisis verified using simulations and experimental results.

REFERENCES

[1] J. Zhang, J.-S. Lai, and W. Yu, “Bidirectional dc-dc converter modelingand unified controller with digital implementation,” in Applied PowerElectronics Conference and Exposition, 2008. APEC 2008. Twenty-ThirdAnnual IEEE. IEEE, 2008, pp. 1747–1753.

[2] W. Jianhua, Z. Fanghua, G. Chunying, and C. Ran, “Modeling andanalysis of a buck/boost bidirectional converter with developed pwmswitch model,” in Power Electronics and ECCE Asia (ICPE & ECCE),2011 IEEE 8th International Conference on. IEEE, 2011, pp. 705–711.

[3] S. Canter and R. Lenk, “Bilateral power converter for a satellitepower system,” Oct. 25 1994, uS Patent 5,359,280. [Online]. Available:http://www.google.com/patents/ US5359280

[4] Maxwelltechnologies, “Application notes: Charging of ultracapacitors,”vol. 1008981, no. 1, pp. 1–5, 2012.

[5] W.-C. Lee, C.-G. Yoo, K.-C. Lee, and B.-H. Cho, “Transient currentsuppression scheme for bi-directional dc/dc converters in 42v automotivepower systems,” J. Power Electron, vol. 9, no. 4, pp. 517–525, 2009.

[6] S.-C. Tan, Y. Lai, C. Tse, L. Martinez-Salamero, and C.-K. Wu, “A fast-response sliding-mode controller for boost-type converters with a widerange of operating conditions,” Industrial Electronics, IEEE Transactionson, vol. 54, no. 6, pp. 3276–3286, Dec 2007.

[7] D. Sable, B. Cho, and R. Ridley, “Use of leading-edge modulationto transform boost and flyback converters into minimum-phase-zerosystems,” Power Electronics, IEEE Transactions on, vol. 6, no. 4, pp.704–711, Oct 1991.

[8] S. Kapat, A. Patra, and S. Banerjee, “A current-controlled tristate boostconverter with improved performance through rhp zero elimination,”Power Electronics, IEEE Transactions on, vol. 24, no. 3, pp. 776–786,March 2009.