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Radio Frequency CMOS Transmitter Frequency Modulation in Ultra-Wideband Leonel Severino de Almeida Dissertation for obtaining the degree of Master in Electrical and Computer Engineering Jury President: Prof. Doutor Marcelino Bicho dos Santos Advisor: Prof. Doutor Jorge Manuel dos Santos Ribeiro Fernandes Co-Advisor: Doutor Miguel Andrade Martins Members: Prof. Doutor José António Beltran Gerald April 2012

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Page 1: Radio Frequency CMOS Transmitter - ULisboa work describes the implementation of a radio frequency CMOS transmitter operating ... FM-UWB Circuit Architecture 19 ... FM-UWB high …

Radio Frequency CMOS Transmitter

Frequency Modulation in Ultra-Wideband

Leonel Severino de Almeida

Dissertation for obtaining the degree of Master in

Electrical and Computer Engineering

Jury

President: Prof. Doutor Marcelino Bicho dos Santos

Advisor: Prof. Doutor Jorge Manuel dos Santos Ribeiro Fernandes

Co-Advisor: Doutor Miguel Andrade Martins

Members: Prof. Doutor José António Beltran Gerald

April 2012

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To my parents, girlfriend, sister and brother.

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Acknowledgements

This work represents a final step in the academic journey that not also grant me the skills and

competences to face the professional life but shaped my personality as individual, through all

the difficulties, victories and companionship that it contains. Many were the people that helped

me to reach this step and for this, I would like to show them all my gratitude and appreciation in

this work.

First of all, I would like to thank Professor Jorge Fernandes and Doutor Miguel Martins for

accepting me under their supervision along the development of this work. It was a privilege and

a pleasure to work in this scientific project under their guidance and to have at my disposal all of

their knowledge and expertise.

Also, I would like to acknowledge all the colleagues and friends, Luís Costa, David Correia,

Hugo Gonçalves,Taimur Kuntz and Rui Duarte for the great environment, companionship and

team spirit I encountered and for the opportunity to learn and being part of such skilled team as

“Circuitos Analógicos e Mistos”.

I would like to thank the INESC-ID (Instituto de Engenharia de Sistemas e Computadores –

Investigação e Desenvolvimento), IST (Instituto Superior Técnico) and FCT (Fundação para a

Ciência e Tecnologia) that provided the necessary conditions to realize this work and supported

this work through SCOMagNO: Frequency Synchronization of a CMOS RF Oscillator by a

Magnetic Nano-Oscillator Based On Spin Transfer Torque”, Apr 2011-Mar 2014, PTDC/CTM-

NAN/112672/2009.

I want to thank all my closest friends, not only the ones I met in IST but also those that always

have been my companions, Ricardo Martins, Pedro Martins, Pedro Araújo, Carlos Fernandes,

Luis Afonso, Dinis Bucho, Nuno Bernardo and Luís Ferreira for providing me support,

memorable moments and fellowship.

To my family, my parents Fernanda and Baltazar, a special thanks for all the unconditional love

and support and for being such a life example to me. To my sister Ana and my “brother” Hugo,

also a special thanks for all the love, advices and support.

And at last, but not the least, to my dearest love Corine, that always gave me strength and

always believed in me, even in the most difficult times. Without her love, unconditional support

and patience I’m certain that fulfilling this task would be much more difficult. A very special

thanks.

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Abstract

In order to allocate the growth of different types of RF devices, a continuous management and

usage improvement of the available spectrum is needed. Also, higher data rates, low power

consumption and smaller circuits are among users, and therefore industry, top demands.

The Ultra-Wideband concept is focused in sharing already allocated bands, some of them

proprietary, without causing interference to existing narrowband applications, while allowing

simultaneously high data transmission rates.

This work describes the implementation of a radio frequency CMOS transmitter operating

around 8 GHz, based in a constant-envelope frequency-domain approach called Frequency

Modulation Ultra-Wideband (FM-UWB) and implemented using a standard 0.13 µm CMOS

technology. The two main transmitter circuits are based on a relaxation oscillator topology,

since it is inductorless, it is wideband tunable and provides huge area savings. In this type of

oscillator a triangular signal is also present in the circuit which can be used advantageously in

this type of transmitter.

With the help of a simple control circuit, it is possible to obtain an FSK oscillator that generates

a triangular signal with two different oscillation frequencies, controlled by the transmitted data.

Also, using only MOS Varactors, it was implemented a VCO capable of achieving 1 GHz of

tuning range bandwidth with an operation frequency around 8 GHz.

The emitter and the receiver are studied at a high-leve,l being the transmitter designed at

transistor level and layout. Simulations results are very satisfactory, proving the potential of the

designed circuit in fulfilling the desired goals for obtaining a low-power and low-cost transmitter,

capable of achieving high data rates and sharing already occupied RF transmission bands.

Keywords FM-UWB, CMOS Transmitter, Low-Power, Low-Cost, Low-Area.

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Resumo

A fim de garantir espaço para o crescimento de diferentes tipos de dispositivos de RF, é

necessário garantir uma melhoria contínua do uso e da gestão do espectro de frequências.

Também, o maior débito de dados, o baixo consumo de energia e os circuitos com menores

dimensões estão entre as principais exigências dos utilizadores e desta forma também da

indústria.

O conceito de Ultra-Wideband está focado na utilização de bandas já alocados por outros tipos

de tecnologia, algumas reguladas, e sem causar interferências com as aplicações de banda

estreita, permitindo simultaneamente taxas de transmissão de dados a alta velocidade.

Este trabalho descreve a implementação de um transmissor de radiofrequência em tecnologia

padrão CMOS de 0.13 µm e a funcionar a 8 GHz, tendo como abordagem de base a utilização

de uma máscara no domínio da frequência. Esta técnica é denominada de Frequency

Modulation Ultra-Wideband (FM-UWB) Os dois principais circuitos do transmissor são

baseados na topologia de um oscilador de relaxação, uma vez que esta não tem elementos

indutivos, permite sintonização em banda larga e economizar área de circuito. Com este tipo de

oscilador é possível obter um sinal triangular que pode ser usado como uma vantagem neste

transmissor.

Com a ajuda de um circuito de controlo simples, é possível obter um oscilador FSK capaz de

gerar um sinal triangular com duas frequências de oscilação diferentes, controladas pelos

dados a serem transmitidos. Além disso, usando apenas varactores MOS, foi implementado um

VCO capaz de atingir 1 GHz de largura de banda e a operar a 8 GHz.

É realizado um estudo de alto nível ao emissor e ao receptor sendo o transmissor

implementado ao nível do transístor e respectivo layout. Os resultados das simulações do

transmissor foram bastante satisfatórios, provando o potencial do circuito projectado para

cumprir as metas desejadas. Assim, foi possível obter um transmissor de baixa potência e de

baixo custo, capaz de atingir altas taxas de transmissão de dados utilizando bandas de

transmissão de RF já ocupadas.

Palavras Chave FM-UWB, Transmissor CMOS, Baixa Potência, Baixo Custo, Área Reduzida.

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Table of Contents

Acknowledgements iv

Abstract vi

Resumo viii

Table of Contents x

List of Figures xiv

List of Tables xviii

List of Acronyms xx

List of Symbols xxii

1. Introduction 1

1.1. Background and Motivation 2

1.2. Thesis Organization 3

1.3. Main Contributions 4

2. Ultra-Wideband Technology 5

2.1. Introduction 6

2.2. UWB Overview 6

2.3. Most Common UWB Implementation Types 9

2.3.1. Impulse Radio UWB 9

2.3.2. Multi-Band Orthogonal Frequency Division Multiplexing 10

2.3.3. Frequency Modulation UWB 11

2.4. Frequency Modulation in UWB Perspective 12

2.5. Conclusions 17

3. FM-UWB Circuit Architecture 19

3.1. Introduction 20

3.2. Transmitter 20

3.2.1. Transmitter Characteristics 21

3.2.2. Subcarrier Modulation 22

3.2.3. Carrier Modulation 23

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3.2.4. Simulation 23

3.3. Transmission Channel Model 27

3.3.1. Attenuation 27

3.3.2. Thermal Noise 28

3.3.3. Simulation and Signal-to-Noise Ratio 31

3.4. Receiver 32

3.4.1. Preamplifier 34

3.4.2. Spectral Shaping Band-Pass Filter 35

3.4.3. Signal Rectifier 37

3.4.4. Low-Pass Filter 37

3.4.5. Comparator 38

3.5. Digital Decoder 39

3.6. Conclusions 40

4. Circuit Implementation 41

4.1. Introduction 42

4.2. Relaxation Oscillators 42

4.2.1. High-Level Model 43

4.2.2. Circuit Implementation 44

4.3. Frequency-Shift Keying Implementation 46

4.3.1. Control Circuit 48

4.3.2. Simulation Results 48

4.4. Voltage Controlled Oscillator Implementation 51

4.4.1. MOS Varactors 53

4.4.2. Simulation Results 55

4.5. Current Sources 58

4.6. Conclusions 59

5. Transmitter Simulation and Results 61

5.1. Introduction 62

5.2. Transmitter Schematic and Simulations 62

5.2.1. Circuit Schematic 62

5.2.2. Graphical Results 64

5.2.3. Simulation Results using Pads, Bonding Wires, ESD protection and

Antenna 67

5.2.4. Simulation Results with High-level Models for Transmission Channel,

Receiver and Digital Decoder 72

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5.2.5. Corners 74

5.3. Layout Design 76

5.4. Conclusions 78

6. Conclusion and Future Work 79

6.1. Conclusion 80

6.2. Future Work 81

References 83

Annex 87

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List of Figures

Figure 2.1 – Comparison between narrowband and ultra-wideband bandwidths. ........................ 6

Figure 2.2 – FCC spectral mask for indoor (a) and outdoor (b) UWB transmission ..................... 7

Figure 2.3 – UWB intended bands for communication in different regions. .................................. 8

Figure 2.4 – Example of an IR-UWB pulse shape. ....................................................................... 9

Figure 2.5 – IR-UWB impulse train.............................................................................................. 10

Figure 2.6 – Proposed MB-OFDM frequency band plan. ............................................................ 11

Figure 2.7 – Spectrum of a FM-UWB signal and an unmodulated RF carrier at 4 GHz. ............ 11

Figure 2.8 – VCO transfer function.............................................................................................. 13

Figure 2.9 – Spectral power density 𝑆𝑋𝐹𝑀(𝑓) of the cosine carrier signal. .................................. 14

Figure 2.10 – PDF for the modulating signal m(t). ...................................................................... 15

Figure 2.11 – Transmission bandwidths for narrowband and wideband FM signals .................. 16

Figure 2.12 – Power spectral density 𝑆𝑋𝐹𝑀(𝑓) of the wideband FM signal 𝑋𝐹𝑀(𝑡). ..................... 16

Figure 2.13 – Modulating signal 𝑚(𝑡), triangular waveform with period T. ................................ 17

Figure 3.1 – Time-domain view of data d(t), subcarrier m(t), and UWB signal XFM(t). ................ 20

Figure 3.2 – FM-UWB high level modulator schematic. .............................................................. 21

Figure 3.3 – Subcarrier generator circuit schematic. .................................................................. 22

Figure 3.4 – Simulation results of the digital raw data 𝑑(𝑡) and the subcarrier signal 𝑚(𝑡). ...... 23

Figure 3.5 – 𝑋𝐹𝑀(𝑡) power spectral density expression and DFT parameters in the calculator. 24

Figure 3.6 – Unmodulated carrier signal and its respective power spectral density. .................. 25

Figure 3.7 – Simulation of subcarrier signal 𝑚(𝑡), carrier signal 𝑋𝐹𝑀(𝑡) and carrier power

spectral density 𝑆𝑋𝐹𝑀(𝑓) ......................................................................................... 26

Figure 3.8 – Schematic circuit for the transmission channel model. ........................................... 27

Figure 3.9 – Noise signal and Gaussian probability density function .......................................... 29

Figure 3.10 – Simulation of noise signal 𝑁(𝑡) and respective power spectral density 𝑁0. .......... 31

Figure 3.11 – Simulation of signal attenuated 𝑋′𝐹𝑀(𝑡), noise signal 𝑁(𝑡) and signal 𝑌𝐹𝑀(𝑡). ... 32

Figure 3.12 – Preamplifier high level schematic. ........................................................................ 33

Figure 3.13 – Demodulator high level schematic. ....................................................................... 33

Figure 3.14 – Signal at the input 𝑌𝐹𝑀(𝑡) and output 𝑋′′𝐹𝑀(𝑡) of the preamplifier circuit .............. 34

Figure 3.15 – Band-pass filter response to convert FM into AM signal ...................................... 35

Figure 3.16 – Subcarrier signal 𝑚(𝑡) and AM signal 𝑋𝐴𝑀(𝑡) resulting from the filter conversion36

Figure 3.17 – Signal after rectification 𝑋𝐴𝑀 𝟐(𝑡). ........................................................................ 37

Figure 3.18 – Low-pass filter output signal 𝑌𝐴𝑀(𝑡). ..................................................................... 38

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Figure 3.19 – Comparator input signal 𝑌𝐴𝑀(𝑡) (red signal) and output signal 𝑌′𝐴𝑀(𝑡) (blue signal).

................................................................................................................................ 38

Figure 3.20 – Digital decoder circuit schematic. ......................................................................... 39

Figure 3.21 – Original data 𝑑(𝑡), BDC signal 𝑌′𝐴𝑀(𝑡) and recovered data 𝑑′(𝑡). ..................... 39

Figure 4.1 – Relaxation oscillator block diagram. ....................................................................... 43

Figure 4.2 – Oscillator output waveforms VINT and VST. .............................................................. 43

Figure 4.3 – Relaxation oscillator implementation. ..................................................................... 44

Figure 4.4 – Integrator block and respective output waveform. .................................................. 44

Figure 4.5 – Schmitt-trigger block and respective transfer function. ........................................... 45

Figure 4.6 – Relaxation oscillator waveforms. ............................................................................ 46

Figure 4.7 – Integrator waveform 𝑣𝐶0 (corresponding to a capacitance C) and 𝑣𝐶1

(corresponding to a capacitance 2C). ..................................................................... 47

Figure 4.8 – Relaxation oscillator with variable capacitance. ..................................................... 47

Figure 4.9 – Control circuit schematic. ........................................................................................ 48

Figure 4.10 – Relaxation oscillator with variable capacitance and control circuit. ...................... 49

Figure 4.11 – Simulation result for the signal 𝑣𝐶, for a data signal 𝑑(𝑡) with transitions between

“0” and “1”. .............................................................................................................. 50

Figure 4.12 – Simulation result for the signal 𝑣1 and CLK, for a data signal 𝑑(𝑡) with transitions

between “0” and “1”. ................................................................................................ 50

Figure 4.13 – Simulation result for the signal DATA and comparison with the original data signal

𝑑(𝑡) with transitions between “0” and “1”. ............................................................... 51

Figure 4.14 – Proposed topology for VCO with MOS varactors and differential tuning signals. 52

Figure 4.15 – Cross section of a conventional NMOS varactor (in depletion; left) and the

generally assumed model (right). The dashed line indicates the border of the

depletion region. ..................................................................................................... 53

Figure 4.16 – Typical measured small-signal capacitance characteristic 𝑣𝐺 of a NMOS varactor

(bottom) and the relevant lumped elements (top) at zero tuning voltage. .............. 54

Figure 4.17 – Typical measured small-signal capacitance characteristic of a conventional NMOS

varactor at various tuning voltages. ........................................................................ 54

Figure 4.18 – PMOS and NMOS varactor inversion-mode capacitance characteristic 𝐶𝐺. ........ 55

Figure 4.19 – Three terminal MOS varactor circuit schematic. ................................................... 56

Figure 4.20 – VCO frequency variation resulting from NMOS varactor excitation (1) and PMOS

varactor excitation (2). ............................................................................................ 57

Figure 4.21 – VCO output 𝑣𝑜𝑢𝑡1 with a frequency of 7.87 GHz. .................................................. 57

Figure 4.22 – Current source circuit schematic. .......................................................................... 58

Figure 5.1 – Transmitter circuit schematic. ................................................................................. 62

Figure 5.2 – Signal 𝑑(𝑡) with transitions between “0” and “1” and simulation result for signal

DATA....................................................................................................................... 64

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Figure 5.3 – Simulation result for the differential output 𝑉𝑡𝑢𝑛𝑒1 and 𝑉𝑡𝑢𝑛𝑒2 produced by the FSK

oscillator. ................................................................................................................. 65

Figure 5.4 – Simulation result for the signal 𝑣𝐶 (𝑉𝑡𝑢𝑛𝑒1 − 𝑉𝑡𝑢𝑛𝑒2). ................................................ 65

Figure 5.5 – Simulation result showing the synchronism between the signal DATA and

signal 𝑣𝐶 . ................................................................................................................ 66

Figure 5.6 – Simulation result for signal 𝑉𝑜𝑢𝑡1 (including its instantaneous frequency). ............. 66

Figure 5.7 – Common drain stage schematic. ............................................................................ 67

Figure 5.8 – ESD protection schematic. ...................................................................................... 68

Figure 5.9 – Bonding wire model schematic. .............................................................................. 69

Figure 5.10 – Antenna model schematic. .................................................................................... 69

Figure 5.11 – Simulation result for signal 𝑉𝑜𝑢𝑡1´ and Simulation result for signal 𝑉𝑎𝑛𝑡_𝑖𝑛. ............ 70

Figure 5.12 – Simulation result for signal 𝑉𝑎𝑛𝑡_𝑜𝑢𝑡. ...................................................................... 70

Figure 5.13 – Simulation result for signal 𝑉𝑎𝑛𝑡_𝑜𝑢𝑡 instantaneous frequency and DFT. ............... 71

Figure 5.14 – Simulation result for signal Vchannel and signal Vpre_amp. ......................................... 72

Figure 5.15 – Simulation result for signal Vam_pulse and signal Vbdc. ............................................ 73

Figure 5.16 – Simulation result for signal DATA_Rec and comparison with the signals 𝑑(𝑡) and

DATA....................................................................................................................... 73

Figure 5.17 – FM-UWB transmitter layout without pads, ESD protections and output buffers. .. 77

Figure 5.18 – FM-UWB transmitter layout with pads, ESD protections and output buffers. ....... 77

Figure A1 – Verilog-A code for the attenuator block. .................................................................. 88

Figure A2 – Verilog-A code for white noise Gaussian source. .................................................... 88

Figure A3 – Verilog-A code for band-pass biquadratic filter. ...................................................... 88

Figure A4 – Vout1' instantaneous frequency Vs DATA signal. ...................................................... 89

Figure A5 – Vout1' Power Spectral Density. .................................................................................. 89

Figure A6 – Circuit schematic with the transmitter core, buffers, ESD protections, pads, bonding

wires and antennas. ................................................................................................ 90

Figure A7 – FM-UWB transmitter layout. .................................................................................... 91

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List of Tables

Table 3.1 – Transmitter characteristics ....................................................................................... 21

Table 3.2 – Simulation results for maximum power spectral density for different subcarrier

frequencies, transmission bands and carrier amplitudes. ......................................... 25

Table 3.3 – Attenuation values for different distances using the carrier frequency of 7.9 GHz. . 28

Table 3.4 – Noise power values for different bandwidths. .......................................................... 30

Table 4.1 – Parameters used in the simulation of the relaxation oscillator with variable

capacitance. .............................................................................................................. 49

Table 4.2 – Parameters used in the VCO simulation. ................................................................. 56

Table 4.3 – Parameters used in the FSK current source. ........................................................... 58

Table 4.4 – Parameters used in the VCO current source. .......................................................... 59

Table 5.1 – Parameters used in the transmitter implementation and simulation. ....................... 63

Table 5.2 – Pads parameters. ..................................................................................................... 68

Table 5.3 – ESD protection parameters. ..................................................................................... 68

Table 5.4 – Bonding wire parameters. ........................................................................................ 69

Table 5.5 – Antenna parameters. ................................................................................................ 69

Table 5.6 – Transmitter simulation results. ................................................................................. 72

Table 5.7 – PVT corners simulated. ............................................................................................ 74

Table 5.8 – Corners simulation results. ....................................................................................... 75

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List of Acronyms

BDC Binary digital code BFSK Binary frequency-shift keying DFT Discrete Fourier transform EIRP Effective isotropic radiated power FDMA Frequency division multiple access FCC Federal Communication Commission FM Frequency modulation FSK Frequency-shift keying IR Impulse radio LOS Line of sight MB Multi-band MOS Metal–oxide–semiconductor OFDM Orthogonal frequency division multiplexing PDF Probability density function PLL Phase locked loop PSD Power spectral density PM Phase modulation RF Radio frequency RT Radio Technology SNR Signal-to-Noise ratio UMC United Microelectronics Corporation UWB Ultra-wideband VCO Voltage controlled oscillator WGNS White Gaussian noise source

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List of Symbols

f Frequency

C Maximum channel capacity

B Channel bandwidth Carrier amplitude

Carrier instantaneous phase Carrier angular frequency

𝑓 Carrier frequency Frequency instantaneous deviation

Phase instantaneous deviation

𝑓 Frequency modulation index

Transmission band

Speed of light

Wavelength

𝑑 Distance

Planck constant

Boltzmann constant

Mean value

Standard deviation Attenuation

Quality factor

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1. Introduction ____________________________________________________

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1.1. Background and Motivation

Nowadays we live surrounded of all kind of communication devices, since the most common ones, like

televisions and radios, to mobile phones and computers, being the fast access to information now a

basic demand.

In the past decade, result of the explosive growth of technological devices, short-range wireless

networks management became a major priority. The necessity of granting communication and the

capability to share information between almost all devices created a demand for RF bandwidths and

the increase of transmission data speeds. At circuit level, battery operated, mass market devices,

require the development of compact circuits with minimum area and cost, with low power consumption

and lower voltage supply, and with high degree of integration, leading to an increase of the study,

research and development both in the academic environment and in the semiconductors and

communications industries.

Towards short-range applications, Ultra-Wideband Radio Technology can drive the potential solutions

for many of the identified problems in the areas of spectrum management and radio systems

engineering. The novel and unconventional approach underlying the use of modern UWB is based on

the optimally sharing of the existing radio spectrum resources rather than looking for still available but

possibly unsuitable new bands [1].

This thesis aims the development of a radio frequency CMOS transmitter using a 0.13 µm CMOS

technology based in a constant-envelope frequency-domain approach called Frequency Modulation

Ultra-Wideband (FM-UWB). The purpose of this transmitter is mainly portable non-critical applications

and its key features are minimum area and cost, low power consumption and low voltage supply. FM-

UWB is being proposed as a standard for biomedical applications.

The FM-UWB transmitter implemented is based in two main blocks, a frequency-shift keying oscillator,

controlled by the data, which is the key element to generate a sub-carrier signal, and a voltage

controlled oscillator used to produce the carrier signal. In order to minimize the area size and the

complexity of the transmitter, both oscillators are inductorless circuits, leading to a low-cost and a low-

power implementation.

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1.2. Thesis Organization

This work is organized in 6 chapters. Besides the introduction, in Chapter 2, is provided a global

overview of the UWB technology and its primary characteristics, also a brief introduction to the most

relevant UWB implementation schemes is made, emphasizing the frequency modulation technique in

an UWB perspective.

In Chapter 3, a study about the concepts involving the FM-UWB transmission technique using high

level circuit blocks is performed. This high level study allows the evaluation of the link budget,

including the theoretical modulation-demodulation concepts, and the definition of each block

characteristics.

In Chapter 4, the implementation of each block composing the circuit, and respective simulations are

presented. Both blocks that compose the transmitter, are based in the single relaxation oscillator

topology, where different characteristics of this specific circuit are adapted to fulfill the transmitter

requirements. The relaxation oscillator, due to its simple architecture and operation mode are a major

advantage to minimize the overall area and reduce power consumption.

In Chapter 5, simulations results for the transmitter and also the final circuit parameters are studied

and presented. Besides the circuit core simulation, it is included an overall demonstration of the circuit

performance in extreme conditions and the simulation results, using already an output buffer, bonding

wires, pads and ESD protections, since it would likely affect the final result. As final step it is produced

and presented the circuit layout along with an evaluation of the die size area.

Finally, in Chapter 6, conclusions and future work suggestions are presented.

In the final annex further simulation results and other relevant complementary information are

presented.

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1.3. Main Contributions

The main original contributions of the work are:

1. The use of a relaxation oscillator topology to produce an almost triangular waveform signal

with the capability of changing its fundamental frequency according with a certain data signal.

The result is a significant reduction of the circuit complexity with a strong impact on the

reduction of die area and power consumption, when comparing to the common use of a DDS to

produce the same result.

2. The use of a relaxation oscillator topology to develop a VCO (operating at 8 GHz) capable of

achieving more than 1 GHz of tuning range bandwidth based only on MOS Varactors, allowing

at the same time, a VCO control through a differential input signal. This result, besides the

pretended area size and power consumption reduction, allows a major simplification to the

circuit when comparing to other VCO’s with similar tuning ranges.

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2. Ultra-Wideband

Technology ____________________________________________________

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2.1. Introduction

The primary objective of this chapter is to provide a global overview of UWB technology, where its

main characteristics are discussed in section 2.2. In section 2.3, the three most common schemes of

implementation are briefly described, while section 2.4 is entirely focused in Frequency Modulation

from a UWB point of view, once this modulation scheme is the theoretical basis of this work.

2.2. UWB Overview

In radio frequency communication systems, modern Ultra-Wideband is used to describe signals with a

minimum bandwidth of 500MHz, (for operation frequencies above 3.1GHz) [2], by comparison with

traditional narrowband communication systems, with bandwidths of a few kHz, as shown in figure 2.1.

Figure 2.1 – Comparison between narrowband and ultra-wideband bandwidths.

UWB signals are mostly low-power and short-range signals (usually no more than a few meters). Due

to its very wide bandwidth, this technology can provide great robustness against interference and

frequency-selective multipath propagation conditions, leading to less signal attenuation, especially

when transmitting in indoor environments [3], [4].

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Two other characteristics that make this technology attractive are low RF transmission power and low

power-spectral density, imposed by the regulating authorities. Therefore, it is possible to develop

circuits with very low power consumption, and to share RF bandwidths previous allocated to other

technologies, since the interference between signals is practically inexistent [1], [3].

Sharing already occupied spectrum bands, rather than moving to new wave frequencies, is a solution

that UWB can provide for RF spectrum management area, justifying the growing investigation in this

field [1].

In order to allow UWB transmission in allocated bands, the signal power level must be very low,

therefore Federal Communication Commission authorized wideband signal format with a low Effective

Isotropic Radiated Power level of -41.3 dBm/MHz, creating this way a UWB signal mask that prevents

interference with other systems. This type of power level, (-41.3 dBm/MHz), create a new concept of

“noise floor” usage, since this power level is the same as that allowed for noise emissions of electronic

devices. The FCC spectral masks for indoor and outdoor transmissions are shown in figure 2.2 [4], [5].

Figure 2.2 – FCC spectral mask for indoor (a) and outdoor (b) UWB transmission [4].

The low radiated power allowed for UWB systems enables low DC power consumption, leading this

way to extended battery life and maybe to the possibility of using power harvesting circuits as energy

sources, creating really autonomous network nodes [1]. However, the inconvenient of reducing to

much the circuits’ transmission power consumption is that the range also decreases, thus, a trade-off

between transmitted power and range must be established.

Another important aspect that makes UWB as one of the future leading wireless communication

technologies is the high speed rates that can be achieved. If we take in consideration Shannon’s

channel capacity equation, presented in (2.1):

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𝐶 2 (1 ) (2.1)

It is possible to conclude that the extended bandwidth (B) of UWB allows a great channel capacity (C)

on one hand, or on the other hand, it is possible to trade bandwidth for SNR, what grants to UWB

robustness against interference from other sources. Low SNR can lead to low-complexity circuits and

these to the possibility of achieving low cost circuits [4].

Nowadays, UWB communication systems are playing a large role in the development of new short-

range wireless networks, such as wireless personal area networks (WPANs), wireless body area

network (WBANs) and remote health monitoring (e-health) [1], [3]. The high speed rates provided by

UWB transmissions make this technology desirable for data transmission, especially for distribution of

music, video and sensor information. It is expected that UWB become a very attractive solution for the

future wireless communications and many other applications including logistics, security and military

applications, control of home appliances, search-and-rescue, family communications and supervision

of children [6].

Due to the emerging importance of UWB systems, this technology has already received legal

adoption, in what concerns to bandwidth use, by the competent regulatory authorities in many places

around the world like United States, Europe, Canada, and several countries in Asia, like Japan, China,

South Korea and Singapore. The intended bands for UWB use in these regions can be seen in figure

2.3 [5].

Figure 2.3 – UWB intended bands for communication in different regions [5].

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2.3. Most Common UWB Implementation Types

The UWB definition does not specify any type of air interface or modulation scheme, so it is possible

to use many different techniques to create this type of signal [2]. In the further sections are explored

the UWB most common implementation techniques, Impulse Radio UWB (IR-UWB), Multi-Band

Orthogonal Frequency Division Multiplexing (MB-OFDM) and more recently Frequency Modulation

UWB (FM-UWB).

2.3.1. Impulse Radio UWB

UWB originally started with a technique of implementation called Impulse Radio Ultra-wideband (IR-

UWB). Nowadays, it is still one of the most used implementations. In conventional spread-spectrum

techniques, the signals are continuous-wave sinusoids that are modulated with a fixed carrier

frequency, while IR-UWB consists in creating a pulse wave or by generating a baseband envelope

impulse to modulate a sinusoidal wave, shifting the signal spectrum to higher frequencies (RF

frequencies) [2], [5], [6].

The short-duration pulses, (usually nanoseconds or picoseconds), will lead to wide energy spreading

acting like information carriers. Signals are intentionally made to have wider band than the necessary

to make them more noise-like, taking advantage of the UWB bandwidth available and respecting the

PSD limits imposed by FCC masks [4], [6], [7]. An example of IR-UWB pulse is illustrated in figure 2.4.

Figure 2.4 – Example of an IR-UWB pulse shape [4].

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Transmitted data information is modulated into a sequence of pulses called pulse train, as illustrated in

figure 2.5. Pulse train results, therefore, on modulating pulses. When pulses are sent in regular

intervals, due to pulse repetition period, peaks of power limit the total transmit power. One method to

make the spectrum more noise like is to dither the signal, by adding a small random offset to each

pulse [4].

Figure 2.5 – IR-UWB impulse train [4].

One of the most important characteristics of IR is the fact that it is power efficient, what is a great

advantage, considering the context of the UWB technology. [6].

2.3.2. Multi-Band Orthogonal Frequency Division Multiplexing

Multi-band orthogonal frequency-division multiplexing is another method to implement UWB

transmission. This technique combines OFDM techniques with multi-band (MB) approach and it

consists on the use of multiple signals across the UWB spectrum with non-overlapping frequencies.

This way, it is possible to use the entire 7.5 GHz of spectrum allocated for UWB transmissions, using

several sub-bands with a -10 dB bandwidth of at least 500 MHz each. The information is distributed

into these several sub-bands and then transmitted, this also allows, that sub-bands can be treated

independently, bringing some advantages like less interference with other systems [4].

One of the proposals for the physical standard of future high speed WPAN uses MB-OFDM technique.

In this proposal, the spectrum between 3.1 and 10.6 GHz is divided into 14 bands with 528 MHz

bandwidth each that may be added or dropped depending upon the interference with other systems,

where only 13 bands are used to avoid interference between UWB and the existing IEEE 802.11a

signals. The three lower bands are used for the standard operation, which is mandatory, and the rest

of the bands are allocated for optional use or future expansions. In figure 2.6 is presented this

frequency band plan [4].

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Figure 2.6 – Proposed MB-OFDM frequency band plan [4].

MB-OFDM continues to be the standard approach for high data-rate UWB transmissions and it is also

used in the most common narrowband communication systems. MB-OFDM systems can support bit

rates up to 480 Mbps, however this high-performance comes at the expense of great circuit complexity

and high power consumption [6], [8], [9].

2.3.3. Frequency Modulation UWB

This work will explore a technique of implementation for UWB systems called Frequency Modulation

Ultra-Wideband (FM-UWB). It consists on creating a constant-envelope in the frequency domain using

the well-known technique of frequency modulation. The basic principle of this technique is to use a

double FM scheme. First is applied a low-modulation index, using digital frequency-shift keying (FSK),

followed by high-modulation index analog FM, thus, a constant-envelope signal with flat spectrum and

a very wide bandwidth with step spectral roll-off is produced, as shown in figure 2.7 [2].

Figure 2.7 – Spectrum of a FM-UWB signal and an unmodulated RF carrier at 4 GHz [2].

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One attractive advantage of using this approach is the possibility of accommodating multiple users. By

applying the FDMA technique, it is possible to assigning different subcarrier frequencies to different

users, a problem that is relevant to WPAN systems [3].

The receiver does not work with carrier or pulse synchronization. Acquisition is reduced to bit

synchronization, so no local oscillator or PLL circuits are required in the receiver. From a

synchronization point of view, the system will behave like a narrowband FSK system. The modulation

techniques are well known and easy to implement allowing low voltage supply [3]. Due to all these

factors, the circuit implementation for FM-UWB systems is potentially low power and low cost.

2.4. Frequency Modulation in UWB Perspective

Applying the basic principle of moving the signal spectrum from its original base band and centering it

in the carrier frequency allows carrying signal messages, (e.g., human voice or digital data), with

frequencies that could not be transmitted by radio antennas with current technology. This principle

allowed the appearance of radio communications.

Frequency modulation is a particular case of what is called sinusoidal carrier angle modulation. Angle

modulation consists in making the carrier signal instantaneous phase change linearly with a

modulating signal. This can be made by changing the signal’s phase (PM) or frequency (FM) [10].

Let’s consider only frequency modulation. The sinusoidal carrier can be represented by equation (2.2)

𝑋𝐹𝑀(𝑡) ( (𝑡)), (2.2)

where is the carrier amplitude (in Volts) and (𝑡) is the carrier instantaneous phase, that can be

represented by (2.3):

(𝑡) 𝑡 (𝑡) 𝑓 𝑡 (𝑡), (2.3)

The carrier frequency is 𝑓 , and (𝑡) represents the phase instantaneous deviation. To perform a

change in 𝑓 , it is necessary to define the frequency instantaneous deviation (𝑡) (2.4):

(𝑡) 1

2 (𝑡)

𝑡 𝑓 𝑚(𝑡), (2.4)

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where 𝑓 is the frequency modulation index or the frequency deviation used to describe the maximum

instantaneous difference between an FM modulated frequency and the carrier’s frequency 𝑓 , and

𝑚(𝑡) is the modulating signal [10], [11]. At this point, it is possible to define the VCO transfer function

𝑉(𝑡) (2.5):

𝑉(𝑡) 1

2 (𝑡)

𝑡 𝑓 𝑓 𝑚(𝑡), (2.5)

The result is a linear function, where 𝑓 controls the slope and is proportional to the VCO gain. The

VCO function can be observed in figure 2.8.

Figure 2.8 – VCO transfer function.

Generate a FM signal with UWB characteristics means that the signal spectral power needs to fit in

the UWB requirements, a signal with minimum bandwidth around 500 MHz for frequencies of

operation above 3.1 GHz, and according to figure 2.2, an EIRP level of -41.3 dBm/MHz.

There are two major kinds of denomination for FM signals, based in its bandwidth, narrowband FM

and wideband FM [10]. FM-UWB makes part of the second type and it is important to analyze both

types to better understand all the concepts and approximations.

One of the most important aspects is the signal’s spectral power, so we will start by analyzing the

carrier’s PSD and the modulating signal’s amplitude probability density function (PDF) [12].

The carrier signal 𝑋(𝑡) is ideal and given by (2.6), and its respective power spectral density 𝑆 (𝑓)

given by (2.7):

𝑋(𝑡) ( 𝑡), (2.6)

𝑆𝑋 (𝑓) 𝐴

[ (𝑓 𝑓 ) (𝑓 − 𝑓 )], (2.7)

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Power spectral density 𝑆 (𝑓) is a pair of Dirac delta function’s (𝑓) with amplitude ( 𝟐)𝟐, that

represents the sine wave power, (cosine wave power in this case), condensed in a single frequency,

in this case the carrier frequency 𝑓 , as shown in figure 2.9.

Figure 2.9 – Spectral power density ( ) of the cosine carrier signal.

The signal’s amplitude PDF gives us the shape of the spectral power density of a frequency

modulated sinusoidal carrier 𝑆𝑋𝐹𝑀 (𝑓). It is more intuitive to understand if we think that the Dirac delta

function’s (𝑓), (representing the spectral power of the sine wave), are shifted to other frequencies

according to a certain probability.

To maximize the transmitted power, the spectral power density 𝑆𝑋𝐹𝑀 (𝑓) should have the same shape

as the FCC spectral mask for the operation bandwidth, meaning that the signal’s amplitude PDF

should be a continuous uniform distribution [12], (in this particular case, the Dirac delta function’s (𝑓)

are being shifted to other frequencies with equal probability).

The PDF ( ) of the signal 𝑚(𝑡), with amplitude between [− ] Volt, represented in figure 2.10,

follows a continuous uniform distribution and its integral is equal to one (∫ ( )𝑑 1).

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Figure 2.10 – PDF for the modulating signal m(t).

The definition of narrowband FM signal is given by (2.8) [10]:

| (𝑡)| | 𝑓 ∫ 𝑚( )𝑡

𝑑 | 1, (2.8)

leading to the following transmission band (2.9) where is the bandwidth for the modulating

process PSD [10]:

, (2.9)

For wideband FM signal we have (2.10) [10]:

𝑓 𝑓 , (2.10)

In this condition we are able to apply what is known by quasi-stationary approximation leading to a

different transmission band (2.11) [10]:

𝑓 |𝑚(𝑡)| 𝑎 , (2.11)

In figure 2.11 both transmission bands are represented to better understand the difference between

them.

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Figure 2.11 – Transmission bandwidths for narrowband and wideband FM signals

By knowing the carrier PSD 𝑆𝑋 (𝑓), the modulating signal’s PDF ( ), and the respective

transmission band it is possible to obtain the wideband FM signal’s PSD 𝑆𝑋𝐹𝑀 (𝑓)(2.12),

represented in figure 2.12 [10].

𝑆𝑋𝐹𝑀 (𝑓) 𝐴

[ (

) (

)], (2.12)

Figure 2.12 – Power spectral density 𝑆𝑋𝐹𝑀 (𝑓) of the wideband FM signal 𝑋𝐹𝑀(𝑡).

To obtain a spectral power density with a continuous uniform distribution we need to a have a signal

with a linear variation, this means that the modulating signal 𝑚(𝑡) must be a triangular waveform, as

shown in figure 2.13.

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Figure 2.13 – Modulating signal 𝑚(𝑡), triangular waveform with period T.

2.5. Conclusions

In this chapter an overview over the main UWB technology characteristics was made. The bandwidth

usage and the spectral power limitations imposed by the regulatory authorities were referred. Also, the

main implementation types were described and a more detailed description of FM-UWB was

presented, once this was the scheme chosen to develop the transmitter.

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3. FM-UWB Circuit

Architecture ____________________________________________________

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3.1. Introduction

The circuits here explained are implemented with ideal components making this a high level circuit

description. These circuits are the first approach to validate the concepts involved in FM-UWB

transmission technique. Also, to verify the theoretical demodulation concepts and the transmitter

correct operation, it was necessary to develop the transmission channel and the receiver high level

circuits. All the circuits and simulations were developed and performed using the Cadence® program.

This chapter is divided in three main sections, concerning the transmitter, the transmission channel

and the receiver, where the functioning of the major blocks are explained, followed by the simulation

analysis. In the transmitter section, it is also presented the desired characteristics.

3.2. Transmitter

The modulator described was created to implement the previous explained FM concepts. FM-UWB

use a double FM scheme, which means that first, is necessary to modulate a subcarrier signal 𝑚(𝑡)

using the data to be transmitted 𝑑(𝑡) and then use this subcarrier signal to modulate the carrier

signal 𝑋𝐹𝑀(𝑡), as illustrated in figure 3.1 [2].

Figure 3.1 – Time-domain view of data d(t), subcarrier m(t), and UWB signal XFM(t) [2].

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In figure 3.2 is presented the high-level modulator scheme with the two basic blocks involved, the

subcarrier generator and the carrier modulator (VCO).

Figure 3.2 – FM-UWB high level modulator schematic.

3.2.1. Transmitter Characteristics

Since the beginning of this work there were some specifications that needed to be fulfilled. The

transmission power allowed is clearly the most important, since it is a requirement to the signal

transmission. The range with line of sight (LOS), the RF centre frequency as well as the raw data rate

were chosen taking in consideration some aspects, such as the final applications and the compatibility

for transmission in different regions of the globe.

The carrier’s amplitude, the RF bandwidth and the subcarrier frequencies are other transmitter

characteristics that are not specifications, but result from the simulations made to respect those

specifications.

All the referred characteristics are presented in table 3.1.

Transmission power ≈ -42.78 dBm/MHz

Range with LOS 2 m

RF centre frequency 7.9 GHz

Raw data rate 1 Mbps

Carrier amplitude 25 mV

RF bandwidth 1 GHz

Subcarrier frequencies 2 – 4 MHz

Table 3.1 – Transmitter characteristics.

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3.2.2. Subcarrier Modulation

With a triangular waveform modulating the carrier signal we can obtain a transmitted signal with UWB

properties such as a flat spectrum and a very wide bandwidth with steep spectral roll-off.

This subcarrier must also contain the information, so some of its properties must change according to

the modulating data. The change will be only at its frequency level, which means that we are again in

the presence of frequency modulation. We intend to transmit only digital data, and this type of discrete

frequency modulation is called frequency-shift keying. For our specific case, the modulation will be

made to transmit only binary data (BFSK) with a low-modulation index 𝑓 .

To perform this BFSK on the subcarrier signal, it is used the subcarrier generator block present in

figure 3.2 and which schematic is shown in figure 3.3.

Figure 3.3 – Subcarrier generator circuit schematic.

The subcarrier generator block uses two voltage sources to generate each triangular wave with two

different periods 1 and 0 , corresponding to 𝑓1 and 𝑓0 (the

indexes in the period and frequency, correspond to digital high (1) and low (0)). The signals generated

have amplitude of 1 peak-to-peak, with a variation between − and .

A multiplexer is used to select the correct signal in the subcarrier generator output 𝑚(𝑡),

(corresponding to entrance “A” the data “low (0)” and to entrance “B” the data “high (1)”). This

selection is made directly from the digital raw data 𝑑(𝑡).

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3.2.3. Carrier Modulation

This carrier modulation is implemented with an ideal VCO, as shown in figure 3.2. This circuit

generates a sinusoidal carrier with certain amplitude and the sinusoidal wave instantaneous frequency

is controlled by the VCO transfer function, as described previously, (the VCO transfer function is

presented in figure 2.8).

This block allows the user to select the carrier’s amplitude , centre frequency 𝑓 and the VCO gain

that corresponds to the frequency deviation 𝑓 .

These parameters allows to control the fundamental properties of the transmitted signal, such as

transmitted power and signal bandwidth, which means that it is necessary to realize some simulations

to determine which values are needed to obtain the required specifications, as the data rate and the

power transmission.

3.2.4. Simulation

The simulations were focused in the VCO output signal 𝑋𝐹𝑀(𝑡) that corresponds to the signal that will

be sent to the antenna. It is necessary to remember that the subcarrier signal 𝑚(𝑡) was also important

to these simulations once it directly controlled the frequency instantaneous deviation (𝑡).

The simulation corresponding to the subcarrier generator, where the subcarrier signal 𝑚(𝑡) is

generated, can be observed in figure 3.4.

Figure 3.4 – Simulation results of the digital raw data d(𝑡) and the subcarrier signal 𝑚(𝑡).

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The most important problem to be solved concern the transmitted power, (UWB spectral power must

respect the maximum limit of -41.3 dBm/MHz). Using the discrete Fourier transform (DFT) special

function, provided by the Cadence® calculator tool, it is possible to calculate the carrier spectral

power.

The equation used to obtain the signal 𝑋𝐹𝑀(𝑡) power spectral density was (3.1):

𝑆𝑋𝐹𝑀(𝑓) 10 [ (𝑋𝐹𝑀(𝑡))

0 10 ] , (3.1)

The value 1 , correspond to an impedance of multiplied by 1 to convert dB units into

dBm units. Since the PSD is measured in dBm/MHz, the time interval values for beginning and stop

are [1 1 1 ] seconds, corresponding to intervals with duration of 1 s. All the other DFT

function parameters, the number of samples considered (32768 samples), the trimming shape window

(rectangular window) and the smoothing factor (equal to 1), are the standard ones used for these

function. Equation (3.1) and DFT parameters in the calculator are shown in figure 3.5.

Figure 3.5 – 𝑋𝐹𝑀(𝑡) power spectral density expression and DFT parameters in the calculator.

The unmodulated carrier signal and its power spectral density are presented in figure 3.6.

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Figure 3.6 – Unmodulated carrier signal and its respective power spectral density.

The DFT only plots positive frequencies and, as expected, the spectral power density is not

concentrated only in one frequency as shown in figure 2.9. It is possible to observe several harmonics

that are at least 50 dB lower, as well as the phase noise introduced by the simulator. It is clear that the

highest value (-19.059 dBm) corresponds to the carrier frequency (𝑓 ).

The next step consists in applying various triangular waves, (subcarrier signals 𝑚(𝑡)), with different

frequencies 𝑓 at the VCO input, and using two different values for the VCO gain, (corresponding to

different transmission bands ). The simulations were made for three different values of the

amplitude carrier .

The results for the maximum spectral power density can be observed in table 3.2. PSD values are in

dBm.

Ac 15 mV 25 mV 35 mV

BT

fx

500

MHz

1

GHz

500

MHz

1

GHz

500

MHz

1

GHz

2 MHz -44.33 -47.44 -40.89 -44.06 -36.97 -40.05

4 MHz -41.57 -44.50 -37.91 -41.39 -34.12 -37.18

5 MHz -40.39 -43.53 -36.06 -40.06 -33.15 -36.14

10 MHz -37.40 -40.63 -33.01 -35.95 -30.09 -33.12

Table 3.2 – Simulation results for maximum power spectral density for different subcarrier

frequencies, transmission bands and carrier amplitudes.

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Only the highlighted values in table 3.2 fulfills the maximum spectral power density limit requirement

for UWB EIRP of (-41.3 dBm/MHz), all the others were discarded This approximation takes in account

the number of samples and the time interval (1 s corresponds to 1MHz band).Thus it is guaranteed

that the values selected are in fact lower than those obtained in reality, and a real circuit implemented

with the characteristics corresponding to those values will respect the UWB EIRP limit.

Increasing the subcarrier frequency 𝑓 leads to a higher power spectral density value, (as shown by the

results in table 3.2), however the probability of error in the demodulator decreases. Also, to minimize

the bit error rate in the demodulator, the frequency 𝑓0 should be at least twice the frequency 𝑓1. Based

on table 3.2 results, it is decided to use 𝑓1 for data high “1” and 𝑓0 for data low “0”.

The subcarrier frequency 𝑓 1 was not even considered for simulations.

To obtain a higher signal-to-noise ratio (SNR) in the receiver, it is decided to use 25 mV, (50 mV peak-

to-peak), for the carrier amplitude rather than 15 mV, as shown in figure 3.6, leading to a transmission

band 1 . To allow the transmitter operation in the regions presented in figure 2.3 with a

transmission band 1 , the carrier frequency must be 𝑓 .

The simulations for subcarrier signal 𝑚(𝑡), carrier signal 𝑋𝐹𝑀(𝑡) and carrier power spectral

density 𝑆𝑋𝐹𝑀(𝑓) are represented in figure 3.7, where it is possible to analyze the spectrum of a carrier

with 25 mV amplitude, with a maximum spectral power value of -42.78 dBm/MHz centered in the

carrier frequency 𝑓 .

Figure 3.7 – Simulation of subcarrier signal 𝑚(𝑡), carrier signal 𝑋𝐹𝑀(𝑡) and carrier power spectral

density 𝑆𝑋𝐹𝑀(𝑓)

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3.3. Transmission Channel Model

The transmission channel model here described pretends to simulate the propagation of an RF signal

in open space and the main nonlinear effects due to attenuation and thermal noise distortion. The

signal is affected by many other effects, such as other types of noise, signal path reflections and

interferences, but these will be ignored at this stage.

It is important to understand how these phenomena affect the signal, so it can be recovered by the

receiver. It is also important to adjust the transmitter specifications, (e.g., transmitted power). In order

to simulate the transmission channel effects a high-level circuit was created using ideal blocks. The

circuit comprises a white Gaussian noise source, an attenuator and an adder. The circuit schematic

can be observed in figure 3.8.

Figure 3.8 – Schematic circuit for the transmission channel model.

3.3.1. Attenuation

Attenuation is one of the major problems concerning to RF transmission. The free-space loss on a line

of sight path is due to spherical dispersion of the radio wave. The signal loss or attenuation is given

by (3.2) [13]:

(

)2

(

)2

, (3.2)

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As we can see the loss depends directly on the signal wavelength and the distance 𝑑, since we are

considering propagation in free-space, the radio wave propagation occurs at the speed of light

( 1 ) and therefore the equation depends only on the signal frequency 𝑓 and distance 𝑑.

It is more usual to express signal attenuation in decibels, and in this case the expression is (3.3):

10 (

) , (3.3)

The attenuator block in figure 3.8 was developed in a standard modeling language for analog circuits

named Verilog-A and its code is presented in Annex, figure A1.

With (3.3), some calculations were made for different distances assuming the carrier frequency and,

as expected, the attenuation value increases approximately 6 dB when the path length doubles. The

results are listed in table 3.3.

f d 0.5 m 1 m 2m

7.9 GHz 44.37 dB 50.39 dB 56.41 dB

Table 3.3 – Attenuation values for different distances using the carrier frequency of 7.9 GHz.

3.3.2. Thermal Noise

The term noise is usually used to refer phenomena that tend to disturb the transmission and the

processing of signals in communication systems [14]. A noise signal instantaneous value and phase

cannot be predicted at any time. Since noise sources have amplitudes that vary randomly with time,

they can only be specified by a probability density function [15]. If we ignore undesirable signal

interferences from other electromagnetic sources, the type of noise that mostly affects the signal in its

transmission is thermal noise. It is in thermal noise that we will centre our attention.

Thermal noise is also known as Johnson noise (this type of noise was first measured by John B.

Johnson at Bell Labs in 1928) and is normally characterized as being additive white Gaussian noise

(AWGN), it is generated by thermal agitation of the atomic particles in a conductor. When the heat

increases in a conductor the thermal noise also increases. Heat disrupts the electrons’ response to an

applied potential, it adds a random component to their motion. Thermal noise only stops at absolute

zero [15].

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The thermal noise is denominated as white due to its flat or uniform spectral power density, which

means that it is independent of the operating frequency. The adjective white is used as comparison to

the white light that contains equal amounts of all frequencies within the visible band of electromagnetic

radiation [14].

Thermal noise has a Gaussian PDF, meaning that there is a mean value of amplitude, which is most

likely to occur. The probability that a noise amplitude will be higher or lower than the mean falls off in a

bell shaped curve, which is symmetrical around the centre [15]. This concept is illustrated in figure 3.9.

Figure 3.9 – Noise signal and Gaussian probability density function.

From quantum mechanics considerations, the noise power spectral density 𝑁0 (in watts per hertz)

generated in any lossy element is given by (3.4) [7]:

𝑁0 𝑓 [1

𝑒 ⁄ 1 1], (3.4)

where ( 1 ) is the Planck constant, (1 1 2 ) is Boltzmann

constant, 𝑓 is the frequency in hertz and is the absolute temperature in kelvin.

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For frequency values of Gigahertz order or smaller, the noise power density equation can be reduced

to (3.5) [7]:

𝑁0 [W/Hz], (3.5)

The noise power 𝑁 in a certain bandwidth is given by (3.6):

𝑁 1 10( .1000) , (3.6)

Noise power 𝑁 is noise density 𝑁0 multiplied by the bandwidth under consideration. The wider the

bandwidth, the more the noise power collected.

In Table 4 are presented some values for different bandwidths with .

B [GHz] N [dBm]

0.25 -90

0.5 -87

1 -84

2 -81

Table 3.4 – Noise power values for different bandwidths.

The Gaussian probability density function for thermal noise has mean and variance 2 𝑁0

[13]. Considering 1 the standard deviation is .

The white Gaussian noise source in figure 3.8, was also developed in Verilog-A, its code is presented

in Annex, figure A2.

The noise source was adjusted to have a noise power spectral density of 𝑁0 −11 , and

in this condition the maximum amplitude value detected in this sample was around , as we can

observe in figure 3.10.

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Figure 3.10 – Simulation of noise signal 𝑁(𝑡) and respective power spectral density 𝑁0.

3.3.3. Simulation and Signal-to-Noise Ratio

The signal-to-noise ratio (SNR) can be defined as the ratio between the signal power and the noise

power, usually referred to the receiver input, and is given by (3.7):

(

), (3.7)

It is usually expressed in decibels ( ) and 𝑆 represents the signal power and 𝑁 the noise power,

both detected at the receiver input. This ratio is very useful because it provides an indication of the

degree to which the signal has been contaminated with additive noise [13].

Due to the attenuation effect, the signal power detected at the receiver input, considering a 2m path

length and a transmission band of 1 is (3.8):

𝑆 1 10 (1 1

) − 1 , (3.8)

As we saw before, for a 1 of detection band, we have a noise power 𝑁 of − and

therefore is (3.9).

𝑆 − 𝑁 − 1 − (− ) 1 1 , (3.9)

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When realizing experimental work it is not possible to determine the signal power 𝑆 alone, because we

cannot turn off the noise, instead we must assume superposition of signal and noise power

(𝑆 𝑁), and in this case we can determine the SNR in the following way (3.10) [13]:

(

)

( )

(

) 1 1, (3.10)

In figure 3.11 we can observe the signal attenuated 𝑋′𝐹𝑀 (𝑡), the noise signal 𝑁 (𝑡) and the

signal 𝑌𝐹𝑀 (𝑡) present at the receiver input and given by (3.11):

𝑌𝐹𝑀 (𝑡) 𝑋′𝐹𝑀 (𝑡) 𝑁 (𝑡), (3.11)

Figure 3.11 – Simulation of signal attenuated 𝑋′𝐹𝑀 (𝑡), noise signal 𝑁 (𝑡) and signal 𝑌𝐹𝑀 (𝑡).

3.4. Receiver

The receiver described next comprises two major circuits, a preamplifier and a demodulator. This high

level implementation also uses ideal components. The receiver will allow the test of the signal

reception after noise and distortion and to test the concepts involved in its demodulation.

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One of the major characteristics in a FM-UWB system is that the RF signal is not pulsed hence no

synchronization is needed, allowing non coherent detection, and therefore a simple hardware

implementation can be realized leading to a possible low power consumption [16]. The major

problems that this receiver has to face are the detection of a very low power signal and the design of

filters with a high quality factor , of extremely difficult implementation.

Physical FM demodulators based on direct frequency demodulation simply do not exist, because there

is no physical system capable of reading the instantaneous frequency of a carrier. It is necessary to

convert the signal into a PM or AM signal, so it can be demodulated [16].

This demodulator circuit includes four different stages:

First, the signal is applied to a 4th order band-pass filter, (the fundamental block to this type of

demodulation), converting the signal from FM to AM.

Second, the AM signal will be rectified and amplified by a multiplication by itself.

Third, a low-pass filter to detect the AM envelope is used.

Forth, by using a comparator the envelope signal will be converted into binary digital data, so

it could be decoded and transformed into the original data.

The preamplifier schematic circuit is presented in figure 3.12 and the demodulator schematic circuit is

presented in figure 3.13.

Figure 3.12 – Preamplifier high level schematic.

Figure 3.13 – Demodulator high level schematic.

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3.4.1. Preamplifier

The preamplifier circuit consists in a band-pass filter and an amplifier as shown in figure 3.12. The

band-pass filter will limit the noise distortion to the signal transmission band and the amplifier will

amplify the signal, adding the minimum possible noise, to a range possible to be used by the

demodulator.

The total gain of the receiver is around 44 dB. The band-pass filter is based in a Laplace 2nd

order

transfer function (3.12) and was implemented in Verilog-A, its code is presented in Annex, figure A3.

( )

, (3.12)

where represents the filter gain, 0 is the filter centre frequency in radians per second and 0 is the

filter quality factor, the filter passing band is given by (3.13):

, (3.13)

The filter implemented has the following values, , 0 , 1

and 0 .

In figure 3.14 it is possible to observe the signal at the input 𝑌𝐹𝑀 (𝑡) and output 𝑋′′𝐹𝑀 (𝑡) of the

preamplifier circuit.

Figure 3.14 – Signal at the input 𝑌𝐹𝑀 (𝑡) and output 𝑋′′𝐹𝑀 (𝑡) of the preamplifier circuit.

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3.4.2. Spectral Shaping Band-Pass Filter

The filter used in this demodulator is normally called spectral shaping filter and converts an FM signal

into an AM signal. The filter passing band is approximately ten times smaller than the signal

transmission band, (narrow band response), and it has a high gain. The filter is centered in the carrier

fundamental frequency, meaning that every time the carrier instantaneous frequency is approximately

equal to the carrier fundamental frequency the signal will be amplified, otherwise it will be attenuated,

acting this way like a sensor.

In this particular case it is possible to demodulate the data just by knowing the subcarrier frequency

without obtaining the original message (triangular wave). It is a conversion from FM signal into

Gaussian shape AM signal where the filter response directly controls the envelope of the demodulated

signal [16]. In figure 3.15 the conceptual idea that allows the conversion of FM into AM signal is

illustrated.

Figure 3.15 – Band-pass filter response to convert FM into AM signal.

The filter characteristics are the following, , 0 , 1

and 0 . As mentioned, the filter high quality factor is one of the challenging problems concerning

this implementation as well as the filter tunability. It is important to tune the filter to correspond to

different FM signal bandwidths and to mitigate some process variation [16].

To minimize the filter high quality factor, a 4th order band-pass filter was implemented, by using two

band-pass biquadratic sections. The characteristics for the first section are the following, 1 1 ,

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0 , 1 1 1 and 0 , and for the second are, 2 1 ,

0 , 2 1 1 and 0 . Both sections were based in a Laplace 2nd

order transfer function (3.12) and were implemented in Verilog-A. The code is similar to the one used

for the preamplifier filter presented in Annex, figure A3.

In figure 3.16 we can observe the subcarrier signal 𝑚(𝑡) and the AM signal resulting from the filter

conversion 𝑋𝐴𝑀 (𝑡). It is important to note that the resulting AM pulses frequency is twice the

respective subcarrier frequency, since for each subcarrier period the carrier frequency will assume two

times the fundamental frequency 𝑓 , as represented in figure 3.15.

Figure 3.16 – Subcarrier signal 𝑚(𝑡) and AM signal 𝑋𝐴𝑀 (𝑡) resulting from the filter conversion.

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3.4.3. Signal Rectifier

The signal rectifier block allows a signal improvement and elimination of the signal negative

component, by multiplying the signal for itself. The result is shown in figure 3.17.

Figure 3.17 – Signal after rectification 𝑋𝐴𝑀 𝟐(𝑡).

3.4.4. Low-Pass Filter

The low-pass filter acts as a signal envelope detector removing this way the carrier signal. The low-

pass filter is also based in a Laplace 2nd

order transfer function (3.14) and it was implemented in

Verilog-A. The code used is the same shown in Annex figure A3, but with the following low-pass filter

Laplace function.

( )

, (3.14)

The filter characteristics are, , 0 𝑑 and 0 1. The AM envelope signal

𝑌𝐴𝑀 (𝑡) detected by the low-pass filter is presented in figure 3.18.

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Figure 3.18 – Low-pass filter output signal 𝑌𝐴𝑀 (𝑡).

3.4.5. Comparator

The comparator used here is a basic converter that compares the signal pulses amplitude with a

certain reference value and converts the signal into a digital binary code. The reference value used

is 𝑉 𝑒 , if the signal amplitude is above this value the resultant signal will be a constant

signal with amplitude 𝑉 𝐺 1 , else 𝑉 . The comparator input signal 𝑌𝐴𝑀 (𝑡) and output

signal 𝑌′𝐴𝑀 (𝑡) can be observed in figure 3.19.

Figure 3.19 – Comparator input signal 𝑌𝐴𝑀 (𝑡) (red signal) and output signal 𝑌′𝐴𝑀 (𝑡) (blue signal).

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3.5. Digital Decoder

The demodulator previously presented, generate a binary digital code (BDC) directly related with the

subcarrier frequency, by knowing the subcarrier frequency it is possible to obtain the original data. In

figure 3.20 the digital decoder circuit schematic is shown.

Figure 3.20 – Digital decoder circuit schematic.

First is used a counter with a clock frequency eight times higher than the higher subcarrier frequency.

The pulses generated are used as a counter reset. That way, a value that measures the respective

delay between each pulse is generated. This value is stored in a register and then it enters into a logic

circuit. If the value is between 0 and 4 the logic circuit output will be logic 0 otherwise will be logic 1.

The value generated by the logic circuit is stored in a chain of two flip-flop D not in phase with each

other, the first one with a clock frequency four times smaller than the original data rate and the second

one with a clock frequency equivalent to the original data rate. The flip-flop D chain guarantees that

the demodulated signal has the same frequency than the original one with a lower bit error rate.

In figure 3.21 it is possible to observe the original data 𝑑(𝑡), the BDC signal 𝑌′𝐴𝑀 (𝑡) and the

recovered data 𝑑′(𝑡). The major delay between the original data and the recovered data is due to the

flip-flop D chain.

Figure 3.21 – Original data 𝑑(𝑡), BDC signal 𝑌′𝐴𝑀 (𝑡) and recovered data 𝑑′(𝑡).

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3.6. Conclusions

In this chapter the transmitter, the transmission channel and the receiver high-level model circuits

were studied. The circuits functioning was described and simulated to validate the theoretical concepts

involved in this type of modulation.

It was shown it is possible to create a carrier with flat spectrum and a very wide bandwidth with step

spectral roll-off by using a triangular subcarrier signal. Despite the low amplitude of the carrier, needed

to respect the EIRP limits, it was shown that is possible to recover the data after the main distortions

originated by the transmission channel. Also, it was proved that the proposed receiver does not need

a PLL circuit to recover the data, however, the band-pass filter needed to transform the FM signal into

AM signal could be the major concern in its implementation.

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4. Circuit Implementation ____________________________________________________

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4.1. Introduction

In the last chapter an explanation about the desired transmitter behavior and its functioning was made.

This chapter pretends to evolve that explanation into a description of each block composing the circuit,

with the respective functioning simulations.

To implement the transmitter, two relaxation oscillators were used, one to implement the subcarrier

generator and the other to implement the voltage controlled oscillator. In both blocks, different

characteristics of this type of oscillator were exploited. The main advantages of using this type of

oscillator are its simple operation mode and its simple architecture that could lead to reduced area and

power consumption.

4.2. Relaxation Oscillators

It is possible to separate the existing oscillators in two main types: quasi-linear oscillators and strongly

non-linear [17].

Quasi-linear oscillators include the LC oscillators, the most common in this category. LC oscillators

can use dielectric resonators, crystals, striplines and LC tanks as a resonator element and are known

by their good phase-noise performance.

Strongly non-linear (or relaxation) oscillators are usually implemented with RC-active circuits [18].

Relaxation oscillators are RC type and tend to have a higher phase-noise when comparing to LC

oscillators. However, by using only resistors and capacitors as passive devices, instead of inductors,

relaxation oscillators can achieve lower area and cost, being widely used in fully integrated circuits

where phase-noise requirements are not demanding [18], [19].

The relaxation oscillator is referred to as a first order oscillator, since its behaviour can be described in

terms of first order transients [20]. The simple operation mode is based on the alternated charging and

discharging of a capacitor between two threshold voltage levels that are pre-defined, and its oscillation

frequency is inversely proportional to its capacitance [21].

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4.2.1. High-Level Model

To better understand the relaxation (or RC) oscillator operation mode, it is first described using a high-

level model, comprising an integrator and a Schmitt-trigger, as shown in figure 4.1.

Figure 4.1 – Relaxation oscillator block diagram.

The Schmitt-trigger controls the sign of the integration constant by imposing a threshold value to the

integrator, the sign is changed when that value is reached. The output waveforms of the two blocks

are represented in figure 4.2.

Figure 4.2 – Oscillator output waveforms VINT and VST.

As we can observe in the previous figure, when the Schmitt-trigger output (VST) is at its highest value,

the integrator output (VINT) increases. When VINT reaches the imposed maximum threshold value, the

Schmitt-trigger output will change to its lowest value and the integrator output starts to decrease until it

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reaches the minimum threshold value. Again, the Schmitt-trigger output commutates to its highest,

and the process starts from the beginning.

4.2.2. Circuit Implementation

The oscillator implementation should be as simple as possible for operation at very high frequencies,

reducing this way the number of potential noise sources. A possible relaxation circuit implementation

is presented in figure 4.3.

Figure 4.3 – Relaxation oscillator implementation.

The integrator is simply implemented by a capacitor, where the capacitor current ( ) represents the

block input, and the capacitor voltage (𝑣 ) the respective block output. In figure 4.4 is represented the

integrator block and respective waveform.

Figure 4.4 – Integrator block and respective output waveform.

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The Schmitt-trigger is implemented by two transistors NMOS, two resistances and two current

sources, being 𝑣 its input and its output. In figure 4.5 is represented the Schmitt-trigger and its

respective transfer function, assuming that the switching occurs abruptly when the sign of 𝑣 − 𝑣

changes.

Figure 4.5 – Schmitt-trigger block and respective transfer function.

Usually, the differential oscillator output is the voltage 𝑣 𝑣1 − 𝑣2 [20]. This value corresponds

to the threshold limits imposed by the Schmitt-trigger and it is described by the following equations

(4.1):

𝑣 {𝑉 − (𝑉 − ) 1 − (𝑉 − ) − 𝑉 − 2 −

, (4.1)

In this condition, the maximum amplitude of the output voltage is , as represented in figure 4.6.

Since the oscillator integration constant is ( 𝐶), for low oscillation frequencies, the oscillation

frequency can be calculated by equation (4.2).

𝑓0 1

2𝐶( )

1

𝐶, (4.2)

However, this equation can also be used to estimate the order of the components used for circuit

implementation, even for higher frequencies. A more accurate expression for the oscillation frequency

can be found in [22].

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Figure 4.6 – Relaxation oscillator waveforms.

Despite its relaxation behaviour, corresponding to lower oscillator frequencies, this type of oscillator

can also operate with an almost sinusoidal behaviour, being this one of the characteristics that will be

explored for the VCO implementation. At very high frequencies the outputs are approximately

sinusoidal, since the harmonics are filtered out by the circuit parasitics.

4.3. Frequency-Shift Keying Implementation

It is usual to use a direct digital synthesizer (DDS) for this type of subcarrier generation [9], but due to

its complexity, it was chosen to use an oscillator. It is necessary to generate a triangular wave with two

different frequencies of operation and to do so, the characteristic that will be explored in the oscillator

is the integrator output waveform VINT rather than the usual Schmitt-trigger output waveform VOUT.

As seen before, in figure 4.4, the integrator is only a capacitor and its integration constant is the

current that flows through the capacitor over its capacitance ( 𝐶), meaning that changing the

current or the capacitance 𝐶, will linearly change the capacitor time of charging and discharging and

therefore the frequency of the output waveform VINT, as shown in figure 4.7.

The solution adopted was to change the oscillator capacitance value and to perform that, the oscillator

was implemented with two capacitors of about the same value, where one of them could be used or

not, by turning on or off a pair of transistors. This circuit is illustrated in figure 4.8.

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Figure 4.7 – Integrator waveform 𝑣𝐶0 (corresponding to a capacitance C) and 𝑣𝐶1 (corresponding to

a capacitance 2C).

Figure 4.8 – Relaxation oscillator with variable capacitance.

This implementation leads to a differential output where the pretended waveform is 𝑣𝐶 𝑣 − 𝑣 .

When the signal DATA is equal to “0” the transistors M3 and M4 will be cut-off and 𝑣𝐶 will be equal

to 𝑣𝐶 , otherwise when DATA is equal to “1” the transistors M3 and M4 will be conducting and the

capacitance value will lead to 𝑣𝐶 equal to 𝑣𝐶1.

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4.3.1. Control Circuit

To guarantee that the capacitance value only changes when the capacitor completely charges or

discharges, it is necessary to develop an additional control circuit. By performing this operation the

error introduced in the modulated signal is lower (confirmed by simulation results). However, it is

impossible to eliminate this error completely since it results from the impossibility to generate signals

with an infinite frequency precision, due to the discrete capacitance values allowed. The control circuit

schematic is shown in figure 4.9

Figure 4.9 – Control circuit schematic.

The control circuit is simply composed by a buffer and a flip-flop D edge-triggered. The buffer is used

to transform the signal 𝑣1 or 𝑣2 into a digital signal, that will be used as clock to control the flip-flop D.

This way, the flip-flop D only changes its value when 𝑣1 or 𝑣2 changes, synchronizing the signal

DATA with the integrator transitions. The signal 𝑑(𝑡) represents the data to be transmitted.

4.3.2. Simulation Results

In order to verify the behavior of the redesigned relaxation oscillator along with the use of a control

circuit (circuit represented in figure 4.10,), it is simulated using components from the UMC 0.13 µm

design kit, such as the RF transistors N_12_RF. Also, it was used two transistor implemented current

sources adjusted to the needed specifications. Instead of using capacitors, it was chosen to use RF

varactors, specifically designed to operate in RF frequencies and to allow a possible capacitance

adjustment. The elements parameters used in the simulations are indicated in table 4.1.

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Figure 4.10 – Relaxation oscillator with variable capacitance and control circuit.

Width [m] Length [m] Gate Finger Multiplier Value

M1 2.5µ 120n 16 1 -

M2 2.5µ 120n 16 1 -

M3 2.5µ 120n 16 1 -

M4 2.5µ 120n 16 1 -

C1 10µ | 10µ 520n | 530n 8 | 8 5 | 5 2.45p + 2.50p [F]

C2 10µ | 10µ 520n | 530n 8 | 8 6 | 6 2.94p + 3.00p [F]

R 510n 18µ - 6 28.544 k [Ω]

Iav - - - - 15.81µ [A]

Table 4.1 – Parameters used in the simulation of the relaxation oscillator with variable capacitance.

The variable capacitances C1 and C2 were implemented with a pair of varactors assembled in anti-

parallel. In these conditions the frequencies obtained were of 4.361 MHz for 𝑣𝐶 and 2.070 MHz

for 𝑣𝐶1. The maximum voltage value for the differential output is 575 mV, and the minimum voltage is

225 mV.

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The graphical result for the signal 𝑣𝐶 𝑣 − 𝑣 is depicted in figure 4.11, for a data signal 𝑑(𝑡) with

transitions between “0” and “1”. It is also possible to observe the graphical results for the control circuit

in figure 4.12 and figure 4.13.

Figure 4.11 – Simulation result for the signal 𝑣𝐶, for a data signal 𝑑(𝑡) with transitions between “0”

and “1”.

Figure 4.12 – Simulation result for the signal 𝑣1 and CLK, for a data signal 𝑑(𝑡) with transitions

between “0” and “1”.

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Figure 4.13 – Simulation result for the signal DATA and comparison with the original data signal 𝑑(𝑡)

with transitions between “0” and “1”.

The results obtained in the circuit simulation are very satisfactory, proving that is possible to obtain a

triangular waveform and perform FSK with the modified relaxation oscillator and the help of a simple

control circuit. The modified relaxation oscillator along with the control circuit, from now on, will be

referred in this work as FSK oscillator.

4.4. Voltage Controlled Oscillator Implementation

The voltage controlled oscillator can be considered the key element in a frequency modulation

process (remember equation (2.5) and figure 2.8), and perhaps one of the most challenging blocks to

design in a high-performance system. It typically represents the bottleneck of the achievable noise

performance, making LC oscillators the primary choice in a VCO design [23]. However and as already

referred, this performance comes at great area expense, mainly due to the difficulty of realizing good

quality integrated spiral inductors, meaning a great cost when working with IC [23].

The lower area occupied by a relaxation oscillator, (when comparing to a LC oscillator), and its simple

mode of operation makes it a potential alternative in RF VCO design. For these reasons, the

relaxation oscillator is chosen to the VCO implementation instead of an LC oscillator.

The VCO can be simply implemented using an oscillator whose capacitance variation could be

controlled by a reference voltage in a linear way. Also, it is necessary to use a sinusoidal carrier for

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transmission. Considering the oscillator output the signals 𝑣𝑜𝑢𝑡1 or 𝑣𝑜𝑢𝑡2, and knowing that for higher

oscillation frequencies these signals present an almost sinusoidal behavior, the major problem

concerns the wide variation needed to achieve at least 1 GHz bandwidth.

Commonly, varactors are used, being implemented as reverse-biased p-n junctions. In CMOS

technology, this can be accomplished using the available p+/n

− diffusions and p

-/n

- wells. Despite

having a modest maximum-to-minimum capacitance ratio 𝐶 𝑎𝑡𝑖𝑜 (4.3) that worsens as the supply

voltage scales, p-n junction varactors are adequate for applications with limited tuning needs [23],

which is not the case.

𝐶 𝑎𝑡𝑖𝑜 𝐶 𝑎 𝐶 𝑖𝑛⁄ , (4.3)

A possible solution, and perhaps the most usual, is to use an array of p-n junction varactors providing

a linear and continuous frequency tuning range within different bands. However, this solution implies a

control circuit with some complexity.

The solution adopted in this work, is to use the parasitic capacitances gate-source 𝐶 and gate-

drain 𝐶 of a MOS transistor as variable capacitances. The details of this solution are presented in

section 4.4.1. Combining some properties of the MOS transistors that affect its parasitic capacitance

and rearranging the basic relaxation oscillator topology, it is also possible to use the differential output

produced by the FSK oscillator, otherwise it would be necessary to use a differential-to-single

converter, introducing more complexity to the circuit and possible signal distortion. The proposed

topology for the VCO is presented in figure 4.14.

Figure 4.14 – Proposed topology for VCO with MOS varactors and differential tuning signals.

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4.4.1. MOS Varactors

MOS varactors are variable, voltage-controlled capacitors based on the MOS structure. Their main

application is voltage-controlled oscillators [24]. The varactor capacitance 𝐶𝐺 (4.4) determines the

VCO frequency 𝑓0 (4.2).Their main advantage is an intrinsic capacitance ratio (𝐶 𝑎𝑡𝑖𝑜) that is much

higher than that of p-n junction varactors. For the small-signal model, 𝐶 𝑎𝑡𝑖𝑜 values of 2 to 5 can be

achieved in practice, even with control voltage swings as small as 1V [23].

𝐶𝐺 𝐶 𝐶 , (4.4)

In figure 4.15 is represented a cross section of an NMOS varactor and the small-signal model

generally assumed for varactors: a variable capacitance in series with a variable resistance (RV).

Figure 4.15 – Cross section of a conventional NMOS varactor (in depletion; left) and the generally

assumed model (right). The dashed line indicates the border of the depletion region [24].

The MOS varactor is not a four-terminal device as the transistor but a three-terminal device. The

source and drain regions are shorted to apply the voltage Vtune that tunes the variable capacitance.

The p- body is grounded and the voltage Vgate is applied to the gate node. The variable capacitance 𝐶𝐺

appears between the gate node and all the others. It is also possible to define 𝐶𝐺 as the series

connection of the gate oxide capacitance 𝐶𝑜 and the variable depletion region capacitance 𝐶 , as

shown in equation (4.5) [24].

1

𝐶

1

𝐶

1

𝐶 , (4.5)

Depending on the voltage applied at the gate terminal Vgate, it is possible to define different operation

regions for the MOS varactor, known as accumulation-, depletion- and inversion-mode. In figure 4.16

is possible to observe the variation of capacitance 𝐶𝐺 for small-signal model within these different

operation modes [24].

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Figure 4.16 – Typical measured small-signal capacitance characteristic 𝐶𝐺 of a NMOS varactor

(bottom) and the relevant lumped elements (top) at zero tuning voltage [24].

Inversion- and accumulation-mode are the most common varactor configurations. Because electrons

are the majority carriers in the depletion and accumulation regions, the accumulation-mode device has

less parasitic resistance than the inversion-mode device, which uses holes as majority carriers [24].

The transition from depletion to inversion is determined by the voltage difference between gate and

source/drain and the threshold voltage. Therefore the transition voltage will be increased with

increasing tuning voltage, meaning that is possible to shift the inversion-mode characteristic granting

another degree of freedom to the design. In figure 4.17 is possible to observe the typical measured

small-signal capacitance characteristic of a conventional NMOS varactor at various tuning voltages

[24].

Figure 4.17 – Typical measured small-signal capacitance characteristic of a conventional NMOS varactor at various tuning voltages [24].

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For the NMOS device, the source and drain are n+

doped. The substrate (or well) region between and

around source and drain is of opposite doping, i.e. p- type. Process determined the polysilicon gate is

of the same doping as source and drain, i.e. n+

type. A PMOS device is obtained when all regions

have opposite doping as in the NMOS [24]. Hence, the inversion-mode capacitance characteristic 𝐶𝐺

of a PMOS varactor is the symmetric of a NMOS varactor. In figure 4.18 are represented both NMOS

and PMOS inversion-mode capacitance characteristics 𝐶𝐺.

Figure 4.18 – PMOS and NMOS varactor inversion-mode capacitance characteristic 𝐶𝐺.

Due to these characteristics, since they are symmetric, using a NMOS varactor as variable

capacitance C1 and a PMOS varactor as variable capacitance C2, (remember figure 4.14), allow the

possibility to use the differential output produced by the FSK oscillator, (without using a differential-to-

single stage), generating a carrier with the desired frequency variation and avoiding this way distortion

in the subcarrier signal.

4.4.2. Simulation Results

To verify the behavior of the VCO using MOS varactors and controlled by a differential voltage input,

the circuit presented in figure 4.14 was simulated using components from the UMC 0.13 µm design kit.

Also, the two current sources used in the present simulations were designed with real components

and adjusted to the needed specifications. Once more, instead of using a capacitor to implement the

VCO capacitance C0, it was used a RF varactor for the same reasons presented in section 4.3.2,

dedicated to the FSK oscillator simulations. It was necessary to use a pair of varactors for both

capacitances (C1 and C2), not only to achieve the desirable capacitance variation values, but also to

create a common input control terminal, as shown in figure 4.19. The elements parameters used in the

simulations are indicated in table 4.2.

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Figure 4.19 – Three terminal MOS varactor circuit schematic.

Width [m] Length [m] Gate Finger Multiplier Value

M1 2.6µ 120n 16 1 -

M2 2.6µ 120n 16 1 -

C0 2.5µ 150n 3 6 79.65f [F]

C1 M1C1 900n 270n 15 6 Cmax Cmin

M2C1 900n 270n 15 6 101.69f [F] 32.58f [F]

C2 M1C2 1.6µ 200n 15 6 Cmax Cmin

M2C2 1.6µ 200n 15 6 105.47f [F] 36.03f [F]

R 2µ 7.44µ - 3 1.36 k [Ω]

Iav - - - - 2.48m [A]

Table 4.2 – Parameters used in the VCO simulation.

The maximum-to-minimum capacitance ratio obtained for the variable capacitance C1, corresponding

to the varactor NMOS, was of =3.12. For the variable capacitance C2, corresponding to the

varactor PMOS, the value obtained was of =2.93. These values were obtained for a variation of

400 mV. It was used 200 mV as the minimum voltage (Vmin) and 600 mV as the maximum voltage

(Vmax), due to the minimum and maximum values expected for the FSK oscillator outputs.

By applying Vmin to one varactor and Vmax to the other varactor, it was possible to obtain the maximum

and minimum VCO oscillation frequencies within the referred interval. The maximum and minimum

frequencies obtain were 6.78 GHz and 8.56 GHz.

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To verify the VCO frequency variation behaviour, it was applied a constant voltage value of 400 mV to

one varactor and to the other a linear variation from 200 mV to 400 mV during 500 ns. The results are

presented in figure 4.20.

Figure 4.20 – VCO frequency variation resulting from NMOS varactor excitation (1) and PMOS

varactor excitation (2).

As expected, it is not possible to obtain an accurate linear variation for the frequency, due to the many

constraints involved, such as the components dimensions allowed by technology, the simplification of

the models involved and the ambitious bandwidth considered. Also, it is possible to observe that the

variation obtained with the PMOS varactor excitation has a more smooth variation than that obtained

with the NMOS varactor excitation.

The VCO output 𝑣𝑜𝑢𝑡1 presented in figure 4.21, was obtained with a voltage value of 400 mV applied

to both varactors, and its frequency is of about 7.87 GHz.

Figure 4.21 – VCO output 𝑣𝑜𝑢𝑡1 with a frequency of 7.87 GHz.

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4.5. Current Sources

The current sources used in the FSK oscillator and in the VCO share the same basic topology and

both have a terminal that allows the circuit power down. The difference between them is the different

current values obtained throw different transistors dimensions. The circuit schematic for both current

sources is depicted in figure 4.22.

Figure 4.22 – Current source circuit schematic.

The elements used in FSK current source and VCO current source are from the UMC 0.13 µm design

kit, and their parameters are presented in table 4.3 and table 4.4, respectively.

Width [m] Length [m] Gate Finger Multiplier Value

M1 1.1µ 120n 1 1 -

M2 1.1µ 120n 1 1 -

M3 1µ 120n 1 1 -

M4 1µ 360n 1 1 -

M5 1.6µ 120n 1 1 -

C - - - - 10p [F]

Iav - - - - 15.81µ [A]

Table 4.3 – Parameters used in the FSK current source.

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Width [m] Length [m] Gate Finger Multiplier Value

M1 75µ 120n 1 1 -

M2 65µ 120n 1 1 -

M3 18µ 120n 1 1 -

M4 1µ 360n 1 1 -

M5 100µ 120n 1 1 -

C - - - - 10p [F]

Iav - - - - 2.48m [A]

Table 4.4 – Parameters used in the VCO current source.

4.6. Conclusions

In this chapter it was performed a study about the relaxation oscillator and the possibility of using this

type of oscillator to build the main cores of the proposed transmitter, the subcarrier generator

(frequency-shift keying oscillator) and the voltage controlled oscillator.

Regarding the FSK oscillator, the implementation of a second capacitance allows the possibility of

obtaining a signal with two different oscillation frequencies, controlled by the data to be transmitted

along with the help of a control circuit, of simple implementation.

Despite the differential output produced by the FSK oscillator, and as referred before, there is no need

of using a differential-to-single converter, since the VCO oscillator is redesigned to use a differential

input to control the two variable capacitances.

As expected, the VCO oscillator output for high frequencies, presents a sinusoidal behaviour and the

use of MOS varactors as variable capacitances, allows a frequency variation of 1.78 GHz.

The simulation results obtained for both circuits are considered very satisfactory, once they fulfill the

proposed specifications needed to generate a FM signal with UWB properties.

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5. Transmitter Simulation

and Results ____________________________________________________

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5.1. Introduction

In this chapter simulations of the FM-UWB transmitter are presented and analyzed. Both oscillators

presented earlier are connected to produce the desired FM-UWB signal. This chapter is divided in two

main sections: in section 5.2 the transmitter schematic is presented, along with a table containing the

final components parameters used in the transmitter implementation. Also, the circuit core simulation

results are presented, comprising already the output buffer, bonding wires, pads and ESD protections.

Finally, in section 5.3 the transmitter layout is presented.

5.2. Transmitter Schematic and Simulations

5.2.1. Circuit Schematic

The transmitter schematic is presented in figure 5.1. In order to simplify the drawn schematic the

current sources are only represented by its symbols, since their schematics are already shown in the

previous chapter, figure 4.22, and their elements parameters remained without any modification

(tables 4.3 and 4.4).

Figure 5.1 – Transmitter circuit schematic.

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In table 5.1 the final elements parameters used in the transmitter are shown. All the elements used to

implement the transmitter are RF elements from the UMC 0.13 µm design kit. The transistor models

used to implement the NMOS and PMOS type were the N_12_RF and P_12_RF.

Width [m] Length [m] Gate Finger Multiplier Value

M1 – M4 2.5µ 120n 16 1 -

M5 – M6 2.6µ 120n 16 1 -

C0 2.7µ 150n 5 2 47.79f [F]

C1 10µ | 10µ 500n | 500n 8 | 8 4 | 5 1.89p + 2.36p [F]

C2 10µ | 10µ 500n | 500n 8 | 8 6 | 5 2.83p + 2.36p [F]

C3 M1C3 900n 270n 15 6 Cmax Cmin

M2C3 900n 270n 15 6 101.69f [F] 32.58f [F]

C4 M1C4 1.6µ 200n 15 6 Cmax Cmin

M2C4 1.6µ 200n 15 6 105.47f [F] 36.03f [F]

R1 – R2 510n 18µ - 6 28.54k [Ω]

R3 – R4 2µ 6.88µ - 3 1.26k [Ω]

I1av - - - - 16.17µ [A]

I2av - - - - 2.63m [A]

Table 5.1 – Parameters used in the transmitter implementation and simulation.

The variable capacitances C1 and C2 were implemented with a pair of varactors assembled in anti-

parallel. The variable capacitances C3 and C4 represent the MOS varactors implemented with two

pairs of MOS transistors. Transistors M1C3 and M2C3 correspond to capacitance C3 and transistors M1C4

and M2C4 to capacitance C4, as indicated in the previous table.

When comparing the element parameters from table 5.1, with those presented in tables 4.1 and 4.2

used to test the FSK oscillator and the VCO oscillator independently, it is possible to note that it was

necessary to perform small adjustments to maintain the desired characteristics.

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5.2.2. Graphical Results

All the simulation results presented here were obtained considering a simulation interval of 8.5 µs. In

figure 5.2 is depicted the original data signal 𝑑(𝑡) and the signal DATA, resulting from the control

circuit, that is synchronized with the FSK oscillator transitions.

Figure 5.2 – Signal 𝑑(𝑡) with transitions between “0” and “1” and simulation result for signal DATA.

It is possible to observe that the signal DATA impulses have different duration. These different

duration impulses result from the constant synchronization between the output produced by the FSK

oscillator and the original data 𝑑(𝑡), this happens due to the impossibility of creating an oscillator with

an infinite precision frequency, as already referred.

The graphical comparison between these two signals is already established in figure 4.13, but it is

important to analyze it again, since the signal DATA is the primary signal that controls the entire

transmitter behaviour and it is necessary to establish comparisons between this signal and some other

results presented ahead.

The output 𝑉𝑡𝑢𝑛𝑒1 and 𝑉𝑡𝑢𝑛𝑒2 produced by the FSK oscillator, as well as the differential signal 𝑣𝐶

(resulting from the difference between them), are illustrated in figure 5.3 and figure 5.4.

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Figure 5.3 – Simulation result for the differential output 𝑉𝑡𝑢𝑛𝑒1 and 𝑉𝑡𝑢𝑛𝑒2 produced by the FSK

oscillator.

Figure 5.4 – Simulation result for the signal 𝑣𝐶 (𝑉𝑡𝑢𝑛𝑒1 − 𝑉𝑡𝑢𝑛𝑒2).

The maximum voltage value for the differential output signals 𝑉𝑡𝑢𝑛𝑒1 and 𝑉𝑡𝑢𝑛𝑒2 is of 494m V, and the

minimum voltage is of 212 mV. The voltage difference between 𝑉𝑡𝑢𝑛𝑒1 and 𝑉𝑡𝑢𝑛𝑒2 is in the interval

[−240, 240] mV, which means that 𝑣𝐶 has an amplitude of about 480 mV. The two 𝑣𝐶 frequencies are

2.166 MHz and 4.442 MHz.

Figure 5.5 demonstrates the synchronization between the signal 𝑣𝐶 and the signal DATA.

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Figure 5.5 – Simulation result showing the synchronism between the signal DATA and signal 𝑣𝐶.

In figure 5.6 is presented the signal 𝑉𝑜𝑢𝑡1 along with a graphical result of its instantaneous frequency

variation during the simulation.

Figure 5.6 – Simulation result for signal 𝑉𝑜𝑢𝑡1 (including its instantaneous frequency).

The signal 𝑉𝑜𝑢𝑡1 presents also some amplitude modulation. This phenomenon occurs due to the

frequency variation in the VCO. Since it is working at very high frequencies, the VCO output voltage

does not have enough time to reach its maximum and minimum values, (which also grants to the

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signal an almost sinusoidal behavior). Thus, for higher frequencies the signal has a lower amplitude

and vice-versa. The signal presents a frequency variation between 7.37 GHz and 8.50 GHz and its

maximum and minimum voltage are 1.14 V and 545 mV respectively.

More graphical results concerning to this simulation can be consulted in Annex, figures A4 and A5.

5.2.3. Simulation Results using Pads, Bonding Wires, ESD

protection and Antenna

The signal 𝑉𝑜𝑢𝑡1 has an average amplitude of 425 mV, since the pretended amplitude value for

transmission is of about 50 mV (to respect the imposed EIRP level), a simple common drain stage is

used to drive the load.

This common drain stage is usually used as an isolator [25]. It was implemented with two transistors,

in which transistor M2 is used as a current source, as shown in figure 5.7.

Figure 5.7 – Common drain stage schematic.

Thus, it is guaranteed that the behavior of the VCO will not be affected since this buffer has a high

input impedance ( 𝑖) and low output impedance ( 𝑜). Ignoring the capacitive effects leads to 𝑜 𝑜

that can be given by (5.1) [25]:

𝑜 1 1 𝑜1

1 𝑜2, (5.1)

where 1 is the M1 transconductance, 𝑜1 is the M1 incremental resistance, an incremental

parameter due to body effect and 𝑜2 the dynamic resistance imposed by the simple current source.

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Considering that 𝑜1 1 1 , 1

1 and 𝑜2 1 1 , equation (5.1) can be rearranged into equation

(5.2):

𝑜 1

, (5.2)

In order to connect the circuit core with the test board it is necessary to use pads and bonding wires,

thus, it is important to test the circuit with these elements, since they can affect the circuit performance

and its respective output signal. Moreover, it is also used electrostatic discharge (ESD) protection

elements to prevent permanent damage in the integrated circuit while it is being tested. ESD is easy to

occur by a simple human touch in the circuit terminals, so it is necessary to add this protection in the

nodes that are connected to the outside.

To implement the pads and the ESD protection elements it is used PAD_RF and DIOP_ESD_RF

elements from the UMC 0.13 µm design kit. The pad parameters are presented in table 5.2. The

schematic of the ESD protection is depicted in figure 5.8 and its dimensioning is shown in table 5.3.

Width [m] Length [m] Multiplier

74.2 µ 80.8 µ 1

Table 5.2 – Pads parameters.

Figure 5.8 – ESD protection schematic.

Width [m] Length [m] Multiplier

600n 120µ 1

Table 5.3 – ESD protection parameters.

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The bonding wire model used is shown in figure 5.9, and the estimated parameters values are

presented in table 5.4.

Figure 5.9 – Bonding wire model schematic.

Value

R 1 Ω

L 2 nH

C 100 fF

Table 5.4 – Bonding wire parameters.

Another important element for the transmitter simulation is the antenna, once it is necessary to

evaluate the emitted signal. The antenna model used is depicted in figure 5.10, with the values

presented in table 5.5 for a nominal frequency of 8.3 GHz.

Figure 5.10 – Antenna model schematic.

Value

R 50 Ω

L 3.99 nH

C 92 fF

Table 5.5 – Antenna parameters.

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The schematic showing the transmitter core, buffer, ESD protections, pads, bonding wires and

antenna can be consulted in Annex, figure A6.

Simulation results for the buffer output signal Vout1’ and the antenna input signal Vant_in, (this antenna

input signal also corresponds to the bonding output signal), are presented in figure 5.11.

Figure 5.11 – Simulation result for signal 𝑉𝑜𝑢𝑡1´ and Simulation result for signal 𝑉 𝑡_ .

Due to its filter behavior, it is possible to observe that the bonding wire has some distortion effect in

the signal amplitude leading to a higher attenuation at higher frequencies.

In figure 5.12 is shown the antenna output signal 𝑉𝑎𝑛𝑡_𝑜𝑢𝑡 along with two samples that allows a closer

look into the signal shape and amplitude. Also, in figure 5.13 is depicted the signal 𝑉 _

instantaneous frequency and its respective DFT.

Figure 5.12 – Simulation result for signal 𝑉𝑎𝑛𝑡_𝑜𝑢𝑡.

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The signal 𝑉 _ presents the expected sinusoidal behaviour. The output buffer parameters were

adjusted to allow a signal 𝑉 _ maximum amplitude of [-36.23, 35.71] mV and a minimum amplitude

of [-17.07, 16.98] mV. The signal average amplitude is of about 53 mV (peak-to-peak), what is

concordant with the pretended value of 50 mV, although this undesired amplitude modulation will

slightly affect the transmitted PSD, as shown in figure 5.13.

Figure 5.13 – Simulation result for signal 𝑉𝑎𝑛𝑡_𝑜𝑢𝑡 instantaneous frequency and DFT.

The transmitted signal instantaneous frequency remains identical to the one concerning to the

signal 𝑉 𝑡1. It presents a frequency variation between 7.33 GHz and 8.50 GHz, corresponding to a

1.17 GHz bandwidth. The highest PSD sample value detected is of -40.937 dBm, corresponding to a

frequency of 7.372 GHz. Despite this value being out of the EIRP level allowed by the FCC, a closer

look in the DFT reveals that only three bins are above the FCC spectral mask. As shown in figure

5.13, the majority of the bins are way below the allowed value of -41.3 dBm, meaning that these three

bins are not significant in the final result.

A summary of the transmitter characteristics obtained with this simulation, including the expected

consumption of all circuits used in its implementation, are shown in table 5.6.

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FSK Oscillator

Oscillator Frequency 2.166 MHz – 4.442 MHz

Current Consumption 20.084 µA + 35.320 µA + 19.580 µA + 31.633 µA = 106.617 µA

Voltage Controlled Oscillator

Oscillator Frequency From: 7.33 GHz – To: 8.50 GHz

Current Consumption 1.026 mA + 6.092 mA = 7.118 mA

Bandwidth 1.17 GHz

Output Buffer

Current Consumption 0.906 mA

Table 5.6 – Transmitter simulation results.

5.2.4. Simulation Results with High-level Models for Transmission

Channel, Receiver and Digital Decoder

In order to verify if the emitted signal has the same robustness as the one generated by the high-level

transmitter when facing the high-level transmission channel, and if the undesired signal properties,

such as the amplitude modulation and the different impulses duration, (originated by the data

synchronization), do not affect the high-level receiver and the recovered data, it was decided to run a

transmitter simulation along with the previous high-level circuit blocks.

In figure 5.14 is presented the channel output signal Vchannel and the preamplifier output signal Vpre_amp.

Figure 5.14 – Simulation result for signal Vchannel and signal Vpre_amp.

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In figure 5.15 it is shown the band-pass filter output where the FM signal information is converted into

an AM signal (Vam_pulse) and the respective BDC code (Vbdc) generated by the demodulator.

Figure 5.15 – Simulation result for signal Vam_pulse and signal Vbdc.

Is possible to clearly identify the pulses generated by the band-pass filter according with the signal

frequency variation and as expected the digital decoder could recovered the original data DATA_Rec,

as depicted in figure 5.16.

Figure 5.16 – Simulation result for signal DATA_Rec and comparison with the signals 𝑑(𝑡) and DATA.

This 8.5 µs simulation is not enough to observe any bit error introduced by the signal data

synchronization and thereby the recovered data (DATA_Rec) is identical to the original data 𝑑(𝑡),

despite the delay introduced.

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5.2.5. Corners

In order to analyze the robustness of an integrated circuit design against the semiconductor

manufacturing variation processes it is usual to test the circuit design for the case of extreme

parameter variations, which are known as process corners. Also, it is common to test if the circuit runs

at lower or higher temperatures and voltages than the specified [26]. To verify the transmitter design

robustness, several simulations were performed corresponding to different Process, Voltage and

Temperature (PVT) corners. The PVT corners used to test the transmitter are presented in table 5.7

and their results are shown in table.5.8.

Transistors Resistors Capacitors Temp [ºC] VDD [V]

Typical Typ Typ Typ Typ Typ

Corner 1 FastFast Max Max 0 1.26

Corner 2 FastFast Min Min 0 1.26

Corner 3 SlowSlow Max Max 100 1.14

Corner 4 SlowSlow Min Min 100 1.14

Corner 5 FastSlow Max Max 0 1.26

Corner 6 FastSlow Min Min 0 1.26

Corner 7 FastSlow Max Max 100 1.14

Corner 8 FastSlow Min Min 100 1.14

Corner 9 SlowFast Max Max 0 1.26

Corner 10 SlowFast Min Min 0 1.26

Corner 11 SlowFast Max Max 100 1.14

Corner 12 SlowFast Min Min 100 1.14

Table 5.7 – PVT corners simulated.

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FSK Oscillator Voltage Controlled Oscillator

Current Consumption

[µA]

Oscillation Frequency

[MHz]

Current Consumption

[mA]

Oscillation Frequency

[GHz]

Bandwidth [GHz]

Typical 106.617 2.17 – 4.44 7.118 [7.33, 8.50] 1.17

Corner 1 79.694 1.96 – 3.91 6.228 [6.32, 7.43] 1.11

Corner 2 149.980 2.10 – 4.20 13.790 [7.78, 8.43] 0.65

Corner 3 70.221 1.60 – 3.10 3.940 [5.36, 6.06] 0.70

Corner 4 63.968 2.01 – 4.02 – – –

Corner 5 99.42 1.80 – 3.60 5.712 [6.34, 7.16] 0.82

Corner 6 110.920 2.46 – 4.90 12.698 [8.88, 9.96] 1.08

Corner 7 104.921 2.04 – 4.08 4.886 [6.01, 6.81] 0.80

Corner 8 95.112 2.64 – 5.29 – – –

Corner 9 126.592 1.53 – 3.07 4.496 [5.56, 6.61] 1.05

Corner 10 100.398 2.60 – 5.20 11.430 [8.25, 9.30] 1.05

Corner 11 123.598 1.70 – 3.40 3.232 [5.24, 6.21] 0.97

Corner 12 97.721 2.07 – 4.17 – – –

Table 5.8 – Corners simulation results.

From the analyses of the table 5.8 it is possible to observe that there is a wide dispersion in the results

obtained. Despite the use of current sources with variable reference currents, allowing some control in

the oscillator’s frequency, this design variable was not enough to ensure the circuit would work in all

conditions. The FSK oscillator is much more robust to PVT corners and both its current consumption

variation and its oscillation frequency variation are inside acceptable values that will not affect

significantly the transmitter characteristics. The VCO is much more sensitive to corners, mainly due to

the oscillation frequency dependence on the MOS varactors implementation. The lower capacitance

C0, despite being variable, is not dominant for the oscillator frequency, due to its small value. Thus,

facing these design limitations the oscillation conditions were not guaranteed to start the VCO for

corners 4, 8 and 12. These corners share minimum value models for the R and C simultaneously, with

100ºC and supply voltage at a minimum of 1.14V. These conditions can be relaxed depending on the

application, for instance if it is biomedical the temperature can often be limited to a much lower value

and in case we have a smart-power block the supply voltage is also much more controlled than ±5%.

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In case it is necessary to ensure these corners, a way to overcome these variations is to add a

variable resistor, not implemented, as it is another fundamental variable to control the oscillation

frequency.

Despite corners 4, 8 and 12 for the remaining ones, the minimum bandwidth remains above the

500 MHz, (minimum bandwidth to be considered a UWB signal), and all the bandwidths remain inside

the FCC allocated band for UWB transmission. However, for the lower bandwidths, it is necessary the

use of a signal attenuator before the antenna drive, to respect the imposed EIRP level.

Monte Carlo analyses are also a common test for analog circuits, testing the circuit robustness against

process variations and mismatches. However, at the time of this writing, this type of analysis is

unavailable for 0.130 µm UMC technology with RF models.

5.3. Layout Design

The final step of the FM-UWB transmitter implementation is its layout design. Some important rules

and precautions should be taken in order to improve the circuit reliability:

All connections should be as short and as straight as possible, in order to minimize their

resistances, parasitic inductances and magnetic fields;

Maximization of the connections between metal layers to decrease resistance and guard against

possible manufacturing errors;

The connections to the substrate are distributed along the circuit to reduce parasitic effects and

improve the biasing of the substrate;

All connections should be designed to support higher current than the expected.

For these specific designed circuits, the layout should be made as symmetrical as possible in order to

mitigate eventual asymmetric delays in the signals propagation.

In figure 5.17 is depicted the FM-UWB transmitter without pads, ESD protections and output buffers.

The layout presented has an area of 351 mm x 202 mm ≈ 0.071 mm2 and it is possible to observe the

different circuit blocks that compose the transmitter.

The layout presented in figure 5.18 is the FM-UWB transmitter already including the pads, the ESD

protections and the respective output buffers designed for the VCO output signals. This layout has an

area of 360 mm x 366 mm ≈ 0.132 mm2.

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Figure 5.17 – FM-UWB transmitter layout without pads, ESD protections and output buffers.

Figure 5.18 – FM-UWB transmitter layout with pads, ESD protections and output buffers.

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5.4. Conclusions

In this chapter it is described the parameters and changes made to the FSK oscillator and to the VCO

in order to implement the transmitter with real transistor level RF models.

First it was performed a standalone simulation to the transmitter core, analyzed its main

characteristics, such as frequencies, amplitudes, driving signals, wave shapes and bandwidth.

Following, it was performed a simulation considering the output buffer, pads, ESD protections,

bonding wires and also the antenna model. These circuits’ parameters were also presented along with

the circuit current consumption, exhibiting very satisfactory results for the transmitted signal, including

its instantaneous frequency variation, its PSD and its respective bandwidth.

It also was performed a simulation using the transmission channel and receiver high-level circuits,

presented in chapter 3. This simulation also shows very satisfactory results, despite small differences

when compared with the transmitter high-level circuit simulation.

The PVT corners revealed some weaknesses concerning the VCO for a particular group of

occurrences. It should be further evaluated if this combination of factors is indeed required or should

be corrected in future project stages.

Finally, the circuit layout is presented, with an area of ≈ 0,071 mm2 without pads and ≈ 0.132 mm

2 with

pads, fulfilling one of the work goals of designing low-area circuits.

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6. Conclusion and Future

Work ____________________________________________________

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6.1. Conclusion

The objective of this work was to implement a radio frequency CMOS transmitter operating around

8 GHz, based on Frequency Modulation in Ultra-Wideband and using a 0.13 µm CMOS technology

It was performed a study about Ultra-Wideband technology basic concepts and how to adapt

traditional narrowband frequency modulation into the modern Ultra-Wideband regulated band, taking

advantage of the properties that this technology has to offer. To fulfill this task a high level model of a

link budget was designed to evaluate the system feasibility. The transmitter, the receiver and a model

of the channel were implemented to allow a first study of the signal characteristics and how to adapt

those according to the established project specifications.

Based on the previous results, a circuit topology was selected to fit the requirements. Once the basic

purpose of the circuit, since the beginning, was to target low cost applications, it was decided to use

inductorless circuits reducing the circuit area and leading to a price decrease. The solution was to use

a relaxation oscillator topology, (based only on resistors and capacitors as passive elements), that

after a brief study revealed that had the potential to be adapted in order to obtain the desired results.

To implement the FSK oscillator, a second capacitance and a pair of switches was added to the RC

oscillator, allowing the possibility of obtain a triangular signal with two different frequencies, capable of

being controlled by the transmitted data with the help of a simple control circuit.

Taking advantage of the differential output produced by the FSK oscillator and using an NMOS and a

PMOS varactor as variable capacitances, it was possible to redesign an RC oscillator and convert it

into a VCO capable of achieving 1.17 GHz of bandwidth.

The standalone simulation of the transmitter core and the simulation including all the circuits and

components needed to broadcast the signal showed very satisfactory results, proving the capabilities

of the designed circuit. Despite the need of some improvements to fulfill all PVT corners, it was shown

that the circuit could comprise a large range of operation.

Finally and after the circuit layout design it was possible to conclude that there is a huge area saving

when compared with circuits using inductors.

Therefore and based on all the results presented in this thesis it is possible to conclude that the

implementation of a radio frequency transmitter in FM-UWB has been successfully achieved.

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6.2. Future Work

To minimize the current consumption in the transmitter, especially in the VCO, since this circuit is the

critical element concerning the transmitter total power consumption, a different current source

topology should be studied and developed in order to fit the VCO power requirements.

Also, regarding the transmitter power consumption, the possible use of lower power RC oscillators

(RC oscillators that only uses one current source proposed in [18]) should be studied, since during the

time of this work it was not possible to test the circuit behaviour using this modified topology, and a

possible reduction to half the power consumption can be obtained.

To further reduce the die area, a circuit implementation only using MOSFET transistors should be

considered. Replacing the capacitors and resistors in the circuit for MOSFET transistors can reduce

the total area of implementation. Also, when subjected to process variations and mismatches the

transistors typically present lower variations when compared to capacitors and resistors leading this

way to an increase in circuit robustness.

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References

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[1] Domenico Porcino, Walter Hirt, "Ultra-wideband radio technology: potential and challenges

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[4] João Nascimento, “A Study on Range - Data Rate Performance of UWB Wireless

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[11] Andrea Goldsmith, “Wireless Communications”, Cambridge University Press, UK, 2005

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John Wiley & Sons, New York, 3ª Edição, 2003

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[13] A. Bruce Carlson, “Communication systems: An Introduction to Signals and Noise in Electrical

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Annex

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Figure A1 - Verilog-A code for the attenuator block.

Figure A2 - Verilog-A code for white noise Gaussian source.

Figure A3 - Verilog-A code for band-pass biquadratic filter.

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Figure A4 - Vout1' instantaneous frequency Vs DATA signal.

Regarding Figure A4, is possible to observe that the Vout1' instantaneous frequency transmissions from

2 MHz to 4 MHz, and vice-versa, are well synchronized with the transmitted DATA signal variations.

Figure A5 - Vout1' Power Spectral Density.

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Figure A6 - Circuit schematic with the transmitter core, buffers, ESD protections, pads, bonding wires and antennas.

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Figure A7 - FM-UWB transmitter layout.