Radio Testbeds Using BEE2Susan Mellers', Brian Richards', Hayden K.-H. So2, Shridhar Mubaraq Mishra', Kevin Camera',

P. A. Subrahmanyaml, Robert W. Brodersen''Berkeley Wireless Research Center, University of California, Berkeley

2Department of Electrical and Electronic Engineering, The University ofHong Kong

Abstract- Flexible Radio Testbeds are being designed usingthe Berkeley Emulation Engine (BEE2) platform. Narrow-bandand wide-band platforms are discussed which can accommodatea full spectrum of wireless multiple radios for wide and narrow-band applications. The BEE2 programming and debuggingcapabilities, using Simulink and Linux augmented with theBORPH operating system, provide a high level designenvironment. Applications are discussed which portray theflexibility of these testbeds and the ability to demonstrate realisticscenarios, as well as comprehensively evaluate and verifytheoretical results.

I. INTRODUCTION

This paper describes a set of flexible wireless testbeds usingthe Berkeley Emulation Engine (BEE2), shown in Fig. 1.These testbeds have been developed at the Berkeley WirelessResearch Center. Both wide-band and narrow-band testbedsare discussed. The wide-band testbed is modular andscaleable. The modules include an Interface Breakout Board(IBOB), ADC, DAC, and analog I/Os. Two frequency bandsof interest are discussed. One band is in the TV/ISM bandfrom 600MHz-IGHz. The second band is around 2.45GHzwith a 500MHz band. The narrow-band system has 2.4GHzreconfigurable RF modems. One can use up to 16 radios andantennas in parallel with the narrow-band system. Phasesynchronization and digital synchronization are provided withthe narrow-band testbed. Both the wide-band and narrow-band testbeds have fiber link interfaces to the BEE2.

The focus of this paper is on the hardware, programmingenvironment, and applications of the narrow and wide-bandtestbeds using BEE2. This paper is organized as follows:Section 2 presents the hardware for the narrow-band and wide-band testbeds. Section 3 discusses the programming

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Fig. 1. Block Diagram of the Radio TestBed Components

environment. Section 4 describes applications using both thenarrow-band and wide-band test beds including: cognitiveradio spectrum sensing, verification of a multiband sensingalgorithm, wireless research for the energy commission (theagile radio) and a radio telescope array. Section 5 presents thesummary and conclusions.

II. HARDWARE TESTBEDS TO SUPPORT FLEXIBLE RADIORESEARCH

Both the narrow-band and wide-band flexible radio testbedsconnect to the BEE2. Both testbeds have a fiber link interfacefor connection between BEE2 and radios. This fiber linkallows remote radios and antennas. The wide-band testbed isa modular design with transceivers, an Interface BreakoutBoard, custom boards for wide-band, high speed ADC andDAC, and an analog frontend. I/Q processing is donedigitally. The narrow-band system consists of areconfigurable 2.4GHz radio modem. I/Q may be done inanalog or digitally.

The BEE2 PlatformThe BEE2 Platform shown in Fig. 2 contains five FPGAs,

20 GBytes of DDR2, 64 GBytes per sec of memorybandwidth, 180 GBits of full duplex IO bandwidth, serialinterconnections, transceivers, optical fiber connections, and18 XAUI ports (lOGbit). The only high speed I/0 is thru theXAUI connection.

Fig.2. The BEE2 Processor Board

The BEE2 is highly scalable due to the reliance on gigabitserial I/O for inter-board communication. This scalablesystem architecture allows the BEE2 to support a broad

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variety of applications including wireless research, and haslead to the development of two key wireless testingenvironments: the Wide-Band testbed, and the Narrow-BandMIMO/Cognitive Radio testbed.

The Wide-Band TestbedThe wide-band testbed targets broad-band radio

applications by using the Interface Breakout Board (IBOB)interface with high-performance ADC and DAC cardsconnected to an RF front-end.The BEE2 has limited I/0 options, depending almost

exclusively on the Gigabit serial interfaces for high-bandwidthoff-board I/0. To support specialized I/0 needs, the InterfaceBreakout Board (IBOB) was developed (Fig. 3), providing anon-board Xilinx 2VP50 for preprocessing capability as well asmultiple interfaces. The interfaces include ZDOKs (40 LVDSpairs each running at 256 MHz or 40.96GBits per sec) andXAUI (20 GBits per sec full duplex, 10/100 ethernet, RS232,and 80x GPIO).

Fig 5. RF Frontend Radio Boards: Analog I/0, IADC, andIBOB, which connect to BEE2 via optical fiber.

The Narrow-Band SystemThe narrow-band Cognitive Radio/MIMO testbed shown in

Fig. 6 has a 2.4GHz radio modem which connects to the BEEthrough a fiber or Infiniband cable. This testbed is used formultiple radio or multiple antenna applications, where themultiple units may be used in parallel or independently. Thetestbed has a local oscillator (LO) distribution board toprovide the same LO to 16 radios simultaneously, key to radiotuning and phase synchronization. There is also a digital clockboard for synchronizing the digital components on up to 16boards. The data is synchronized at the ADC and DACbetween digital boards. The 2.4 GHz radio provides 20MHzchannels that can be programmed to operate anywhere withinthe entire 80MHz ISM band. The optical connection betweenthe RF modem and the BEE2 allows for a remote analog front-end.

BEE2I2BOBFig. 3. IBOB: Interface Breakout Board with XAUIconnection to the BEE2 Processor Board

The custom ADC and DAC boards in Fig. 4 connect to theIBOB through high speed ZDOC connectors. Each ZDOCconnector has 40 LVDS pairs, 36 differential pairs for IO and4 pairs for clock. The IADC has a high speed ADC with asampling rate of lGsps or 2 Gsps in interleaved mode. EachADC has 8 bit resolution. The high speed DAC has a samplerate of 1.2Gsps, a high bandwidth of 550MHz, and a highresolution at 10 bits.

Fig. 6. Components of the Cognitive Radio/ MIMO TestBed

The RF Modem shown in Fig. 7 contains the analog I/0(2.4 GHz radio programmable over 85 MHz of bandwidth),analog I/Q, a Xilinx FPGA Virtex 2 Pro, a 14-bit 128MHz -bit

Fig. 4. IADC and IDAC with high speed connections

RF Frontend SystemWide-band experiments at the BWRC include two bands of

interest. One frontend supports TV and ISM bands from600MHz to 1GHz, and a second 500 MHz bandwidth front-end centers around 2.45GHz. The 2.45 GHz ISM band front-end, used for sensing experiments, is designed with aconventional mixer, whereas subsampling is used for theTV/ISM band frontend.

Fig. 7. RF Modem with Narrow band radio daughter card

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DAC, a 12-bit 64MHz ADC, 32MHz wide baseband filters,and the XAUI high speed interface. I/Q may also beprocessed digitally. Multiple RF modems can be connected tocreate the parallel multiple antenna front-end.

III. PROGRAMMING ENVIRONMENTThe highly reconfigurable BEE2 platform and related

interfaces depend on a high-level programming environmentto fully utilize the capabilities of the testbeds describedpreviously. A block-diagram-based programming model wasselected and extended to include support for high-leveloperating system interfaces and debugging abstractions.

Programming Model and Support - Programming withBlock-Diagrams

Traditionally, FPGA-based systems are configured usinghardware description languages such as Verilog or VHDL,requiring detailed knowledge of the reconfigurable platform.Rather than requiring a wireless testbed user to learn low-levelHDL programming techniques, the Matlab Simulink block-diagram editor [1] was employed instead. This environment isfamiliar to many architectural, signal processing, andhardware designers, making it a natural unified environmentfor programming the BEE2 and related system components.

The BEE Platform Studio [2] was developed around theXilinx System Generator blockset and tools, combined withthe Xilinx EDK Embedded microprocessor design tools [3].A library of BEE-specific blocks (Fig. 8) is used to provide ahigh-level abstraction for several FPGA platforms, allowingthe designer to easily add microprocessor register or memoryinterfaces to a signal processing design by selecting a librarycomponent, and configuring the function using Simulinkcomponent property menu selections.

--"ftftftt ADCFig. 8. The Simulink Block-Diagram-Based Programmingenvironment with library components for microprocessor andI/O interfaces.

Once a design is described in Simulink, it can be compiledand mapped onto the BEE2 or other platform using the BEEPlatform Studio. The compiler sets platform-specificparameters for the Xilinx System Generator tool flow, whichis used to generate the hardware description for the dataflowblocks. CPU interfaces are identified in the design, and a setof files is generated with a complete description of theembedded CPU. This description is automatically compiled toproduce FPGA bit files and embedded software header files.

The BORPH FPGA Operating SystemConventional FPGA design flows often require designers to

manually develop corresponding software interfaces tointeract with the executing FPGA designs during runtime.This effort is greatly simplified by the unifiedhardware/software run-time environment provided by theBORPH operating system[4]. By extending a Linux kernel,BORPH provides a UNIX process and file system abstractionfor the user-defined hardware. User FPGA designs areexecuted in the BORPH run-time system as special hardwareprocesses that are identical to any other conventional UNIXprocess except they are executed on FPGAs. User definedhardware constructs such as named registers, embeddedmemories, and attached DRAMs can then be accessed throughBORPH's ioreg virtual file system. For instance, assume thata user design contains a 32-bit register named "FILTER EN."To set a bit in the register, the user can run the shell command:

$echo 1 > /proc/123/hw/ioreg/FILTER_ENBy using the underlying UNIX file system to represent user

defined hardware constructs, BORPH allows designers toeasily access the running FPGA without the need to developany design specific interfaces.On a BEE2 platform, up to four simultaneous hardware

processes, one on each User FPGA, are supported.Combining the block-diagram programming style in Simulinkwith the convenience of BORPH, the designer is able toquickly develop FPGA applications without becoming anexperienced FPGA or embedded system designer.

BDB: The BEE DebuggerDebugging of a design is performed using a custom,

integrated framework which utilizes debug componentsinserted into the hardware netlist in combination with anexternal remote user interface. Layered on top of the BORPHoperating system, the designer can use the BEE Debugger,BDB[5] to easily add hardware trace variables to the Simulinkdesign (Fig. 9), and record related signal activity at near real-time speeds to on-board DRAM during design operation. Inaddition, though BORPH, the user can control the debuggingprocess from any location over the network. Beyond thesimple convenience of being decoupled from the hardwarelocation, this also allows debugging to take place in theoriginal design environment (i.e. Matlab/Simulink), whichgreatly improves bug detection and data analysis compared totraditional hardware capture techniques.

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IV. APPLICATIONSIn this section we provide an overview of a set of

applications enabled by the testbeds detailed above.Specifically the availability of the testbeds enables us toexperiment and evaluate with different aspects of theseapplications not possible in simulation. The narrow-bandtestbed is used for the BWRC cognitive radio experiments.The wide-band front-end is used for verifying the usefulnessof multiband sensing algorithms as well as wide bandapplications.

Cognitive RadioCognitive radios have been envisioned as a mechanism for

the opportunistic reuse of spectrum. These radios "sense" forthe presence of the primary user and use the spectrum only ifit is deemed empty. If a frequency band is deemed empty,these radios can transmit in the band at a power level whichensures minimal interference to the primary radio. This kindof reuse is illustrated in Figure 3, where PUI 4, are primaryusers using their respective bands. CR1 is able to transmit inthe empty band between PU3 and PU4 Comparing this to thetransmission of CR2, CR2 is unable to sense for the presence ofPU2 and starts transmission. This transmission interferes withPU2 and is undesirable.

| CR _4^^kiw~~~~CR~X | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~Pu.i gFig. 10. Cognitive Radio: sensing the spectral environment

As the discussion above illustrates, one of the key aspects ofa cognitive radio is the ability to reliably detect the presence ofprimary users. Furthermore it should do this while ensuringthat its ability to find an empty band is not diminished (Onecan imagine a cognitive radio that always says that a primaryis present. Such a radio always 'detects' a primary but is neverable to use the band). Using the testbeds described earlier, wecontinue to investigate various aspects of cognitive radiooperation.

A. Performance of various single band sensingalgorithms:

The testbed was used to measure the performance of varioussingle radio sensing algorithms: Energy detection, Coherentdetection and Feature detection. The experimentation used theAgilent Signal generator to generate an appropriate primarysignal. This signal was captured by the using the 2.4GHznarrow-band frontend. Since the narrow-band front-end hastwo antenna ports, one of the ports was always terminated andused for noise measurements. The strength of the primary wasvaried and the number of samples needed for achieving atarget probabilitiy of missed detection and probability of falsealarm was measured. These experiments allowed us toverify/observe a number of issues with detection:

* For energy detection the number of samples needed toachieve target detection performance scales as O(SNR2). For pilot detection this scaling is O(SNR1)

* The energy detector suffers from noise uncertainty. Ifthe PSD (power spectral density) of noise is not knownexactly, then the target performance cannot be metirrespective of the number of samples used [6].

* The FFT (Fast Fourier transform) acts as a partiallycoherent detector for sinusoidal primaries [6].

* Coherent detector performance is limited by frequencymismatch between the transmitter and receiver.

* Feature detector performance is also limited byfrequency mismatch between transmitter and receiver.This can be overcome by using a two stage detector [7].

B. Performance of cooperative sensing:Since single radio performance is limited by noise

uncertainty, multiple radios can be used to improveperformance. To conduct these experiments we positioned thereceiver at a number of places in the BWRC as shown inFigure 4. At each location a number of measurements weremade a few wavelengths apart. Cooperation among radios afew wavelengths apart allowed us to get diversity overmultipath. Cooperation among radios further apart allowed usto get diversity over shadowing [6].

Fig. 11. Radio placements at the BWRC to measure gainsfrom cooperative sensing

C. Performance of multiband sensing:For a single radio, we need to set the target detection level

to be very low in order to ensure that we can detect the signaleven when the cognitive radio is severely shadowed. Inmultiband sensing we aim to determine the shadowingenvironment of the radio and then set the detection leveldynamically. To do this we utilize the fact that multipletransmitters are positioned on the same tower (especially forTV channels) and that shadowing across frequencies is highlycorrelated [8]. Thus a detector can sense for channels onnearby frequencies and use these channels to dynamically setthe detection level for the channel in question [9]. We arecurrently in the process of verifying the multiband algorithmusing measurements of TV channels in the bay area. For thiswe are utilizing the wide-band frontend which allows us to

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measure all TV channels between 500MHz and 800MHz. Themeasurements are being made at various locations inBerkeley. At these locations we can measure the TV channelsfrom Mt Sutro and Mt San Bruno.

Wireless Research for the Energy Commission: TheAgile Radio

This research is in coordination with the California EnergyCommission. The goal is to provide Demand ResponseEnabling Technology for using wireless communication tointerface to all different radio types today and into the futurelooking for energy efficiency. The network wouldaccommodate existing infrastructure while adapting to futurecommunication technologies. The Agile Demand ResponseNode would communicate with the home network and accessinformation from sensors and appliances. This node wouldalso communicate with the Utility or service provider thru theinternet. This would work within the home, in wired/wirelessaccess networks (in the form of medium-range mesh networks,local area networks, and metropolitan area networks), andwired/wireless backhaul networks.

Radio Telescope Array

BDB for debugging. We use specialized library modules forour hardware abstraction. For testbed interfaces, high speedgigabit per second digital interfaces are provided by XAUIconnectors. The platforms provide both wide-band andnarrow-band RF frontends in both the TV and ISM bandsincliding A/D and D/As with 8 bits at 2 Gsps and 12 bits at64Msps. The Interface Board, IBOB, provides multiple highspeed connection options. For physical network support weprovide both multiple radios (may be used in parallel orindependently) and optical interconnect (through the 18XAUIs). These testbeds are the result a combined effort of 6faculty, approximately 50 students, and 6 staff, andapproximately 80 BEEs are deployed around the world.

ACKNOWLEDGMENT

The authors wish to acknowledge the contributions of thestudents, faculty and sponsors of the Berkeley WirelessResearch Center, the National Science FoundationInfrastructure Grant No. 0403427, and the support of theCenter for Circuit & System Solutions (C2S2) Focus Center,one of five research centers funded under the Focus CenterResearch Program, a Semiconductor Research Corporationprogram.

REFERENCES[1] http://www.mathworks.com[2] Chen Chang, "Design and Applications of a Reconfigurable Computing

System for High Performance Digital Signal Processing," Ph.D. Thesis,Advisor: Robert Brodersen, University of California, Berkeley, 2005

[3][4]

Fig. 12 The Allen Telescope Array receivers and the IBOB,IADC and BEE2 in the control room

The Allen Telescope Array is a set of 42 antenna receiverslistening for ET, Quasars, and probing the skies. This work iswith the UCB Astronomy Department and the SETI Institute[10]. The modularity, scalability, and ability to upgrade easilywith our wide-band testbed provide the configurable fabricdesired for this application[1 1]. One can model a network ofdevices on this type of topology. In this figure above, aremote antenna system is connected by optical fiber to acustom downconverter and then into the IADC and IBOB.Two 100MHz band signals are sent to a custom correlatorfrom the IBOB. Two 200MHZ wide beamformers are createdthru the connection of a BEE2 to the IBOB.

Hayden Kwok-Hay So,, Ph.D. Thesis, University of California,

Berkeley, 2007.[5] K. Camera, H. K.-H. So, R. W. Brodersen, "An Integrated Debugging

Environment for Reprogrammble Hardware Systems," SixthInternational Symposium on Automated and Analysis-DrivenDebugging, Monterey, CA., September 19-21, 2005

[6] D. Cabric, A. Tkachenko, R.W. Brodersen, "Spectrum SensingMeasurements of Pilot, Energy, and Collaborative Detection", IEEEMilitary Communications Conference (MILCOM), Oct. 2006

[7] A. Tkachenko, D. Cabric, R.W. Brodersen, "Cyclostationary FeatureDetector Experiments Using Reconfigurable BEE2," InternationalConference on Dynamic Spectrum Access Networks, April 2007.

[8] S.M. Mishra, R. Tandra, A. Sahai, "The case for Multiband Sensing",Proc. Of the 45th Annual Allerton Conference on Communication,Control, and Computing.

[9] Artem Tkachenko, Danijela Cabric, R.W. Brodersen, "Cognitive RadioExperiments using Reconfigurable BEE2" Asilomar Conference onSignals, Systems, and Computers, November 2006

[10][11] Parsons, A., et al., "PetaOp/Second FPGA Signal Processing for SETI

and Radio Astronomy," Asilomar Conference on Signals, Systems, andComputers, November 2006.

V. CONCLUSIONThis paper describes a flexible wireless testbed with

associated software support, I/0, and network level support.The BEE2 programming environment includes Simulink forour programming model, BORPH as the run-time OS, and

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