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8/14/2019 Realizing High-voltage Thin Film Lateral Bipolar Transistors on SOI with a Collector-tub
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Realizing High-voltage Thin Film Lateral
Bipolar Transistors on SOI with a Collector-tub
Sukhendu Deb Roy and M. Jagadesh KumarDepartment of Electrical Engineering,
Indian Institute of Technology, Delhi,
Hauz Khas, New Delhi 110 016, INDIA.
Email: [email protected] Fax: 91-11-2658 1264
Abstract
Using two-dimensional process and device simulation, we present in this
paper, a collector-tub lateral bipolar transistor (CTLBT) on silicon-on-insulator (SOI)
to improve the collector-emitter breakdown voltage (BVCEO). We demonstrate that the
presence of the collector-tub, which is realized by etching the buried oxide (BOX)
followed by an N-implantation on the collector NN+-junction side, firstly reduces the
peak electric field at the silicon film-BOX interface and secondly, facilitates the
collector potential to be absorbed both by the collector drift and substrate regions. It is
shown that the BVCEO of CTLBT is enhanced by 2.7 times when compared with a
conventional lateral bipolar transistor (LBT) with identical drift region dopings.
Key Words: Lateral bipolar transistor, breakdown voltage, simulation, and
silicon-on-insulator (SOI)
Sukhendu Deb Roy and M. Jagadesh Kumar, "Realizing High-voltageThin Film Lateral Bipolar Transistors on SOI with a Collector-tub,"Microelectronics International, Vol.22, pp.3-9, March 2005.
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I. Introduction
Thin film lateral bipolar transistors (LBTs) on silicon-on-insulator (SOI) [1-5]
have drawn wide attention in the recent past due to their compatibility with BiCMOS
technology and possibility of integration in smart power ICs. This is particularly true
for applications in medium voltage range (100V-1000V) such as display driver or
ballast circuits where high voltages LBTs are often used [6-8]. Several studies have
been made to improve the breakdown voltage of these LBTs, either by increasing the
critical electric field for breakdown [9-12] or using REdistribution of SURface Field
(RESURF) principle [13-18] or using novel structures [19-23]. However, a major
problem associated with such thin silicon film ( 1m) on SOI, is the fact that the
breakdown voltage is limited by the high electric field at the silicon film-BOX
interface due to difference in dielectric constant between silicon film and BOX. The
breakdown voltages, therefore, do not increase with the increase in drift region length
and saturate at a lower value. This is because the device is operated with the substrate
grounded and hence, the substrate-BOX interface acts as an equi-potential line and the
entire collector voltage is dropped at the BOX and the silicon film on the collector
high-low (NN+) junction side. The present paper highlights the fact that an
enhancement in the breakdown voltage is possible if a collector-tub concept is used to
reduce the peak electric field at the silicon film-BOX interface, which we propose to
achieve with an N-implantation at the NN+-junction side of a conventional N
+PN
-N
+
LBT structure on SOI. Our two-dimensional simulation studies show that the presence
of the collector-tub in a conventional LBT (CTLBT) enhances the collector-emitter
breakdown voltage (BVCEO) by a factor of about 2.7. The paper also presents an
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analysis of the effect of different device parameters on the breakdown characteristics
for optimum device performance of the CTLBT.
II. Simulation methodology
In order to demonstrate the efficacy of the collector-tub in enhancing the
transistor performance, we have used both process as well as device simulation. We
have first created the lateral bipolar transistor structure with and without the collector-
tub using standard experimental parameters available in the literature [24-27] in the 2-
dimensional process simulator ATHENA [28] so that the simulated device structures
are close to that of an experimentally fabricated device in terms of junction
depths/curvatures and impurity distribution. This structure is then imported to a two-
dimensional device simulator ATLAS [29] to evaluate the device characteristics using
appropriate models as discussed in the following sections.
A. Process simulation to realize the device structure
To generate the CTLBT structure, we have chosen a P-type substrate
(NS=5.0x1013
cm-3
) and an N-type silicon film (ND=1.0x1015
cm-3
) on SiO2 as the
starting material in the two-dimensional process simulator ATHENA. The SOI film
and BOX thickness are 1.0m and 1.2m respectively. As illustrated in Fig. 1, the
process flow begins with the formation of the collector-tub by etching the silicon film
and the BOX (Fig. 1(a)) and followed by phosphorus implantation. The energy, dose,
time and anneal temperature are varied to obtain different diffusion junction depths
(2.8m-20m). The etched region is then refilled with in-situ doped N+-polysilicon
having a concentration of 5.01019
cm-3
(Fig. 1(b)). Next the emitter and collector
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regions are implanted with phosphorus at a dose of 5.71015
cm-2
and an energy of
130 keV and annealed at a temperature of 950OC for 20 min (Fig. 1(c)). The base
region is then opened and implanted with boron at an energy of 62 keV and a dose of
5.01012
cm-2
and a drive-in for 120 min at a temperature of 1100OC (Fig. 1(d)). This
is followed by the opening of the base contact window and deposition of 0.3m layer
of in-situ doped P+-polysilicon having a concentration of 5.010
19cm
-3(Fig. 1(e)).
Finally the emitter, base, and collector metalizations are made with Al deposition
(Fig. 1(f)). The Al deposition is extended 5m long [30-31] both at the base-collector
and NN+-junction side for realizing metal plate junction termination with field oxide
thickness of 0.5m. The LBT structure is obtained following the same process
sequence as described for the CTLBT but without the collector-tub. The overall
process sequence gives the emitter/collector and base doping concentration values of
5.01019
cm-3
and 5.01016
cm-3
respectively, and base-emitter junction depth of 7
m. Fig. 2 shows the generated CTLBT and LBT structures and Fig. 3 gives their
common doping profile.
B. Device Simulation
The structures obtained in ATHENA are imported for simulation in the two-
dimensional device simulator ATLAS. The various models activated in simulations
are Fermi-Dirac distribution for carrier statistics, Klaassens unified mobility model
for dopant-dependent low-field mobility, analytical field dependent mobility for high
electric field, Slotboom model for bandgap narrowing, Selberherrs ionization rate
model for impact ionization and Shockley-Read-Hall (SRH) and Klaassen Auger
recombination models for minority carrier recombination lifetime. The SRH
recombination lifetime for silicon is chosen to be 2.0s for a carrier concentration of
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5.01016
cm-3
and for all other concentrations recombination lifetimes are calculated
using Roulstons equation [32]. The collector-emitter breakdown voltage BVCEO is
calculated at a collector current of 1.0A. Figs. 4 and 5 show the Gummel plots andcurrent gain curves for both LBT and CTLBT for VCB=0 V. The simulated peak
common emitter current gain of both the structures is approximately 30 at a collector
current of 0.1 A.
III. Simulation results on breakdown voltage
A. Effect of collector-tub on breakdown voltage
Fig. 6 shows the output characteristics of CTLBT and LBT. Clearly, due to
the presence of the collector-tub, the BVCEO of CTLBT is significantly enhanced when
compared with that of the LBT. We notice that the breakdown voltage has increased
from 93 V (for LBT) to 255 V (for CTLBT) indicating an improvement of 270 %.
The reason for this significant improvement in breakdown voltage can be understood
from Fig. 7, which shows the electric field profile along the drift region length for
every 10V increment in collector-emitter voltage (VCE) and at breakdown. As
expected, the collector-tub allows the electric field build-up to shift from NN+-
junction side to base-collector junction. Also, the applied reverse voltage is now
supported both by the drift and substrate regions. This is illustrated by the potential
contours in Fig. 8 and electric field vector diagram in Fig. 9, both of which show
spreading of electric filed lines. The maximum breakdown voltage of CTLBT,
however, is limited by the peak electric field at the collector-base junction. On the
other hand, as shown in the potential contour lines and electric field vector diagram of
Figs.10 and 11, the LBT structure shows crowding of electric field lines in the BOX
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at the collector NN+-junction and breakdown of silicon film at the silicon-BOX
interface.
B. Effect of device parameters on breakdown voltage
To study how different parameters such as substrate doping, collector-tub
junction depth, drift region doping affect the break down voltage of CTLBT, we have
varied the above parameters and estimated the collector breakdown voltage. Fig. 12
illustrates the effect of substrate doping (NS) on breakdown voltage. We notice that
the breakdown voltage is maximum for an optimum substrate doping. This can be
understood from Fig. 13, which gives the electric field profile at various substrate
dopings. At low substrate dopings, the electric field build-up takes place at the
collector-base junction. The depletion volume in the substrate becomes large and the
substrate leakage current limits the device breakdown. At high substrate dopings,
however, the electric field builds up at the NN+
-junction and breakdown takes place at
the substrate and collector-tub junction interface. A low substrate doping and deep
collector-tub junction depth makes the electric field build-up at the drift region and
the device breakdown is then limited both by the drift region length and its doping.
Fig. 14 shows the effect of collector-tub junction depth (Xj) on the breakdown
voltage and Fig. 15 gives the electric field profile at various Xj. The breakdown
voltage increases with increasing Xj, reaches a maximum and then decreases. This is
because a deep Xj makes the device to behave as a bulk device and the electric field
build-up begins at the collector-base junction. On the other hand, a shallow Xj makes
the electric field to build-up at the NN+-junction and the device acts as a conventional
LBT structure on SOI.
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Fig. 16 shows the electric field profile at different collector-emitter voltages
and at different drift dopings (ND). As seen from the figure, both CTLBT and LBT
breakdown at the NN+-junction side at low dopings. However, the nature of
breakdown is different in both the structures. The CTLBT structure breaks down at
low drift dopings as the drift region is entirely depleted and because the electric field
at the NN+-junction is high. For LBT, breakdown occurs because the electric field at
the silicon-box interface is high. In this case, the electric field distribution is two-
dimensional in nature. The component of the electric field at the NN+
junction side
depletes the lowly doped thin silicon film. When the depletion front reaches the
silicon-BOX interface, the electric field increases substantially causing breakdown.
The breakdown characteristics at high drift dopings are, however, same for both the
structures, which is due to high electric field at the collector-base junction end.
Fig. 17 shows the effect of drift region doping on the breakdown voltage of
CTLBT and LBT. Clearly, both the structures show maximum breakdown voltage for
an optimum doping. However, the optimum drift doping for maximum breakdown
voltage in CTLBT is smaller than that of the LBT structure. This can be explained as
follows. In CTLBT, due to the presence of the collector-tub, the critical electric field
at the collector-base junction determines the maximum breakdown voltage, which is
limited by the drift doping. In the case of LBT, a high drift doping makes the vertical
component of the electric field large, and, therefore, the lateral electrical field
component becomes responsible to cause depletion in the drift region beginning from
the collector-base junction end. However, once the drift region is entirely depleted,
the vertical component becomes dominant and the electric field at the silicon-BOX
interface determines the maximum breakdown voltage. The critical electric field for
breakdown at the silicon-BOX interface is increased with the increase in drift region
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doping and hence the LBT shows optimum breakdown voltage at higher doping when
compared with the CTLBT structure.
Fig. 18 shows the influence of the drift region length (LD) on the breakdown
voltage both for the LBT and CTLBT. For LBT, the breakdown voltage saturates at
lower values of LD, however, for CTLBT, the saturation is observed at higher values
of LD. This is because, in CTLBT, the collector-tub makes the lateral electric field
dominant, and therefore, the drift region length can accommodate the spread of lateral
electric field and the breakdown voltage increases with increasing LD. The breakdown
voltage, however, saturates when both the vertical and lateral components of the
electric field become high as evidenced by the two peaks in the electric field
distribution curve (Fig. 7). For LBT structure, both the vertical and lateral component
contributes to the breakdown process and a longer collector drift region length is of no
consequence for increasing the breakdown voltage.
V. Conclusions
Two-dimensional numerical simulation studies of a collector-tub lateral bipolar
transistor (CTLBT) structure on silicon-on-insulator (SOI) are presented. The CTLBT
has an N-diffusion region at the collector high-low (NN+) junction. The collector-
emitter breakdown voltage (BVCEO) of CTLBT is about 2.7 times higher than that of
the conventional LBT on SOI with identical doping profile. The increased breakdown
voltage in CTLBT is explained as due to the shifting of the electric field from the
collector high-low junction side to the base-collector junction side and also due to the
distribution of the applied reverse potential in the substrate and drift regions. This
potential redistribution, for a given BOX thickness and SOI film thickness, is found to
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be dependent on substrate doping (NS), drift doping (ND) and collector-tub junction
depth (Xj). To realize the CTLBT structure in a standard CMOS process, a process
flow is proposed which needs only additional two masks.
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Figure captions
Fig. 1 Process flow for CTLBT and LBT structure.
Fig. 2(a) Lateral bipolar transistor (LBT) and (b) Collector-tub lateral bipolartransistor (CTLBT) on SOI.
Fig. 3 Doping profile for CTLBT and LBT as obtained from ATHENA.
Fig. 4 Gummel plots of CTLBT compared with that of the LBT.
Fig. 5 Collector current versus Current gain of CTLBT compared with that of the
LBT.
Fig. 6 Common-emitter I-V characteristics of CTLBT and LBT
Fig. 7 Electric field at the silicon film/BOX interface of CTLBT compared with that
of the LBT.
Fig. 8 Potential contours at the substrate of CTLBT at breakdown voltage (255V),
potential contours=10V/step, LD=40m, NS=5.0x1013
cm-3
, ND=2.5x1015
cm-3
,
tOX=1.2m, and Xj=3.0m.
Fig. 9 Electric field vector diagram for CTLBT showing electric field spreading at the
Silicon film/BOX interface and breakdown at the collector-base interface or at the
collector junction/substrate interface.
Fig. 10 Potential contours at the Silicon film of LBT at breakdown voltage (93V),
potential contours=10V/step, LD=40m, NS=5.0x1013
cm-3
, ND=2.5x1015
cm-3
,
tOX=1.2m, and Xj=3.0m.
Fig. 11 Electric field vector diagram for LBT showing field crowding at the BOX and
breakdown at the silicon-BOX interface.
Fig. 12 Effect of substrate doping on the breakdown voltage of CTLBT.
Fig.13 Electric field profile of CTLBT at different substrate dopings.
Fig. 14 Breakdown voltage of CTLBT at different collector-tub junction depths.
Fig. 15 Electric field profile at the silicon film/field oxide interface of CTLBT at
various junction depths.
Fig. 16 Electric field profile along the silicon/BOX and silicon-field oxide interface of
CTLBT for different drift region dopings compared with that of the LBT.
Fig. 17 Effect of drift doping on the breakdown characteristics of CTLBT compared
with that of the LBT.
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Fig. 18 Effect of drift length on the breakdown voltage of CTLBT compared with that
of the LBT.
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Fig. 1
Phosphorus
P- substrate
N
(a)
N+
P- substrate
N
N(b)
N+
P- substrate
N
N(c)
Phosphorus Phosphorus
PN+ N+
P- substrate
N
N (d)
Boron
PN+ N+
P- substrate
N
N (e)
P+ polysilicon contact
(f)
B CE
PN+ N+
P- substrate
N
N
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Fig. 2
(a)
N+
P- substrate
P N N+
CBE
BOX
(b)
N+
P- substrate
Buried oxide
P N N+
N-collectortub
BOX
CBE
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Fig. 4
0.2 0.4 0.6 0.8 1.0
IC
IB
CTLBT, Xj=3.0m
LBT- - - -
ND=2.5x10
15cm
-3
NS=5.0x10
13cm
-3
LD=40m
tOX
=1.2m
VCB=0 V
10-15
10-13
10-11
10-9
10-7
10-5
10-3
10-17
IC,IB[A]
Base-emitter voltage, VBE
[ V ]
0 10 20 30 40 50 60
1018
1014
10
15
1016
1017
1019
1020
CollectorEmitter
Drift regionP
N
N+
N+
Base
Netdoping[cm-3]
Lateral distance [ m ]
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0 50 100 150 200 250 300
0
1
23
4
5
6
7
- - - -CTLBT, X
j=3.0m
LBTIB=0 to 0.25A @ 0.05A
IB=0
Collector-emitter voltage, VCE
[ V ]
ND=2.5x10
15cm
-3
NS=5.0x10
13cm
-3
LD=40m
tOX
=1.2m
Collector
current[A
]
Fig. 6
0
5
10
15
20
25
30
35
- - - -
VCB
=0 V
CTLBT, Xj=3.0m
LBT
ND=2.5x10
15cm
-3
NS=5.0x10
13cm
-3
LD=40mtOX
=1.2m
10-7
10-9
10-11
10-5
10-13
Curre
ntgain,
Collector current, IC
[ A ]
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Fig. 8
Fig. 7
E B C
BOX
N+ N N+P
Depletion layer
N
VCEO=0 V VCEO=255 V
60
60
Lateral distance [ m ]
Verticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2
-2.2
-1.2
P-substrate
E B C
BOX
N+ N N+P
Depletion layer
N
VCEO=0 V VCEO=255 V
60
60
Lateral distance [ m ]
Verticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2
-2.2
-1.2
P-substrate
10 20 30 40 50 600.0
0.5
1.0
1.5
2.0
2.5
BVCEO
=255V
CTLBT, Xj=3.0m
LBT- - - - BVCEO=93V
BVCEO=25V
VCEO
increment @ 25 V
ND=2.5x10
15cm
-3
NS=5.0x10
13cm
-3
LD=40m
tOX
=1.2m
E
lectricfield[x105Vcm-1]
Lateral distance [ m ]
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Fig. 10
E B C
BOX
N+ N N+P
Depletion layer
N
60
60
Lateral distance [ m ]
Ver
ticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2-2.2
-1.2
P-substrate
Breakdown
E B CE B C
BOX
N+ N N+P
Depletion layer
N
60
60
Lateral distance [ m ]
Ver
ticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2-2.2
-1.2
P-substrate
Breakdown
Fig. 9
E B C
Lateral distance [ m ]
BOX
N+ N N+P
60
60
Verticaldist
ance[m]
5040300 10 20
70
5040
01020
30
-3.2
-2.2
-1.2
VCEO=93 V
Depletion layer
P-substrate
VCEO=0 V
E B C
Lateral distance [ m ]
BOX
N+ N N+P
60
60
Verticaldist
ance[m]
5040300 10 20
70
5040
01020
30
-3.2
-2.2
-1.2
VCEO=93 V
Depletion layer
P-substrate
VCEO=0 V
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Fig. 11
1013
1014
1015
80
100
120
140
160
180
200N
D=1.0x10
15cm
-3
LD=40m
Xj=3.0m
tOX
=1.2m
B
reakdownvoltage[V]
Substrate doping [ cm-3
]
Fig. 12
E B C
Depletion layer
60
60
Lateral distance [ m ]
Verticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2
-2.2
-1.2
P-substrate
Breakdown
BOX
N+ N N+P
E B CE B C
Depletion layer
60
60
Lateral distance [ m ]
Verticaldistance[m]
5040300 10 20
70
5040
0102030
-3.2
-2.2
-1.2
P-substrate
Breakdown
BOX
N+ N N+P
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Fig. 13
3 6 9 12 15 18 21180
200
220
240
260
280
ND=1.0x10
15cm
-3
NS=5.0x10
13cm
-3
LD=40m
tOX
=1.2m
BreakdownVoltage[V]
Collector-tub junction depth [ m ]
Fig. 14
10 20 30 40 50 60
0.0
0.5
1.0
1.5
2.0
ND=1.0x10
15cm
-3
LD=40m
Xj=3.0m
tOX
=1.2m
Elec
tricfield[x105Vcm-1]
Lateral distance [ m ]
NS=1.0x10
13cm
-3, BV
CEO=110V
NS=5.0x10
13cm
-3, BV
CEO=195V
NS=1.0x10
15cm
-3, BV
CEO=95V
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Fig. 16
10 20 30 40 50 600.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
NS=5.0x1013cm-3
LD=40m
Xj=3.0m
tOX
=1.2m
Si-BOX interface
Si-BOX interfaceSi-field oxide interface
Si-field oxide interfaceLBT
CTLBT
ND=1.6x10
16cm
-3
ND=1.0x10
14cm
-3
Electricfield[
x105Vcm-1]
Lateral distance [ m ]
10 20 30 40 50 600.0
0.5
1.0
1.5
2.0
ND=1.0x10
15cm
-3
NS
=5.0x1013
cm-3
LD=40m
tOX
=1.2m
Xj=2.6m, BV
CEO=192V
Xj=13.2m, BV
CEO=270V
Xj=19.5m, BV
CEO=226V
Electricfield[x105Vcm-1]
Lateral distance [ m ]
Fig. 15
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Fig. 18
100
150
200
250N
S=5.0x10
13cm
-3
LD=10m
tOX
=1.2m
1016
1015
1014
B
reakdownvoltage[V]
Drift doping [ cm-3
]
CTLBT, Xj=3.0m
LBT
Fig. 17
10 20 30 40 5050
100
150
200
250
300
ND=2.5x10
15cm
-3
NS=5.0x10
13cm
-3
tOX
=1.2m
Breakdownvoltage[V]
Drift region Length, LD
[ m ]
CLBT, Xj=3.0m
LBT