Remiting for Clockperiod Minimization

8/12/2019 Remiting for Clockperiod Minimization

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Retiming for clock periodminimization

Arunachalam V

AP SG, SENSE


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Minimum feasible clock period Minimizing the clock period of a synchronous circuit, G . For any circuit G , the minimum feasible clock period is the

computation time of the critical path. Mathematically the minimum feasible clock period (G) , is

defined as 0:max pw pt G


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Description of W and D matrix The algorithm finds a retiming solution r 0 such that

for any other retiming solution r . Let W(U,V) is the minimum number of registers on any path

from node U to node V .

Let D(U,V) is the maximum computation time among all pathsfrom node U to node V with weight W(U,V) .

GG r 0

V U pwV U W p

:min,

),(:max, V U W pwand V U pt V U D p


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Algorithm steps 1 to 3

1. Let M=t max .n ,t max = maximum computation time of the nodes in G .n = number of nodes in G .

2. Form a new graph G which is same as G except the edgeweights are replaced by

3. Solve the all-pairs shortest path problem on G . Let be

the shortest path from U to V .

V U edgesall for U t ew M ewe

.''UV S


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Algorithm step 4

4. If , then and

If , then and

is the ceiling of x, which is the smallest integer greaterthan or equal to x.

V U M S

V U W UV '

, V UV t S V U W M V U D ',.,

V U 0, V U W U t V U D ,

x


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An Example

Step 184.2

42max M

nand t

Step 2

711812'

220824'

220823'

1512841'

711831'

e

e

e

e

e

w

w

w

w

w


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Step 3Solve the all-pairs shortest path on G using Floyd-Warshallalgorithm.For n=4,

'UV S

2

2

7

157

41;41;0

1 R

toU toV k

2

2

22147157

41;41;1

2 R

toU toV k

201225

201225

22147

157

41;41;2

3 R

toU toV k

201225

201225

2214127

15751241;41;3

4 R

toU toV k

'5

201225

201225

2214127

157512

41;41;4

UV S R

toU toV k


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Step 4

0201

3001

3201

2110

,V U W

V U M S

V U W UV '

,

V U 0, V U W

201225

201225

2214127

157512

'UV S

V U V t S V U W M V U D UV ',.,

V U U t V U D ,

2634

6234

4412

3341

,V U D

M=8


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Constraints If c be the desired clock to be achieved by the retiming, then

there is a feasible retiming solution r such that This is ensured by the following constraints

1. Feasibility constraint : for every edge of G . This forces the number of delays on each edge in the retimed graph to be non

negative

2. Critical path constraint: for all vertices U,V insuch that .

Enforces . If , then must hold for

the critical path to have computation time less than or equal to c.

cG r

ewV r U r V U e

1, U r V r V U W cV U D ,

cG 1, V U W V r U r cV U D ,


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Feasibility constraint

024

023

112241

131

r r

r r

r r r r

r r

ewV r U r


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Critical path constraint

0201

3001

3201

2110

,V U W

33,413,4134

31,411,4014

34,314,3243

31,311,3013

34,214,2242

33,213,2132

32,112,1021

D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

2634

6234

4412

3341

,V U D

cV U D for V U W V r U r ,1,


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024

023

112

241

131

r r

r r

r r

r r

r r

134

014

243

013242

132

021

r r

r r

r r

r r r r

r r

r r

243

242

241

134132

131

024

023021

014

013

112

r r

r r

r r

r r r r

r r

r r

r r r r

r r

r r

r r

Constraint Graph will be solved forretiming solution using Bellman-Fordor Floyd-Warshall algorithmr(1) = r(2) = r(3) = r(4) = 0 ; noretiming required for c=3


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Critical path constraint for c=2

0201

3001

3201

2110

,V U W

23,413,4134

22,412,4124

21,411,4014

24,314,324322,312,3123

21,311,3013

24,214,2242

23,213,2132

24,114,1141

23,113,1031

22,112,1021

D for W r r

D for W r r

D for W r r

D for W r r D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

D for W r r

2634

6234

4412

3341

,V U D

cV U D for V U W V r U r ,1,


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For c=2 024

023

112

241

131

r r

r r

r r

r r

r r 243

242

141

134

132

031

124

123

021

014

013

112

r r

r r

r r

r r

r r

r r

r r

r r

r r

r r

r r

r r

134

124

014

243

123

013

242132

141

031

021

r r

r r

r r

r r

r r

r r

r r r r

r r

r r

r r


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RETIMING FOR REGISTER MINIMIZATION

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Remiting for Clockperiod Minimization