CMPUT101

Chapter 4.1-4.3 1

ch4-c101 1

Representing & manipulating

states in a physical device: hardware design

Why 0's and 1's?

The "what":

Number systems and coding systems

integers, real numbers, characters

precision, overflow errors

Boolean Logic and Gates

The "how": circuits

Understand what a simple circuit does

Design a circuit to do a simple task

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state = noneGet value for CWhile ( (not end-of-string) AND (not state match_rose)) { IF (state == none)

if (C == r ) state = match_r

ELSE IF (state == match_r)if ( C == o ) state = match_ro

else if (C == r ) state = match_r else state = none

ELSE IF (state = match_ro) if (C == s ) state = match_ros

else if (C == r ) state = match_r else state = none

ELSE IF (state == match_ros) if (C == e ) state = match_rose else if (C == r ) state = match_r else state = none C= read next character} // end of while loop

IF ( state == Match_rose) PRINT " Found a rose!!" ELSE PRINT "No rose"

CMPUT101

Chapter 4.1-4.3 2

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• Given

– computation is a finite alternating sequence of states andtransitions betweens states (FSM as conceptual model)

– and we want a physical device to do computation, thusdefined

• Then

– we need to have (invent, create) a physical device thatcan represent "state" in a reliable way

– and can 'make transitions' between states

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• Need states that a physical machine can 'hold' and waysto make transitions between them

• Need coding schemes that map patterns of these internalmachine states to our symbols

– Integers (234, 456)

– Positive/negative value (-100, -23)

– Real numbers ( 12.345, 3.14159)

– Characters (letters, digits, symbols)

• Need way for physical machine to manipulate these states– "add 1 to index" "equal to" "less than or equal to"

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Chapter 4.1-4.3 3

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Transistor – Conceptual Model

• The control line (base) is used to open/close switch:

– If voltage applied then switch closes, otherwise is open

• Switch decides state of transistor:

– Open: no current flowing through (0 state)

– Closed: current flowing through (1 state)

In (Collector)

Out (Emitter)

Control (Base)

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CMPUT101

Chapter 4.1-4.3 4

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Why a 2-state device?

Why not 10-states? (e.g., one for each number)

• Technical reliability for electronic devices: a "bi stableenvironment"

• Boolean logic as a theoretical foundation

ch4-c101 8

Numbering Systems:

alternative representations of numeric concepts

• IIIIIIIIIIII III

• Roman Numerals….

• Decimal Numbering System

(base 10)

XIII

+ II

8

+2

10

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Chapter 4.1-4.3 5

ch4-c101 9

01

2

3

45

6

7

8

90

1

2

3

45

6

7

8

90

1

2

3

45

6

7

8

9

0

1

0

1

0

1

0

1

0

1

ch4-c101 10

Moving between decimal and binary

(base 10 and base 2)

• Decimal "Base 10" 10 unique symbols

• Binary "Base 2" 2 unique symbols

101 base 10 101 base 2

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Chapter 4.1-4.3 6

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More examples: base 10 to base 2, and back

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– base-3 0 1 2

– base-4 0 1 2 3

– base-8 0, 1, 2, 3, 4, 5, 6, 7

– base-16 (Hexadecimal)

• 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F

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Chapter 4.1-4.3 7

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Unsigned Integers

• A 16-bit representation of 14:

• Largest (unsigned) 16-bit integer

0111000000000000

1111111111111111

= 1x215 + 1x214 + … + 1x21 + 1x20 = 65,535

= 2 16 - 1

ch4-c101 14

Representing Signed Integers: Sign/Magnitude Method

• Assume 8 bits

• Largest 8-bit signed integer?

01110001

Sign bit . 0: positive 1: negative Most significant bit (MSB) : left most bit

1

20

2

21

4

22

8

23

16

24

32

25

64

26

11111110

1

20

2

21

4

22

8

23

16

24

32

25

64

26

26 + 25 + 24 + 23 + 24+ 22 + 21 + 20 =

64 + 32 + 16+ 8 + 4 + 2 + 1 = 127

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Chapter 4.1-4.3 8

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•Zero is represented twice

•Addition does not work as we would want it to

–consider : (-3) + (+2) = -1

–using 4 bits (leftmost is sign bit) we get

-3 1011

+2 0010

-1 1101 this is not -1 ..it is - 5

Problem with sign-magnitude notation….

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Representing signed integers:1's complement notation

1's complement in binary for a positive integer using n bits:

no different than sign-magnitude

+36 = 0 0 1 0 0 1 0 0

1's complement in binary for negative integers using n bits:

rule: subtract its positive representation in n bits from 2n-1

example: -36 in 8 bits

positive magnitude is 0 0 1 0 0 1 0 0 (as above)

n = 8, so 2n -1 is 28 - 1 = 255

but that is just 1 1 1 1 1 1 1 1

1 1 1 1 1 1 1 1

- 0 0 1 0 0 1 0 0

1 1 0 1 1 0 1 1Answer: - 36 in 1's complement notation

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Chapter 4.1-4.3 9

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Converting decimal to 1's complement

and reverse

+ 7 in 1's complement, 4 bits 0 1 1 1

-7 in 1's complement, 4 bits 1 0 0 0

+ 23 in 1's complement, 8 bits

-23 in 1's complement, 8 bits

Q: What is 1 1 1 1 0 0 0 0 if this is 1's complement notation?

A: (a) it's negative (b) invert bits 0 0 0 0 1 1 1 1 (c ) interpret entire bit string

8 + 4 + 2 + 1 = 15 Answer: -15

111010 00

1

20

2

21

4

22

8

23

16

24

32

25

64

26

sign

000101 11

1

20

2

21

4

22

sign

ch4-c101 18

2's complement notation--

builds on 1's complement

positive integers in n bits

just like sign-magnitude or 1's complement

negative integers n bits:

• formally, in 1's complement: subtract positive representation

from 2n-1

• formally, in 2's complement: subtract positive representation

from 2n

Easy algorithm:

to get 2's complement for a negative integer, represent the

positive integer, invert the bits, add 1

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Chapter 4.1-4.3 10

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-23 in 2's complement notation

111010 00

1

20

2

21

4

22

8

23

16

24

32

25

64

26

sign

000101 11

+ 23, 1's complement

- 23, 1's complement

Add 1 1 1 1 0 1 0 0 1

+ 23 in 2's complement: 0 0 0 1 0 1 1 1

- 23 in 2's complement: 1 1 1 0 1 0 0 1

ch4-c101 20

In 2's complement…

Easy to get from positive to negative to positive again

+3 is 0011 (a) invert bits, yields 1100 (b) add 1, yields 1 1 0 1, which is - 3

-3 is 1101 (a)invert bits, yields 0010 (b) add 1, yields 0011, which is +3 again

Interpreting a 2's complement notation

What is 1101? (a) it's negative (b) to get the value, Invert and add 1.

Answer: -3

What is 1111? (a) it's negative (b) to get the value, invert and add1

0 0 0 0 + 1 = 0 0 0 1. Answer: - 1

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Representing Signed Integers:

Two’s Complement Method (illustrated with 4 bits)

• Positive numbers: Represented as wewould expect

– 0 1 1 1 + 7

– 0 1 1 0

– 0 1 0 1 + 5

– 0 1 0 0

– 0 0 1 1 + 3

– 0 0 1 0

– 0 0 0 1 + 1

– 0 0 0 0 zero

ch4-c101 22

2's complement notation for positive and negative #'s:

4 bit example

0 1 1 1 7

0 1 1 0 6

0 1 0 1 5

0 1 0 0 4

0 0 1 1 3

0 0 1 0 2

0 0 0 1 1

0 0 0 0 0

1 1 1 1 -1

1 1 1 0 -2

1 1 0 1 -3

1 1 0 0 -4

1 0 1 1 -5

1 0 1 0 -6

1 0 0 1 -7

1 0 0 0 -8

Negative numbers: set -1 to 1111 and

start counting backwards (subtract 1

each time)

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2's complement arithmetic

-3 1 1 0 1

+ 2 0 0 1 0

-1 1 1 1 1

1. Addition works as per binary arithmetic

2. If addition works, so does subtraction (5 -3) is 5 + (-

3).

3. So does multiplication (repeated addition) and so

does division (repeated subtraction)

ch4-c101 24

Arithmetic Overflow

(4 bit example)

4 0 1 0 0

+ 5 0 1 0 1

1 0 0 1 does not equal + 9

- 4 1 1 0 0

+ - 7 1 0 0 1

0 1 0 1 does not equal - 11

3 0 0 1 1

+ 2 0 0 1 0

0 1 0 1

When the carry in to the MSB does not match the carry out of the

MSB, an overflow occurs

1

CMPUT101

Chapter 4.1-4.3 13

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More 2's complement arithmetic

+9 0 0 0 0 1 0 0 1

+ (-5) 1 1 1 1 1 0 1 1

+ 4 1 0 0 0 0 0 1 0 0 overflow?

- 5 1 1 1 1 1 0 1 1

+- 4 1 1 1 1 1 1 0 0

-9 1 1 1 1 1 0 1 1 1

ch4-c101 26

1. 3 different notations (sign-magnitude, 1's

complement, 2's complement)

2. 2's complement is what is used

1. Ease of circuit construction for arithmetic

operations (will see this later)

3. You should be able to

1. Convert from base 10- to base 2

2. encode a base-10 # into 2's complement notation

3. interpret a 2's complement notation as its base-10 #

4. Explain and recognize overflow

5. Be able to represent a positive base 10 number in a different

number system (e.g., base 3)

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Representing Real Numbers

.125.25.51248

23 2-32-22-1202122…

Example: 5.75

Extend the positional information for fractional information…

ch4-c101 28

Problem: the position of the decimal point 101.11

Recall Scientific notation (base 10 examples):

2050 = 2.05 x 10+3 = 205 x 10 +4

± M x B ±E

– B base

– M mantissa

– E is the exponent.

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Normalization: "float" the decimal point,

5.75 base 10

101.11 base 2 101.11 x 20

“Float” the decimal in front of the first (significant) digit

101.11 x 20 = .10111 x 23

ch4-c101 30

Take the 16 bit representation, store all the elements

necessary to "decode"

1100000000111010

+ .10111 x 2 +3

Exponent (6 bits)Mantissa (10 bits)

CMPUT101

Chapter 4.1-4.3 16

ch4-c101 31

1100000000111010

Exponent (6 bits)Mantissa (10 bits)

Another example: 5.75

101.11 x 20

.10111 x 23

Fill mantissa information from left, exponent from right

ch4-c101 32

Real Number representation:

Precision and Round off

Represent: 2 .98

01000011111010

Exponent (6 bits)

Mantissa (10 bits)

11111101

.03125.0625.125.25.512

20 2-62-52-42-32-121

.015625

2-2

.10111111 x 2 2 Fill mantissa from

left, exponent

from right

.984375

.96875

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Representing non-numeric information

…

z

y

x

…

C

B

A

Char

…

122

121

120

…

67

66

65

Integer

…

01111010

01111001

01111000

…

01000011

01000010

01000001

Binary

………

00110010502

00110001491

00110000480

…… …

0010001034“

0010000133!

0010000032

BinaryIntegerChar

ASCII (American Standard Code for Information Interchange)

Unicode: 16 bits

ch4-c101 34

Representing Text

• Representing the word “Hello” in ASCII

0110111101101100011011000110010101001000

11110810810172

olleH

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Boolean Logic & Gates

Review:

Boolean logic

boolean values

boolean expressions

boolean operators & truth tables

ch4-c101 36

evaluating complex boolean expressions

• Assume X is 10 and Y is 15.

• Consider:

– X=10 OR X=5 AND Y<0

TrueX=10 OR (X=5 AND Y<0)

False(X=10 OR X=5) AND Y<0

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Evaluating Boolean Expressions

• Assume X=10, Y=15, and Z=20

• (X=Y) OR (NOT (X>Z))

• NOT ( (X>Y) AND (Z>Y) AND (X<Z) )

• ( (X=Y) AND (X=10) ) OR (Y<Z)

ch4-c101 38

Transistor

In (Collector)

Out (Emitter)

Control (Base)

CMPUT101

Chapter 4.1-4.3 20

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Constructing an AND Gate

CMPUT101

Chapter 4.1-4.3 21

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Constructing an OR Gate

ch4-c101 42

Constructing a NOT Gate

CMPUT101

Chapter 4.1-4.3 22

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From Boolean Logic to Gates: AND, OR, NOT

(visual notation….)

+

ch4-c101 44

• Notation for gates as implementing boolean

operators

– visual notation and new written notation

– We will use this visual notation to understand

circuits and design new ones